Re: [PATCH 1/1] DSPBRIDGE: cache operation against kernel address instead of user's

[Russell King <rmk@arm.linux.org.uk>]

On Tue, Nov 17, 2009 at 08:41:08AM +0200, Hiroshi DOYU wrote:
> From: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
> Subject: Re: [PATCH 1/1] DSPBRIDGE: cache operation against kernel address instead of user's
> Date: Fri, 13 Nov 2009 12:12:12 +0200 (EET)
> 
> > From: "Doyu Hiroshi (Nokia-D/Helsinki)" <hiroshi.doyu@nokia.com>
> > Subject: [PATCH 1/1] DSPBRIDGE: cache operation against kernel address instead of user's
> > Date: Fri, 6 Nov 2009 13:34:21 +0100
> > 
> > > From: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
> > > 
> > > Based on the discussion:
> > >   http://www.spinics.net/lists/arm-kernel/msg72810.html
> > > 
> > > HACK: export "follow_page()" for dspbridge cache operation
> > > 
> > > Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
> > > ---
> 
> Now there's no need for homebrewed cache function because we use
> kernel address and can pass "virt_addr_valid()" check in
> "dma_cache_maint()".

Note that with the advent of ARMv7/Cortex A9, dma_cache_maint() is going
away - and probably will be gone during the next merge window.  There is
no directly equivalent replacement for it - it is being replaced by two
sets of functions, one to be called prior to DMA and another to be called
after DMA has completed.

In the longer run, it is likely that the 'dmac_*_range' and 'outer_*_range'
will probably also be going away, to be replaced by two new per-cpu methods
along the lines of the above.

I think this may throw a spanner in the works for this patch, but it's
necessary to make Cortex A9 work.

-- 
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of: