Linux on ARM based TI OMAP SoCs
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From: Tony Lindgren <tony@atomide.com>
To: Felipe Balbi <me@felipebalbi.com>
Cc: paul@pwsan.com, linux-omap@vger.kernel.org
Subject: Re: L4 interconnect memory mapping
Date: Tue, 29 Dec 2009 15:46:57 -0800	[thread overview]
Message-ID: <20091229234657.GO3512@atomide.com> (raw)
In-Reply-To: <1262129299.28789.97.camel@gandalf>

* Felipe Balbi <me@felipebalbi.com> [091229 15:26]:
> Hi,
> 
> On Wed, 2009-12-30 at 01:25 +0200, Felipe Balbi wrote:
> > Hi Tony and Paul,
> > 
> > maybe a silly question, but here it goes:
> > 
> > Do we have any piece of code handling the L4 interconnect memory space ?
> > I mean, looking at omap3 TRM pages 212 - 219, I see that e.g. for the
> > musb block we have:
> > 
> > HS USB OTG	0x480AB000 - 0x480ABFFF	4KB	Module
> > 		0x480AC000 - 0x480ACFFF	4KB	L4 interconnect
> > 
> > So the first 4K is what we pass down to drivers via struct resource and
> > the second 4K ? What do we do with that ?
> 
> no with Paul's address correct.

Looks like you might want to update your earlier patch to just comment
that the 8K address space for musb is 4K + 4K for L4 interconnect :)

Tony

  reply	other threads:[~2009-12-29 23:47 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-12-29 23:25 L4 interconnect memory mapping Felipe Balbi
2009-12-29 23:28 ` Felipe Balbi
2009-12-29 23:46   ` Tony Lindgren [this message]
2009-12-29 23:50     ` Felipe Balbi
2009-12-30  6:17       ` Shilimkar, Santosh
2009-12-30  9:16       ` Paul Walmsley
2009-12-30 11:56         ` Felipe Balbi

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