[PATCH 01/24] omap 3/4: uart: fix full-fifo write abort

[PATCH 01/24] omap 3/4: uart: fix full-fifo write abort

[Santosh Shilimkar]

This patch is addition to the already merged commit on non-empty
uart fifo read abort. "ce13d4716a276f4331d78ba28a5093a63822ab95"

OMAP3630 and OMAP4430 UART IP blocks have a restriction on TX FIFO
too. If you try to write to the tx fifo when it is full, the system aborts.

This can be easily reproducible by not suppressing interconnect errors or
long duration testing where continuous prints over console from multiple
threads. This patch is addressing the issue by ensuring that write is
not issued while fifo is full. A timeout is added to avoid any hang
on fifo-full for 10 mS which is unlikely case.

Patch is validated on OMAP3630 and OMAP4 SDP.

V2 version removed the additional 1 uS on every TX as per
Tony's suggestion

Signed-off-by: Woodruff Richard <r-woodruff2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
CC: Ghorai Sukumar <s-ghorai@ti.com>
---
 arch/arm/mach-omap2/serial.c |   31 ++++++++++++++++++++++++++++---
 1 files changed, 28 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 5f3035e..b79bc89 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -23,6 +23,7 @@
 #include <linux/serial_reg.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/delay.h>
 
 #include <plat/common.h>
 #include <plat/board.h>
@@ -160,6 +161,13 @@ static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
 	return (unsigned int)__raw_readb(up->membase + offset);
 }
 
+static inline void __serial_write_reg(struct uart_port *up, int offset,
+		int value)
+{
+	offset <<= up->regshift;
+	__raw_writeb(value, up->membase + offset);
+}
+
 static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
 				    int value)
 {
@@ -620,6 +628,20 @@ static unsigned int serial_in_override(struct uart_port *up, int offset)
 	return __serial_read_reg(up, offset);
 }
 
+static void serial_out_override(struct uart_port *up, int offset, int value)
+{
+	unsigned int status, tmout = 10000;
+
+	status = __serial_read_reg(up, UART_LSR);
+	while (!(status & UART_LSR_THRE)) {
+		/* Wait up to 10ms for the character(s) to be sent. */
+		if (--tmout == 0)
+			break;
+		udelay(1);
+		status = __serial_read_reg(up, UART_LSR);
+	}
+	__serial_write_reg(up, offset, value);
+}
 void __init omap_serial_early_init(void)
 {
 	int i;
@@ -721,11 +743,14 @@ void __init omap_serial_init_port(int port)
 	 * omap3xxx: Never read empty UART fifo on UARTs
 	 * with IP rev >=0x52
 	 */
-	if (cpu_is_omap44xx())
+	if (cpu_is_omap44xx()) {
 		uart->p->serial_in = serial_in_override;
-	else if ((serial_read_reg(uart->p, UART_OMAP_MVER) & 0xFF)
-			>= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
+		uart->p->serial_out = serial_out_override;
+	} else if ((serial_read_reg(uart->p, UART_OMAP_MVER) & 0xFF)
+			>= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) {
 		uart->p->serial_in = serial_in_override;
+		uart->p->serial_out = serial_out_override;
+	}
 }
 
 /**
-- 
1.6.0.4

[PATCH 02/24] omap2/3/4: ioremap omap_globals module

[Santosh Shilimkar]

This is a clean-up patch towards dynamic allocation of IO space
instead of using harcoded macros to calculate virtual addresses.

Also update the sdrc, prcm, tap and control module to
allocate iospace dynamically

As per Tony's suggestion V2 version drops tap changes
becasue ioremap uses cpu_is_omap2420() and cpu_is_omap2430(),
so we can't use that for setting tap_base. Hence ioremap()
won't work for tap until omap2_check_revision() is done

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
CC: Kevin Hilman <khilman@deeprootsystems.com>
CC: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/control.c            |    6 ++++-
 arch/arm/mach-omap2/prcm.c               |   16 ++++++++++--
 arch/arm/mach-omap2/sdrc.c               |   11 +++++++-
 arch/arm/plat-omap/common.c              |   38 +++++++++++++++---------------
 arch/arm/plat-omap/include/plat/common.h |   12 ++++----
 5 files changed, 52 insertions(+), 31 deletions(-)

diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index cdd1f35..43f8a33 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -140,7 +140,11 @@ static struct omap3_control_regs control_context;
 
 void __init omap2_set_globals_control(struct omap_globals *omap2_globals)
 {
-	omap2_ctrl_base = omap2_globals->ctrl;
+	/* Static mapping, never released */
+	if (omap2_globals->ctrl) {
+		omap2_ctrl_base = ioremap(omap2_globals->ctrl, SZ_4K);
+		WARN_ON(!omap2_ctrl_base);
+	}
 }
 
 void __iomem *omap_ctrl_base_get(void)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index e8e121a..338d5f6 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -279,9 +279,19 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, const char *name)
 
 void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
 {
-	prm_base = omap2_globals->prm;
-	cm_base = omap2_globals->cm;
-	cm2_base = omap2_globals->cm2;
+	/* Static mapping, never released */
+	if (omap2_globals->prm) {
+		prm_base = ioremap(omap2_globals->prm, SZ_8K);
+		WARN_ON(!prm_base);
+	}
+	if (omap2_globals->cm) {
+		cm_base = ioremap(omap2_globals->cm, SZ_8K);
+		WARN_ON(!cm_base);
+	}
+	if (omap2_globals->cm2) {
+		cm2_base = ioremap(omap2_globals->cm2, SZ_8K);
+		WARN_ON(!cm2_base);
+	}
 }
 
 #ifdef CONFIG_ARCH_OMAP3
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index cbfbd14..4c65f56 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -119,8 +119,15 @@ int omap2_sdrc_get_params(unsigned long r,
 
 void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
 {
-	omap2_sdrc_base = omap2_globals->sdrc;
-	omap2_sms_base = omap2_globals->sms;
+	/* Static mapping, never released */
+	if (omap2_globals->sdrc) {
+		omap2_sdrc_base = ioremap(omap2_globals->sdrc, SZ_64K);
+		WARN_ON(!omap2_sdrc_base);
+	}
+	if (omap2_globals->sms) {
+		omap2_sms_base = ioremap(omap2_globals->sms, SZ_64K);
+		WARN_ON(!omap2_sms_base);
+	}
 }
 
 /**
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 4f29e8c..ee9499e 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -256,11 +256,11 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
 static struct omap_globals omap242x_globals = {
 	.class	= OMAP242X_CLASS,
 	.tap	= OMAP2_L4_IO_ADDRESS(0x48014000),
-	.sdrc	= OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
-	.sms	= OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE),
-	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE),
-	.prm	= OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
-	.cm	= OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
+	.sdrc	= OMAP2420_SDRC_BASE,
+	.sms	= OMAP2420_SMS_BASE,
+	.ctrl	= OMAP2420_CTRL_BASE,
+	.prm	= OMAP2420_PRM_BASE,
+	.cm	= OMAP2420_CM_BASE,
 	.uart1_phys	= OMAP2_UART1_BASE,
 	.uart2_phys	= OMAP2_UART2_BASE,
 	.uart3_phys	= OMAP2_UART3_BASE,
@@ -277,11 +277,11 @@ void __init omap2_set_globals_242x(void)
 static struct omap_globals omap243x_globals = {
 	.class	= OMAP243X_CLASS,
 	.tap	= OMAP2_L4_IO_ADDRESS(0x4900a000),
-	.sdrc	= OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
-	.sms	= OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE),
-	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
-	.prm	= OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
-	.cm	= OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
+	.sdrc	= OMAP243X_SDRC_BASE,
+	.sms	= (OMAP243X_SMS_BASE),
+	.ctrl	= (OMAP243X_CTRL_BASE),
+	.prm	= (OMAP2430_PRM_BASE),
+	.cm	= (OMAP2430_CM_BASE),
 	.uart1_phys	= OMAP2_UART1_BASE,
 	.uart2_phys	= OMAP2_UART2_BASE,
 	.uart3_phys	= OMAP2_UART3_BASE,
@@ -298,11 +298,11 @@ void __init omap2_set_globals_243x(void)
 static struct omap_globals omap3_globals = {
 	.class	= OMAP343X_CLASS,
 	.tap	= OMAP2_L4_IO_ADDRESS(0x4830A000),
-	.sdrc	= OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
-	.sms	= OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE),
-	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
-	.prm	= OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
-	.cm	= OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
+	.sdrc	= (OMAP343X_SDRC_BASE),
+	.sms	= (OMAP343X_SMS_BASE),
+	.ctrl	= (OMAP343X_CTRL_BASE),
+	.prm	= (OMAP3430_PRM_BASE),
+	.cm	= (OMAP3430_CM_BASE),
 	.uart1_phys	= OMAP3_UART1_BASE,
 	.uart2_phys	= OMAP3_UART2_BASE,
 	.uart3_phys	= OMAP3_UART3_BASE,
@@ -325,10 +325,10 @@ void __init omap2_set_globals_36xx(void)
 static struct omap_globals omap4_globals = {
 	.class	= OMAP443X_CLASS,
 	.tap	= OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
-	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
-	.prm	= OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
-	.cm	= OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
-	.cm2	= OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
+	.ctrl	= (OMAP443X_CTRL_BASE),
+	.prm	= (OMAP4430_PRM_BASE),
+	.cm	= (OMAP4430_CM_BASE),
+	.cm2	= (OMAP4430_CM2_BASE),
 	.uart1_phys	= OMAP4_UART1_BASE,
 	.uart2_phys	= OMAP4_UART2_BASE,
 	.uart3_phys	= OMAP4_UART3_BASE,
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index e04a58e..dc8a897 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -41,12 +41,12 @@ extern struct sys_timer omap_timer;
 struct omap_globals {
 	u32		class;		/* OMAP class to detect */
 	void __iomem	*tap;		/* Control module ID code */
-	void __iomem	*sdrc;		/* SDRAM Controller */
-	void __iomem	*sms;		/* SDRAM Memory Scheduler */
-	void __iomem	*ctrl;		/* System Control Module */
-	void __iomem	*prm;		/* Power and Reset Management */
-	void __iomem	*cm;		/* Clock Management */
-	void __iomem	*cm2;
+	unsigned long   sdrc;           /* SDRAM Controller */
+	unsigned long   sms;            /* SDRAM Memory Scheduler */
+	unsigned long   ctrl;           /* System Control Module */
+	unsigned long   prm;            /* Power and Reset Management */
+	unsigned long   cm;             /* Clock Management */
+	unsigned long   cm2;
 	unsigned long	uart1_phys;
 	unsigned long	uart2_phys;
 	unsigned long	uart3_phys;
-- 
1.6.0.4

[PATCH 03/24] omap4: sdma: Enable the idle modes on omap4

[Santosh Shilimkar]

This patch enables smart-idle idlemodes and autoidle for sDMA
on OMAP4

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/plat-omap/dma.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 30ff525..5ec96db 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2138,7 +2138,7 @@ static int __init omap_init_dma(void)
 		setup_irq(irq, &omap24xx_dma_irq);
 	}
 
-	if (cpu_is_omap34xx()) {
+	if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
 		/* Enable smartidle idlemodes and autoidle */
 		u32 v = dma_read(OCP_SYSCONFIG);
 		v &= ~(DMA_SYSCONFIG_MIDLEMODE_MASK |
-- 
1.6.0.4

[PATCH 04/24] omap: sdma: Limit the secure reserve channel fix for omap3

[Santosh Shilimkar]

The commit 'ba50ea7e' reserves DMA channels 0 and 1 on high
security devices, in order to avoid collision between kernel
dma transfers and ROM code dma transfers.

This fix is applicable only for OMAP3 so add an appropriate
check.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
CC: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
CC: Kevin Hilman <khilman@deeprootsystems.com>
---
 arch/arm/plat-omap/dma.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 5ec96db..049165c 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2149,7 +2149,8 @@ static int __init omap_init_dma(void)
 			DMA_SYSCONFIG_AUTOIDLE);
 		dma_write(v , OCP_SYSCONFIG);
 		/* reserve dma channels 0 and 1 in high security devices */
-		if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
+		if (cpu_is_omap34xx() &&
+			(omap_type() != OMAP2_DEVICE_TYPE_GP)) {
 			printk(KERN_INFO "Reserving DMA channels 0 and 1 for "
 					"HS ROM code\n");
 			dma_chan[0].dev_id = 0;
-- 
1.6.0.4

[PATCH 05/24] omap4: Add needed IRQ line into irqs.h

[Santosh Shilimkar]

This patch adds DSS, keyboard and ducati irq
entries in irqs.h

Ones omap4 hwmod is pushed on mainlie, all the
irqs lines data would be availabe.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/plat-omap/include/plat/irqs.h |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index e8205c1..e2fbd74 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -385,6 +385,7 @@
 #define INT_44XX_GPTIMER11	(47 + IRQ_GIC_START)
 #define INT_44XX_GPTIMER12	(95 + IRQ_GIC_START)
 #define INT_44XX_SHA1MD5	(51 + IRQ_GIC_START)
+#define INT_44XX_DSS_DSI1	(53 + IRQ_GIC_START)
 #define INT_44XX_I2C1_IRQ	(56 + IRQ_GIC_START)
 #define INT_44XX_I2C2_IRQ	(57 + IRQ_GIC_START)
 #define INT_44XX_HDQ_IRQ	(58 + IRQ_GIC_START)
@@ -405,6 +406,7 @@
 #define INT_44XX_MCBSP4_IRQ_TX	(81 + IRQ_GIC_START)
 #define INT_44XX_MCBSP4_IRQ_RX	(82 + IRQ_GIC_START)
 #define INT_44XX_MMC_IRQ	(83 + IRQ_GIC_START)
+#define INT_44XX_DSS_DSI2	(84 + IRQ_GIC_START)
 #define INT_44XX_MMC2_IRQ	(86 + IRQ_GIC_START)
 #define INT_44XX_MCBSP2_IRQ_TX	(89 + IRQ_GIC_START)
 #define INT_44XX_MCBSP2_IRQ_RX	(90 + IRQ_GIC_START)
@@ -442,7 +444,10 @@
 #define INT_44XX_PARTHASH_IRQ	(79 + IRQ_GIC_START)
 #define INT_44XX_MMC3_IRQ	(94 + IRQ_GIC_START)
 #define INT_44XX_MMC4_IRQ	(96 + IRQ_GIC_START)
+#define INT_44XX_DUCATI_MMU_IRQ	(100 + IRQ_GIC_START)
 #define INT_44XX_MCPDM_IRQ	(112 + IRQ_GIC_START)
+#define INT_4XX_DSS_HDMI	(101 + IRQ_GIC_START)
+#define INT_44XX_KBD_CTL	(120 + IRQ_GIC_START)
 
 /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
  * 16 MPUIO lines */
-- 
1.6.0.4

[PATCH 06/24] omap4: Fix omap_type() for omap4

[Santosh Shilimkar]

This patch fixes the omap_type function to detect whether the device
is GP or HS

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/mach-omap2/id.c                  |    2 ++
 arch/arm/plat-omap/include/plat/control.h |    3 +++
 2 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 9e7c4ae..e73f7e4 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -57,6 +57,8 @@ int omap_type(void)
 		val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
 	} else if (cpu_is_omap34xx()) {
 		val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
+	} else if (cpu_is_omap44xx()) {
+		val = omap_ctrl_readl(OMAP44XX_CONTROL_STATUS);
 	} else {
 		pr_err("Cannot detect omap type!\n");
 		goto out;
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h
index 2074473..a56deee 100644
--- a/arch/arm/plat-omap/include/plat/control.h
+++ b/arch/arm/plat-omap/include/plat/control.h
@@ -204,6 +204,9 @@
 #define OMAP3_PADCONF_SAD2D_MSTANDBY   0x250
 #define OMAP3_PADCONF_SAD2D_IDLEACK    0x254
 
+/* 44xx control status register offset */
+#define OMAP44XX_CONTROL_STATUS		0x2c4
+
 /*
  * REVISIT: This list of registers is not comprehensive - there are more
  * that should be added.
-- 
1.6.0.4

[PATCH 07/24] omap 3/4: Remove overlapping mapping of L4_WKUP io space

[Santosh Shilimkar]

This patch removes the L4 wakeup io mapping section for omap3d
and omap4. L4 wakeup space is part of 4MB L4 space which is
already mapped and hence remove the overlapped mapping.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/mach-omap2/io.c             |   12 ------------
 arch/arm/plat-omap/include/plat/io.h |    9 ---------
 arch/arm/plat-omap/io.c              |    4 ----
 3 files changed, 0 insertions(+), 25 deletions(-)

diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 5a3d6f9..0385a28 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -140,12 +140,6 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
 		.type		= MT_DEVICE
 	},
 	{
-		.virtual	= L4_WK_34XX_VIRT,
-		.pfn		= __phys_to_pfn(L4_WK_34XX_PHYS),
-		.length		= L4_WK_34XX_SIZE,
-		.type		= MT_DEVICE
-	},
-	{
 		.virtual	= OMAP34XX_GPMC_VIRT,
 		.pfn		= __phys_to_pfn(OMAP34XX_GPMC_PHYS),
 		.length		= OMAP34XX_GPMC_SIZE,
@@ -192,12 +186,6 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
 		.type		= MT_DEVICE,
 	},
 	{
-		.virtual	= L4_WK_44XX_VIRT,
-		.pfn		= __phys_to_pfn(L4_WK_44XX_PHYS),
-		.length		= L4_WK_44XX_SIZE,
-		.type		= MT_DEVICE,
-	},
-	{
 		.virtual	= OMAP44XX_GPMC_VIRT,
 		.pfn		= __phys_to_pfn(OMAP44XX_GPMC_PHYS),
 		.length		= OMAP44XX_GPMC_SIZE,
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index eef914d..128b549 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -158,10 +158,6 @@
  * VPOM3430 was not working for Int controller
  */
 
-#define L4_WK_34XX_PHYS		L4_WK_34XX_BASE	/* 0x48300000 --> 0xfa300000 */
-#define L4_WK_34XX_VIRT		(L4_WK_34XX_PHYS + OMAP2_L4_IO_OFFSET)
-#define L4_WK_34XX_SIZE		SZ_1M
-
 #define L4_PER_34XX_PHYS	L4_PER_34XX_BASE
 						/* 0x49000000 --> 0xfb000000 */
 #define L4_PER_34XX_VIRT	(L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
@@ -204,11 +200,6 @@
 #define L4_44XX_VIRT		(L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_44XX_SIZE		SZ_4M
 
-
-#define L4_WK_44XX_PHYS		L4_WK_44XX_BASE	/* 0x4a300000 --> 0xfc300000 */
-#define L4_WK_44XX_VIRT		(L4_WK_44XX_PHYS + OMAP2_L4_IO_OFFSET)
-#define L4_WK_44XX_SIZE		SZ_1M
-
 #define L4_PER_44XX_PHYS	L4_PER_44XX_BASE
 						/* 0x48000000 --> 0xfa000000 */
 #define L4_PER_44XX_VIRT	(L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
index 0cfd54f..2c494cf 100644
--- a/arch/arm/plat-omap/io.c
+++ b/arch/arm/plat-omap/io.c
@@ -90,8 +90,6 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
 			return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT);
 		if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
 			return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
-		if (BETWEEN(p, L4_WK_34XX_PHYS, L4_WK_34XX_SIZE))
-			return XLATE(p, L4_WK_34XX_PHYS, L4_WK_34XX_VIRT);
 		if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE))
 			return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT);
 		if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE))
@@ -110,8 +108,6 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
 			return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT);
 		if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE))
 			return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT);
-		if (BETWEEN(p, L4_WK_44XX_PHYS, L4_WK_44XX_SIZE))
-			return XLATE(p, L4_WK_44XX_PHYS, L4_WK_44XX_VIRT);
 		if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
 			return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT);
 		if (BETWEEN(p, OMAP44XX_EMIF1_PHYS, OMAP44XX_EMIF1_SIZE))
-- 
1.6.0.4

[PATCH 08/24] omap4: clocks: Make Uart driver's clock calls OMAP4 compatible

[Santosh Shilimkar]

From: Abhijit Pagare <abhijitpagare@ti.com>

The uart driver has been adapted for the OMAP4 way of clock calls.

Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
---
 arch/arm/mach-omap2/serial.c |   24 ++++++++++++++++--------
 1 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index b79bc89..97859b0 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -257,7 +257,8 @@ static inline void omap_uart_enable_clocks(struct omap_uart_state *uart)
 		return;
 
 	clk_enable(uart->ick);
-	clk_enable(uart->fck);
+	if (!cpu_is_omap44xx())
+		clk_enable(uart->fck);
 	uart->clocked = 1;
 	omap_uart_restore_context(uart);
 }
@@ -272,7 +273,8 @@ static inline void omap_uart_disable_clocks(struct omap_uart_state *uart)
 	omap_uart_save_context(uart);
 	uart->clocked = 0;
 	clk_disable(uart->ick);
-	clk_disable(uart->fck);
+	if (!cpu_is_omap44xx())
+		clk_disable(uart->fck);
 }
 
 static void omap_uart_enable_wakeup(struct omap_uart_state *uart)
@@ -669,18 +671,24 @@ void __init omap_serial_early_init(void)
 			continue;
 		}
 
-		sprintf(name, "uart%d_ick", i+1);
+		if (!cpu_is_omap44xx())
+			sprintf(name, "uart%d_ick", i+1);
+		else
+			sprintf(name, "uart%d_ck", i+1);
 		uart->ick = clk_get(NULL, name);
 		if (IS_ERR(uart->ick)) {
 			printk(KERN_ERR "Could not get uart%d_ick\n", i+1);
 			uart->ick = NULL;
 		}
 
-		sprintf(name, "uart%d_fck", i+1);
-		uart->fck = clk_get(NULL, name);
-		if (IS_ERR(uart->fck)) {
-			printk(KERN_ERR "Could not get uart%d_fck\n", i+1);
-			uart->fck = NULL;
+		if (!cpu_is_omap44xx()) {
+			sprintf(name, "uart%d_fck", i+1);
+			uart->fck = clk_get(NULL, name);
+			if (IS_ERR(uart->fck)) {
+				printk(KERN_ERR "Could not get uart%d_fck\n",
+									 i+1);
+				uart->fck = NULL;
+			}
 		}
 
 		/* FIXME: Remove this once the clkdev is ready */
-- 
1.6.0.4

[PATCH 09/24] omap4: clocks: Make mcbsp driver's clock calls OMAP4 compatible

[Santosh Shilimkar]

The mcbsp driver has been adapted for the OMAP4 way of clock calls.
In OMAP4, the iclk are hw controlled and no sw control is available

Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/plat-omap/mcbsp.c |   13 ++++++++-----
 1 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 473be3d..72b9694 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -1314,11 +1314,14 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
 	mcbsp->dma_rx_sync = pdata->dma_rx_sync;
 	mcbsp->dma_tx_sync = pdata->dma_tx_sync;
 
-	mcbsp->iclk = clk_get(&pdev->dev, "ick");
-	if (IS_ERR(mcbsp->iclk)) {
-		ret = PTR_ERR(mcbsp->iclk);
-		dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
-		goto err_iclk;
+	/* OMAP4 iclk are hw controlled and no sw control is available */
+	if (!cpu_is_omap44xx()) {
+		mcbsp->iclk = clk_get(&pdev->dev, "ick");
+		if (IS_ERR(mcbsp->iclk)) {
+			ret = PTR_ERR(mcbsp->iclk);
+			dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
+			goto err_iclk;
+		}
 	}
 
 	mcbsp->fclk = clk_get(&pdev->dev, "fck");
-- 
1.6.0.4

[PATCH 10/24] omap4: clokcs: Make gpio driver's clock calls OMAP4 compatible

[Santosh Shilimkar]

From: Abhijit Pagare <abhijitpagare@ti.com>

The gpio driver has been adapted for the OMAP4 way of clock calls.

Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
---
 arch/arm/plat-omap/gpio.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 6055028..5ae7a5a 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -1724,7 +1724,10 @@ static int __init _omap_gpio_init(void)
 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 	if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
 		for (i = 0; i < OMAP34XX_NR_GPIOS; i++) {
-			sprintf(clk_name, "gpio%d_ick", i + 1);
+			if (!cpu_is_omap44xx())
+				sprintf(clk_name, "gpio%d_ick", i + 1);
+			else
+				sprintf(clk_name, "gpio%d_ck", i + 1);
 			gpio_iclks[i] = clk_get(NULL, clk_name);
 			if (IS_ERR(gpio_iclks[i]))
 				printk(KERN_ERR "Could not get %s\n", clk_name);
@@ -1891,7 +1894,7 @@ static int __init _omap_gpio_init(void)
 		set_irq_chained_handler(bank->irq, gpio_irq_handler);
 		set_irq_data(bank->irq, bank);
 
-		if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+		if (cpu_is_omap34xx()) {
 			sprintf(clk_name, "gpio%d_dbck", i + 1);
 			bank->dbck = clk_get(NULL, clk_name);
 			if (IS_ERR(bank->dbck))
-- 
1.6.0.4

[PATCH 11/24] omap4: clocks: Make watchdog driver's clock calls OMAP4 compatible

[Santosh Shilimkar]

The watchdog driver has been adapted for the OMAP4 way of clock calls.
In OMAP4, WDT iclk are hw controlled and no sw control is available

Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
---
 drivers/watchdog/omap_wdt.c |   39 +++++++++++++++++++++++++++------------
 1 files changed, 27 insertions(+), 12 deletions(-)

diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index c6aaf28..df9f714 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -145,7 +145,9 @@ static int omap_wdt_open(struct inode *inode, struct file *file)
 	if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
 		return -EBUSY;
 
-	clk_enable(wdev->ick);    /* Enable the interface clock */
+	/* OMAP4 iclk are hw controlled and no sw control is available */
+	if (!cpu_is_omap44xx())
+		clk_enable(wdev->ick);    /* Enable the interface clock */
 	clk_enable(wdev->fck);    /* Enable the functional clock */
 
 	/* initialize prescaler */
@@ -176,7 +178,9 @@ static int omap_wdt_release(struct inode *inode, struct file *file)
 
 	omap_wdt_disable(wdev);
 
-	clk_disable(wdev->ick);
+	/* OMAP4 iclk are hw controlled and no sw control is available */
+	if (!cpu_is_omap44xx())
+		clk_disable(wdev->ick);
 	clk_disable(wdev->fck);
 #else
 	printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
@@ -292,11 +296,14 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev)
 	wdev->omap_wdt_users = 0;
 	wdev->mem = mem;
 
-	wdev->ick = clk_get(&pdev->dev, "ick");
-	if (IS_ERR(wdev->ick)) {
-		ret = PTR_ERR(wdev->ick);
-		wdev->ick = NULL;
-		goto err_clk;
+	/* OMAP4 iclk are hw controlled and no sw control is available */
+	if (!cpu_is_omap44xx()) {
+		wdev->ick = clk_get(&pdev->dev, "ick");
+		if (IS_ERR(wdev->ick)) {
+			ret = PTR_ERR(wdev->ick);
+			wdev->ick = NULL;
+			goto err_clk;
+		}
 	}
 	wdev->fck = clk_get(&pdev->dev, "fck");
 	if (IS_ERR(wdev->fck)) {
@@ -313,7 +320,9 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, wdev);
 
-	clk_enable(wdev->ick);
+	/* OMAP4 iclk are hw controlled and no sw control is available */
+	if (!cpu_is_omap44xx())
+		clk_enable(wdev->ick);
 	clk_enable(wdev->fck);
 
 	omap_wdt_disable(wdev);
@@ -335,7 +344,9 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev)
 	/* autogate OCP interface clock */
 	__raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
 
-	clk_disable(wdev->ick);
+	/* OMAP4 iclk are hw controlled and no sw control is available */
+	if (!cpu_is_omap44xx())
+		clk_disable(wdev->ick);
 	clk_disable(wdev->fck);
 
 	omap_wdt_dev = pdev;
@@ -350,8 +361,10 @@ err_ioremap:
 	wdev->base = NULL;
 
 err_clk:
-	if (wdev->ick)
-		clk_put(wdev->ick);
+	/* OMAP4 iclk are hw controlled and no sw control is available */
+	if (!cpu_is_omap44xx())
+		if (wdev->ick)
+			clk_put(wdev->ick);
 	if (wdev->fck)
 		clk_put(wdev->fck);
 	kfree(wdev);
@@ -385,7 +398,9 @@ static int __devexit omap_wdt_remove(struct platform_device *pdev)
 	release_mem_region(res->start, resource_size(res));
 	platform_set_drvdata(pdev, NULL);
 
-	clk_put(wdev->ick);
+	/* OMAP4 iclk are hw controlled and no sw control is available */
+	if (!cpu_is_omap44xx())
+		clk_put(wdev->ick);
 	clk_put(wdev->fck);
 	iounmap(wdev->base);
 
-- 
1.6.0.4

[PATCH 12/24] omap4: clocks: Make dmtimer clocks calls OMAP4 compatible

[Santosh Shilimkar]

The gptimer library has been adapted for the OMAP4 way of clock calls.
In OMAP4, the iclk are hw controlled and no sw control is available.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/plat-omap/dmtimer.c |   25 +++++++++++++++++++------
 1 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 24bf692..e4bfeed 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -428,7 +428,9 @@ void omap_dm_timer_enable(struct omap_dm_timer *timer)
 #ifdef CONFIG_ARCH_OMAP2PLUS
 	if (cpu_class_is_omap2()) {
 		clk_enable(timer->fclk);
-		clk_enable(timer->iclk);
+		/* OMAP4 iclk are hw controlled and no sw control available */
+		if (!cpu_is_omap44xx())
+			clk_enable(timer->iclk);
 	}
 #endif
 
@@ -443,7 +445,9 @@ void omap_dm_timer_disable(struct omap_dm_timer *timer)
 
 #ifdef CONFIG_ARCH_OMAP2PLUS
 	if (cpu_class_is_omap2()) {
-		clk_disable(timer->iclk);
+		/* OMAP4 iclk are hw controlled and no sw control available */
+		if (!cpu_is_omap44xx())
+			clk_disable(timer->iclk);
 		clk_disable(timer->fclk);
 	}
 #endif
@@ -781,10 +785,19 @@ int __init omap_dm_timer_init(void)
 #ifdef CONFIG_ARCH_OMAP2PLUS
 		if (cpu_class_is_omap2()) {
 			char clk_name[16];
-			sprintf(clk_name, "gpt%d_ick", i + 1);
-			timer->iclk = clk_get(NULL, clk_name);
-			sprintf(clk_name, "gpt%d_fck", i + 1);
-			timer->fclk = clk_get(NULL, clk_name);
+			/*
+			 * OMAP4 iclks are hw controlled and no sw control
+			 * is available
+			 */
+			if (cpu_is_omap44xx()) {
+				sprintf(clk_name, "gptimer%d_ck", i + 1);
+				timer->fclk = clk_get(NULL, clk_name);
+			} else {
+				sprintf(clk_name, "gpt%d_ick", i + 1);
+				timer->iclk = clk_get(NULL, clk_name);
+				sprintf(clk_name, "gpt%d_fck", i + 1);
+				timer->fclk = clk_get(NULL, clk_name);
+			}
 		}
 #endif
 	}
-- 
1.6.0.4

[PATCH 13/24] omap4: clocks: Remove clock hacks from timer-gp.c

[Santosh Shilimkar]

Now the omap4 clock framework is mainline and clk_get_rate()
is functional. Hence reomve the hardcoded clock hacks.

This patch also fixes
Division by zero in kernel.
Backtrace:
[<c0025fb8>] (dump_backtrace+0x0/0x110) from [<c017febc>] (dump_stack+0x18/0x1c)
 r7:60000093 r6:c0641050 r5:c0223e78 r4:c02126b4
[<c017fea4>] (dump_stack+0x0/0x1c) from [<c00260fc>] (__div0+0x18/0x20)
[<c00260e4>] (__div0+0x0/0x20) from [<c01431fc>] (Ldiv0+0x8/0x10)
[<c00318d4>] (omap_dm_timer_stop+0x0/0xb0) from [<c002c148>] (omap2_gp_timer_set_mode+0x1c/0x68)
 r5:c0223e78 r4:00000000
[<c002c12c>] (omap2_gp_timer_set_mode+0x0/0x68) from [<c0063270>] (clockevents_set_mode+0x30/0x64)
 r5:c020cae0 r4:00000000
[<c0063240>] (clockevents_set_mode+0x0/0x64) from [<c00632fc>] (clockevents_exchange_device+0x30/0x9c)
 r5:c020cae0 r4:c02146e0
[<c00632cc>] (clockevents_exchange_device+0x0/0x9c) from [<c00636e0>] (tick_notify+0x17c/0x404)
 r7:00000000 r6:c0641050 r5:00000000 r4:c020cae0
[<c0063564>] (tick_notify+0x0/0x404) from [<c005d5fc>] (notifier_call_chain+0x34/0x78)
[<c005d5c8>] (notifier_call_chain+0x0/0x78) from [<c005d684>] (__raw_notifier_call_chain+0x1c/0x24)
[<c005d668>] (__raw_notifier_call_chain+0x0/0x24) from [<c005d6ac>] (raw_notifier_call_chain+0x20/0x28)
[<c005d68c>] (raw_notifier_call_chain+0x0/0x28) from [<c0062e78>] (clockevents_do_notify+0x1c/0x24)
[<c0062e5c>] (clockevents_do_notify+0x0/0x24) from [<c0062f18>] (clockevents_register_device+0x98/0xd0)
[<c0062e80>] (clockevents_register_device+0x0/0xd0) from [<c001a194>] (percpu_timer_setup+0x80/0x9c)
 r7:00000000 r6:00000002 r5:00000002 r4:00000003
[<c001a114>] (percpu_timer_setup+0x0/0x9c) from [<c000e9f0>] (smp_prepare_cpus+0xb0/0xe8)
[<c000e940>] (smp_prepare_cpus+0x0/0xe8) from [<c00084e8>] (kernel_init+0x5c/0x1fc)
 r7:00000000 r6:00000000 r5:00000000 r4:c001b8a4
[<c000848c>] (kernel_init+0x0/0x1fc) from [<c0046c50>] (do_exit+0x0/0x604)
 r7:00000000 r6:00000000 r5:00000000 r4:00000000

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/mach-omap2/timer-gp.c |    5 -----
 1 files changed, 0 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index cd04dea..74fbed8 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -85,8 +85,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_PERIODIC:
 		period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
 		period -= 1;
-		if (cpu_is_omap44xx())
-			period = 0xff;	/* FIXME: */
 		omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
 		break;
 	case CLOCK_EVT_MODE_ONESHOT:
@@ -150,9 +148,6 @@ static void __init omap2_gp_clockevent_init(void)
 		     "timer-gp: omap_dm_timer_set_source() failed\n");
 
 	tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
-	if (cpu_is_omap44xx())
-		/* Assuming 32kHz clk is driving GPT1 */
-		tick_rate = 32768;	/* FIXME: */
 
 	pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
 		gptimer_id, tick_rate);
-- 
1.6.0.4

[PATCH 14/24] omap4: Enable WDT and McBSP support

[Santosh Shilimkar]

This patch enables watchdog timer and McBSP support on omap4430
sdp platform.
Additinaly the uart3 made as default console in the omap_4430sdp_defconfig

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/configs/omap_4430sdp_defconfig |    7 ++++---
 drivers/watchdog/Kconfig                |    6 +++---
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig
index 3de640a..7ac3fbf 100644
--- a/arch/arm/configs/omap_4430sdp_defconfig
+++ b/arch/arm/configs/omap_4430sdp_defconfig
@@ -199,7 +199,7 @@ CONFIG_ARCH_OMAP4=y
 #
 # CONFIG_OMAP_RESET_CLOCKS is not set
 # CONFIG_OMAP_MUX is not set
-# CONFIG_OMAP_MCBSP is not set
+CONFIG_OMAP_MCBSP=y
 # CONFIG_OMAP_MBOX_FWK is not set
 # CONFIG_OMAP_MPU_TIMER is not set
 CONFIG_OMAP_32K_TIMER=y
@@ -304,7 +304,7 @@ CONFIG_ALIGNMENT_TRAP=y
 #
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/ram0 rw mem=128M console=ttyS0,115200n8 initrd=0x81600000,20M ramdisk_size=20480"
+CONFIG_CMDLINE="root=/dev/ram0 rw mem=128M console=ttyS2,115200n8 initrd=0x81600000,20M ramdisk_size=20480"
 # CONFIG_XIP_KERNEL is not set
 # CONFIG_KEXEC is not set
 
@@ -488,7 +488,8 @@ CONFIG_GPIOLIB=y
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_WATCHDOG is not set
+CONFIG_WATCHDOG=y
+CONFIG_OMAP_WATCHDOG=y
 CONFIG_SSB_POSSIBLE=y
 
 #
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 3da3f48..1185f05 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -194,10 +194,10 @@ config EP93XX_WATCHDOG
 
 config OMAP_WATCHDOG
 	tristate "OMAP Watchdog"
-	depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP3
+	depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4
 	help
-	  Support for TI OMAP1610/OMAP1710/OMAP2420/OMAP3430 watchdog.  Say 'Y'
-	  here to enable the OMAP1610/OMAP1710/OMAP2420/OMAP3430 watchdog timer.
+	  Support for TI OMAP1610/OMAP1710/OMAP2420/OMAP3430/OMAP4430 watchdog.  Say 'Y'
+	  here to enable the OMAP1610/OMAP1710/OMAP2420/OMAP3430/OMAP4430 watchdog timer.
 
 config PNX4008_WATCHDOG
 	tristate "PNX4008 Watchdog"
-- 
1.6.0.4

[PATCH 15/24] omap4: clocks: Convert i2c clocks data to fclks

[Santosh Shilimkar]

In OMAP4 I2C module has only fclk control and iclks are controlled
through hardware.(The OMAP4 clock tree autogeneration script has
been updated accordingly.)

CC:Paul Walmsley <paul@pwsan.com>
CC:Benoit Cousson <b-cousson@ti.com)his patch>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/mach-omap2/clock44xx_data.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 86af31d..a69e8a0 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -2665,10 +2665,10 @@ static struct omap_clk omap44xx_clks[] = {
 	CLK(NULL,	"gptimer9_ck",			&gptimer9_ck,	CK_443X),
 	CLK("omap2_hdq.0",	"ick",				&hdq1w_ck,	CK_443X),
 	CLK(NULL,	"hsi_ck",			&hsi_ck,	CK_443X),
-	CLK("i2c_omap.1",	"ick",				&i2c1_ck,	CK_443X),
-	CLK("i2c_omap.2",	"ick",				&i2c2_ck,	CK_443X),
-	CLK("i2c_omap.3",	"ick",				&i2c3_ck,	CK_443X),
-	CLK("i2c_omap.4",	"ick",				&i2c4_ck,	CK_443X),
+	CLK("i2c_omap.1",	"fck",				&i2c1_ck,	CK_443X),
+	CLK("i2c_omap.2",	"fck",				&i2c2_ck,	CK_443X),
+	CLK("i2c_omap.3",	"fck",				&i2c3_ck,	CK_443X),
+	CLK("i2c_omap.4",	"fck",				&i2c4_ck,	CK_443X),
 	CLK(NULL,	"iss_ck",			&iss_ck,	CK_443X),
 	CLK(NULL,	"ivahd_ck",			&ivahd_ck,	CK_443X),
 	CLK(NULL,	"keyboard_ck",			&keyboard_ck,	CK_443X),
-- 
1.6.0.4

[PATCH 16/24] omap4: Add i2c support on omap4 platform

[Santosh Shilimkar]

This patch is rebased version of earlier post to add I2C
driver support to OMAP4 platform. On OMAP4, all
I2C register address offsets are changed from OMAP1/2/3 I2C.
In order to not have #ifdef's at various places in code,
as well as to support multi-OMAP build, an array is created
to hold the register addresses with it's offset.

This patch was submitted, reviewed and acked on mailing list
already. For more details refer below link
http://www.mail-archive.com/linux-i2c@vger.kernel.org/msg02281.html

This version updated on top of 16 bit support added as part of
the commit "8bb209278e555a626f9637e844fe4c1b90e849f6"

Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
CC: Tony Lindgren <tony@atomide.com>
CC: Ben Dooks <ben-linux@fluff.org>
---
 arch/arm/plat-omap/i2c.c      |   17 ++++-
 drivers/i2c/busses/i2c-omap.c |  148 ++++++++++++++++++++++++++++++++---------
 2 files changed, 131 insertions(+), 34 deletions(-)

diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 96d2781..f18d757 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -53,9 +53,15 @@ static struct resource i2c_resources[][2] = {
 #if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) },
 #endif
+#if	defined(CONFIG_ARCH_OMAP4)
+	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_44XX_I2C2_IRQ) },
+#endif
 #if	defined(CONFIG_ARCH_OMAP3)
 	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) },
 #endif
+#if	defined(CONFIG_ARCH_OMAP4)
+	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_44XX_I2C3_IRQ) },
+#endif
 };
 
 #define I2C_DEV_BUILDER(bus_id, res, data)		\
@@ -72,10 +78,11 @@ static struct resource i2c_resources[][2] = {
 static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
 static struct platform_device omap_i2c_devices[] = {
 	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
-#if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+	defined(CONFIG_ARCH_OMAP4)
 	I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
 #endif
-#if	defined(CONFIG_ARCH_OMAP3)
+#if	defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 	I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
 #endif
 };
@@ -90,7 +97,7 @@ static int __init omap_i2c_nr_ports(void)
 		ports = 1;
 	else if (cpu_is_omap24xx())
 		ports = 2;
-	else if (cpu_is_omap34xx())
+	else if (cpu_is_omap34xx() || cpu_is_omap44xx())
 		ports = 3;
 
 	return ports;
@@ -112,6 +119,10 @@ static int __init omap_i2c_add_bus(int bus_id)
 			base = OMAP2_I2C_BASE1;
 			irq = INT_24XX_I2C1_IRQ;
 		}
+		if (cpu_is_omap44xx()) {
+			base = OMAP2_I2C_BASE1;
+			irq = INT_44XX_I2C1_IRQ;
+		}
 		res[0].start = base;
 		res[0].end = base + OMAP_I2C_SIZE;
 		res[1].start = irq;
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 9c3ce4d..89a156a 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -44,29 +44,37 @@
 /* I2C controller revisions present on specific hardware */
 #define OMAP_I2C_REV_ON_2430		0x36
 #define OMAP_I2C_REV_ON_3430		0x3C
+#define OMAP_I2C_REV_ON_4430		0x40
 
 /* timeout waiting for the controller to respond */
 #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
 
-#define OMAP_I2C_REV_REG		0x00
-#define OMAP_I2C_IE_REG			0x01
-#define OMAP_I2C_STAT_REG		0x02
-#define OMAP_I2C_IV_REG			0x03
 /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
-#define OMAP_I2C_WE_REG			0x03
-#define OMAP_I2C_SYSS_REG		0x04
-#define OMAP_I2C_BUF_REG		0x05
-#define OMAP_I2C_CNT_REG		0x06
-#define OMAP_I2C_DATA_REG		0x07
-#define OMAP_I2C_SYSC_REG		0x08
-#define OMAP_I2C_CON_REG		0x09
-#define OMAP_I2C_OA_REG			0x0a
-#define OMAP_I2C_SA_REG			0x0b
-#define OMAP_I2C_PSC_REG		0x0c
-#define OMAP_I2C_SCLL_REG		0x0d
-#define OMAP_I2C_SCLH_REG		0x0e
-#define OMAP_I2C_SYSTEST_REG		0x0f
-#define OMAP_I2C_BUFSTAT_REG		0x10
+enum {
+	OMAP_I2C_REV_REG = 0,
+	OMAP_I2C_IE_REG,
+	OMAP_I2C_STAT_REG,
+	OMAP_I2C_IV_REG,
+	OMAP_I2C_WE_REG,
+	OMAP_I2C_SYSS_REG,
+	OMAP_I2C_BUF_REG,
+	OMAP_I2C_CNT_REG,
+	OMAP_I2C_DATA_REG,
+	OMAP_I2C_SYSC_REG,
+	OMAP_I2C_CON_REG,
+	OMAP_I2C_OA_REG,
+	OMAP_I2C_SA_REG,
+	OMAP_I2C_PSC_REG,
+	OMAP_I2C_SCLL_REG,
+	OMAP_I2C_SCLH_REG,
+	OMAP_I2C_SYSTEST_REG,
+	OMAP_I2C_BUFSTAT_REG,
+	OMAP_I2C_REVNB_LO,
+	OMAP_I2C_REVNB_HI,
+	OMAP_I2C_IRQSTATUS_RAW,
+	OMAP_I2C_IRQENABLE_SET,
+	OMAP_I2C_IRQENABLE_CLR,
+};
 
 /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
 #define OMAP_I2C_IE_XDR		(1 << 14)	/* TX Buffer drain int enable */
@@ -169,6 +177,7 @@ struct omap_i2c_dev {
 	u32			speed;		/* Speed of bus in Khz */
 	u16			cmd_err;
 	u8			*buf;
+	u8			*regs;
 	size_t			buf_len;
 	struct i2c_adapter	adapter;
 	u8			fifo_size;	/* use as flag and value
@@ -187,15 +196,64 @@ struct omap_i2c_dev {
 	u16			westate;
 };
 
+const static u8 reg_map[] = {
+	[OMAP_I2C_REV_REG] = 0x00,
+	[OMAP_I2C_IE_REG] = 0x01,
+	[OMAP_I2C_STAT_REG] = 0x02,
+	[OMAP_I2C_IV_REG] = 0x03,
+	[OMAP_I2C_WE_REG] = 0x03,
+	[OMAP_I2C_SYSS_REG] = 0x04,
+	[OMAP_I2C_BUF_REG] = 0x05,
+	[OMAP_I2C_CNT_REG] = 0x06,
+	[OMAP_I2C_DATA_REG] = 0x07,
+	[OMAP_I2C_SYSC_REG] = 0x08,
+	[OMAP_I2C_CON_REG] = 0x09,
+	[OMAP_I2C_OA_REG] = 0x0a,
+	[OMAP_I2C_SA_REG] = 0x0b,
+	[OMAP_I2C_PSC_REG] = 0x0c,
+	[OMAP_I2C_SCLL_REG] = 0x0d,
+	[OMAP_I2C_SCLH_REG] = 0x0e,
+	[OMAP_I2C_SYSTEST_REG] = 0x0f,
+	[OMAP_I2C_BUFSTAT_REG] = 0x10,
+};
+
+const static u8 omap4_reg_map[] = {
+	[OMAP_I2C_REV_REG] = 0x04,
+	[OMAP_I2C_IE_REG] = 0x2c,
+	[OMAP_I2C_STAT_REG] = 0x28,
+	[OMAP_I2C_IV_REG] = 0x34,
+	[OMAP_I2C_WE_REG] = 0x34,
+	[OMAP_I2C_SYSS_REG] = 0x90,
+	[OMAP_I2C_BUF_REG] = 0x94,
+	[OMAP_I2C_CNT_REG] = 0x98,
+	[OMAP_I2C_DATA_REG] = 0x9c,
+	[OMAP_I2C_SYSC_REG] = 0x20,
+	[OMAP_I2C_CON_REG] = 0xa4,
+	[OMAP_I2C_OA_REG] = 0xa8,
+	[OMAP_I2C_SA_REG] = 0xac,
+	[OMAP_I2C_PSC_REG] = 0xb0,
+	[OMAP_I2C_SCLL_REG] = 0xb4,
+	[OMAP_I2C_SCLH_REG] = 0xb8,
+	[OMAP_I2C_SYSTEST_REG] = 0xbC,
+	[OMAP_I2C_BUFSTAT_REG] = 0xc0,
+	[OMAP_I2C_REVNB_LO] = 0x00,
+	[OMAP_I2C_REVNB_HI] = 0x04,
+	[OMAP_I2C_IRQSTATUS_RAW] = 0x24,
+	[OMAP_I2C_IRQENABLE_SET] = 0x2c,
+	[OMAP_I2C_IRQENABLE_CLR] = 0x30,
+};
+
 static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
 				      int reg, u16 val)
 {
-	__raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
+	__raw_writew(val, i2c_dev->base +
+			(i2c_dev->regs[reg] << i2c_dev->reg_shift));
 }
 
 static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
 {
-	return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
+	return __raw_readw(i2c_dev->base +
+				(i2c_dev->regs[reg] << i2c_dev->reg_shift));
 }
 
 static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
@@ -264,7 +322,11 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
 	WARN_ON(dev->idle);
 
 	dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
-	omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
+	if (dev->rev >= OMAP_I2C_REV_ON_4430)
+		omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
+	else
+		omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
+
 	if (dev->rev < OMAP_I2C_REV_2) {
 		iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
 	} else {
@@ -329,7 +391,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
 			 * REVISIT: Some wkup sources might not be needed.
 			 */
 			dev->westate = OMAP_I2C_WE_ALL;
-			omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
+			if (dev->rev < OMAP_I2C_REV_ON_4430)
+				omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
+								dev->westate);
 		}
 	}
 	omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
@@ -356,7 +420,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
 			psc = fclk_rate / 12000000;
 	}
 
-	if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+	if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
 
 		/*
 		 * HSI2C controller internal clk rate should be 19.2 Mhz for
@@ -370,7 +434,11 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
 			internal_clk = 9600;
 		else
 			internal_clk = 4000;
-		fclk_rate = clk_get_rate(dev->fclk) / 1000;
+		/* FIXME: Remove this once clock framework is available*/
+		if (dev->rev >= OMAP_I2C_REV_ON_4430)
+			fclk_rate = 96000;
+		else
+			fclk_rate = clk_get_rate(dev->fclk) / 1000;
 
 		/* Compute prescaler divisor */
 		psc = fclk_rate / internal_clk;
@@ -746,9 +814,12 @@ complete:
 				if (dev->buf_len) {
 					*dev->buf++ = w;
 					dev->buf_len--;
-					/* Data reg from 2430 is 8 bit wide */
+					/* Data reg in 2430, omap3 and
+					 * omap4 is 8 bit wide
+					 */
 					if (!cpu_is_omap2430() &&
-							!cpu_is_omap34xx()) {
+							!cpu_is_omap34xx() &&
+							!cpu_is_omap44xx()) {
 						if (dev->buf_len) {
 							*dev->buf++ = w >> 8;
 							dev->buf_len--;
@@ -786,9 +857,12 @@ complete:
 				if (dev->buf_len) {
 					w = *dev->buf++;
 					dev->buf_len--;
-					/* Data reg from  2430 is 8 bit wide */
+					/* Data reg in 2430, omap3 and
+					 * omap4 is 8 bit wide
+					 */
 					if (!cpu_is_omap2430() &&
-							!cpu_is_omap34xx()) {
+							!cpu_is_omap34xx() &&
+							!cpu_is_omap44xx()) {
 						if (dev->buf_len) {
 							w |= *dev->buf++ << 8;
 							dev->buf_len--;
@@ -897,6 +971,8 @@ omap_i2c_probe(struct platform_device *pdev)
 
 	if (cpu_is_omap7xx())
 		dev->reg_shift = 1;
+	else if (cpu_is_omap44xx())
+		dev->reg_shift = 0;
 	else
 		dev->reg_shift = 2;
 
@@ -911,11 +987,16 @@ omap_i2c_probe(struct platform_device *pdev)
 	if ((r = omap_i2c_get_clocks(dev)) != 0)
 		goto err_iounmap;
 
+	if (cpu_is_omap44xx())
+		dev->regs = (u8 *) omap4_reg_map;
+	else
+		dev->regs = (u8 *) reg_map;
+
 	omap_i2c_unidle(dev);
 
 	dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
 
-	if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+	if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
 		u16 s;
 
 		/* Set up the fifo size - Get total size */
@@ -927,8 +1008,13 @@ omap_i2c_probe(struct platform_device *pdev)
 		 * size. This is to ensure that we can handle the status on int
 		 * call back latencies.
 		 */
-		dev->fifo_size = (dev->fifo_size / 2);
-		dev->b_hw = 1; /* Enable hardware fixes */
+		if (dev->rev >= OMAP_I2C_REV_ON_4430) {
+			dev->fifo_size = 0;
+			dev->b_hw = 0; /* Enable hardware fixes */
+		} else {
+			dev->fifo_size = (dev->fifo_size / 2);
+			dev->b_hw = 1; /* Disable hardware fixes */
+		}
 	}
 
 	/* reset ASAP, clearing any IRQs */
-- 
1.6.0.4

[PATCH 17/24] omap4: Add i2c board support for omap4 platform

[Santosh Shilimkar]

This patch enables I2C driver for OMAP4430 SDP board file.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/configs/omap_4430sdp_defconfig |   19 +++++++++++++++++--
 arch/arm/mach-omap2/board-4430sdp.c     |    9 +++++++++
 2 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig
index 7ac3fbf..d791e63 100644
--- a/arch/arm/configs/omap_4430sdp_defconfig
+++ b/arch/arm/configs/omap_4430sdp_defconfig
@@ -453,8 +453,23 @@ CONFIG_HW_RANDOM=y
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
-# CONFIG_I2C is not set
-# CONFIG_SPI is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_OMAP=y
+# CONFIG_I2C_SIMTEC is not set
 
 #
 # PPS support
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 86b240e..a325ba5 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -81,8 +81,17 @@ static struct omap_musb_board_data musb_board_data = {
 	.power			= 100,
 };
 
+static int __init omap4_i2c_init(void)
+{
+	/* Phoenix Audio IC needs I2C1 to start with 400 KHz and less */
+	omap_register_i2c_bus(1, 400, NULL, 0);
+	omap_register_i2c_bus(2, 400, NULL, 0);
+	omap_register_i2c_bus(3, 400, NULL, 0);
+	return 0;
+}
 static void __init omap_4430sdp_init(void)
 {
+	omap4_i2c_init();
 	platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
 	omap_serial_init();
 	/* OMAP4 SDP uses internal transceiver so register nop transceiver */
-- 
1.6.0.4

[PATCH 18/24] omap4: clocks: Make i2c driver's clock calls OMAP4 compatible

[Santosh Shilimkar]

From: Abhijit Pagare <abhijitpagare@ti.com>

The i2c driver has been adapted for the OMAP4 way of clock calls.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
---
 drivers/i2c/busses/i2c-omap.c |   29 ++++++++++++++++-------------
 1 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 89a156a..d4f6eda 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -260,11 +260,14 @@ static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
 {
 	int ret;
 
-	dev->iclk = clk_get(dev->dev, "ick");
-	if (IS_ERR(dev->iclk)) {
-		ret = PTR_ERR(dev->iclk);
-		dev->iclk = NULL;
-		return ret;
+	/* OMAP4 iclk are hw controlled and no sw control is available */
+	if (!cpu_is_omap44xx()) {
+		dev->iclk = clk_get(dev->dev, "ick");
+		if (IS_ERR(dev->iclk)) {
+			ret = PTR_ERR(dev->iclk);
+			dev->iclk = NULL;
+			return ret;
+		}
 	}
 
 	dev->fclk = clk_get(dev->dev, "fck");
@@ -285,15 +288,18 @@ static void omap_i2c_put_clocks(struct omap_i2c_dev *dev)
 {
 	clk_put(dev->fclk);
 	dev->fclk = NULL;
-	clk_put(dev->iclk);
-	dev->iclk = NULL;
+	if (!cpu_is_omap44xx()) {
+		clk_put(dev->iclk);
+		dev->iclk = NULL;
+	}
 }
 
 static void omap_i2c_unidle(struct omap_i2c_dev *dev)
 {
 	WARN_ON(!dev->idle);
 
-	clk_enable(dev->iclk);
+	if (!cpu_is_omap44xx())
+		clk_enable(dev->iclk);
 	clk_enable(dev->fclk);
 	if (cpu_is_omap34xx()) {
 		omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
@@ -337,7 +343,8 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
 	}
 	dev->idle = 1;
 	clk_disable(dev->fclk);
-	clk_disable(dev->iclk);
+	if (!cpu_is_omap44xx())
+		clk_disable(dev->iclk);
 }
 
 static int omap_i2c_init(struct omap_i2c_dev *dev)
@@ -434,10 +441,6 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
 			internal_clk = 9600;
 		else
 			internal_clk = 4000;
-		/* FIXME: Remove this once clock framework is available*/
-		if (dev->rev >= OMAP_I2C_REV_ON_4430)
-			fclk_rate = 96000;
-		else
 			fclk_rate = clk_get_rate(dev->fclk) / 1000;
 
 		/* Compute prescaler divisor */
-- 
1.6.0.4

[PATCH 19/24] twl6030: Fix vsel calculations in set/get voltage api's

[Santosh Shilimkar]

From: Rajendra Nayak <rnayak@ti.com>

TWL6030 has a formula to be used to calculate the vsel values
to be programmed in the VREG_VOLTAGE registers.

Voltage(in mV) = 1000mv + 100mv * (vsel - 1)

Ex: if vsel = 0x9, mV = 1000 + 100 * (9 -1) = 1800mV.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Samuel Ortiz <sameo@linux.intel.com>
---
 drivers/regulator/twl-regulator.c |   23 +++++++++++++++++++----
 1 files changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c
index 7e67485..a5ca794 100644
--- a/drivers/regulator/twl-regulator.c
+++ b/drivers/regulator/twl-regulator.c
@@ -367,11 +367,17 @@ twlldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV)
 		/* REVISIT for VAUX2, first match may not be best/lowest */
 
 		/* use the first in-range value */
-		if (min_uV <= uV && uV <= max_uV)
+		if (min_uV <= uV && uV <= max_uV) {
+			if (twl_class_is_6030())
+				/*
+				 * Use the below formula to calculate vsel
+				 * mV = 1000mv + 100mv * (vsel - 1)
+				 */
+				vsel = (mV - 1000)/100 + 1;
 			return twlreg_write(info, TWL_MODULE_PM_RECEIVER,
 							VREG_VOLTAGE, vsel);
+		}
 	}
-
 	return -EDOM;
 }
 
@@ -384,8 +390,17 @@ static int twlldo_get_voltage(struct regulator_dev *rdev)
 	if (vsel < 0)
 		return vsel;
 
-	vsel &= info->table_len - 1;
-	return LDO_MV(info->table[vsel]) * 1000;
+	if (twl_class_is_4030()) {
+		vsel &= info->table_len - 1;
+		return LDO_MV(info->table[vsel]) * 1000;
+	} else if (twl_class_is_6030()) {
+		/*
+		 * Use the below formula to calculate vsel
+		 * mV = 1000mv + 100mv * (vsel - 1)
+		 */
+		return (1000 + (100 * (vsel - 1))) * 1000;
+	}
+	return -EDOM;
 }
 
 static struct regulator_ops twlldo_ops = {
-- 
1.6.0.4

[PATCH 20/24] twl6030: add base addr for ID0, ID1, ID2

[Santosh Shilimkar]

From: Balaji T K <balajitk@ti.com>

Add base address for generic slave ID0, ID1, ID2
and introduced one more entry to align RTC module number between
twl4030 and twl6030

Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
---
 drivers/mfd/twl-core.c  |    7 +++++--
 include/linux/i2c/twl.h |    5 +++++
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index 2a76065..d820e87 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -204,6 +204,7 @@
 /* subchip/slave 3 0x4B - AUDIO */
 #define TWL6030_BASEADD_AUDIO		0x0000
 #define TWL6030_BASEADD_RSV		0x0000
+#define TWL6030_BASEADD_ZERO		0x0000
 
 /* Few power values */
 #define R_CFG_BOOT			0x05
@@ -319,9 +320,11 @@ static struct twl_mapping twl6030_map[] = {
 	{ SUB_CHIP_ID1, TWL6030_BASEADD_CHARGER },
 	{ SUB_CHIP_ID1, TWL6030_BASEADD_GASGAUGE },
 	{ SUB_CHIP_ID1, TWL6030_BASEADD_PWM },
-	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
-	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
+	{ SUB_CHIP_ID0, TWL6030_BASEADD_ZERO },
+	{ SUB_CHIP_ID1, TWL6030_BASEADD_ZERO },
 
+	{ SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
+	{ SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
 	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
 	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
 	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
index bf1c5be..fcf9286 100644
--- a/include/linux/i2c/twl.h
+++ b/include/linux/i2c/twl.h
@@ -80,6 +80,11 @@
 #define TWL_MODULE_PM_MASTER	TWL4030_MODULE_PM_MASTER
 #define TWL_MODULE_PM_RECEIVER	TWL4030_MODULE_PM_RECEIVER
 #define TWL_MODULE_RTC		TWL4030_MODULE_RTC
+#define TWL_MODULE_PWM		TWL4030_MODULE_PWM0
+
+#define TWL6030_MODULE_ID0	0x0D
+#define TWL6030_MODULE_ID1	0x0E
+#define TWL6030_MODULE_ID2	0x0F
 
 #define GPIO_INTR_OFFSET	0
 #define KEYPAD_INTR_OFFSET	1
-- 
1.6.0.4

[PATCH 21/24] omap4: add i2c1 peripherals data

[Santosh Shilimkar]

From: Balaji T K <balajitk@ti.com>

This patch adds i2c1 peripherals data to
omap4 board file.

Signed-off-by: Balaji T K <balajitk@ti.com>
---
 arch/arm/mach-omap2/board-4430sdp.c |   18 +++++++++++++++++-
 1 files changed, 17 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index a325ba5..ad0a9a5 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -18,6 +18,7 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 #include <linux/usb/otg.h>
+#include <linux/i2c/twl.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -81,10 +82,25 @@ static struct omap_musb_board_data musb_board_data = {
 	.power			= 100,
 };
 
+static struct twl4030_platform_data sdp4430_twldata = {
+	.irq_base	= TWL6030_IRQ_BASE,
+	.irq_end	= TWL6030_IRQ_END,
+};
+
+static struct i2c_board_info __initdata sdp4430_i2c_boardinfo[] = {
+	{
+		I2C_BOARD_INFO("twl6030", 0x48),
+		.flags = I2C_CLIENT_WAKE,
+		.irq = INT_44XX_SYS_NIRQ,
+		.platform_data = &sdp4430_twldata,
+	},
+};
+
 static int __init omap4_i2c_init(void)
 {
 	/* Phoenix Audio IC needs I2C1 to start with 400 KHz and less */
-	omap_register_i2c_bus(1, 400, NULL, 0);
+	omap_register_i2c_bus(1, 400, sdp4430_i2c_boardinfo,
+				ARRAY_SIZE(sdp4430_i2c_boardinfo));
 	omap_register_i2c_bus(2, 400, NULL, 0);
 	omap_register_i2c_bus(3, 400, NULL, 0);
 	return 0;
-- 
1.6.0.4

[PATCH 22/24] omap4: add regulator board data for TWL6030

[Santosh Shilimkar]

From: Balaji T K <balajitk@ti.com>

add TWL6030 regulator board data in board-4430sdp.c

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
---
 arch/arm/mach-omap2/board-4430sdp.c |  161 +++++++++++++++++++++++++++++++++++
 1 files changed, 161 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index ad0a9a5..cbdbfa4 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -19,6 +19,7 @@
 #include <linux/gpio.h>
 #include <linux/usb/otg.h>
 #include <linux/i2c/twl.h>
+#include <linux/regulator/machine.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -49,6 +50,25 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = {
 	{ OMAP_TAG_LCD,		&sdp4430_lcd_config },
 };
 
+
+static struct regulator_consumer_supply sdp4430_vmmc_supply[] = {
+	{
+		.supply = "vmmc",
+	},
+	{
+		.supply = "vmmc",
+	},
+	{
+		.supply = "vmmc",
+	},
+	{
+		.supply = "vmmc",
+	},
+	{
+		.supply = "vmmc",
+	},
+};
+
 static void __init gic_init_irq(void)
 {
 	void __iomem *base;
@@ -82,9 +102,150 @@ static struct omap_musb_board_data musb_board_data = {
 	.power			= 100,
 };
 
+static struct regulator_init_data sdp4430_vaux1 = {
+	.constraints = {
+		.min_uV		 	= 1000000,
+		.max_uV		 	= 3000000,
+		.apply_uV		= true,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask	 = REGULATOR_CHANGE_VOLTAGE
+					| REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+};
+
+static struct regulator_init_data sdp4430_vaux2 = {
+	.constraints = {
+		.min_uV		 	= 1200000,
+		.max_uV		 	= 2800000,
+		.apply_uV		= true,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask	 = REGULATOR_CHANGE_VOLTAGE
+					| REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+};
+
+static struct regulator_init_data sdp4430_vaux3 = {
+	.constraints = {
+		.min_uV		 	= 1000000,
+		.max_uV		 	= 3000000,
+		.apply_uV		= true,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask	 = REGULATOR_CHANGE_VOLTAGE
+					| REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+};
+
+/* VMMC1 for MMC1 card */
+static struct regulator_init_data sdp4430_vmmc = {
+	.constraints = {
+		.min_uV		 	= 1200000,
+		.max_uV		 	= 3000000,
+		.apply_uV		= true,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask	 = REGULATOR_CHANGE_VOLTAGE
+					| REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+	.num_consumer_supplies  = 5,
+	.consumer_supplies      = sdp4430_vmmc_supply,
+};
+
+static struct regulator_init_data sdp4430_vpp = {
+	.constraints = {
+		.min_uV		 	= 1800000,
+		.max_uV		 	= 2500000,
+		.apply_uV		= true,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask	 = REGULATOR_CHANGE_VOLTAGE
+					| REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+};
+
+static struct regulator_init_data sdp4430_vusim = {
+	.constraints = {
+		.min_uV		 	= 1200000,
+		.max_uV		 	= 2900000,
+		.apply_uV		= true,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask	 = REGULATOR_CHANGE_VOLTAGE
+					| REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+};
+
+static struct regulator_init_data sdp4430_vana = {
+	.constraints = {
+		.min_uV		 	= 2100000,
+		.max_uV		 	= 2100000,
+		.apply_uV		= true,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask	 = REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+};
+
+static struct regulator_init_data sdp4430_vcxio = {
+	.constraints = {
+		.min_uV		 	= 1800000,
+		.max_uV		 	= 1800000,
+		.apply_uV		= true,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask	 = REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+};
+
+static struct regulator_init_data sdp4430_vdac = {
+	.constraints = {
+		.min_uV		 	= 1800000,
+		.max_uV		 	= 1800000,
+		.apply_uV		= true,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask	 = REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+};
+
+static struct regulator_init_data sdp4430_vusb = {
+	.constraints = {
+		.min_uV		 	= 3300000,
+		.max_uV		 	= 3300000,
+		.apply_uV		= true,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask	 =	REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+};
+
 static struct twl4030_platform_data sdp4430_twldata = {
 	.irq_base	= TWL6030_IRQ_BASE,
 	.irq_end	= TWL6030_IRQ_END,
+
+	/* Regulators */
+	.vmmc		= &sdp4430_vmmc,
+	.vpp		= &sdp4430_vpp,
+	.vusim		= &sdp4430_vusim,
+	.vana		= &sdp4430_vana,
+	.vcxio		= &sdp4430_vcxio,
+	.vdac		= &sdp4430_vdac,
+	.vusb		= &sdp4430_vusb,
+	.vaux1		= &sdp4430_vaux1,
+	.vaux2		= &sdp4430_vaux2,
+	.vaux3		= &sdp4430_vaux3,
 };
 
 static struct i2c_board_info __initdata sdp4430_i2c_boardinfo[] = {
-- 
1.6.0.4

[PATCH 23/24] omap4: Enable RTC and regulator support

[Santosh Shilimkar]

From: Balaji T K <balajitk@ti.com>

This patch enables RTC and regulator support on omap4430 sdp
platform. These are i2c slave devices and hence kernel needs
i2c driver suport to make it work.

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/configs/omap_4430sdp_defconfig |   20 ++++++++++++++++++--
 1 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig
index d791e63..339b154 100644
--- a/arch/arm/configs/omap_4430sdp_defconfig
+++ b/arch/arm/configs/omap_4430sdp_defconfig
@@ -520,11 +520,12 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_ASIC3 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+CONFIG_TWL4030_CORE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_T7L66XB is not set
 # CONFIG_MFD_TC6387XB is not set
 # CONFIG_MFD_TC6393XB is not set
-# CONFIG_REGULATOR is not set
+CONFIG_REGULATOR=y
 # CONFIG_MEDIA_SUPPORT is not set
 
 #
@@ -553,12 +554,27 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_NEW_LEDS is not set
 # CONFIG_ACCESSIBILITY is not set
 CONFIG_RTC_LIB=y
-# CONFIG_RTC_CLASS is not set
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
 # CONFIG_DMADEVICES is not set
 # CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
 
 #
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+
+#
+# I2C TWL drivers
+#
+CONFIG_RTC_DRV_TWL4030=y
+CONFIG_REGULATOR_TWL4030=y
+
+#
 # TI VLYNQ
 #
 # CONFIG_STAGING is not set
-- 
1.6.0.4

[PATCH 24/24] omap4: multi-omap: Allow build to work

[Santosh Shilimkar]

The musb support is enable to omap3 platforms. For omap4 only board
support is available and the driver still isn't supported.
Because of this build with omap3_defconfig used for multi-omap
doesn't work on omap4430 sdp.

This patch hacks the musb probe to keep the multi-omap build
working on omap4430 sdp

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 drivers/usb/musb/musb_core.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index bcce8e8..13b1c4a 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -2124,6 +2124,10 @@ static int __init musb_probe(struct platform_device *pdev)
 	struct resource	*iomem;
 	void __iomem	*base;
 
+	/* FIXME: multi-omap build to work on omap4 */
+	if (cpu_is_omap44xx())
+		return 0;
+
 	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	if (!iomem || irq == 0)
 		return -ENODEV;
-- 
1.6.0.4

RE: [PATCH 24/24] omap4: multi-omap: Allow build to work

[Shilimkar, Santosh]

Anand,
> -----Original Message-----
> From: Gadiyar, Anand
> Sent: Tuesday, February 16, 2010 9:25 PM
> To: Shilimkar, Santosh; tony@atomide.com
> Cc: linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com; lrg@slimlogic.co.uk;
> paul@pwsan.com
> Subject: RE: [PATCH] omap4: multi-omap: Allow build to work
> 
> Shilimkar, Santosh wrote:
> > The musb support is enable to omap3 platforms. For omap4 only board
> > support is available and the driver still isn't supported.
> > Because of this build with omap3_defconfig used for multi-omap
> > doesn't work on omap4430 sdp.
> >
> > This patch hacks the musb probe to keep the multi-omap build
> > working on omap4430 sdp
> >
> > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > ---
> >  drivers/usb/musb/musb_core.c |    4 ++++
> >  1 files changed, 4 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/usb/musb/musb_core.c
> > b/drivers/usb/musb/musb_core.c
> > index bcce8e8..13b1c4a 100644
> > --- a/drivers/usb/musb/musb_core.c
> > +++ b/drivers/usb/musb/musb_core.c
> > @@ -2124,6 +2124,10 @@ static int __init musb_probe(struct
> > platform_device *pdev)
> >  	struct resource	*iomem;
> >  	void __iomem	*base;
> >
> > +	/* FIXME: multi-omap build to work on omap4 */
> > +	if (cpu_is_omap44xx())
> > +		return 0;
> > +
> 
> NAK. I'd prefer that we fix the driver issue correctly.
> 
> I would have expected the driver to at least load on OMAP4
> even if it does not work. Could you please describe the
> failure?
> 
The probe fails because the register bases aren't mapped 
for omap4. This is because Tony has lined-up musb board support
for omap4 but corresponding usb driver patches are not yet lined
up.
> Also, this will need to go through linux-usb.

RE: [PATCH 24/24] omap4: multi-omap: Allow build to work

[Gadiyar, Anand]

Shilimkar, Santosh wrote:
> > From: Gadiyar, Anand
> > Shilimkar, Santosh wrote:
> > > The musb support is enable to omap3 platforms. For omap4 only board
> > > support is available and the driver still isn't supported.
> > > Because of this build with omap3_defconfig used for multi-omap
> > > doesn't work on omap4430 sdp.
> > >
> > > This patch hacks the musb probe to keep the multi-omap build
> > > working on omap4430 sdp
> > >
> > > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > > ---
> > >  drivers/usb/musb/musb_core.c |    4 ++++
> > >  1 files changed, 4 insertions(+), 0 deletions(-)
> > >
> > > diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
> > > index bcce8e8..13b1c4a 100644
> > > --- a/drivers/usb/musb/musb_core.c
> > > +++ b/drivers/usb/musb/musb_core.c
> > > @@ -2124,6 +2124,10 @@ static int __init musb_probe(struct platform_device *pdev)
> > >  	struct resource	*iomem;
> > >  	void __iomem	*base;
> > >
> > > +	/* FIXME: multi-omap build to work on omap4 */
> > > +	if (cpu_is_omap44xx())
> > > +		return 0;
> > > +
> > 
> > NAK. I'd prefer that we fix the driver issue correctly.
> > 
> > I would have expected the driver to at least load on OMAP4
> > even if it does not work. Could you please describe the
> > failure?
> > 
> The probe fails because the register bases aren't mapped 
> for omap4. This is because Tony has lined-up musb board support
> for omap4 but corresponding usb driver patches are not yet lined
> up.

I see the problem now - the platform support is lined up, but the
driver is not queued up yet.

This is easy to fix by removing the call to usb_musb_init from
the 4430sdp board. How about doing this?


- Anand

Re: [PATCH 24/24] omap4: multi-omap: Allow build to work

[Tony Lindgren]

* Gadiyar, Anand <gadiyar@ti.com> [100217 01:09]:
> Shilimkar, Santosh wrote:
> > > From: Gadiyar, Anand
> > > Shilimkar, Santosh wrote:
> > > > The musb support is enable to omap3 platforms. For omap4 only board
> > > > support is available and the driver still isn't supported.
> > > > Because of this build with omap3_defconfig used for multi-omap
> > > > doesn't work on omap4430 sdp.
> > > >
> > > > This patch hacks the musb probe to keep the multi-omap build
> > > > working on omap4430 sdp
> > > >
> > > > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > > > ---
> > > >  drivers/usb/musb/musb_core.c |    4 ++++
> > > >  1 files changed, 4 insertions(+), 0 deletions(-)
> > > >
> > > > diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
> > > > index bcce8e8..13b1c4a 100644
> > > > --- a/drivers/usb/musb/musb_core.c
> > > > +++ b/drivers/usb/musb/musb_core.c
> > > > @@ -2124,6 +2124,10 @@ static int __init musb_probe(struct platform_device *pdev)
> > > >  	struct resource	*iomem;
> > > >  	void __iomem	*base;
> > > >
> > > > +	/* FIXME: multi-omap build to work on omap4 */
> > > > +	if (cpu_is_omap44xx())
> > > > +		return 0;
> > > > +
> > > 
> > > NAK. I'd prefer that we fix the driver issue correctly.
> > > 
> > > I would have expected the driver to at least load on OMAP4
> > > even if it does not work. Could you please describe the
> > > failure?
> > > 
> > The probe fails because the register bases aren't mapped 
> > for omap4. This is because Tony has lined-up musb board support
> > for omap4 but corresponding usb driver patches are not yet lined
> > up.
> 
> I see the problem now - the platform support is lined up, but the
> driver is not queued up yet.
> 
> This is easy to fix by removing the call to usb_musb_init from
> the 4430sdp board. How about doing this?

Yeah that's the way to go.

Tony

Re: [PATCH 24/24] omap4: multi-omap: Allow build to work

[Tony Lindgren]

* Santosh Shilimkar <santosh.shilimkar@ti.com> [100216 07:55]:
> The musb support is enable to omap3 platforms. For omap4 only board
> support is available and the driver still isn't supported.
> Because of this build with omap3_defconfig used for multi-omap
> doesn't work on omap4430 sdp.
> 
> This patch hacks the musb probe to keep the multi-omap build
> working on omap4430 sdp
> 
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
>  drivers/usb/musb/musb_core.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
> index bcce8e8..13b1c4a 100644
> --- a/drivers/usb/musb/musb_core.c
> +++ b/drivers/usb/musb/musb_core.c
> @@ -2124,6 +2124,10 @@ static int __init musb_probe(struct platform_device *pdev)
>  	struct resource	*iomem;
>  	void __iomem	*base;
>  
> +	/* FIXME: multi-omap build to work on omap4 */
> +	if (cpu_is_omap44xx())
> +		return 0;
> +
>  	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>  	if (!iomem || irq == 0)
>  		return -ENODEV;

Should the comment here be "FIXME: allow multi-omap to boot until
musb is updated for omap4" instead?

Regards,

Tony

RE: [PATCH 24/24] omap4: multi-omap: Allow build to work

[Shilimkar, Santosh]

> -----Original Message-----
> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Wednesday, February 17, 2010 12:24 AM
> To: Shilimkar, Santosh
> Cc: linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com; lrg@slimlogic.co.uk;
> paul@pwsan.com
> Subject: Re: [PATCH 24/24] omap4: multi-omap: Allow build to work
> 
> * Santosh Shilimkar <santosh.shilimkar@ti.com> [100216 07:55]:
> > The musb support is enable to omap3 platforms. For omap4 only board
> > support is available and the driver still isn't supported.
> > Because of this build with omap3_defconfig used for multi-omap
> > doesn't work on omap4430 sdp.
> >
> > This patch hacks the musb probe to keep the multi-omap build
> > working on omap4430 sdp
> >
> > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > ---
> >  drivers/usb/musb/musb_core.c |    4 ++++
> >  1 files changed, 4 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
> > index bcce8e8..13b1c4a 100644
> > --- a/drivers/usb/musb/musb_core.c
> > +++ b/drivers/usb/musb/musb_core.c
> > @@ -2124,6 +2124,10 @@ static int __init musb_probe(struct platform_device *pdev)
> >  	struct resource	*iomem;
> >  	void __iomem	*base;
> >
> > +	/* FIXME: multi-omap build to work on omap4 */
> > +	if (cpu_is_omap44xx())
> > +		return 0;
> > +
> >  	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> >  	if (!iomem || irq == 0)
> >  		return -ENODEV;
> 
> Should the comment here be "FIXME: allow multi-omap to boot until
> musb is updated for omap4" instead?
yeah

Re: [PATCH 24/24] omap4: multi-omap: Allow build to work

[Paul Walmsley]

On Tue, 16 Feb 2010, Santosh Shilimkar wrote:

> The musb support is enable to omap3 platforms. For omap4 only board
> support is available and the driver still isn't supported.
> Because of this build with omap3_defconfig used for multi-omap
> doesn't work on omap4430 sdp.
> 
> This patch hacks the musb probe to keep the multi-omap build
> working on omap4430 sdp
> 
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
>  drivers/usb/musb/musb_core.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
> index bcce8e8..13b1c4a 100644
> --- a/drivers/usb/musb/musb_core.c
> +++ b/drivers/usb/musb/musb_core.c
> @@ -2124,6 +2124,10 @@ static int __init musb_probe(struct platform_device *pdev)
>  	struct resource	*iomem;
>  	void __iomem	*base;
>  
> +	/* FIXME: multi-omap build to work on omap4 */
> +	if (cpu_is_omap44xx())
> +		return 0;

NAK.  This will break musb compilation on all non-OMAP platforms.  This is 
a major part of the reason why these cpu_is_omap*() calls should not go 
into any device driver.

The right place for this kind of hack is in mach-omap2/usb-musb.c.

Also, this should return an error, not pretend that it succeeded.  It 
should also include a big fat WARN_ON() to reduce the risk that this 
temporary hack will be overlooked.

> +
>  	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>  	if (!iomem || irq == 0)
>  		return -ENODEV;
> -- 
> 1.6.0.4
> 


- Paul

Re: [PATCH 20/24] twl6030: add base addr for ID0, ID1, ID2

[Samuel Ortiz]

On Tue, Feb 16, 2010 at 09:28:11PM +0530, Santosh Shilimkar wrote:
> From: Balaji T K <balajitk@ti.com>
> 
> Add base address for generic slave ID0, ID1, ID2
> and introduced one more entry to align RTC module number between
> twl4030 and twl6030
Tony, I'm taking this patch. Please let me know if you prefer it to go through
your tree.

Cheers,
Samuel.

 
> Cc: Samuel Ortiz <sameo@linux.intel.com>
> Signed-off-by: Balaji T K <balajitk@ti.com>
> ---
>  drivers/mfd/twl-core.c  |    7 +++++--
>  include/linux/i2c/twl.h |    5 +++++
>  2 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
> index 2a76065..d820e87 100644
> --- a/drivers/mfd/twl-core.c
> +++ b/drivers/mfd/twl-core.c
> @@ -204,6 +204,7 @@
>  /* subchip/slave 3 0x4B - AUDIO */
>  #define TWL6030_BASEADD_AUDIO		0x0000
>  #define TWL6030_BASEADD_RSV		0x0000
> +#define TWL6030_BASEADD_ZERO		0x0000
>  
>  /* Few power values */
>  #define R_CFG_BOOT			0x05
> @@ -319,9 +320,11 @@ static struct twl_mapping twl6030_map[] = {
>  	{ SUB_CHIP_ID1, TWL6030_BASEADD_CHARGER },
>  	{ SUB_CHIP_ID1, TWL6030_BASEADD_GASGAUGE },
>  	{ SUB_CHIP_ID1, TWL6030_BASEADD_PWM },
> -	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
> -	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
> +	{ SUB_CHIP_ID0, TWL6030_BASEADD_ZERO },
> +	{ SUB_CHIP_ID1, TWL6030_BASEADD_ZERO },
>  
> +	{ SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
> +	{ SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
>  	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
>  	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
>  	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
> diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
> index bf1c5be..fcf9286 100644
> --- a/include/linux/i2c/twl.h
> +++ b/include/linux/i2c/twl.h
> @@ -80,6 +80,11 @@
>  #define TWL_MODULE_PM_MASTER	TWL4030_MODULE_PM_MASTER
>  #define TWL_MODULE_PM_RECEIVER	TWL4030_MODULE_PM_RECEIVER
>  #define TWL_MODULE_RTC		TWL4030_MODULE_RTC
> +#define TWL_MODULE_PWM		TWL4030_MODULE_PWM0
> +
> +#define TWL6030_MODULE_ID0	0x0D
> +#define TWL6030_MODULE_ID1	0x0E
> +#define TWL6030_MODULE_ID2	0x0F
>  
>  #define GPIO_INTR_OFFSET	0
>  #define KEYPAD_INTR_OFFSET	1
> -- 
> 1.6.0.4
> 

-- 
Intel Open Source Technology Centre
http://oss.intel.com/

Re: [PATCH 20/24] twl6030: add base addr for ID0, ID1, ID2

[Tony Lindgren]

* Samuel Ortiz <sameo@linux.intel.com> [100219 03:37]:
> On Tue, Feb 16, 2010 at 09:28:11PM +0530, Santosh Shilimkar wrote:
> > From: Balaji T K <balajitk@ti.com>
> > 
> > Add base address for generic slave ID0, ID1, ID2
> > and introduced one more entry to align RTC module number between
> > twl4030 and twl6030
> Tony, I'm taking this patch. Please let me know if you prefer it to go through
> your tree.

OK thanks. I prefer that it goes in via your tree.

Regards,

Tony
 
> Cheers,
> Samuel.
> 
>  
> > Cc: Samuel Ortiz <sameo@linux.intel.com>
> > Signed-off-by: Balaji T K <balajitk@ti.com>
> > ---
> >  drivers/mfd/twl-core.c  |    7 +++++--
> >  include/linux/i2c/twl.h |    5 +++++
> >  2 files changed, 10 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
> > index 2a76065..d820e87 100644
> > --- a/drivers/mfd/twl-core.c
> > +++ b/drivers/mfd/twl-core.c
> > @@ -204,6 +204,7 @@
> >  /* subchip/slave 3 0x4B - AUDIO */
> >  #define TWL6030_BASEADD_AUDIO		0x0000
> >  #define TWL6030_BASEADD_RSV		0x0000
> > +#define TWL6030_BASEADD_ZERO		0x0000
> >  
> >  /* Few power values */
> >  #define R_CFG_BOOT			0x05
> > @@ -319,9 +320,11 @@ static struct twl_mapping twl6030_map[] = {
> >  	{ SUB_CHIP_ID1, TWL6030_BASEADD_CHARGER },
> >  	{ SUB_CHIP_ID1, TWL6030_BASEADD_GASGAUGE },
> >  	{ SUB_CHIP_ID1, TWL6030_BASEADD_PWM },
> > -	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
> > -	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
> > +	{ SUB_CHIP_ID0, TWL6030_BASEADD_ZERO },
> > +	{ SUB_CHIP_ID1, TWL6030_BASEADD_ZERO },
> >  
> > +	{ SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
> > +	{ SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
> >  	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
> >  	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
> >  	{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
> > diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
> > index bf1c5be..fcf9286 100644
> > --- a/include/linux/i2c/twl.h
> > +++ b/include/linux/i2c/twl.h
> > @@ -80,6 +80,11 @@
> >  #define TWL_MODULE_PM_MASTER	TWL4030_MODULE_PM_MASTER
> >  #define TWL_MODULE_PM_RECEIVER	TWL4030_MODULE_PM_RECEIVER
> >  #define TWL_MODULE_RTC		TWL4030_MODULE_RTC
> > +#define TWL_MODULE_PWM		TWL4030_MODULE_PWM0
> > +
> > +#define TWL6030_MODULE_ID0	0x0D
> > +#define TWL6030_MODULE_ID1	0x0E
> > +#define TWL6030_MODULE_ID2	0x0F
> >  
> >  #define GPIO_INTR_OFFSET	0
> >  #define KEYPAD_INTR_OFFSET	1
> > -- 
> > 1.6.0.4
> > 
> 
> -- 
> Intel Open Source Technology Centre
> http://oss.intel.com/

Re: [PATCH 18/24] omap4: clocks: Make i2c driver's clock calls OMAP4 compatible

[Paul Walmsley]

On Tue, 16 Feb 2010, Santosh Shilimkar wrote:

> From: Abhijit Pagare <abhijitpagare@ti.com>
> 
> The i2c driver has been adapted for the OMAP4 way of clock calls.

Please use dummy_ck here instead, etc. etc.


> 
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
> ---
>  drivers/i2c/busses/i2c-omap.c |   29 ++++++++++++++++-------------
>  1 files changed, 16 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 89a156a..d4f6eda 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -260,11 +260,14 @@ static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
>  {
>  	int ret;
>  
> -	dev->iclk = clk_get(dev->dev, "ick");
> -	if (IS_ERR(dev->iclk)) {
> -		ret = PTR_ERR(dev->iclk);
> -		dev->iclk = NULL;
> -		return ret;
> +	/* OMAP4 iclk are hw controlled and no sw control is available */
> +	if (!cpu_is_omap44xx()) {
> +		dev->iclk = clk_get(dev->dev, "ick");
> +		if (IS_ERR(dev->iclk)) {
> +			ret = PTR_ERR(dev->iclk);
> +			dev->iclk = NULL;
> +			return ret;
> +		}
>  	}
>  
>  	dev->fclk = clk_get(dev->dev, "fck");
> @@ -285,15 +288,18 @@ static void omap_i2c_put_clocks(struct omap_i2c_dev *dev)
>  {
>  	clk_put(dev->fclk);
>  	dev->fclk = NULL;
> -	clk_put(dev->iclk);
> -	dev->iclk = NULL;
> +	if (!cpu_is_omap44xx()) {
> +		clk_put(dev->iclk);
> +		dev->iclk = NULL;
> +	}
>  }
>  
>  static void omap_i2c_unidle(struct omap_i2c_dev *dev)
>  {
>  	WARN_ON(!dev->idle);
>  
> -	clk_enable(dev->iclk);
> +	if (!cpu_is_omap44xx())
> +		clk_enable(dev->iclk);
>  	clk_enable(dev->fclk);
>  	if (cpu_is_omap34xx()) {
>  		omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> @@ -337,7 +343,8 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
>  	}
>  	dev->idle = 1;
>  	clk_disable(dev->fclk);
> -	clk_disable(dev->iclk);
> +	if (!cpu_is_omap44xx())
> +		clk_disable(dev->iclk);
>  }
>  
>  static int omap_i2c_init(struct omap_i2c_dev *dev)
> @@ -434,10 +441,6 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
>  			internal_clk = 9600;
>  		else
>  			internal_clk = 4000;
> -		/* FIXME: Remove this once clock framework is available*/
> -		if (dev->rev >= OMAP_I2C_REV_ON_4430)
> -			fclk_rate = 96000;
> -		else
>  			fclk_rate = clk_get_rate(dev->fclk) / 1000;
>  
>  		/* Compute prescaler divisor */
> -- 
> 1.6.0.4
> 


- Paul

Re: [PATCH 16/24] omap4: Add i2c support on omap4 platform

[Tony Lindgren]

* Santosh Shilimkar <santosh.shilimkar@ti.com> [100216 07:55]:
> This patch is rebased version of earlier post to add I2C
> driver support to OMAP4 platform. On OMAP4, all
> I2C register address offsets are changed from OMAP1/2/3 I2C.
> In order to not have #ifdef's at various places in code,
> as well as to support multi-OMAP build, an array is created
> to hold the register addresses with it's offset.
> 
> This patch was submitted, reviewed and acked on mailing list
> already. For more details refer below link
> http://www.mail-archive.com/linux-i2c@vger.kernel.org/msg02281.html
> 
> This version updated on top of 16 bit support added as part of
> the commit "8bb209278e555a626f9637e844fe4c1b90e849f6"
> 
> Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
> CC: Tony Lindgren <tony@atomide.com>
> CC: Ben Dooks <ben-linux@fluff.org>
> ---
>  arch/arm/plat-omap/i2c.c      |   17 ++++-
>  drivers/i2c/busses/i2c-omap.c |  148 ++++++++++++++++++++++++++++++++---------
>  2 files changed, 131 insertions(+), 34 deletions(-)
> 
> diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
> index 96d2781..f18d757 100644
> --- a/arch/arm/plat-omap/i2c.c
> +++ b/arch/arm/plat-omap/i2c.c
> @@ -53,9 +53,15 @@ static struct resource i2c_resources[][2] = {
>  #if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
>  	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) },
>  #endif
> +#if	defined(CONFIG_ARCH_OMAP4)
> +	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_44XX_I2C2_IRQ) },
> +#endif
>  #if	defined(CONFIG_ARCH_OMAP3)
>  	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) },
>  #endif
> +#if	defined(CONFIG_ARCH_OMAP4)
> +	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_44XX_I2C3_IRQ) },
> +#endif
>  };

This is OK, but..
  
>  #define I2C_DEV_BUILDER(bus_id, res, data)		\
> @@ -72,10 +78,11 @@ static struct resource i2c_resources[][2] = {
>  static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
>  static struct platform_device omap_i2c_devices[] = {
>  	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
> -#if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> +#if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> +	defined(CONFIG_ARCH_OMAP4)
>  	I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
>  #endif
> -#if	defined(CONFIG_ARCH_OMAP3)
> +#if	defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
>  	I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
>  #endif
>  };

.. the ifdefs above can be simplified to ifdef CONFIG_ARCH_OMAP2PLUS.
That is, with the patches already queued into omap for-next.


> @@ -370,7 +434,11 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
>  			internal_clk = 9600;
>  		else
>  			internal_clk = 4000;
> -		fclk_rate = clk_get_rate(dev->fclk) / 1000;
> +		/* FIXME: Remove this once clock framework is available*/
> +		if (dev->rev >= OMAP_I2C_REV_ON_4430)
> +			fclk_rate = 96000;
> +		else
> +			fclk_rate = clk_get_rate(dev->fclk) / 1000;
>  
>  		/* Compute prescaler divisor */
>  		psc = fclk_rate / internal_clk;

Sounds like this part should no longer be needed?

>  					*dev->buf++ = w;
>  					dev->buf_len--;
> -					/* Data reg from 2430 is 8 bit wide */
> +					/* Data reg in 2430, omap3 and
> +					 * omap4 is 8 bit wide
> +					 */
>  					if (!cpu_is_omap2430() &&
> -							!cpu_is_omap34xx()) {
> +							!cpu_is_omap34xx() &&
> +							!cpu_is_omap44xx()) {
>  						if (dev->buf_len) {
>  							*dev->buf++ = w >> 8;
>  							dev->buf_len--;

How about change this to if (cpu_class_is_omap1() || cpu_is_omap2420())?
That way it does not need to be patched for new omaps.

> @@ -786,9 +857,12 @@ complete:
>  				if (dev->buf_len) {
>  					w = *dev->buf++;
>  					dev->buf_len--;
> -					/* Data reg from  2430 is 8 bit wide */
> +					/* Data reg in 2430, omap3 and
> +					 * omap4 is 8 bit wide
> +					 */
>  					if (!cpu_is_omap2430() &&
> -							!cpu_is_omap34xx()) {
> +							!cpu_is_omap34xx() &&
> +							!cpu_is_omap44xx()) {
>  						if (dev->buf_len) {
>  							w |= *dev->buf++ << 8;
>  							dev->buf_len--;

Here too.

>  	dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
>  
> -	if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> +	if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
>  		u16 s;
>  
>  		/* Set up the fifo size - Get total size */

And here too.

Regards,

Tony

RE: [PATCH 16/24] omap4: Add i2c support on omap4 platform

[Shilimkar, Santosh]

> -----Original Message-----
> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Wednesday, February 17, 2010 12:21 AM
> To: Shilimkar, Santosh
> Cc: linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com; lrg@slimlogic.co.uk;
> paul@pwsan.com; Syed, Rafiuddin; Ben Dooks
> Subject: Re: [PATCH 16/24] omap4: Add i2c support on omap4 platform
> 
> * Santosh Shilimkar <santosh.shilimkar@ti.com> [100216 07:55]:
> > This patch is rebased version of earlier post to add I2C
> > driver support to OMAP4 platform. On OMAP4, all
> > I2C register address offsets are changed from OMAP1/2/3 I2C.
> > In order to not have #ifdef's at various places in code,
> > as well as to support multi-OMAP build, an array is created
> > to hold the register addresses with it's offset.
> >
> > This patch was submitted, reviewed and acked on mailing list
> > already. For more details refer below link
> > http://www.mail-archive.com/linux-i2c@vger.kernel.org/msg02281.html
> >
> > This version updated on top of 16 bit support added as part of
> > the commit "8bb209278e555a626f9637e844fe4c1b90e849f6"
> >
> > Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
> > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
> > CC: Tony Lindgren <tony@atomide.com>
> > CC: Ben Dooks <ben-linux@fluff.org>
> > ---
> >  arch/arm/plat-omap/i2c.c      |   17 ++++-
> >  drivers/i2c/busses/i2c-omap.c |  148 ++++++++++++++++++++++++++++++++---------
> >  2 files changed, 131 insertions(+), 34 deletions(-)
> >
> > diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
> > index 96d2781..f18d757 100644
> > --- a/arch/arm/plat-omap/i2c.c
> > +++ b/arch/arm/plat-omap/i2c.c
> > @@ -53,9 +53,15 @@ static struct resource i2c_resources[][2] = {
> >  #if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> >  	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) },
> >  #endif
> > +#if	defined(CONFIG_ARCH_OMAP4)
> > +	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_44XX_I2C2_IRQ) },
> > +#endif
> >  #if	defined(CONFIG_ARCH_OMAP3)
> >  	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) },
> >  #endif
> > +#if	defined(CONFIG_ARCH_OMAP4)
> > +	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_44XX_I2C3_IRQ) },
> > +#endif
> >  };
> 
> This is OK, but..
> 
> >  #define I2C_DEV_BUILDER(bus_id, res, data)		\
> > @@ -72,10 +78,11 @@ static struct resource i2c_resources[][2] = {
> >  static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
> >  static struct platform_device omap_i2c_devices[] = {
> >  	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
> > -#if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> > +#if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> > +	defined(CONFIG_ARCH_OMAP4)
> >  	I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
> >  #endif
> > -#if	defined(CONFIG_ARCH_OMAP3)
> > +#if	defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
> >  	I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
> >  #endif
> >  };
> 
> .. the ifdefs above can be simplified to ifdef CONFIG_ARCH_OMAP2PLUS.
> That is, with the patches already queued into omap for-next.
YEP
> 
> > @@ -370,7 +434,11 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> >  			internal_clk = 9600;
> >  		else
> >  			internal_clk = 4000;
> > -		fclk_rate = clk_get_rate(dev->fclk) / 1000;
> > +		/* FIXME: Remove this once clock framework is available*/
> > +		if (dev->rev >= OMAP_I2C_REV_ON_4430)
> > +			fclk_rate = 96000;
> > +		else
> > +			fclk_rate = clk_get_rate(dev->fclk) / 1000;
> >
> >  		/* Compute prescaler divisor */
> >  		psc = fclk_rate / internal_clk;
> 
> Sounds like this part should no longer be needed?
> 
Yes. I missed this
> >  					*dev->buf++ = w;
> >  					dev->buf_len--;
> > -					/* Data reg from 2430 is 8 bit wide */
> > +					/* Data reg in 2430, omap3 and
> > +					 * omap4 is 8 bit wide
> > +					 */
> >  					if (!cpu_is_omap2430() &&
> > -							!cpu_is_omap34xx()) {
> > +							!cpu_is_omap34xx() &&
> > +							!cpu_is_omap44xx()) {
> >  						if (dev->buf_len) {
> >  							*dev->buf++ = w >> 8;
> >  							dev->buf_len--;
> 
> How about change this to if (cpu_class_is_omap1() || cpu_is_omap2420())?
> That way it does not need to be patched for new omaps.
> 
> > @@ -786,9 +857,12 @@ complete:
> >  				if (dev->buf_len) {
> >  					w = *dev->buf++;
> >  					dev->buf_len--;
> > -					/* Data reg from  2430 is 8 bit wide */
> > +					/* Data reg in 2430, omap3 and
> > +					 * omap4 is 8 bit wide
> > +					 */
> >  					if (!cpu_is_omap2430() &&
> > -							!cpu_is_omap34xx()) {
> > +							!cpu_is_omap34xx() &&
> > +							!cpu_is_omap44xx()) {
> >  						if (dev->buf_len) {
> >  							w |= *dev->buf++ << 8;
> >  							dev->buf_len--;
> 
> Here too.
> 
> >  	dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
> >
> > -	if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> > +	if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
> >  		u16 s;
> >
> >  		/* Set up the fifo size - Get total size */
> 
> And here too.
> 
> Regards,
> 
> Tony

Re: [PATCH 16/24] omap4: Add i2c support on omap4 platform

[Paul Walmsley]

Hello Santosh,

one general comment on this patch, before the specific comments.  Rather 
than adding more cpu_is_omap*() all over, please instead convert this code 
to use flags passed in via platform_data.  The I2C hwmod conversion 
patches are one attempt to do that via the hwmod mechanism; you can use 
that as an example of one way to do that with this driver.

On Tue, 16 Feb 2010, Santosh Shilimkar wrote:

> @@ -746,9 +814,12 @@ complete:
>  				if (dev->buf_len) {
>  					*dev->buf++ = w;
>  					dev->buf_len--;
> -					/* Data reg from 2430 is 8 bit wide */
> +					/* Data reg in 2430, omap3 and
> +					 * omap4 is 8 bit wide
> +					 */

The above comment needs to be fixed per CodingStyle.

>  					if (!cpu_is_omap2430() &&
> -							!cpu_is_omap34xx()) {
> +							!cpu_is_omap34xx() &&
> +							!cpu_is_omap44xx()) {
>  						if (dev->buf_len) {
>  							*dev->buf++ = w >> 8;
>  							dev->buf_len--;
> @@ -786,9 +857,12 @@ complete:
>  				if (dev->buf_len) {
>  					w = *dev->buf++;
>  					dev->buf_len--;
> -					/* Data reg from  2430 is 8 bit wide */
> +					/* Data reg in 2430, omap3 and
> +					 * omap4 is 8 bit wide
> +					 */

The above comment needs to be fixed per CodingStyle.

>  					if (!cpu_is_omap2430() &&
> -							!cpu_is_omap34xx()) {
> +							!cpu_is_omap34xx() &&
> +							!cpu_is_omap44xx()) {
>  						if (dev->buf_len) {
>  							w |= *dev->buf++ << 8;
>  							dev->buf_len--;
> @@ -897,6 +971,8 @@ omap_i2c_probe(struct platform_device *pdev)
>  
>  	if (cpu_is_omap7xx())
>  		dev->reg_shift = 1;
> +	else if (cpu_is_omap44xx())
> +		dev->reg_shift = 0;
>  	else
>  		dev->reg_shift = 2;
>  
> @@ -911,11 +987,16 @@ omap_i2c_probe(struct platform_device *pdev)
>  	if ((r = omap_i2c_get_clocks(dev)) != 0)
>  		goto err_iounmap;
>  
> +	if (cpu_is_omap44xx())
> +		dev->regs = (u8 *) omap4_reg_map;
> +	else
> +		dev->regs = (u8 *) reg_map;
> +
>  	omap_i2c_unidle(dev);
>  
>  	dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
>  
> -	if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> +	if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
>  		u16 s;
>  
>  		/* Set up the fifo size - Get total size */
> @@ -927,8 +1008,13 @@ omap_i2c_probe(struct platform_device *pdev)
>  		 * size. This is to ensure that we can handle the status on int
>  		 * call back latencies.
>  		 */
> -		dev->fifo_size = (dev->fifo_size / 2);
> -		dev->b_hw = 1; /* Enable hardware fixes */
> +		if (dev->rev >= OMAP_I2C_REV_ON_4430) {
> +			dev->fifo_size = 0;
> +			dev->b_hw = 0; /* Enable hardware fixes */
> +		} else {
> +			dev->fifo_size = (dev->fifo_size / 2);
> +			dev->b_hw = 1; /* Disable hardware fixes */

You've got the comments backwards here.  b_hw = 1 means "enable hardware 
fixes" as noted above.


> +		}
>  	}
>  
>  	/* reset ASAP, clearing any IRQs */
> -- 
> 1.6.0.4
> 


- Paul

RE: [PATCH 16/24] omap4: Add i2c support on omap4 platform

[Shilimkar, Santosh]

Thanks Paul,

I am just summarizing all my responses in this email.
<snip>
> -----Original Message-----
> From: Paul Walmsley [mailto:paul@pwsan.com]
> Sent: Wednesday, February 17, 2010 4:51 AM
> To: Shilimkar, Santosh
> Cc: tony@atomide.com; linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com;
> lrg@slimlogic.co.uk; Nayak, Rajendra; Syed, Rafiuddin; Ben Dooks
> Subject: Re: [PATCH 16/24] omap4: Add i2c support on omap4 platform
> 
> Hello Santosh,
> 
> one general comment on this patch, before the specific comments.  Rather
> than adding more cpu_is_omap*() all over, please instead convert this code
> to use flags passed in via platform_data.  The I2C hwmod conversion
> patches are one attempt to do that via the hwmod mechanism; you can use
> that as an example of one way to do that with this driver.

1. As you suggested most of the driver clock related modifications can be avoided
with dummy_nodes. Will do that. 

2. Some drivers like gptimer, the clock node names
chosen are different between omap4 and rest of the omaps. Since we do clk_get
based on clk names, such cases, we need cpu check. Another way is to keep same 
clock nodes which means need to change database scripts. 
Which one you prefer ?

3. I shall the possibility of passing flags via board-files instead of 
cpu_is_xxxx() checks in  drivers. This is ofcourse much cleaner approach 
if it's doable.

Re: [PATCH 15/24] omap4: clocks: Convert i2c clocks data to fclks

[Paul Walmsley]

On Tue, 16 Feb 2010, Santosh Shilimkar wrote:

> In OMAP4 I2C module has only fclk control and iclks are controlled
> through hardware.(The OMAP4 clock tree autogeneration script has
> been updated accordingly.)
> 
> CC:Paul Walmsley <paul@pwsan.com>
> CC:Benoit Cousson <b-cousson@ti.com)his patch>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
>  arch/arm/mach-omap2/clock44xx_data.c |    8 ++++----
>  1 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
> index 86af31d..a69e8a0 100644
> --- a/arch/arm/mach-omap2/clock44xx_data.c
> +++ b/arch/arm/mach-omap2/clock44xx_data.c
> @@ -2665,10 +2665,10 @@ static struct omap_clk omap44xx_clks[] = {
>  	CLK(NULL,	"gptimer9_ck",			&gptimer9_ck,	CK_443X),
>  	CLK("omap2_hdq.0",	"ick",				&hdq1w_ck,	CK_443X),
>  	CLK(NULL,	"hsi_ck",			&hsi_ck,	CK_443X),
> -	CLK("i2c_omap.1",	"ick",				&i2c1_ck,	CK_443X),
> -	CLK("i2c_omap.2",	"ick",				&i2c2_ck,	CK_443X),
> -	CLK("i2c_omap.3",	"ick",				&i2c3_ck,	CK_443X),
> -	CLK("i2c_omap.4",	"ick",				&i2c4_ck,	CK_443X),

You'll want to keep the above around, but use dummy_ck instead.

> +	CLK("i2c_omap.1",	"fck",				&i2c1_ck,	CK_443X),
> +	CLK("i2c_omap.2",	"fck",				&i2c2_ck,	CK_443X),
> +	CLK("i2c_omap.3",	"fck",				&i2c3_ck,	CK_443X),
> +	CLK("i2c_omap.4",	"fck",				&i2c4_ck,	CK_443X),
>  	CLK(NULL,	"iss_ck",			&iss_ck,	CK_443X),
>  	CLK(NULL,	"ivahd_ck",			&ivahd_ck,	CK_443X),
>  	CLK(NULL,	"keyboard_ck",			&keyboard_ck,	CK_443X),
> -- 
> 1.6.0.4
> 


- Paul

Re: [PATCH 14/24] omap4: Enable WDT and McBSP support

[Tony Lindgren]

* Santosh Shilimkar <santosh.shilimkar@ti.com> [100216 07:55]:
> This patch enables watchdog timer and McBSP support on omap4430
> sdp platform.
> Additinaly the uart3 made as default console in the omap_4430sdp_defconfig

This probably cannot be applied until the dummy_ck handling is added
for omap4.

Regards,

Tony
 
> Signed-off-by: Balaji T K <balajitk@ti.com>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
>  arch/arm/configs/omap_4430sdp_defconfig |    7 ++++---
>  drivers/watchdog/Kconfig                |    6 +++---
>  2 files changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig
> index 3de640a..7ac3fbf 100644
> --- a/arch/arm/configs/omap_4430sdp_defconfig
> +++ b/arch/arm/configs/omap_4430sdp_defconfig
> @@ -199,7 +199,7 @@ CONFIG_ARCH_OMAP4=y
>  #
>  # CONFIG_OMAP_RESET_CLOCKS is not set
>  # CONFIG_OMAP_MUX is not set
> -# CONFIG_OMAP_MCBSP is not set
> +CONFIG_OMAP_MCBSP=y
>  # CONFIG_OMAP_MBOX_FWK is not set
>  # CONFIG_OMAP_MPU_TIMER is not set
>  CONFIG_OMAP_32K_TIMER=y
> @@ -304,7 +304,7 @@ CONFIG_ALIGNMENT_TRAP=y
>  #
>  CONFIG_ZBOOT_ROM_TEXT=0x0
>  CONFIG_ZBOOT_ROM_BSS=0x0
> -CONFIG_CMDLINE="root=/dev/ram0 rw mem=128M console=ttyS0,115200n8 initrd=0x81600000,20M ramdisk_size=20480"
> +CONFIG_CMDLINE="root=/dev/ram0 rw mem=128M console=ttyS2,115200n8 initrd=0x81600000,20M ramdisk_size=20480"
>  # CONFIG_XIP_KERNEL is not set
>  # CONFIG_KEXEC is not set
>  
> @@ -488,7 +488,8 @@ CONFIG_GPIOLIB=y
>  # CONFIG_POWER_SUPPLY is not set
>  # CONFIG_HWMON is not set
>  # CONFIG_THERMAL is not set
> -# CONFIG_WATCHDOG is not set
> +CONFIG_WATCHDOG=y
> +CONFIG_OMAP_WATCHDOG=y
>  CONFIG_SSB_POSSIBLE=y
>  
>  #
> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> index 3da3f48..1185f05 100644
> --- a/drivers/watchdog/Kconfig
> +++ b/drivers/watchdog/Kconfig
> @@ -194,10 +194,10 @@ config EP93XX_WATCHDOG
>  
>  config OMAP_WATCHDOG
>  	tristate "OMAP Watchdog"
> -	depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP3
> +	depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4
>  	help
> -	  Support for TI OMAP1610/OMAP1710/OMAP2420/OMAP3430 watchdog.  Say 'Y'
> -	  here to enable the OMAP1610/OMAP1710/OMAP2420/OMAP3430 watchdog timer.
> +	  Support for TI OMAP1610/OMAP1710/OMAP2420/OMAP3430/OMAP4430 watchdog.  Say 'Y'
> +	  here to enable the OMAP1610/OMAP1710/OMAP2420/OMAP3430/OMAP4430 watchdog timer.
>  
>  config PNX4008_WATCHDOG
>  	tristate "PNX4008 Watchdog"
> -- 
> 1.6.0.4
> 

Re: [PATCH 13/24] omap4: clocks: Remove clock hacks from timer-gp.c

[Tony Lindgren]

* Santosh Shilimkar <santosh.shilimkar@ti.com> [100216 07:55]:
> Now the omap4 clock framework is mainline and clk_get_rate()
> is functional. Hence reomve the hardcoded clock hacks.

Should we send this as a fix for 2.6.33, or does this depend
on other patches not yet in 2.6.33?

Regards,

Tony
 
> This patch also fixes
> Division by zero in kernel.
> Backtrace:
> [<c0025fb8>] (dump_backtrace+0x0/0x110) from [<c017febc>] (dump_stack+0x18/0x1c)
>  r7:60000093 r6:c0641050 r5:c0223e78 r4:c02126b4
> [<c017fea4>] (dump_stack+0x0/0x1c) from [<c00260fc>] (__div0+0x18/0x20)
> [<c00260e4>] (__div0+0x0/0x20) from [<c01431fc>] (Ldiv0+0x8/0x10)
> [<c00318d4>] (omap_dm_timer_stop+0x0/0xb0) from [<c002c148>] (omap2_gp_timer_set_mode+0x1c/0x68)
>  r5:c0223e78 r4:00000000
> [<c002c12c>] (omap2_gp_timer_set_mode+0x0/0x68) from [<c0063270>] (clockevents_set_mode+0x30/0x64)
>  r5:c020cae0 r4:00000000
> [<c0063240>] (clockevents_set_mode+0x0/0x64) from [<c00632fc>] (clockevents_exchange_device+0x30/0x9c)
>  r5:c020cae0 r4:c02146e0
> [<c00632cc>] (clockevents_exchange_device+0x0/0x9c) from [<c00636e0>] (tick_notify+0x17c/0x404)
>  r7:00000000 r6:c0641050 r5:00000000 r4:c020cae0
> [<c0063564>] (tick_notify+0x0/0x404) from [<c005d5fc>] (notifier_call_chain+0x34/0x78)
> [<c005d5c8>] (notifier_call_chain+0x0/0x78) from [<c005d684>] (__raw_notifier_call_chain+0x1c/0x24)
> [<c005d668>] (__raw_notifier_call_chain+0x0/0x24) from [<c005d6ac>] (raw_notifier_call_chain+0x20/0x28)
> [<c005d68c>] (raw_notifier_call_chain+0x0/0x28) from [<c0062e78>] (clockevents_do_notify+0x1c/0x24)
> [<c0062e5c>] (clockevents_do_notify+0x0/0x24) from [<c0062f18>] (clockevents_register_device+0x98/0xd0)
> [<c0062e80>] (clockevents_register_device+0x0/0xd0) from [<c001a194>] (percpu_timer_setup+0x80/0x9c)
>  r7:00000000 r6:00000002 r5:00000002 r4:00000003
> [<c001a114>] (percpu_timer_setup+0x0/0x9c) from [<c000e9f0>] (smp_prepare_cpus+0xb0/0xe8)
> [<c000e940>] (smp_prepare_cpus+0x0/0xe8) from [<c00084e8>] (kernel_init+0x5c/0x1fc)
>  r7:00000000 r6:00000000 r5:00000000 r4:c001b8a4
> [<c000848c>] (kernel_init+0x0/0x1fc) from [<c0046c50>] (do_exit+0x0/0x604)
>  r7:00000000 r6:00000000 r5:00000000 r4:00000000
> 
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
>  arch/arm/mach-omap2/timer-gp.c |    5 -----
>  1 files changed, 0 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
> index cd04dea..74fbed8 100644
> --- a/arch/arm/mach-omap2/timer-gp.c
> +++ b/arch/arm/mach-omap2/timer-gp.c
> @@ -85,8 +85,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
>  	case CLOCK_EVT_MODE_PERIODIC:
>  		period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
>  		period -= 1;
> -		if (cpu_is_omap44xx())
> -			period = 0xff;	/* FIXME: */
>  		omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
>  		break;
>  	case CLOCK_EVT_MODE_ONESHOT:
> @@ -150,9 +148,6 @@ static void __init omap2_gp_clockevent_init(void)
>  		     "timer-gp: omap_dm_timer_set_source() failed\n");
>  
>  	tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
> -	if (cpu_is_omap44xx())
> -		/* Assuming 32kHz clk is driving GPT1 */
> -		tick_rate = 32768;	/* FIXME: */
>  
>  	pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
>  		gptimer_id, tick_rate);
> -- 
> 1.6.0.4
> 

RE: [PATCH 13/24] omap4: clocks: Remove clock hacks from timer-gp.c

[Shilimkar, Santosh]

> -----Original Message-----
> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Wednesday, February 17, 2010 12:12 AM
> To: Shilimkar, Santosh
> Cc: linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com; lrg@slimlogic.co.uk;
> paul@pwsan.com
> Subject: Re: [PATCH 13/24] omap4: clocks: Remove clock hacks from timer-gp.c
> 
> * Santosh Shilimkar <santosh.shilimkar@ti.com> [100216 07:55]:
> > Now the omap4 clock framework is mainline and clk_get_rate()
> > is functional. Hence reomve the hardcoded clock hacks.
> 
> Should we send this as a fix for 2.6.33, or does this depend
> on other patches not yet in 2.6.33?
This needs the gptimer clocks updates in dmtimer.
> Regards,
> 
> Tony
> 
> > This patch also fixes
> > Division by zero in kernel.
> > Backtrace:
> > [<c0025fb8>] (dump_backtrace+0x0/0x110) from [<c017febc>] (dump_stack+0x18/0x1c)
> >  r7:60000093 r6:c0641050 r5:c0223e78 r4:c02126b4
> > [<c017fea4>] (dump_stack+0x0/0x1c) from [<c00260fc>] (__div0+0x18/0x20)
> > [<c00260e4>] (__div0+0x0/0x20) from [<c01431fc>] (Ldiv0+0x8/0x10)
> > [<c00318d4>] (omap_dm_timer_stop+0x0/0xb0) from [<c002c148>] (omap2_gp_timer_set_mode+0x1c/0x68)
> >  r5:c0223e78 r4:00000000
> > [<c002c12c>] (omap2_gp_timer_set_mode+0x0/0x68) from [<c0063270>] (clockevents_set_mode+0x30/0x64)
> >  r5:c020cae0 r4:00000000
> > [<c0063240>] (clockevents_set_mode+0x0/0x64) from [<c00632fc>]
> (clockevents_exchange_device+0x30/0x9c)
> >  r5:c020cae0 r4:c02146e0
> > [<c00632cc>] (clockevents_exchange_device+0x0/0x9c) from [<c00636e0>] (tick_notify+0x17c/0x404)
> >  r7:00000000 r6:c0641050 r5:00000000 r4:c020cae0
> > [<c0063564>] (tick_notify+0x0/0x404) from [<c005d5fc>] (notifier_call_chain+0x34/0x78)
> > [<c005d5c8>] (notifier_call_chain+0x0/0x78) from [<c005d684>] (__raw_notifier_call_chain+0x1c/0x24)
> > [<c005d668>] (__raw_notifier_call_chain+0x0/0x24) from [<c005d6ac>]
> (raw_notifier_call_chain+0x20/0x28)
> > [<c005d68c>] (raw_notifier_call_chain+0x0/0x28) from [<c0062e78>] (clockevents_do_notify+0x1c/0x24)
> > [<c0062e5c>] (clockevents_do_notify+0x0/0x24) from [<c0062f18>]
> (clockevents_register_device+0x98/0xd0)
> > [<c0062e80>] (clockevents_register_device+0x0/0xd0) from [<c001a194>]
> (percpu_timer_setup+0x80/0x9c)
> >  r7:00000000 r6:00000002 r5:00000002 r4:00000003
> > [<c001a114>] (percpu_timer_setup+0x0/0x9c) from [<c000e9f0>] (smp_prepare_cpus+0xb0/0xe8)
> > [<c000e940>] (smp_prepare_cpus+0x0/0xe8) from [<c00084e8>] (kernel_init+0x5c/0x1fc)
> >  r7:00000000 r6:00000000 r5:00000000 r4:c001b8a4
> > [<c000848c>] (kernel_init+0x0/0x1fc) from [<c0046c50>] (do_exit+0x0/0x604)
> >  r7:00000000 r6:00000000 r5:00000000 r4:00000000
> >
> > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > ---
> >  arch/arm/mach-omap2/timer-gp.c |    5 -----
> >  1 files changed, 0 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
> > index cd04dea..74fbed8 100644
> > --- a/arch/arm/mach-omap2/timer-gp.c
> > +++ b/arch/arm/mach-omap2/timer-gp.c
> > @@ -85,8 +85,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
> >  	case CLOCK_EVT_MODE_PERIODIC:
> >  		period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
> >  		period -= 1;
> > -		if (cpu_is_omap44xx())
> > -			period = 0xff;	/* FIXME: */
> >  		omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
> >  		break;
> >  	case CLOCK_EVT_MODE_ONESHOT:
> > @@ -150,9 +148,6 @@ static void __init omap2_gp_clockevent_init(void)
> >  		     "timer-gp: omap_dm_timer_set_source() failed\n");
> >
> >  	tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
> > -	if (cpu_is_omap44xx())
> > -		/* Assuming 32kHz clk is driving GPT1 */
> > -		tick_rate = 32768;	/* FIXME: */
> >
> >  	pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
> >  		gptimer_id, tick_rate);
> > --
> > 1.6.0.4
> >

Re: [PATCH 13/24] omap4: clocks: Remove clock hacks from timer-gp.c

[Tony Lindgren]

* Shilimkar, Santosh <santosh.shilimkar@ti.com> [100216 20:59]:
> > -----Original Message-----
> > From: Tony Lindgren [mailto:tony@atomide.com]
> > Sent: Wednesday, February 17, 2010 12:12 AM
> > To: Shilimkar, Santosh
> > Cc: linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com; lrg@slimlogic.co.uk;
> > paul@pwsan.com
> > Subject: Re: [PATCH 13/24] omap4: clocks: Remove clock hacks from timer-gp.c
> > 
> > * Santosh Shilimkar <santosh.shilimkar@ti.com> [100216 07:55]:
> > > Now the omap4 clock framework is mainline and clk_get_rate()
> > > is functional. Hence reomve the hardcoded clock hacks.
> > 
> > Should we send this as a fix for 2.6.33, or does this depend
> > on other patches not yet in 2.6.33?
>
> This needs the gptimer clocks updates in dmtimer.

OK, so can't send it as a fix then.

Tony

Re: [PATCH 11/24] omap4: clocks: Make watchdog driver's clock calls OMAP4 compatible

[Paul Walmsley]

Hello Abhijit, Santosh,

On Tue, 16 Feb 2010, Santosh Shilimkar wrote:

> The watchdog driver has been adapted for the OMAP4 way of clock calls.
> In OMAP4, WDT iclk are hw controlled and no sw control is available
> 
> Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
> ---
>  drivers/watchdog/omap_wdt.c |   39 +++++++++++++++++++++++++++------------
>  1 files changed, 27 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
> index c6aaf28..df9f714 100644
> --- a/drivers/watchdog/omap_wdt.c
> +++ b/drivers/watchdog/omap_wdt.c
> @@ -145,7 +145,9 @@ static int omap_wdt_open(struct inode *inode, struct file *file)
>  	if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
>  		return -EBUSY;
>  
> -	clk_enable(wdev->ick);    /* Enable the interface clock */
> +	/* OMAP4 iclk are hw controlled and no sw control is available */
> +	if (!cpu_is_omap44xx())

No new cpu_is_omap*() calls should be added to device drivers.  The 
intention is that drivers should be completely platform-independent.  For 
example, if DaVinci or some other platform uses the same watchdog IP, it 
should be able to reuse this driver without dependencies on the OMAP core.

Instead, please use the dummy_ck mechanism, as mentioned earlier.


> +		clk_enable(wdev->ick);    /* Enable the interface clock */
>  	clk_enable(wdev->fck);    /* Enable the functional clock */
>  
>  	/* initialize prescaler */
> @@ -176,7 +178,9 @@ static int omap_wdt_release(struct inode *inode, struct file *file)
>  
>  	omap_wdt_disable(wdev);
>  
> -	clk_disable(wdev->ick);
> +	/* OMAP4 iclk are hw controlled and no sw control is available */
> +	if (!cpu_is_omap44xx())
> +		clk_disable(wdev->ick);
>  	clk_disable(wdev->fck);
>  #else
>  	printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
> @@ -292,11 +296,14 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev)
>  	wdev->omap_wdt_users = 0;
>  	wdev->mem = mem;
>  
> -	wdev->ick = clk_get(&pdev->dev, "ick");
> -	if (IS_ERR(wdev->ick)) {
> -		ret = PTR_ERR(wdev->ick);
> -		wdev->ick = NULL;
> -		goto err_clk;
> +	/* OMAP4 iclk are hw controlled and no sw control is available */
> +	if (!cpu_is_omap44xx()) {
> +		wdev->ick = clk_get(&pdev->dev, "ick");
> +		if (IS_ERR(wdev->ick)) {
> +			ret = PTR_ERR(wdev->ick);
> +			wdev->ick = NULL;
> +			goto err_clk;
> +		}
>  	}
>  	wdev->fck = clk_get(&pdev->dev, "fck");
>  	if (IS_ERR(wdev->fck)) {
> @@ -313,7 +320,9 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev)
>  
>  	platform_set_drvdata(pdev, wdev);
>  
> -	clk_enable(wdev->ick);
> +	/* OMAP4 iclk are hw controlled and no sw control is available */
> +	if (!cpu_is_omap44xx())
> +		clk_enable(wdev->ick);
>  	clk_enable(wdev->fck);
>  
>  	omap_wdt_disable(wdev);
> @@ -335,7 +344,9 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev)
>  	/* autogate OCP interface clock */
>  	__raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
>  
> -	clk_disable(wdev->ick);
> +	/* OMAP4 iclk are hw controlled and no sw control is available */
> +	if (!cpu_is_omap44xx())
> +		clk_disable(wdev->ick);
>  	clk_disable(wdev->fck);
>  
>  	omap_wdt_dev = pdev;
> @@ -350,8 +361,10 @@ err_ioremap:
>  	wdev->base = NULL;
>  
>  err_clk:
> -	if (wdev->ick)
> -		clk_put(wdev->ick);
> +	/* OMAP4 iclk are hw controlled and no sw control is available */
> +	if (!cpu_is_omap44xx())
> +		if (wdev->ick)
> +			clk_put(wdev->ick);
>  	if (wdev->fck)
>  		clk_put(wdev->fck);
>  	kfree(wdev);
> @@ -385,7 +398,9 @@ static int __devexit omap_wdt_remove(struct platform_device *pdev)
>  	release_mem_region(res->start, resource_size(res));
>  	platform_set_drvdata(pdev, NULL);
>  
> -	clk_put(wdev->ick);
> +	/* OMAP4 iclk are hw controlled and no sw control is available */
> +	if (!cpu_is_omap44xx())
> +		clk_put(wdev->ick);
>  	clk_put(wdev->fck);
>  	iounmap(wdev->base);
>  
> -- 
> 1.6.0.4
> 


- Paul

Re: [PATCH 09/24] omap4: clocks: Make mcbsp driver's clock calls OMAP4 compatible

[Paul Walmsley]

Hello Abhijit, Santosh,

On Tue, 16 Feb 2010, Santosh Shilimkar wrote:

> The mcbsp driver has been adapted for the OMAP4 way of clock calls.
> In OMAP4, the iclk are hw controlled and no sw control is available
> 
> Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
>  arch/arm/plat-omap/mcbsp.c |   13 ++++++++-----
>  1 files changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
> index 473be3d..72b9694 100644
> --- a/arch/arm/plat-omap/mcbsp.c
> +++ b/arch/arm/plat-omap/mcbsp.c
> @@ -1314,11 +1314,14 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
>  	mcbsp->dma_rx_sync = pdata->dma_rx_sync;
>  	mcbsp->dma_tx_sync = pdata->dma_tx_sync;
>  
> -	mcbsp->iclk = clk_get(&pdev->dev, "ick");
> -	if (IS_ERR(mcbsp->iclk)) {
> -		ret = PTR_ERR(mcbsp->iclk);
> -		dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
> -		goto err_iclk;
> +	/* OMAP4 iclk are hw controlled and no sw control is available */
> +	if (!cpu_is_omap44xx()) {

Please use dummy_ck for this, rather than modifying plat-omap/mcbsp.c.

> +		mcbsp->iclk = clk_get(&pdev->dev, "ick");
> +		if (IS_ERR(mcbsp->iclk)) {
> +			ret = PTR_ERR(mcbsp->iclk);
> +			dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
> +			goto err_iclk;
> +		}
>  	}
>  
>  	mcbsp->fclk = clk_get(&pdev->dev, "fck");
> -- 
> 1.6.0.4
> 


- Paul

Re: [PATCH 08/24] omap4: clocks: Make Uart driver's clock calls OMAP4 compatible

[Tony Lindgren]

* Santosh Shilimkar <santosh.shilimkar@ti.com> [100216 07:55]:
> From: Abhijit Pagare <abhijitpagare@ti.com>
> 
> The uart driver has been adapted for the OMAP4 way of clock calls.
> 
> Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
> ---
>  arch/arm/mach-omap2/serial.c |   24 ++++++++++++++++--------
>  1 files changed, 16 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
> index b79bc89..97859b0 100644
> --- a/arch/arm/mach-omap2/serial.c
> +++ b/arch/arm/mach-omap2/serial.c
> @@ -257,7 +257,8 @@ static inline void omap_uart_enable_clocks(struct omap_uart_state *uart)
>  		return;
>  
>  	clk_enable(uart->ick);
> -	clk_enable(uart->fck);
> +	if (!cpu_is_omap44xx())
> +		clk_enable(uart->fck);
>  	uart->clocked = 1;
>  	omap_uart_restore_context(uart);
>  }
> @@ -272,7 +273,8 @@ static inline void omap_uart_disable_clocks(struct omap_uart_state *uart)
>  	omap_uart_save_context(uart);
>  	uart->clocked = 0;
>  	clk_disable(uart->ick);
> -	clk_disable(uart->fck);
> +	if (!cpu_is_omap44xx())
> +		clk_disable(uart->fck);
>  }

As discussed outside the lists, the fck handling for omap4 should be
done with dummy_ck the same way as we're already doing for omap1. 

Regards,

Tony
  

Re: [PATCH 08/24] omap4: clocks: Make Uart driver's clock calls OMAP4 compatible

[Paul Walmsley]

Hello Abhijit, Santosh,

On Tue, 16 Feb 2010, Santosh Shilimkar wrote:

> From: Abhijit Pagare <abhijitpagare@ti.com>
> 
> The uart driver has been adapted for the OMAP4 way of clock calls.

This patch needs some revision.

According to the 4430 TRM ES1.0 Rev A section 23.3.3 "UART/IrDA/CIR 
Integration", and cross-referencing it with clock44xx_data.c, these clocks 
which are marked as interface clocks should really be marked as functional 
clocks.  For example, in the clock data, they descend from per_48_fclk, 
which according to the TRM diagram, indicates that they are functional 
clocks.  The TRM diagram also names these clocks "UARTx_FCLK" rather than 
"UARTx_CK", perhaps this naming should be preserved? 

Also, rather than adding an extra cpu_is_omap*() conditional in the code 
for a missing clock, please use the dummy_ck functionality.  Santosh will 
need this for OMAP4 I2C anyway; this appears to be another example where 
this is needed.


- Paul

> 
> Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
> ---
>  arch/arm/mach-omap2/serial.c |   24 ++++++++++++++++--------
>  1 files changed, 16 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
> index b79bc89..97859b0 100644
> --- a/arch/arm/mach-omap2/serial.c
> +++ b/arch/arm/mach-omap2/serial.c
> @@ -257,7 +257,8 @@ static inline void omap_uart_enable_clocks(struct omap_uart_state *uart)
>  		return;
>  
>  	clk_enable(uart->ick);
> -	clk_enable(uart->fck);
> +	if (!cpu_is_omap44xx())
> +		clk_enable(uart->fck);
>  	uart->clocked = 1;
>  	omap_uart_restore_context(uart);
>  }
> @@ -272,7 +273,8 @@ static inline void omap_uart_disable_clocks(struct omap_uart_state *uart)
>  	omap_uart_save_context(uart);
>  	uart->clocked = 0;
>  	clk_disable(uart->ick);
> -	clk_disable(uart->fck);
> +	if (!cpu_is_omap44xx())
> +		clk_disable(uart->fck);
>  }
>  
>  static void omap_uart_enable_wakeup(struct omap_uart_state *uart)
> @@ -669,18 +671,24 @@ void __init omap_serial_early_init(void)
>  			continue;
>  		}
>  
> -		sprintf(name, "uart%d_ick", i+1);
> +		if (!cpu_is_omap44xx())
> +			sprintf(name, "uart%d_ick", i+1);
> +		else
> +			sprintf(name, "uart%d_ck", i+1);
>  		uart->ick = clk_get(NULL, name);
>  		if (IS_ERR(uart->ick)) {
>  			printk(KERN_ERR "Could not get uart%d_ick\n", i+1);
>  			uart->ick = NULL;
>  		}
>  
> -		sprintf(name, "uart%d_fck", i+1);
> -		uart->fck = clk_get(NULL, name);
> -		if (IS_ERR(uart->fck)) {
> -			printk(KERN_ERR "Could not get uart%d_fck\n", i+1);
> -			uart->fck = NULL;
> +		if (!cpu_is_omap44xx()) {
> +			sprintf(name, "uart%d_fck", i+1);
> +			uart->fck = clk_get(NULL, name);
> +			if (IS_ERR(uart->fck)) {
> +				printk(KERN_ERR "Could not get uart%d_fck\n",
> +									 i+1);
> +				uart->fck = NULL;
> +			}
>  		}
>  
>  		/* FIXME: Remove this once the clkdev is ready */
> -- 
> 1.6.0.4
> 


- Paul

Re: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h

[Paul Walmsley]

Hello Santosh,

On Tue, 16 Feb 2010, Santosh Shilimkar wrote:

> This patch adds DSS, keyboard and ducati irq
> entries in irqs.h
> 
> Ones omap4 hwmod is pushed on mainlie, all the
> irqs lines data would be availabe.

Instead of this patch, why not just replace the current file with the one 
from the OMAP4 autogeneration scripts?  I don't see why the IRQ macros 
should depend on hwmod availability, and it would be better to have the 
correct IRQ data appear in one patch, rather than having to review and 
approve several smaller incremental patches over time.

The same reasoning should apply the DMA data also, I'd think.


- Paul

> 
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
>  arch/arm/plat-omap/include/plat/irqs.h |    5 +++++
>  1 files changed, 5 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
> index e8205c1..e2fbd74 100644
> --- a/arch/arm/plat-omap/include/plat/irqs.h
> +++ b/arch/arm/plat-omap/include/plat/irqs.h
> @@ -385,6 +385,7 @@
>  #define INT_44XX_GPTIMER11	(47 + IRQ_GIC_START)
>  #define INT_44XX_GPTIMER12	(95 + IRQ_GIC_START)
>  #define INT_44XX_SHA1MD5	(51 + IRQ_GIC_START)
> +#define INT_44XX_DSS_DSI1	(53 + IRQ_GIC_START)
>  #define INT_44XX_I2C1_IRQ	(56 + IRQ_GIC_START)
>  #define INT_44XX_I2C2_IRQ	(57 + IRQ_GIC_START)
>  #define INT_44XX_HDQ_IRQ	(58 + IRQ_GIC_START)
> @@ -405,6 +406,7 @@
>  #define INT_44XX_MCBSP4_IRQ_TX	(81 + IRQ_GIC_START)
>  #define INT_44XX_MCBSP4_IRQ_RX	(82 + IRQ_GIC_START)
>  #define INT_44XX_MMC_IRQ	(83 + IRQ_GIC_START)
> +#define INT_44XX_DSS_DSI2	(84 + IRQ_GIC_START)
>  #define INT_44XX_MMC2_IRQ	(86 + IRQ_GIC_START)
>  #define INT_44XX_MCBSP2_IRQ_TX	(89 + IRQ_GIC_START)
>  #define INT_44XX_MCBSP2_IRQ_RX	(90 + IRQ_GIC_START)
> @@ -442,7 +444,10 @@
>  #define INT_44XX_PARTHASH_IRQ	(79 + IRQ_GIC_START)
>  #define INT_44XX_MMC3_IRQ	(94 + IRQ_GIC_START)
>  #define INT_44XX_MMC4_IRQ	(96 + IRQ_GIC_START)
> +#define INT_44XX_DUCATI_MMU_IRQ	(100 + IRQ_GIC_START)
>  #define INT_44XX_MCPDM_IRQ	(112 + IRQ_GIC_START)
> +#define INT_4XX_DSS_HDMI	(101 + IRQ_GIC_START)
> +#define INT_44XX_KBD_CTL	(120 + IRQ_GIC_START)
>  
>  /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
>   * 16 MPUIO lines */
> -- 
> 1.6.0.4
> 


- Paul

RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h

[Shilimkar, Santosh]

Paul,
> -----Original Message-----
> From: Paul Walmsley [mailto:paul@pwsan.com]
> Sent: Wednesday, February 17, 2010 3:39 AM
> To: Shilimkar, Santosh
> Cc: tony@atomide.com; linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com;
> lrg@slimlogic.co.uk
> Subject: Re: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h
> 
> Hello Santosh,
> 
> On Tue, 16 Feb 2010, Santosh Shilimkar wrote:
> 
> > This patch adds DSS, keyboard and ducati irq
> > entries in irqs.h
> >
> > Ones omap4 hwmod is pushed on mainlie, all the
> > irqs lines data would be availabe.
> 
> Instead of this patch, why not just replace the current file with the one
> from the OMAP4 autogeneration scripts?  I don't see why the IRQ macros
> should depend on hwmod availability, and it would be better to have the
> correct IRQ data appear in one patch, rather than having to review and
> approve several smaller incremental patches over time.
We plan to do this but today the autogenrated file names and one in the 
kernel code is different. Autogenrated headers are kept in alignment
with TRM naming as you know.
e.g
--- autogenaretd
#define OMAP44XX_IRQ_MCBSP2   (22 + OMAP44XX_IRQ_GIC_START) 

--existing kernel
#define INT_44XX_MCBSP2_IRQ	(22 + IRQ_GIC_START)


So instead of touching every driver file and changing it only for name changes ,
what we are doing
1. Created local 44xx_dma.h and 44xx_irq.h mach-omap2 directory
2. All the drivers getting converted in hwmods would use defines from above headers
3. At one point of time all the drivers would use defines from above headers and then 
   from omap4 point of view there won't be dependency on the irqs.h and dma.h

While this is ongoing, we would like the mainline kernel to have most of the 
drivers supported. And Hence such a patch.
 
> The same reasoning should apply the DMA data also, I'd think.
DMA file will get replaced soon with auto generated since naming
is aligned there.


Regards,
Santosh

RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h

[Paul Walmsley]

On Wed, 17 Feb 2010, Shilimkar, Santosh wrote:

> > -----Original Message-----
> > From: Paul Walmsley [mailto:paul@pwsan.com]
> > Sent: Wednesday, February 17, 2010 3:39 AM
> > To: Shilimkar, Santosh
> > Cc: tony@atomide.com; linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com;
> > lrg@slimlogic.co.uk
> > Subject: Re: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h
> > 
> > Hello Santosh,
> > 
> > On Tue, 16 Feb 2010, Santosh Shilimkar wrote:
> > 
> > > This patch adds DSS, keyboard and ducati irq
> > > entries in irqs.h
> > >
> > > Ones omap4 hwmod is pushed on mainlie, all the
> > > irqs lines data would be availabe.
> > 
> > Instead of this patch, why not just replace the current file with the one
> > from the OMAP4 autogeneration scripts?  I don't see why the IRQ macros
> > should depend on hwmod availability, and it would be better to have the
> > correct IRQ data appear in one patch, rather than having to review and
> > approve several smaller incremental patches over time.
> We plan to do this but today the autogenrated file names and one in the 
> kernel code is different.

File names or macro names?

> Autogenrated headers are kept in alignment
> with TRM naming as you know.
> e.g
> --- autogenaretd
> #define OMAP44XX_IRQ_MCBSP2   (22 + OMAP44XX_IRQ_GIC_START) 
> 
> --existing kernel
> #define INT_44XX_MCBSP2_IRQ	(22 + IRQ_GIC_START)
> 
> 
> So instead of touching every driver file and changing it only for name changes ,
> what we are doing
> 1. Created local 44xx_dma.h and 44xx_irq.h mach-omap2 directory
> 2. All the drivers getting converted in hwmods would use defines from above headers
> 3. At one point of time all the drivers would use defines from above headers and then 
>    from omap4 point of view there won't be dependency on the irqs.h and dma.h
> 
> While this is ongoing, we would like the mainline kernel to have most of the 
> drivers supported. And Hence such a patch.

I grepped through the code base for any instances of INT_44XX:

[paul@twilight current]$ fgrep -r INT_44XX . | fgrep -v ./arch/arm/plat-omap/include/plat/irqs.h
./arch/arm/mach-omap2/devices.c:		.start          = INT_44XX_MAIL_U0_MPU,
./arch/arm/mach-omap2/devices.c:			irq = INT_44XX_MMC4_IRQ;
./arch/arm/mach-omap2/devices.c:			irq = INT_44XX_MMC5_IRQ;
./arch/arm/mach-omap2/timer-mpu.c:	evt->irq = INT_44XX_LOCALTIMER_IRQ;
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4a318000, .irq = INT_44XX_GPTIMER1 },
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48032000, .irq = INT_44XX_GPTIMER2 },
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48034000, .irq = INT_44XX_GPTIMER3 },
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48036000, .irq = INT_44XX_GPTIMER4 },
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x40138000, .irq = INT_44XX_GPTIMER5 },
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4013a000, .irq = INT_44XX_GPTIMER6 },
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4013a000, .irq = INT_44XX_GPTIMER7 },
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4013e000, .irq = INT_44XX_GPTIMER8 },
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4803e000, .irq = INT_44XX_GPTIMER9 },
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48086000, .irq = INT_44XX_GPTIMER10 },
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48088000, .irq = INT_44XX_GPTIMER11 },
./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4a320000, .irq = INT_44XX_GPTIMER12 },
./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO1_BASE, NULL, INT_44XX_GPIO_BANK1, IH_GPIO_BASE,
./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO2_BASE, NULL, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32,
./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO3_BASE, NULL, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64,
./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO4_BASE, NULL, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96,
./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO5_BASE, NULL, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128,
./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO6_BASE, NULL, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160,
./arch/arm/plat-omap/dma.c:			irq = INT_44XX_SDMA_IRQ0;
[paul@twilight current]$


There are only five files to change.  None of them are device
driver files, so they can all be merged through linux-omap.  The
changes could easily be done in a single patch.  So I see no
reason to not use the autogenerated IRQ file.

> > The same reasoning should apply the DMA data also, I'd think.
> DMA file will get replaced soon with auto generated since naming
> is aligned there.


- Paul

RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h

[Shilimkar, Santosh]

> -----Original Message-----
> From: Paul Walmsley [mailto:paul@pwsan.com]
> Sent: Wednesday, February 17, 2010 11:02 AM
> To: Shilimkar, Santosh
> Cc: tony@atomide.com; linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com;
> lrg@slimlogic.co.uk; Cousson, Benoit
> Subject: RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h
> 
> On Wed, 17 Feb 2010, Shilimkar, Santosh wrote:
> 
> > > -----Original Message-----
> > > From: Paul Walmsley [mailto:paul@pwsan.com]
> > > Sent: Wednesday, February 17, 2010 3:39 AM
> > > To: Shilimkar, Santosh
> > > Cc: tony@atomide.com; linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com;
> > > lrg@slimlogic.co.uk
> > > Subject: Re: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h
> > >
> > > Hello Santosh,
> > >
> > > On Tue, 16 Feb 2010, Santosh Shilimkar wrote:
> > >
> > > > This patch adds DSS, keyboard and ducati irq
> > > > entries in irqs.h
> > > >
> > > > Ones omap4 hwmod is pushed on mainlie, all the
> > > > irqs lines data would be availabe.
> > >
> > > Instead of this patch, why not just replace the current file with the one
> > > from the OMAP4 autogeneration scripts?  I don't see why the IRQ macros
> > > should depend on hwmod availability, and it would be better to have the
> > > correct IRQ data appear in one patch, rather than having to review and
> > > approve several smaller incremental patches over time.
> > We plan to do this but today the autogenrated file names and one in the
> > kernel code is different.
> 
> File names or macro names?
Macros ofcourse
> 
> > Autogenrated headers are kept in alignment
> > with TRM naming as you know.
> > e.g
> > --- autogenaretd
> > #define OMAP44XX_IRQ_MCBSP2   (22 + OMAP44XX_IRQ_GIC_START)
> >
> > --existing kernel
> > #define INT_44XX_MCBSP2_IRQ	(22 + IRQ_GIC_START)
> >
> >
> > So instead of touching every driver file and changing it only for name changes ,
> > what we are doing
> > 1. Created local 44xx_dma.h and 44xx_irq.h mach-omap2 directory
> > 2. All the drivers getting converted in hwmods would use defines from above headers
> > 3. At one point of time all the drivers would use defines from above headers and then
> >    from omap4 point of view there won't be dependency on the irqs.h and dma.h
> >
> > While this is ongoing, we would like the mainline kernel to have most of the
> > drivers supported. And Hence such a patch.
> 
> I grepped through the code base for any instances of INT_44XX:
> 
> [paul@twilight current]$ fgrep -r INT_44XX . | fgrep -v ./arch/arm/plat-omap/include/plat/irqs.h
> ./arch/arm/mach-omap2/devices.c:		.start          = INT_44XX_MAIL_U0_MPU,
> ./arch/arm/mach-omap2/devices.c:			irq = INT_44XX_MMC4_IRQ;
> ./arch/arm/mach-omap2/devices.c:			irq = INT_44XX_MMC5_IRQ;
> ./arch/arm/mach-omap2/timer-mpu.c:	evt->irq = INT_44XX_LOCALTIMER_IRQ;
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4a318000, .irq = INT_44XX_GPTIMER1 },
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48032000, .irq = INT_44XX_GPTIMER2 },
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48034000, .irq = INT_44XX_GPTIMER3 },
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48036000, .irq = INT_44XX_GPTIMER4 },
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x40138000, .irq = INT_44XX_GPTIMER5 },
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4013a000, .irq = INT_44XX_GPTIMER6 },
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4013a000, .irq = INT_44XX_GPTIMER7 },
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4013e000, .irq = INT_44XX_GPTIMER8 },
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4803e000, .irq = INT_44XX_GPTIMER9 },
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48086000, .irq = INT_44XX_GPTIMER10 },
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48088000, .irq = INT_44XX_GPTIMER11 },
> ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4a320000, .irq = INT_44XX_GPTIMER12 },
> ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO1_BASE, NULL, INT_44XX_GPIO_BANK1, IH_GPIO_BASE,
> ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO2_BASE, NULL, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32,
> ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO3_BASE, NULL, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64,
> ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO4_BASE, NULL, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96,
> ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO5_BASE, NULL, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128,
> ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO6_BASE, NULL, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160,
> ./arch/arm/plat-omap/dma.c:			irq = INT_44XX_SDMA_IRQ0;
> [paul@twilight current]$
> 
> 
> There are only five files to change.  None of them are device
> driver files, so they can all be merged through linux-omap.  The
> changes could easily be done in a single patch.  So I see no
> reason to not use the autogenerated IRQ file.
> 
I think on you tree, you won't have DSS, AUDIO-ALSA, BRIDGE, USB etc. 
All these drivers needs to be updated as well

> > > The same reasoning should apply the DMA data also, I'd think.
> > DMA file will get replaced soon with auto generated since naming
> > is aligned there.
> 
> 
> - Paul

RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h

[Shilimkar, Santosh]

< snip >
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
> Shilimkar, Santosh
> Sent: Wednesday, February 17, 2010 11:22 AM
> To: Paul Walmsley
> Cc: tony@atomide.com; linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com;
> lrg@slimlogic.co.uk; Cousson, Benoit
> Subject: RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h
> > > > > Ones omap4 hwmod is pushed on mainlie, all the
> > > > > irqs lines data would be availabe.
> > > >
> > > > Instead of this patch, why not just replace the current file with the one
> > > > from the OMAP4 autogeneration scripts?  I don't see why the IRQ macros
> > > > should depend on hwmod availability, and it would be better to have the
> > > > correct IRQ data appear in one patch, rather than having to review and
> > > > approve several smaller incremental patches over time.
> > > We plan to do this but today the autogenrated file names and one in the
> > > kernel code is different.
> >
> > File names or macro names?
> Macros ofcourse
> >
> > > Autogenrated headers are kept in alignment
> > > with TRM naming as you know.
> > > e.g
> > > --- autogenaretd
> > > #define OMAP44XX_IRQ_MCBSP2   (22 + OMAP44XX_IRQ_GIC_START)
> > >
> > > --existing kernel
> > > #define INT_44XX_MCBSP2_IRQ	(22 + IRQ_GIC_START)
> > >
> > >
> > > So instead of touching every driver file and changing it only for name changes ,
> > > what we are doing
> > > 1. Created local 44xx_dma.h and 44xx_irq.h mach-omap2 directory
> > > 2. All the drivers getting converted in hwmods would use defines from above headers
> > > 3. At one point of time all the drivers would use defines from above headers and then
> > >    from omap4 point of view there won't be dependency on the irqs.h and dma.h
> > >
> > > While this is ongoing, we would like the mainline kernel to have most of the
> > > drivers supported. And Hence such a patch.
> >
> > I grepped through the code base for any instances of INT_44XX:
> >
> > [paul@twilight current]$ fgrep -r INT_44XX . | fgrep -v ./arch/arm/plat-omap/include/plat/irqs.h
> > ./arch/arm/mach-omap2/devices.c:		.start          = INT_44XX_MAIL_U0_MPU,
> > ./arch/arm/mach-omap2/devices.c:			irq = INT_44XX_MMC4_IRQ;
> > ./arch/arm/mach-omap2/devices.c:			irq = INT_44XX_MMC5_IRQ;
> > ./arch/arm/mach-omap2/timer-mpu.c:	evt->irq = INT_44XX_LOCALTIMER_IRQ;
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4a318000, .irq = INT_44XX_GPTIMER1 },
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48032000, .irq = INT_44XX_GPTIMER2 },
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48034000, .irq = INT_44XX_GPTIMER3 },
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48036000, .irq = INT_44XX_GPTIMER4 },
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x40138000, .irq = INT_44XX_GPTIMER5 },
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4013a000, .irq = INT_44XX_GPTIMER6 },
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4013a000, .irq = INT_44XX_GPTIMER7 },
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4013e000, .irq = INT_44XX_GPTIMER8 },
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4803e000, .irq = INT_44XX_GPTIMER9 },
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48086000, .irq = INT_44XX_GPTIMER10 },
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x48088000, .irq = INT_44XX_GPTIMER11 },
> > ./arch/arm/plat-omap/dmtimer.c:	{ .phys_base = 0x4a320000, .irq = INT_44XX_GPTIMER12 },
> > ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO1_BASE, NULL, INT_44XX_GPIO_BANK1, IH_GPIO_BASE,
> > ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO2_BASE, NULL, INT_44XX_GPIO_BANK2, IH_GPIO_BASE +
> 32,
> > ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO3_BASE, NULL, INT_44XX_GPIO_BANK3, IH_GPIO_BASE +
> 64,
> > ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO4_BASE, NULL, INT_44XX_GPIO_BANK4, IH_GPIO_BASE +
> 96,
> > ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO5_BASE, NULL, INT_44XX_GPIO_BANK5, IH_GPIO_BASE +
> 128,
> > ./arch/arm/plat-omap/gpio.c:	{ OMAP44XX_GPIO6_BASE, NULL, INT_44XX_GPIO_BANK6, IH_GPIO_BASE +
> 160,
> > ./arch/arm/plat-omap/dma.c:			irq = INT_44XX_SDMA_IRQ0;
> > [paul@twilight current]$
> >
> >
> > There are only five files to change.  None of them are device
> > driver files, so they can all be merged through linux-omap.  The
> > changes could easily be done in a single patch.  So I see no
> > reason to not use the autogenerated IRQ file.
> >
> I think on you tree, you won't have DSS, AUDIO-ALSA, BRIDGE, USB etc.
> All these drivers needs to be updated as well

Having said that, I think it's best time to changes this so that
the drivers getting up streamed can use correct names directly.

Also irqs-44xx.h header inclusion can be avoided in each driver if plat/irqs.h 
include it.

I can check this if this can go in the currunt series itself. At least USB
and MCPDM are the two drivers I know of, planned to be lined up which will
get affected.

How about doing this in the .34-rc1 so that we don't break anybody ? 

RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h

[Paul Walmsley]

Hello Santosh,

On Wed, 17 Feb 2010, Shilimkar, Santosh wrote:

> Having said that, I think it's best time to changes this so that
> the drivers getting up streamed can use correct names directly.
> 
> Also irqs-44xx.h header inclusion can be avoided in each driver if plat/irqs.h 
> include it.
> 
> I can check this if this can go in the currunt series itself. At least USB
> and MCPDM are the two drivers I know of, planned to be lined up which will
> get affected.
> 
> How about doing this in the .34-rc1 so that we don't break anybody ? 

How about just submitting the auto-generated IRQ file, convert the 
existing in-tree users, and leave the old macros there and mark them 
deprecated with a comment?  Then for the next release, submit a patch to 
change the newly-merged users and remove the deprecated macros?


- Paul

RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h

[Shilimkar, Santosh]

> -----Original Message-----
> From: Paul Walmsley [mailto:paul@pwsan.com]
> Sent: Wednesday, February 17, 2010 12:15 PM
> To: Shilimkar, Santosh
> Cc: tony@atomide.com; linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com;
> lrg@slimlogic.co.uk; Cousson, Benoit
> Subject: RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h
> 
> Hello Santosh,
> 
> On Wed, 17 Feb 2010, Shilimkar, Santosh wrote:
> 
> > Having said that, I think it's best time to changes this so that
> > the drivers getting up streamed can use correct names directly.
> >
> > Also irqs-44xx.h header inclusion can be avoided in each driver if plat/irqs.h
> > include it.
> >
> > I can check this if this can go in the currunt series itself. At least USB
> > and MCPDM are the two drivers I know of, planned to be lined up which will
> > get affected.
> >
> > How about doing this in the .34-rc1 so that we don't break anybody ?
> 
> How about just submitting the auto-generated IRQ file, convert the
> existing in-tree users, and leave the old macros there and mark them
> deprecated with a comment?  Then for the next release, submit a patch to
> change the newly-merged users and remove the deprecated macros?
Sounds ok if we can keep both exist for some time. Will do this.

RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h

[Paul Walmsley]

On Wed, 17 Feb 2010, Shilimkar, Santosh wrote:

> > -----Original Message-----
> > From: Paul Walmsley [mailto:paul@pwsan.com]
> > Sent: Wednesday, February 17, 2010 12:15 PM
> > To: Shilimkar, Santosh
> > Cc: tony@atomide.com; linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com;
> > lrg@slimlogic.co.uk; Cousson, Benoit
> > Subject: RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h
> > 
> > How about just submitting the auto-generated IRQ file, convert the
> > existing in-tree users, and leave the old macros there and mark them
> > deprecated with a comment?  Then for the next release, submit a patch to
> > change the newly-merged users and remove the deprecated macros?
> Sounds ok if we can keep both exist for some time. Will do this.

There shouldn't be any need to keep the old macros after the 2.6.34 merge 
window.  Probably the best time to remove them would be in a patch queued 
for the 2.6.35 merge window.

Any new patches that use 44xx IRQs would be required to use the 
autogenerated IRQ macros after the 2.6.34 merge.

Now would also be a good time to get the autogenerated DMA data in, for 
similar reasons.


- Paul

RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h

[Shilimkar, Santosh]

> -----Original Message-----
> From: Paul Walmsley [mailto:paul@pwsan.com]
> Sent: Wednesday, February 17, 2010 1:03 PM
> To: Shilimkar, Santosh
> Cc: tony@atomide.com; linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com;
> lrg@slimlogic.co.uk; Cousson, Benoit
> Subject: RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h
> 
> On Wed, 17 Feb 2010, Shilimkar, Santosh wrote:
> 
> > > -----Original Message-----
> > > From: Paul Walmsley [mailto:paul@pwsan.com]
> > > Sent: Wednesday, February 17, 2010 12:15 PM
> > > To: Shilimkar, Santosh
> > > Cc: tony@atomide.com; linux-omap@vger.kernel.org; ben@fluff.org.uk; sameo@linux.intel.com;
> > > lrg@slimlogic.co.uk; Cousson, Benoit
> > > Subject: RE: [PATCH 05/24] omap4: Add needed IRQ line into irqs.h
> > >
> > > How about just submitting the auto-generated IRQ file, convert the
> > > existing in-tree users, and leave the old macros there and mark them
> > > deprecated with a comment?  Then for the next release, submit a patch to
> > > change the newly-merged users and remove the deprecated macros?
> > Sounds ok if we can keep both exist for some time. Will do this.
> 
> There shouldn't be any need to keep the old macros after the 2.6.34 merge
> window.  Probably the best time to remove them would be in a patch queued
> for the 2.6.35 merge window.
> 
> Any new patches that use 44xx IRQs would be required to use the
> autogenerated IRQ macros after the 2.6.34 merge.
> 
> Now would also be a good time to get the autogenerated DMA data in, for
> similar reasons.
Both DMA files can't co-exist since the names are aligned. I shall try DMA
changes as well. 

Regards,
Santosh

Re: [PATCH 02/24] omap2/3/4: ioremap omap_globals module

[Paul Walmsley]

Hello Santosh,

some comments:

On Tue, 16 Feb 2010, Santosh Shilimkar wrote:

> This is a clean-up patch towards dynamic allocation of IO space
> instead of using harcoded macros to calculate virtual addresses.
> 
> Also update the sdrc, prcm, tap and control module to
> allocate iospace dynamically
> 
> As per Tony's suggestion V2 version drops tap changes
> becasue ioremap uses cpu_is_omap2420() and cpu_is_omap2430(),
> so we can't use that for setting tap_base. Hence ioremap()
> won't work for tap until omap2_check_revision() is done
> 
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> CC: Kevin Hilman <khilman@deeprootsystems.com>
> CC: Tony Lindgren <tony@atomide.com>
> ---
>  arch/arm/mach-omap2/control.c            |    6 ++++-
>  arch/arm/mach-omap2/prcm.c               |   16 ++++++++++--
>  arch/arm/mach-omap2/sdrc.c               |   11 +++++++-
>  arch/arm/plat-omap/common.c              |   38 +++++++++++++++---------------
>  arch/arm/plat-omap/include/plat/common.h |   12 ++++----
>  5 files changed, 52 insertions(+), 31 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
> index cdd1f35..43f8a33 100644
> --- a/arch/arm/mach-omap2/control.c
> +++ b/arch/arm/mach-omap2/control.c
> @@ -140,7 +140,11 @@ static struct omap3_control_regs control_context;
>  
>  void __init omap2_set_globals_control(struct omap_globals *omap2_globals)
>  {
> -	omap2_ctrl_base = omap2_globals->ctrl;
> +	/* Static mapping, never released */
> +	if (omap2_globals->ctrl) {
> +		omap2_ctrl_base = ioremap(omap2_globals->ctrl, SZ_4K);
> +		WARN_ON(!omap2_ctrl_base);
> +	}
>  }
>  
>  void __iomem *omap_ctrl_base_get(void)
> diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
> index e8e121a..338d5f6 100644
> --- a/arch/arm/mach-omap2/prcm.c
> +++ b/arch/arm/mach-omap2/prcm.c
> @@ -279,9 +279,19 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, const char *name)
>  
>  void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
>  {
> -	prm_base = omap2_globals->prm;
> -	cm_base = omap2_globals->cm;
> -	cm2_base = omap2_globals->cm2;
> +	/* Static mapping, never released */
> +	if (omap2_globals->prm) {
> +		prm_base = ioremap(omap2_globals->prm, SZ_8K);
> +		WARN_ON(!prm_base);
> +	}
> +	if (omap2_globals->cm) {
> +		cm_base = ioremap(omap2_globals->cm, SZ_8K);
> +		WARN_ON(!cm_base);
> +	}
> +	if (omap2_globals->cm2) {
> +		cm2_base = ioremap(omap2_globals->cm2, SZ_8K);
> +		WARN_ON(!cm2_base);
> +	}
>  }
>  
>  #ifdef CONFIG_ARCH_OMAP3
> diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
> index cbfbd14..4c65f56 100644
> --- a/arch/arm/mach-omap2/sdrc.c
> +++ b/arch/arm/mach-omap2/sdrc.c
> @@ -119,8 +119,15 @@ int omap2_sdrc_get_params(unsigned long r,
>  
>  void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
>  {
> -	omap2_sdrc_base = omap2_globals->sdrc;
> -	omap2_sms_base = omap2_globals->sms;
> +	/* Static mapping, never released */
> +	if (omap2_globals->sdrc) {
> +		omap2_sdrc_base = ioremap(omap2_globals->sdrc, SZ_64K);
> +		WARN_ON(!omap2_sdrc_base);
> +	}
> +	if (omap2_globals->sms) {
> +		omap2_sms_base = ioremap(omap2_globals->sms, SZ_64K);
> +		WARN_ON(!omap2_sms_base);
> +	}
>  }
>  
>  /**
> diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
> index 4f29e8c..ee9499e 100644
> --- a/arch/arm/plat-omap/common.c
> +++ b/arch/arm/plat-omap/common.c
> @@ -256,11 +256,11 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
>  static struct omap_globals omap242x_globals = {
>  	.class	= OMAP242X_CLASS,
>  	.tap	= OMAP2_L4_IO_ADDRESS(0x48014000),
> -	.sdrc	= OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
> -	.sms	= OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE),
> -	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE),
> -	.prm	= OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
> -	.cm	= OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
> +	.sdrc	= OMAP2420_SDRC_BASE,
> +	.sms	= OMAP2420_SMS_BASE,
> +	.ctrl	= OMAP2420_CTRL_BASE,
> +	.prm	= OMAP2420_PRM_BASE,
> +	.cm	= OMAP2420_CM_BASE,
>  	.uart1_phys	= OMAP2_UART1_BASE,
>  	.uart2_phys	= OMAP2_UART2_BASE,
>  	.uart3_phys	= OMAP2_UART3_BASE,
> @@ -277,11 +277,11 @@ void __init omap2_set_globals_242x(void)
>  static struct omap_globals omap243x_globals = {
>  	.class	= OMAP243X_CLASS,
>  	.tap	= OMAP2_L4_IO_ADDRESS(0x4900a000),
> -	.sdrc	= OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
> -	.sms	= OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE),
> -	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
> -	.prm	= OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
> -	.cm	= OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
> +	.sdrc	= OMAP243X_SDRC_BASE,
> +	.sms	= (OMAP243X_SMS_BASE),
> +	.ctrl	= (OMAP243X_CTRL_BASE),
> +	.prm	= (OMAP2430_PRM_BASE),
> +	.cm	= (OMAP2430_CM_BASE),

Please drop the unnecessary parentheses above and elsewhere in this file.  
If the parentheses are nececessary because the macro is a composite 
expression and parentheses are missing around the expression, then the 
parentheses should be added around the macro contents itself.

>  	.uart1_phys	= OMAP2_UART1_BASE,
>  	.uart2_phys	= OMAP2_UART2_BASE,
>  	.uart3_phys	= OMAP2_UART3_BASE,
> @@ -298,11 +298,11 @@ void __init omap2_set_globals_243x(void)
>  static struct omap_globals omap3_globals = {
>  	.class	= OMAP343X_CLASS,
>  	.tap	= OMAP2_L4_IO_ADDRESS(0x4830A000),
> -	.sdrc	= OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
> -	.sms	= OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE),
> -	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
> -	.prm	= OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
> -	.cm	= OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
> +	.sdrc	= (OMAP343X_SDRC_BASE),
> +	.sms	= (OMAP343X_SMS_BASE),
> +	.ctrl	= (OMAP343X_CTRL_BASE),
> +	.prm	= (OMAP3430_PRM_BASE),
> +	.cm	= (OMAP3430_CM_BASE),

As above.

>  	.uart1_phys	= OMAP3_UART1_BASE,
>  	.uart2_phys	= OMAP3_UART2_BASE,
>  	.uart3_phys	= OMAP3_UART3_BASE,
> @@ -325,10 +325,10 @@ void __init omap2_set_globals_36xx(void)
>  static struct omap_globals omap4_globals = {
>  	.class	= OMAP443X_CLASS,
>  	.tap	= OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
> -	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
> -	.prm	= OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
> -	.cm	= OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
> -	.cm2	= OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
> +	.ctrl	= (OMAP443X_CTRL_BASE),
> +	.prm	= (OMAP4430_PRM_BASE),
> +	.cm	= (OMAP4430_CM_BASE),
> +	.cm2	= (OMAP4430_CM2_BASE),

As above.

>  	.uart1_phys	= OMAP4_UART1_BASE,
>  	.uart2_phys	= OMAP4_UART2_BASE,
>  	.uart3_phys	= OMAP4_UART3_BASE,
> diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
> index e04a58e..dc8a897 100644
> --- a/arch/arm/plat-omap/include/plat/common.h
> +++ b/arch/arm/plat-omap/include/plat/common.h
> @@ -41,12 +41,12 @@ extern struct sys_timer omap_timer;
>  struct omap_globals {
>  	u32		class;		/* OMAP class to detect */
>  	void __iomem	*tap;		/* Control module ID code */
> -	void __iomem	*sdrc;		/* SDRAM Controller */
> -	void __iomem	*sms;		/* SDRAM Memory Scheduler */
> -	void __iomem	*ctrl;		/* System Control Module */
> -	void __iomem	*prm;		/* Power and Reset Management */
> -	void __iomem	*cm;		/* Clock Management */
> -	void __iomem	*cm2;
> +	unsigned long   sdrc;           /* SDRAM Controller */
> +	unsigned long   sms;            /* SDRAM Memory Scheduler */
> +	unsigned long   ctrl;           /* System Control Module */
> +	unsigned long   prm;            /* Power and Reset Management */
> +	unsigned long   cm;             /* Clock Management */
> +	unsigned long   cm2;

Please add comments above struct omap_globals to reinforce that these are 
now physical addresses.

>  	unsigned long	uart1_phys;
>  	unsigned long	uart2_phys;
>  	unsigned long	uart3_phys;
> -- 
> 1.6.0.4
> 


- Paul

RE: [PATCH 02/24] omap2/3/4: ioremap omap_globals module

[Shilimkar, Santosh]

< snip>

> >  /**
> > diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
> > index 4f29e8c..ee9499e 100644
> > --- a/arch/arm/plat-omap/common.c
> > +++ b/arch/arm/plat-omap/common.c
> > @@ -256,11 +256,11 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
> >  static struct omap_globals omap242x_globals = {
> >  	.class	= OMAP242X_CLASS,
> >  	.tap	= OMAP2_L4_IO_ADDRESS(0x48014000),
> > -	.sdrc	= OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
> > -	.sms	= OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE),
> > -	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE),
> > -	.prm	= OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
> > -	.cm	= OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
> > +	.sdrc	= OMAP2420_SDRC_BASE,
> > +	.sms	= OMAP2420_SMS_BASE,
> > +	.ctrl	= OMAP2420_CTRL_BASE,
> > +	.prm	= OMAP2420_PRM_BASE,
> > +	.cm	= OMAP2420_CM_BASE,
> >  	.uart1_phys	= OMAP2_UART1_BASE,
> >  	.uart2_phys	= OMAP2_UART2_BASE,
> >  	.uart3_phys	= OMAP2_UART3_BASE,
> > @@ -277,11 +277,11 @@ void __init omap2_set_globals_242x(void)
> >  static struct omap_globals omap243x_globals = {
> >  	.class	= OMAP243X_CLASS,
> >  	.tap	= OMAP2_L4_IO_ADDRESS(0x4900a000),
> > -	.sdrc	= OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
> > -	.sms	= OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE),
> > -	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
> > -	.prm	= OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
> > -	.cm	= OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
> > +	.sdrc	= OMAP243X_SDRC_BASE,
> > +	.sms	= (OMAP243X_SMS_BASE),
> > +	.ctrl	= (OMAP243X_CTRL_BASE),
> > +	.prm	= (OMAP2430_PRM_BASE),
> > +	.cm	= (OMAP2430_CM_BASE),
> 
> Please drop the unnecessary parentheses above and elsewhere in this file.
> If the parentheses are nececessary because the macro is a composite
> expression and parentheses are missing around the expression, then the
> parentheses should be added around the macro contents itself.
> 
No need of paran's. They just left out while cleaning it up.
> >  	.uart1_phys	= OMAP2_UART1_BASE,
> >  	.uart2_phys	= OMAP2_UART2_BASE,
> >  	.uart3_phys	= OMAP2_UART3_BASE,
> > @@ -298,11 +298,11 @@ void __init omap2_set_globals_243x(void)
> >  static struct omap_globals omap3_globals = {
> >  	.class	= OMAP343X_CLASS,
> >  	.tap	= OMAP2_L4_IO_ADDRESS(0x4830A000),
> > -	.sdrc	= OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
> > -	.sms	= OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE),
> > -	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
> > -	.prm	= OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
> > -	.cm	= OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
> > +	.sdrc	= (OMAP343X_SDRC_BASE),
> > +	.sms	= (OMAP343X_SMS_BASE),
> > +	.ctrl	= (OMAP343X_CTRL_BASE),
> > +	.prm	= (OMAP3430_PRM_BASE),
> > +	.cm	= (OMAP3430_CM_BASE),
> 
> As above.
> 
> >  	.uart1_phys	= OMAP3_UART1_BASE,
> >  	.uart2_phys	= OMAP3_UART2_BASE,
> >  	.uart3_phys	= OMAP3_UART3_BASE,
> > @@ -325,10 +325,10 @@ void __init omap2_set_globals_36xx(void)
> >  static struct omap_globals omap4_globals = {
> >  	.class	= OMAP443X_CLASS,
> >  	.tap	= OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
> > -	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
> > -	.prm	= OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
> > -	.cm	= OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
> > -	.cm2	= OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
> > +	.ctrl	= (OMAP443X_CTRL_BASE),
> > +	.prm	= (OMAP4430_PRM_BASE),
> > +	.cm	= (OMAP4430_CM_BASE),
> > +	.cm2	= (OMAP4430_CM2_BASE),
> 
> As above.
> 
> >  	.uart1_phys	= OMAP4_UART1_BASE,
> >  	.uart2_phys	= OMAP4_UART2_BASE,
> >  	.uart3_phys	= OMAP4_UART3_BASE,
> > diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
> > index e04a58e..dc8a897 100644
> > --- a/arch/arm/plat-omap/include/plat/common.h
> > +++ b/arch/arm/plat-omap/include/plat/common.h
> > @@ -41,12 +41,12 @@ extern struct sys_timer omap_timer;
> >  struct omap_globals {
> >  	u32		class;		/* OMAP class to detect */
> >  	void __iomem	*tap;		/* Control module ID code */
> > -	void __iomem	*sdrc;		/* SDRAM Controller */
> > -	void __iomem	*sms;		/* SDRAM Memory Scheduler */
> > -	void __iomem	*ctrl;		/* System Control Module */
> > -	void __iomem	*prm;		/* Power and Reset Management */
> > -	void __iomem	*cm;		/* Clock Management */
> > -	void __iomem	*cm2;
> > +	unsigned long   sdrc;           /* SDRAM Controller */
> > +	unsigned long   sms;            /* SDRAM Memory Scheduler */
> > +	unsigned long   ctrl;           /* System Control Module */
> > +	unsigned long   prm;            /* Power and Reset Management */
> > +	unsigned long   cm;             /* Clock Management */
> > +	unsigned long   cm2;
> 
> Please add comments above struct omap_globals to reinforce that these are
> now physical addresses.
>
ok
 
> >  	unsigned long	uart1_phys;
> >  	unsigned long	uart2_phys;
> >  	unsigned long	uart3_phys;
> > --
> > 1.6.0.4
> >
> 
> 
> - Paul