* [PATCH 1/6] Add infrastructure for conditional code and data sections
2010-12-21 18:19 [RFC] Infrastructure for dynamic removal of code and data sections Thomas Petazzoni
@ 2010-12-21 18:19 ` Thomas Petazzoni
2010-12-21 19:27 ` Tony Lindgren
2011-01-03 3:37 ` Paul Walmsley
2010-12-21 18:20 ` [PATCH 2/6] omap: add macros to mark SoC-specific data/code Thomas Petazzoni
` (3 subsequent siblings)
4 siblings, 2 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2010-12-21 18:19 UTC (permalink / raw)
To: linux-omap; +Cc: Thomas Petazzoni, Thomas Petazzoni
From: Thomas Petazzoni <tpetazzoni@ti.com>
WARNING: This is only a proof-of-concept, there are many known
issues. The sole purpose of this patch is to get some feedback on
whether the idea is useful or not, and whether it's worth cleaning up
the remaining issues.
A trend in the kernel support for SoC is to build a single kernel that
works accross a wide range of SoC inside a SoC family, or even in the
future SoC of different families.
While this is very interesting to reduce the number of kernel images
needed to support a large number of hardware platforms, it allows
means that the kernel image size is increasing. Portions of code and
data are specific to a given SoC (clock structures, hwmod structures
on OMAP, etc.) and only the portion relevant for the current SoC the
kernel is running on is actually useful. The rest of the code and data
remains in memory forever.
While __init and __initdata can solve some of those cases, it is not
necessarly easy to use, since the code/data that is actually useful
needs to be copied so that it is kept after the init memory cleanup.
Therefore, we introduce an infrastructure that allows to put code and
data into specific sections, called "conditional sections". All those
sections are compiled into the final kernel image, but at runtime, by
calling a function, we can get rid of the unused sections.
For example, on OMAP, you can declare data as being omap2 specific
this way:
static int __omap2_data foobar;
Then, in the board code of an OMAP3 or OMAP4 platform, you can call:
free_unused_cond_section("omap2");
And the memory consumed by the "foobar" variable will be reclaimed.
The way it works is the following :
* The __NAME_data and __NAME_text macros should be defined using the
cond_data_section() and cond_text_section() macros. They allow to
mark a symbol to be part of a given conditional section. There is
no hardcoded list for the NAME string, so any non-conflicting NAME
can be used.
* When the vmlinux.lds linker script is generated, we pass the
vmlinux.lds.S into the scripts/cond-sections script so that the
CONDITIONAL_TEXT_SECTIONS and CONDITIONAL_DATA_SECTIONS magic
values are turned into correct LD script language to page-align
each section, add starting and ending symbols, and include the
section into the correct final kernel section (.text or .data).
* At the end of the kernel link stage, we generate a .tmp_condsecs.S
file using the same scripts/cond-sections script. This file
contains an array of structure (cond_section_descs) describing each
included conditional section.
* At run-time, the free_unused_cond_section() function will travel
the cond_section_descs[] array to find the starting and ending
address of the conditional section to remove. It will poison it,
and then free the corresponding memory.
The complexity of the link procedure is due to the fact that we do not
want to hardcode a fixed list of NAME for the conditional sections.
Known issues :
* The kbuild knowledge of the author is limited, and therefore the
code is horrible.
* It only works when CONFIG_KALLSYMS is enabled, due to how the
integration in kbuild was done. This can probably be fixed, with
hopefully some help of kbuild experts.
* The shell script scripts/cond-sections can certainly be improved.
* The case of kernel modules hasn't been considered at all.
Signed-off-by: Thomas Petazzoni <t-petazzoni@ti.com>
---
Makefile | 17 ++++++-
arch/arm/kernel/vmlinux.lds.S | 3 +
include/linux/condsections.h | 19 ++++++++
kernel/Makefile | 2 +-
kernel/condsections.c | 57 +++++++++++++++++++++++++
scripts/Makefile.build | 7 ++-
scripts/cond-sections | 93 +++++++++++++++++++++++++++++++++++++++++
7 files changed, 191 insertions(+), 7 deletions(-)
create mode 100644 include/linux/condsections.h
create mode 100644 kernel/condsections.c
create mode 100755 scripts/cond-sections
diff --git a/Makefile b/Makefile
index 6619720..57bb824 100644
--- a/Makefile
+++ b/Makefile
@@ -837,14 +837,25 @@ quiet_cmd_kallsyms = KSYM $@
.tmp_kallsyms%.S: .tmp_vmlinux% $(KALLSYMS)
$(call cmd,kallsyms)
+quiet_cmd_cond_sections_bis = CONDSECS $@
+ cmd_cond_sections_bis = $(NM) -n $< | \
+ grep -E "cond_(data|text)_start" | \
+ scripts/cond-sections --s-file > $@
+
+.tmp_condsecs.o: %.o: %.S FORCE
+ $(call if_changed_dep,as_o_S)
+
+.tmp_condsecs.S: .tmp_vmlinux1 scripts/cond-sections
+ $(call cmd,cond_sections_bis)
+
# .tmp_vmlinux1 must be complete except kallsyms, so update vmlinux version
.tmp_vmlinux1: $(vmlinux-lds) $(vmlinux-all) FORCE
$(call if_changed_rule,ksym_ld)
-.tmp_vmlinux2: $(vmlinux-lds) $(vmlinux-all) .tmp_kallsyms1.o FORCE
+.tmp_vmlinux2: $(vmlinux-lds) $(vmlinux-all) .tmp_kallsyms1.o .tmp_condsecs.o FORCE
$(call if_changed,vmlinux__)
-.tmp_vmlinux3: $(vmlinux-lds) $(vmlinux-all) .tmp_kallsyms2.o FORCE
+.tmp_vmlinux3: $(vmlinux-lds) $(vmlinux-all) .tmp_kallsyms2.o .tmp_condsecs.o FORCE
$(call if_changed,vmlinux__)
# Needs to visit scripts/ before $(KALLSYMS) can be used.
@@ -876,7 +887,7 @@ define rule_vmlinux-modpost
endef
# vmlinux image - including updated kernel symbols
-vmlinux: $(vmlinux-lds) $(vmlinux-init) $(vmlinux-main) vmlinux.o $(kallsyms.o) FORCE
+vmlinux: $(vmlinux-lds) $(vmlinux-init) $(vmlinux-main) vmlinux.o $(kallsyms.o) .tmp_condsecs.o FORCE
ifdef CONFIG_HEADERS_CHECK
$(Q)$(MAKE) -f $(srctree)/Makefile headers_check
endif
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index cead889..aa0282f 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -105,6 +105,7 @@ SECTIONS
SCHED_TEXT
LOCK_TEXT
KPROBES_TEXT
+ CONDITIONAL_TEXT
#ifdef CONFIG_MMU
*(.fixup)
#endif
@@ -168,6 +169,8 @@ SECTIONS
NOSAVE_DATA
CACHELINE_ALIGNED_DATA(32)
+ CONDITIONAL_DATA
+
/*
* The exception fixup table (might need resorting at runtime)
*/
diff --git a/include/linux/condsections.h b/include/linux/condsections.h
new file mode 100644
index 0000000..d657be6
--- /dev/null
+++ b/include/linux/condsections.h
@@ -0,0 +1,19 @@
+/*
+ * Conditional section management
+ *
+ * Copyright (C) 2010 Thomas Petazzoni <t-petazzoni@ti.com>
+ */
+
+#ifndef __CONDSECTIONS_H__
+#define __CONDSECTIONS_H__
+
+/*
+ * Use these macros to define other macros to put code or data into
+ * specific conditional sections.
+ */
+#define cond_data_section(__secname__) __section(.data.conditional.__secname__)
+#define cond_text_section(__secname__) __section(.text.conditional.__secname__)
+
+void free_unused_cond_section(const char *name);
+
+#endif /* __CONDSECTIONS_H__ */
diff --git a/kernel/Makefile b/kernel/Makefile
index 0b5ff08..58b0435 100644
--- a/kernel/Makefile
+++ b/kernel/Makefile
@@ -10,7 +10,7 @@ obj-y = sched.o fork.o exec_domain.o panic.o printk.o \
kthread.o wait.o kfifo.o sys_ni.o posix-cpu-timers.o mutex.o \
hrtimer.o rwsem.o nsproxy.o srcu.o semaphore.o \
notifier.o ksysfs.o pm_qos_params.o sched_clock.o cred.o \
- async.o range.o jump_label.o
+ async.o range.o jump_label.o condsections.o
obj-y += groups.o
ifdef CONFIG_FUNCTION_TRACER
diff --git a/kernel/condsections.c b/kernel/condsections.c
new file mode 100644
index 0000000..b568549
--- /dev/null
+++ b/kernel/condsections.c
@@ -0,0 +1,57 @@
+/*
+ * Conditional section management
+ *
+ * Copyright (C) 2010 Thomas Petazzoni <t-petazzoni@ti.com>
+ */
+
+#include <linux/kernel.h>
+#include <linux/mm.h>
+
+/*
+ * This structure must be in sync with the assembly code generated by
+ * scripts/cond-sections.
+ */
+struct cond_section_desc {
+ unsigned long start;
+ unsigned long end;
+ unsigned long type;
+ const char *name;
+};
+
+/*
+ * Symbol defined by assembly code generated in
+ * scripts/cond-sections. Declared as weak because it appears only at
+ * late stage of the link process.
+ */
+extern struct cond_section_desc cond_section_descs[] __attribute__((weak));
+
+static void free_unused_cond_section_area(unsigned long pfn, unsigned long end)
+{
+ for (; pfn < end; pfn++) {
+ struct page *page = pfn_to_page(pfn);
+ ClearPageReserved(page);
+ init_page_count(page);
+ __free_page(page);
+ totalram_pages += 1;
+ }
+}
+
+/*
+ * Free the text and data conditional sections associated to the given
+ * name
+ */
+void free_unused_cond_section(const char *name)
+{
+ struct cond_section_desc *sec;
+
+ for (sec = cond_section_descs; sec->name; sec++) {
+ if (strcmp(sec->name, name))
+ continue;
+ printk(KERN_INFO "Freeing unused conditional section: %s %s 0x%lx -> 0%lx (sz=%ld)\n",
+ sec->name, (sec->type ? "data" : "text"),
+ sec->start, sec->end, (sec->end - sec->start));
+ memset((void*) sec->start, POISON_FREE_INITMEM, sec->end - sec->start);
+ free_unused_cond_section_area(__phys_to_pfn(__pa(sec->start)),
+ __phys_to_pfn(__pa(sec->end)));
+ }
+}
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 5ad25e1..3822751 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -285,10 +285,11 @@ targets += $(extra-y) $(MAKECMDGOALS) $(always)
# Linker scripts preprocessor (.lds.S -> .lds)
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds_S = LDS $@
- cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
- -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
+ cmd_cpp_lds_S = cat $< | scripts/cond-sections --lds $(OBJDUMP) | \
+ $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
+ -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ -
-$(obj)/%.lds: $(src)/%.lds.S FORCE
+$(obj)/%.lds: $(src)/%.lds.S scripts/cond-sections FORCE
$(call if_changed_dep,cpp_lds_S)
# Build the compiled-in targets
diff --git a/scripts/cond-sections b/scripts/cond-sections
new file mode 100755
index 0000000..c72e932
--- /dev/null
+++ b/scripts/cond-sections
@@ -0,0 +1,93 @@
+#!/bin/sh
+#
+# Conditional section link script and assembly code generation
+#
+# Copyright (C) 2010 Thomas Petazzoni <t-petazzoni@ti.com>
+#
+# This script is used:
+#
+# *) with a --lds path-to-objdump argument, with the vmlinux.lds.S
+# file on its standard input, in order to generate the linker
+# script fragments corresponding to the different conditional
+# sections included in the kernel image.
+#
+# *) with a --s-file argument, with the result of a
+# $(CROSS_COMPILE)nm -n as its standard input, in order to
+# generate some assembly code that will compile into an array of
+# structures representing each conditional section.
+
+if [ $# -lt 1 ] ; then
+ echo "Incorrect number of arguments"
+ exit 1
+fi
+
+if [ x$1 = x"--lds" ] ; then
+ OBJDUMP=$(which $2)
+ if [ ! -x $OBJDUMP ] ; then
+ echo "Invalid objdump executable"
+ exit 1
+ fi
+
+ # Get the list of conditional data sections
+ CONDITIONAL_DATA_SECTIONS=$($OBJDUMP -w -h vmlinux.o | \
+ grep "\.data\.conditional\." | cut -f3 -d' ' | tr "\n" " ")
+
+ # Get the list of conditional text sections
+ CONDITIONAL_TEXT_SECTIONS=$($OBJDUMP -w -h vmlinux.o | \
+ grep "\.text\.conditional\." | cut -f3 -d' ' | tr "\n" " ")
+
+ while read line ; do
+ if echo $line | grep -q "CONDITIONAL_TEXT" ; then
+ for s in $CONDITIONAL_TEXT_SECTIONS ; do
+ sym=$(echo $s | sed 's/\.data\.conditional\.//')
+ echo ". = ALIGN(PAGE_SIZE);"
+ echo "VMLINUX_SYMBOL(__${sym}_cond_text_start) = .;"
+ echo "*(.text.conditional.${sym})"
+ echo ". = ALIGN(PAGE_SIZE);"
+ echo "VMLINUX_SYMBOL(__${sym}_cond_text_end) = .;"
+ done
+ elif echo $line | grep -q "CONDITIONAL_DATA" ; then
+ for s in $CONDITIONAL_DATA_SECTIONS ; do
+ sym=$(echo $s | sed 's/\.data\.conditional\.//')
+ echo ". = ALIGN(PAGE_SIZE);"
+ echo "VMLINUX_SYMBOL(__${sym}_cond_data_start) = .;"
+ echo "*(.data.conditional.${sym})"
+ echo ". = ALIGN(PAGE_SIZE);"
+ echo "VMLINUX_SYMBOL(__${sym}_cond_data_end) = .;"
+ done
+ else
+ echo "$line"
+ fi
+ done
+elif [ x$1 = x"--s-file" ] ; then
+ echo ".section .rodata, \"a\""
+ echo ".globl cond_section_descs"
+ echo ".align 8"
+ echo "cond_section_descs:"
+ seclist=""
+ while read line ; do
+ sym=$(echo $line | cut -f3 -d' ')
+ secname=$(echo $sym | sed 's/^__\(.*\)_cond_.*/\1/')
+ sectype=$(echo $sym | sed 's/^.*_cond_\([a-z]*\)_start/\1/')
+ echo ".long __${secname}_cond_${sectype}_start"
+ echo ".long __${secname}_cond_${sectype}_end"
+ if [ $sectype = "text" ] ; then
+ echo ".long 0"
+ else
+ echo ".long 1"
+ fi
+ echo ".long __${secname}_cond_str"
+ seclist="$seclist $secname"
+ done
+ echo ".long 0"
+ echo ".long 0"
+ echo ".long 0"
+ echo ".long 0"
+ for sec in $seclist ; do
+ echo "__${sec}_cond_str:"
+ echo ".asciz \"${sec}\""
+ done
+else
+ echo "Invalid option"
+ exit 1
+fi
\ No newline at end of file
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH 1/6] Add infrastructure for conditional code and data sections
2010-12-21 18:19 ` [PATCH 1/6] Add infrastructure for conditional " Thomas Petazzoni
@ 2010-12-21 19:27 ` Tony Lindgren
2010-12-21 22:00 ` Thomas Petazzoni
2011-01-03 3:37 ` Paul Walmsley
1 sibling, 1 reply; 18+ messages in thread
From: Tony Lindgren @ 2010-12-21 19:27 UTC (permalink / raw)
To: Thomas Petazzoni; +Cc: linux-omap, Thomas Petazzoni, Thomas Petazzoni
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com> [101221 10:20]:
> From: Thomas Petazzoni <tpetazzoni@ti.com>
>
> WARNING: This is only a proof-of-concept, there are many known
> issues. The sole purpose of this patch is to get some feedback on
> whether the idea is useful or not, and whether it's worth cleaning up
> the remaining issues.
>
> A trend in the kernel support for SoC is to build a single kernel that
> works accross a wide range of SoC inside a SoC family, or even in the
> future SoC of different families.
>
> While this is very interesting to reduce the number of kernel images
> needed to support a large number of hardware platforms, it allows
> means that the kernel image size is increasing. Portions of code and
> data are specific to a given SoC (clock structures, hwmod structures
> on OMAP, etc.) and only the portion relevant for the current SoC the
> kernel is running on is actually useful. The rest of the code and data
> remains in memory forever.
>
> While __init and __initdata can solve some of those cases, it is not
> necessarly easy to use, since the code/data that is actually useful
> needs to be copied so that it is kept after the init memory cleanup.
>
> Therefore, we introduce an infrastructure that allows to put code and
> data into specific sections, called "conditional sections". All those
> sections are compiled into the final kernel image, but at runtime, by
> calling a function, we can get rid of the unused sections.
Great, something is certainly needed to free the unused memory.
> For example, on OMAP, you can declare data as being omap2 specific
> this way:
>
> static int __omap2_data foobar;
>
> Then, in the board code of an OMAP3 or OMAP4 platform, you can call:
>
> free_unused_cond_section("omap2");
Sounds like this could be done after the cpu detection automatically?
I don't know what the section limitations are, but it would be nice
to have a separate section for each machine.. Then we could just
"free_unused_machines()" during the init.. :)
Tony
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH 1/6] Add infrastructure for conditional code and data sections
2010-12-21 19:27 ` Tony Lindgren
@ 2010-12-21 22:00 ` Thomas Petazzoni
2010-12-22 18:28 ` Tony Lindgren
0 siblings, 1 reply; 18+ messages in thread
From: Thomas Petazzoni @ 2010-12-21 22:00 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, Thomas Petazzoni
On Tue, 21 Dec 2010 11:27:35 -0800
Tony Lindgren <tony@atomide.com> wrote:
> > Therefore, we introduce an infrastructure that allows to put code
> > and data into specific sections, called "conditional sections". All
> > those sections are compiled into the final kernel image, but at
> > runtime, by calling a function, we can get rid of the unused
> > sections.
>
> Great, something is certainly needed to free the unused memory.
Nice to see that the idea is welcome. Did you had a look at the
implementation in patch 1/6 ?
> > For example, on OMAP, you can declare data as being omap2 specific
> > this way:
> >
> > static int __omap2_data foobar;
> >
> > Then, in the board code of an OMAP3 or OMAP4 platform, you can call:
> >
> > free_unused_cond_section("omap2");
>
> Sounds like this could be done after the cpu detection automatically?
Yes, it definitely should.
> I don't know what the section limitations are, but it would be nice
> to have a separate section for each machine.. Then we could just
> "free_unused_machines()" during the init.. :)
I don't think there are any specific limitations, so we can just create
as many section as we want.
However, in order to be able to free each section independently from
another, I have to page align all those conditional sections. This
means that having one section for only a tiny amount of data is going
to waste space instead of saving space. So the conditional section
should gather a sufficiently large amount of data (> 4 KB) to actually
be valuable.
Regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH 1/6] Add infrastructure for conditional code and data sections
2010-12-21 22:00 ` Thomas Petazzoni
@ 2010-12-22 18:28 ` Tony Lindgren
2010-12-22 18:42 ` Thomas Petazzoni
2010-12-23 12:31 ` Aaro Koskinen
0 siblings, 2 replies; 18+ messages in thread
From: Tony Lindgren @ 2010-12-22 18:28 UTC (permalink / raw)
To: Thomas Petazzoni; +Cc: linux-omap, Thomas Petazzoni
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com> [101221 14:00]:
> On Tue, 21 Dec 2010 11:27:35 -0800
> Tony Lindgren <tony@atomide.com> wrote:
>
> > > Therefore, we introduce an infrastructure that allows to put code
> > > and data into specific sections, called "conditional sections". All
> > > those sections are compiled into the final kernel image, but at
> > > runtime, by calling a function, we can get rid of the unused
> > > sections.
> >
> > Great, something is certainly needed to free the unused memory.
>
> Nice to see that the idea is welcome. Did you had a look at the
> implementation in patch 1/6 ?
No not yet, will take a look after we're done with this upcoming
merge window..
> > > For example, on OMAP, you can declare data as being omap2 specific
> > > this way:
> > >
> > > static int __omap2_data foobar;
> > >
> > > Then, in the board code of an OMAP3 or OMAP4 platform, you can call:
> > >
> > > free_unused_cond_section("omap2");
> >
> > Sounds like this could be done after the cpu detection automatically?
>
> Yes, it definitely should.
>
> > I don't know what the section limitations are, but it would be nice
> > to have a separate section for each machine.. Then we could just
> > "free_unused_machines()" during the init.. :)
>
> I don't think there are any specific limitations, so we can just create
> as many section as we want.
>
> However, in order to be able to free each section independently from
> another, I have to page align all those conditional sections. This
> means that having one section for only a tiny amount of data is going
> to waste space instead of saving space. So the conditional section
> should gather a sufficiently large amount of data (> 4 KB) to actually
> be valuable.
Yeah I don't know how much non-init data we have for each board-*.c
file. Maybe there is not much for each machine.
Ideally the new sections would be arch/arm generic sections and not
omap specific. I could see ARMv6 and ARMv7 sections being one way
to group them, but that does not help to drop omap3 specific data
on omap4.
Regards,
Tony
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH 1/6] Add infrastructure for conditional code and data sections
2010-12-22 18:28 ` Tony Lindgren
@ 2010-12-22 18:42 ` Thomas Petazzoni
2010-12-22 19:02 ` Tony Lindgren
2010-12-23 12:31 ` Aaro Koskinen
1 sibling, 1 reply; 18+ messages in thread
From: Thomas Petazzoni @ 2010-12-22 18:42 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, Thomas Petazzoni
On Wed, 22 Dec 2010 10:28:41 -0800
Tony Lindgren <tony@atomide.com> wrote:
> > Nice to see that the idea is welcome. Did you had a look at the
> > implementation in patch 1/6 ?
>
> No not yet, will take a look after we're done with this upcoming
> merge window..
Great, thanks.
> Ideally the new sections would be arch/arm generic sections and not
> omap specific. I could see ARMv6 and ARMv7 sections being one way
> to group them, but that does not help to drop omap3 specific data
> on omap4.
The mechanism is architecture independent, not OMAP-specific or even
ARM-specific (the only architecture-dependent part is the modification
of the kernel linker script, but it's trivial to adapt to other arches).
You can put as many sections as you want, you just need to declare some
macros:
#define __something_data cond_data_section(something)
#define __something_text cond_text_section(something)
and then mark whatever you want with __something_data or
__something_text. It will then be part of separate sections, that are
page-aligned so that they can independently be freed.
For the moment, the API allows to tell which sections you want to
*free*, but I think I should turn it into an API that allows to tell
which sections you want to *keep*. This way, if you have sections for
100 machines and you boot on a given machine, you only need to say "I'm
using this section". At the end of the kernel boot process, all
sections that have not been marked as useful would be removed.
Regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/6] Add infrastructure for conditional code and data sections
2010-12-22 18:42 ` Thomas Petazzoni
@ 2010-12-22 19:02 ` Tony Lindgren
0 siblings, 0 replies; 18+ messages in thread
From: Tony Lindgren @ 2010-12-22 19:02 UTC (permalink / raw)
To: Thomas Petazzoni; +Cc: linux-omap, Thomas Petazzoni
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com> [101222 10:55]:
> On Wed, 22 Dec 2010 10:28:41 -0800
> Tony Lindgren <tony@atomide.com> wrote:
>
> > > Nice to see that the idea is welcome. Did you had a look at the
> > > implementation in patch 1/6 ?
> >
> > No not yet, will take a look after we're done with this upcoming
> > merge window..
>
> Great, thanks.
>
> > Ideally the new sections would be arch/arm generic sections and not
> > omap specific. I could see ARMv6 and ARMv7 sections being one way
> > to group them, but that does not help to drop omap3 specific data
> > on omap4.
>
> The mechanism is architecture independent, not OMAP-specific or even
> ARM-specific (the only architecture-dependent part is the modification
> of the kernel linker script, but it's trivial to adapt to other arches).
> You can put as many sections as you want, you just need to declare some
> macros:
>
> #define __something_data cond_data_section(something)
> #define __something_text cond_text_section(something)
>
> and then mark whatever you want with __something_data or
> __something_text. It will then be part of separate sections, that are
> page-aligned so that they can independently be freed.
OK sounds like you've already made it generic :)
> For the moment, the API allows to tell which sections you want to
> *free*, but I think I should turn it into an API that allows to tell
> which sections you want to *keep*. This way, if you have sections for
> 100 machines and you boot on a given machine, you only need to say "I'm
> using this section". At the end of the kernel boot process, all
> sections that have not been marked as useful would be removed.
Yeah keeping only the code for the current machine might be easier.
Regards,
Tony
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/6] Add infrastructure for conditional code and data sections
2010-12-22 18:28 ` Tony Lindgren
2010-12-22 18:42 ` Thomas Petazzoni
@ 2010-12-23 12:31 ` Aaro Koskinen
2010-12-23 12:44 ` Thomas Petazzoni
2010-12-23 18:02 ` Tony Lindgren
1 sibling, 2 replies; 18+ messages in thread
From: Aaro Koskinen @ 2010-12-23 12:31 UTC (permalink / raw)
To: Tony Lindgren; +Cc: Thomas Petazzoni, linux-omap, Thomas Petazzoni
Hi,
On Wed, 22 Dec 2010, Tony Lindgren wrote:
> * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> [101221 14:00]:
>> On Tue, 21 Dec 2010 11:27:35 -0800
>> Tony Lindgren <tony@atomide.com> wrote:
>>>> Therefore, we introduce an infrastructure that allows to put code
>>>> and data into specific sections, called "conditional sections". All
>>>> those sections are compiled into the final kernel image, but at
>>>> runtime, by calling a function, we can get rid of the unused
>>>> sections.
>>>
>>> Great, something is certainly needed to free the unused memory.
>>
>> Nice to see that the idea is welcome. Did you had a look at the
>> implementation in patch 1/6 ?
>
> No not yet, will take a look after we're done with this upcoming
> merge window..
I also think the idea is good, and this should be maybe posted to wider
audience than just linux-omap.
>> However, in order to be able to free each section independently from
>> another, I have to page align all those conditional sections. This
>> means that having one section for only a tiny amount of data is going
>> to waste space instead of saving space. So the conditional section
>> should gather a sufficiently large amount of data (> 4 KB) to actually
>> be valuable.
>
> Yeah I don't know how much non-init data we have for each board-*.c
> file. Maybe there is not much for each machine.
I took a quick look at omap2plus_defconfig kernel, and non-init text/data
for 29 boards takes 85K. If we would page align those memory consumption
would increase during init to 29*8=232K, but after other boards are
freed we would eventually save 85-8=77K.
Under mach-omap2, another big consumer is clock data which takes also
around 80 K, while e.g. on 2420 only 14 K is needed.
A.
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/6] Add infrastructure for conditional code and data sections
2010-12-23 12:31 ` Aaro Koskinen
@ 2010-12-23 12:44 ` Thomas Petazzoni
2010-12-23 18:02 ` Tony Lindgren
1 sibling, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2010-12-23 12:44 UTC (permalink / raw)
To: Aaro Koskinen; +Cc: Tony Lindgren, linux-omap, Thomas Petazzoni
On Thu, 23 Dec 2010 14:31:46 +0200 (EET)
Aaro Koskinen <aaro.koskinen@nokia.com> wrote:
> > No not yet, will take a look after we're done with this upcoming
> > merge window..
>
> I also think the idea is good, and this should be maybe posted to wider
> audience than just linux-omap.
Yes, definitely. As the proof of concept implementation was
demonstrating usage on OMAP, I wanted to have some early comments of
a few kernel developers before going to a wider audience.
> > Yeah I don't know how much non-init data we have for each board-*.c
> > file. Maybe there is not much for each machine.
>
> I took a quick look at omap2plus_defconfig kernel, and non-init text/data
> for 29 boards takes 85K. If we would page align those memory consumption
> would increase during init to 29*8=232K, but after other boards are
> freed we would eventually save 85-8=77K.
Thanks for those numbers. 77K is nice, but is not really a huge saving.
> Under mach-omap2, another big consumer is clock data which takes also
> around 80 K, while e.g. on 2420 only 14 K is needed.
My patch 3/6 (which didn't make it to the list, since it was probably
too large) already marked some OMAP2 clock data.
Unfortunately, I haven't found a nice way of putting strings into a
separate sections. For example:
static struct foobar __omap2 foo = {
.name = "blabla",
.id = 12,
};
The "struct foobar" goes into the OMAP2-specific section (8 bytes), but
the "blabla" string (6 bytes) remains in the global .rodata section,
without anyway from removing it. The only solution I see so far would
be :
static char __omap2 foo_name[] = "blabla";
static struct foobar __omap2 foo = {
.name = foo_name,
.id = 12,
};
but it's really unpleasant.
Other ideas ?
Regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH 1/6] Add infrastructure for conditional code and data sections
2010-12-23 12:31 ` Aaro Koskinen
2010-12-23 12:44 ` Thomas Petazzoni
@ 2010-12-23 18:02 ` Tony Lindgren
1 sibling, 0 replies; 18+ messages in thread
From: Tony Lindgren @ 2010-12-23 18:02 UTC (permalink / raw)
To: Aaro Koskinen; +Cc: Thomas Petazzoni, linux-omap, Thomas Petazzoni
* Aaro Koskinen <aaro.koskinen@nokia.com> [101223 04:31]:
> Hi,
>
> On Wed, 22 Dec 2010, Tony Lindgren wrote:
> >* Thomas Petazzoni <thomas.petazzoni@free-electrons.com> [101221 14:00]:
> >>On Tue, 21 Dec 2010 11:27:35 -0800
> >>Tony Lindgren <tony@atomide.com> wrote:
> >>>>Therefore, we introduce an infrastructure that allows to put code
> >>>>and data into specific sections, called "conditional sections". All
> >>>>those sections are compiled into the final kernel image, but at
> >>>>runtime, by calling a function, we can get rid of the unused
> >>>>sections.
> >>>
> >>>Great, something is certainly needed to free the unused memory.
> >>
> >>Nice to see that the idea is welcome. Did you had a look at the
> >>implementation in patch 1/6 ?
> >
> >No not yet, will take a look after we're done with this upcoming
> >merge window..
>
> I also think the idea is good, and this should be maybe posted to wider
> audience than just linux-omap.
>
> >>However, in order to be able to free each section independently from
> >>another, I have to page align all those conditional sections. This
> >>means that having one section for only a tiny amount of data is going
> >>to waste space instead of saving space. So the conditional section
> >>should gather a sufficiently large amount of data (> 4 KB) to actually
> >>be valuable.
> >
> >Yeah I don't know how much non-init data we have for each board-*.c
> >file. Maybe there is not much for each machine.
>
> I took a quick look at omap2plus_defconfig kernel, and non-init text/data
> for 29 boards takes 85K. If we would page align those memory consumption
> would increase during init to 29*8=232K, but after other boards are
> freed we would eventually save 85-8=77K.
That does not sounds like a huge savings as some bootloaders like nolo
have a 2MB kernel size limitation..
> Under mach-omap2, another big consumer is clock data which takes also
> around 80 K, while e.g. on 2420 only 14 K is needed.
This eventually should be all __initdata and only the clock data for
the booted omap should be allocated during the boot.
Sounds like the best way to reduce the size of the image immediately
is to make everything possible a module for the defconfigs, then
use the standard minimal kernel + initramfs booting. That will make
it easy for all the distros to use it too.
Regards,
Tony
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/6] Add infrastructure for conditional code and data sections
2010-12-21 18:19 ` [PATCH 1/6] Add infrastructure for conditional " Thomas Petazzoni
2010-12-21 19:27 ` Tony Lindgren
@ 2011-01-03 3:37 ` Paul Walmsley
2011-01-03 8:08 ` Paul Walmsley
1 sibling, 1 reply; 18+ messages in thread
From: Paul Walmsley @ 2011-01-03 3:37 UTC (permalink / raw)
To: Thomas Petazzoni
Cc: linux-omap, tony, aaro.koskinen, Thomas Petazzoni,
Thomas Petazzoni
Hello Thomas
On Tue, 21 Dec 2010, Thomas Petazzoni wrote:
> WARNING: This is only a proof-of-concept, there are many known
> issues. The sole purpose of this patch is to get some feedback on
> whether the idea is useful or not, and whether it's worth cleaning up
> the remaining issues.
As Aaron and Tony commented, I too think this is really good.
I note in your examples that you use "omap2" rather than splitting 2420
and 2430. It seems like it would be a good idea to deallocate 2420 data
structures when booting on 2430, and vice versa. e.g.,
#define __omap2420_data cond_data_section(omap2420)
#define __omap2430_data cond_data_section(omap2430)
What do you think?
- Paul
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/6] Add infrastructure for conditional code and data sections
2011-01-03 3:37 ` Paul Walmsley
@ 2011-01-03 8:08 ` Paul Walmsley
0 siblings, 0 replies; 18+ messages in thread
From: Paul Walmsley @ 2011-01-03 8:08 UTC (permalink / raw)
To: Thomas Petazzoni
Cc: linux-omap, tony, aaro.koskinen, Thomas Petazzoni,
Thomas Petazzoni
On Sun, 2 Jan 2011, Paul Walmsley wrote:
> Hello Thomas
>
> On Tue, 21 Dec 2010, Thomas Petazzoni wrote:
>
> > WARNING: This is only a proof-of-concept, there are many known
> > issues. The sole purpose of this patch is to get some feedback on
> > whether the idea is useful or not, and whether it's worth cleaning up
> > the remaining issues.
>
> As Aaron
s/Aaron/Aaro/. Sorry, Aaro.
- Paul
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 2/6] omap: add macros to mark SoC-specific data/code
2010-12-21 18:19 [RFC] Infrastructure for dynamic removal of code and data sections Thomas Petazzoni
2010-12-21 18:19 ` [PATCH 1/6] Add infrastructure for conditional " Thomas Petazzoni
@ 2010-12-21 18:20 ` Thomas Petazzoni
2010-12-21 18:20 ` [PATCH 4/6] omap3: mark some data as omap3-specific Thomas Petazzoni
` (2 subsequent siblings)
4 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2010-12-21 18:20 UTC (permalink / raw)
To: linux-omap; +Cc: Thomas Petazzoni
From: Thomas Petazzoni <t-petazzoni@ti.com>
Signed-off-by: Thomas Petazzoni <t-petazzoni@ti.com>
---
arch/arm/plat-omap/include/plat/cpu.h | 11 +++++++++++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 3fd8b40..31f806e 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -31,6 +31,7 @@
#define __ASM_ARCH_OMAP_CPU_H
#include <linux/bitops.h>
+#include <linux/condsections.h>
#include <plat/multi.h>
/*
@@ -470,4 +471,14 @@ OMAP3_HAS_FEATURE(isp, ISP)
OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
+/*
+ * OMAP section markers
+ */
+#define __omap2_data cond_data_section(omap2)
+#define __omap3_data cond_data_section(omap3)
+#define __omap4_data cond_data_section(omap4)
+#define __omap2_text cond_text_section(omap2)
+#define __omap3_text cond_text_section(omap3)
+#define __omap4_text cond_text_section(omap4)
+
#endif
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 4/6] omap3: mark some data as omap3-specific
2010-12-21 18:19 [RFC] Infrastructure for dynamic removal of code and data sections Thomas Petazzoni
2010-12-21 18:19 ` [PATCH 1/6] Add infrastructure for conditional " Thomas Petazzoni
2010-12-21 18:20 ` [PATCH 2/6] omap: add macros to mark SoC-specific data/code Thomas Petazzoni
@ 2010-12-21 18:20 ` Thomas Petazzoni
2010-12-21 18:20 ` [PATCH 5/6] omap4: mark some data as omap4-specific Thomas Petazzoni
2010-12-21 18:20 ` [PATCH 6/6] omap3: beagle: get rid of unused omap2/omap4 specific code/data Thomas Petazzoni
4 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2010-12-21 18:20 UTC (permalink / raw)
To: linux-omap; +Cc: Thomas Petazzoni, Thomas Petazzoni
From: Thomas Petazzoni <tpetazzoni@ti.com>
Use __omap3_data on clock related data and hwmod related data for
OMAP3 SoCs. This data will later be freed if we end up booting on a
non-OMAP3 SoC.
Signed-off-by: Thomas Petazzoni <t-petazzoni@ti.com>
---
arch/arm/mach-omap2/clock3xxx_data.c | 486 ++++++++++++++--------------
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 180 +++++-----
2 files changed, 333 insertions(+), 333 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index d85ecd5..1d11bea 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -54,56 +54,56 @@
*/
/* Forward declarations for DPLL bypass clocks */
-static struct clk dpll1_fck;
-static struct clk dpll2_fck;
+static struct clk __omap3_data dpll1_fck;
+static struct clk __omap3_data dpll2_fck;
/* PRM CLOCKS */
/* According to timer32k.c, this is a 32768Hz clock, not a 32000Hz clock. */
-static struct clk omap_32k_fck = {
+static struct clk __omap3_data omap_32k_fck = {
.name = "omap_32k_fck",
.ops = &clkops_null,
.rate = 32768,
};
-static struct clk secure_32k_fck = {
+static struct clk __omap3_data secure_32k_fck = {
.name = "secure_32k_fck",
.ops = &clkops_null,
.rate = 32768,
};
/* Virtual source clocks for osc_sys_ck */
-static struct clk virt_12m_ck = {
+static struct clk __omap3_data virt_12m_ck = {
.name = "virt_12m_ck",
.ops = &clkops_null,
.rate = 12000000,
};
-static struct clk virt_13m_ck = {
+static struct clk __omap3_data virt_13m_ck = {
.name = "virt_13m_ck",
.ops = &clkops_null,
.rate = 13000000,
};
-static struct clk virt_16_8m_ck = {
+static struct clk __omap3_data virt_16_8m_ck = {
.name = "virt_16_8m_ck",
.ops = &clkops_null,
.rate = 16800000,
};
-static struct clk virt_19_2m_ck = {
+static struct clk __omap3_data virt_19_2m_ck = {
.name = "virt_19_2m_ck",
.ops = &clkops_null,
.rate = 19200000,
};
-static struct clk virt_26m_ck = {
+static struct clk __omap3_data virt_26m_ck = {
.name = "virt_26m_ck",
.ops = &clkops_null,
.rate = 26000000,
};
-static struct clk virt_38_4m_ck = {
+static struct clk __omap3_data virt_38_4m_ck = {
.name = "virt_38_4m_ck",
.ops = &clkops_null,
.rate = 38400000,
@@ -151,7 +151,7 @@ static const struct clksel osc_sys_clksel[] = {
/* Oscillator clock */
/* 12, 13, 16.8, 19.2, 26, or 38.4 MHz */
-static struct clk osc_sys_ck = {
+static struct clk __omap3_data osc_sys_ck = {
.name = "osc_sys_ck",
.ops = &clkops_null,
.init = &omap2_init_clksel_parent,
@@ -175,7 +175,7 @@ static const struct clksel sys_clksel[] = {
/* Latency: this clock is only enabled after PRM_CLKSETUP.SETUP_TIME */
/* Feeds DPLLs - divided first by PRM_CLKSRC_CTRL.SYSCLKDIV? */
-static struct clk sys_ck = {
+static struct clk __omap3_data sys_ck = {
.name = "sys_ck",
.ops = &clkops_null,
.parent = &osc_sys_ck,
@@ -186,20 +186,20 @@ static struct clk sys_ck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk sys_altclk = {
+static struct clk __omap3_data sys_altclk = {
.name = "sys_altclk",
.ops = &clkops_null,
};
/* Optional external clock input for some McBSPs */
-static struct clk mcbsp_clks = {
+static struct clk __omap3_data mcbsp_clks = {
.name = "mcbsp_clks",
.ops = &clkops_null,
};
/* PRM EXTERNAL CLOCK OUTPUT */
-static struct clk sys_clkout1 = {
+static struct clk __omap3_data sys_clkout1 = {
.name = "sys_clkout1",
.ops = &clkops_omap2_dflt,
.parent = &osc_sys_ck,
@@ -271,7 +271,7 @@ static const struct clksel_rate dpll4_rates[] = {
/* DPLL1 */
/* MPU clock source */
/* Type: DPLL */
-static struct dpll_data dpll1_dd = {
+static struct dpll_data __omap3_data dpll1_dd = {
.mult_div1_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL),
.mult_mask = OMAP3430_MPU_DPLL_MULT_MASK,
.div1_mask = OMAP3430_MPU_DPLL_DIV_MASK,
@@ -294,7 +294,7 @@ static struct dpll_data dpll1_dd = {
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
};
-static struct clk dpll1_ck = {
+static struct clk __omap3_data dpll1_ck = {
.name = "dpll1_ck",
.ops = &clkops_null,
.parent = &sys_ck,
@@ -309,7 +309,7 @@ static struct clk dpll1_ck = {
* This virtual clock provides the CLKOUTX2 output from the DPLL if the
* DPLL isn't bypassed.
*/
-static struct clk dpll1_x2_ck = {
+static struct clk __omap3_data dpll1_x2_ck = {
.name = "dpll1_x2_ck",
.ops = &clkops_null,
.parent = &dpll1_ck,
@@ -327,7 +327,7 @@ static const struct clksel div16_dpll1_x2m2_clksel[] = {
* Does not exist in the TRM - needed to separate the M2 divider from
* bypass selection in mpu_ck
*/
-static struct clk dpll1_x2m2_ck = {
+static struct clk __omap3_data dpll1_x2m2_ck = {
.name = "dpll1_x2m2_ck",
.ops = &clkops_null,
.parent = &dpll1_x2_ck,
@@ -343,7 +343,7 @@ static struct clk dpll1_x2m2_ck = {
/* IVA2 clock source */
/* Type: DPLL */
-static struct dpll_data dpll2_dd = {
+static struct dpll_data __omap3_data dpll2_dd = {
.mult_div1_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL),
.mult_mask = OMAP3430_IVA2_DPLL_MULT_MASK,
.div1_mask = OMAP3430_IVA2_DPLL_DIV_MASK,
@@ -367,7 +367,7 @@ static struct dpll_data dpll2_dd = {
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
};
-static struct clk dpll2_ck = {
+static struct clk __omap3_data dpll2_ck = {
.name = "dpll2_ck",
.ops = &clkops_omap3_noncore_dpll_ops,
.parent = &sys_ck,
@@ -387,7 +387,7 @@ static const struct clksel div16_dpll2_m2x2_clksel[] = {
* The TRM is conflicted on whether IVA2 clock comes from DPLL2 CLKOUT
* or CLKOUTX2. CLKOUT seems most plausible.
*/
-static struct clk dpll2_m2_ck = {
+static struct clk __omap3_data dpll2_m2_ck = {
.name = "dpll2_m2_ck",
.ops = &clkops_null,
.parent = &dpll2_ck,
@@ -405,7 +405,7 @@ static struct clk dpll2_m2_ck = {
* Source clock for all interfaces and for some device fclks
* REVISIT: Also supports fast relock bypass - not included below
*/
-static struct dpll_data dpll3_dd = {
+static struct dpll_data __omap3_data dpll3_dd = {
.mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
.mult_mask = OMAP3430_CORE_DPLL_MULT_MASK,
.div1_mask = OMAP3430_CORE_DPLL_DIV_MASK,
@@ -427,7 +427,7 @@ static struct dpll_data dpll3_dd = {
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
};
-static struct clk dpll3_ck = {
+static struct clk __omap3_data dpll3_ck = {
.name = "dpll3_ck",
.ops = &clkops_null,
.parent = &sys_ck,
@@ -441,7 +441,7 @@ static struct clk dpll3_ck = {
* This virtual clock provides the CLKOUTX2 output from the DPLL if the
* DPLL isn't bypassed
*/
-static struct clk dpll3_x2_ck = {
+static struct clk __omap3_data dpll3_x2_ck = {
.name = "dpll3_x2_ck",
.ops = &clkops_null,
.parent = &dpll3_ck,
@@ -490,7 +490,7 @@ static const struct clksel div31_dpll3m2_clksel[] = {
};
/* DPLL3 output M2 - primary control point for CORE speed */
-static struct clk dpll3_m2_ck = {
+static struct clk __omap3_data dpll3_m2_ck = {
.name = "dpll3_m2_ck",
.ops = &clkops_null,
.parent = &dpll3_ck,
@@ -504,14 +504,14 @@ static struct clk dpll3_m2_ck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk core_ck = {
+static struct clk __omap3_data core_ck = {
.name = "core_ck",
.ops = &clkops_null,
.parent = &dpll3_m2_ck,
.recalc = &followparent_recalc,
};
-static struct clk dpll3_m2x2_ck = {
+static struct clk __omap3_data dpll3_m2x2_ck = {
.name = "dpll3_m2x2_ck",
.ops = &clkops_null,
.parent = &dpll3_m2_ck,
@@ -526,7 +526,7 @@ static const struct clksel div16_dpll3_clksel[] = {
};
/* This virtual clock is the source for dpll3_m3x2_ck */
-static struct clk dpll3_m3_ck = {
+static struct clk __omap3_data dpll3_m3_ck = {
.name = "dpll3_m3_ck",
.ops = &clkops_null,
.parent = &dpll3_ck,
@@ -539,7 +539,7 @@ static struct clk dpll3_m3_ck = {
};
/* The PWRDN bit is apparently only available on 3430ES2 and above */
-static struct clk dpll3_m3x2_ck = {
+static struct clk __omap3_data dpll3_m3x2_ck = {
.name = "dpll3_m3x2_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &dpll3_m3_ck,
@@ -550,7 +550,7 @@ static struct clk dpll3_m3x2_ck = {
.recalc = &omap3_clkoutx2_recalc,
};
-static struct clk emu_core_alwon_ck = {
+static struct clk __omap3_data emu_core_alwon_ck = {
.name = "emu_core_alwon_ck",
.ops = &clkops_null,
.parent = &dpll3_m3x2_ck,
@@ -561,7 +561,7 @@ static struct clk emu_core_alwon_ck = {
/* DPLL4 */
/* Supplies 96MHz, 54Mhz TV DAC, DSS fclk, CAM sensor clock, emul trace clk */
/* Type: DPLL */
-static struct dpll_data dpll4_dd;
+static struct dpll_data __omap3_data dpll4_dd;
static struct dpll_data dpll4_dd_34xx __initdata = {
.mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL2),
@@ -609,7 +609,7 @@ static struct dpll_data dpll4_dd_3630 __initdata = {
.flags = DPLL_J_TYPE
};
-static struct clk dpll4_ck = {
+static struct clk __omap3_data dpll4_ck = {
.name = "dpll4_ck",
.ops = &clkops_omap3_noncore_dpll_ops,
.parent = &sys_ck,
@@ -625,7 +625,7 @@ static struct clk dpll4_ck = {
* DPLL isn't bypassed --
* XXX does this serve any downstream clocks?
*/
-static struct clk dpll4_x2_ck = {
+static struct clk __omap3_data dpll4_x2_ck = {
.name = "dpll4_x2_ck",
.ops = &clkops_null,
.parent = &dpll4_ck,
@@ -639,7 +639,7 @@ static const struct clksel dpll4_clksel[] = {
};
/* This virtual clock is the source for dpll4_m2x2_ck */
-static struct clk dpll4_m2_ck = {
+static struct clk __omap3_data dpll4_m2_ck = {
.name = "dpll4_m2_ck",
.ops = &clkops_null,
.parent = &dpll4_ck,
@@ -652,7 +652,7 @@ static struct clk dpll4_m2_ck = {
};
/* The PWRDN bit is apparently only available on 3430ES2 and above */
-static struct clk dpll4_m2x2_ck = {
+static struct clk __omap3_data dpll4_m2x2_ck = {
.name = "dpll4_m2x2_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &dpll4_m2_ck,
@@ -671,7 +671,7 @@ static struct clk dpll4_m2x2_ck = {
*/
/* Adding 192MHz Clock node needed by SGX */
-static struct clk omap_192m_alwon_fck = {
+static struct clk __omap3_data omap_192m_alwon_fck = {
.name = "omap_192m_alwon_fck",
.ops = &clkops_null,
.parent = &dpll4_m2x2_ck,
@@ -699,14 +699,14 @@ static const struct clksel_rate omap_96m_sys_rates[] = {
{ .div = 0 }
};
-static struct clk omap_96m_alwon_fck = {
+static struct clk __omap3_data omap_96m_alwon_fck = {
.name = "omap_96m_alwon_fck",
.ops = &clkops_null,
.parent = &dpll4_m2x2_ck,
.recalc = &followparent_recalc,
};
-static struct clk omap_96m_alwon_fck_3630 = {
+static struct clk __omap3_data omap_96m_alwon_fck_3630 = {
.name = "omap_96m_alwon_fck",
.parent = &omap_192m_alwon_fck,
.init = &omap2_init_clksel_parent,
@@ -717,7 +717,7 @@ static struct clk omap_96m_alwon_fck_3630 = {
.clksel = omap_96m_alwon_fck_clksel
};
-static struct clk cm_96m_fck = {
+static struct clk __omap3_data cm_96m_fck = {
.name = "cm_96m_fck",
.ops = &clkops_null,
.parent = &omap_96m_alwon_fck,
@@ -730,7 +730,7 @@ static const struct clksel omap_96m_fck_clksel[] = {
{ .parent = NULL }
};
-static struct clk omap_96m_fck = {
+static struct clk __omap3_data omap_96m_fck = {
.name = "omap_96m_fck",
.ops = &clkops_null,
.parent = &sys_ck,
@@ -742,7 +742,7 @@ static struct clk omap_96m_fck = {
};
/* This virtual clock is the source for dpll4_m3x2_ck */
-static struct clk dpll4_m3_ck = {
+static struct clk __omap3_data dpll4_m3_ck = {
.name = "dpll4_m3_ck",
.ops = &clkops_null,
.parent = &dpll4_ck,
@@ -755,7 +755,7 @@ static struct clk dpll4_m3_ck = {
};
/* The PWRDN bit is apparently only available on 3430ES2 and above */
-static struct clk dpll4_m3x2_ck = {
+static struct clk __omap3_data dpll4_m3x2_ck = {
.name = "dpll4_m3x2_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &dpll4_m3_ck,
@@ -782,7 +782,7 @@ static const struct clksel omap_54m_clksel[] = {
{ .parent = NULL }
};
-static struct clk omap_54m_fck = {
+static struct clk __omap3_data omap_54m_fck = {
.name = "omap_54m_fck",
.ops = &clkops_null,
.init = &omap2_init_clksel_parent,
@@ -808,7 +808,7 @@ static const struct clksel omap_48m_clksel[] = {
{ .parent = NULL }
};
-static struct clk omap_48m_fck = {
+static struct clk __omap3_data omap_48m_fck = {
.name = "omap_48m_fck",
.ops = &clkops_null,
.init = &omap2_init_clksel_parent,
@@ -818,7 +818,7 @@ static struct clk omap_48m_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk omap_12m_fck = {
+static struct clk __omap3_data omap_12m_fck = {
.name = "omap_12m_fck",
.ops = &clkops_null,
.parent = &omap_48m_fck,
@@ -827,7 +827,7 @@ static struct clk omap_12m_fck = {
};
/* This virtual clock is the source for dpll4_m4x2_ck */
-static struct clk dpll4_m4_ck = {
+static struct clk __omap3_data dpll4_m4_ck = {
.name = "dpll4_m4_ck",
.ops = &clkops_null,
.parent = &dpll4_ck,
@@ -842,7 +842,7 @@ static struct clk dpll4_m4_ck = {
};
/* The PWRDN bit is apparently only available on 3430ES2 and above */
-static struct clk dpll4_m4x2_ck = {
+static struct clk __omap3_data dpll4_m4x2_ck = {
.name = "dpll4_m4x2_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &dpll4_m4_ck,
@@ -854,7 +854,7 @@ static struct clk dpll4_m4x2_ck = {
};
/* This virtual clock is the source for dpll4_m5x2_ck */
-static struct clk dpll4_m5_ck = {
+static struct clk __omap3_data dpll4_m5_ck = {
.name = "dpll4_m5_ck",
.ops = &clkops_null,
.parent = &dpll4_ck,
@@ -869,7 +869,7 @@ static struct clk dpll4_m5_ck = {
};
/* The PWRDN bit is apparently only available on 3430ES2 and above */
-static struct clk dpll4_m5x2_ck = {
+static struct clk __omap3_data dpll4_m5x2_ck = {
.name = "dpll4_m5x2_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &dpll4_m5_ck,
@@ -881,7 +881,7 @@ static struct clk dpll4_m5x2_ck = {
};
/* This virtual clock is the source for dpll4_m6x2_ck */
-static struct clk dpll4_m6_ck = {
+static struct clk __omap3_data dpll4_m6_ck = {
.name = "dpll4_m6_ck",
.ops = &clkops_null,
.parent = &dpll4_ck,
@@ -894,7 +894,7 @@ static struct clk dpll4_m6_ck = {
};
/* The PWRDN bit is apparently only available on 3430ES2 and above */
-static struct clk dpll4_m6x2_ck = {
+static struct clk __omap3_data dpll4_m6x2_ck = {
.name = "dpll4_m6x2_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &dpll4_m6_ck,
@@ -905,7 +905,7 @@ static struct clk dpll4_m6x2_ck = {
.recalc = &omap3_clkoutx2_recalc,
};
-static struct clk emu_per_alwon_ck = {
+static struct clk __omap3_data emu_per_alwon_ck = {
.name = "emu_per_alwon_ck",
.ops = &clkops_null,
.parent = &dpll4_m6x2_ck,
@@ -917,7 +917,7 @@ static struct clk emu_per_alwon_ck = {
/* Supplies 120MHz clock, USIM source clock */
/* Type: DPLL */
/* 3430ES2 only */
-static struct dpll_data dpll5_dd = {
+static struct dpll_data __omap3_data dpll5_dd = {
.mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL4),
.mult_mask = OMAP3430ES2_PERIPH2_DPLL_MULT_MASK,
.div1_mask = OMAP3430ES2_PERIPH2_DPLL_DIV_MASK,
@@ -940,7 +940,7 @@ static struct dpll_data dpll5_dd = {
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
};
-static struct clk dpll5_ck = {
+static struct clk __omap3_data dpll5_ck = {
.name = "dpll5_ck",
.ops = &clkops_omap3_noncore_dpll_ops,
.parent = &sys_ck,
@@ -956,7 +956,7 @@ static const struct clksel div16_dpll5_clksel[] = {
{ .parent = NULL }
};
-static struct clk dpll5_m2_ck = {
+static struct clk __omap3_data dpll5_m2_ck = {
.name = "dpll5_m2_ck",
.ops = &clkops_null,
.parent = &dpll5_ck,
@@ -998,7 +998,7 @@ static const struct clksel clkout2_src_clksel[] = {
{ .parent = NULL }
};
-static struct clk clkout2_src_ck = {
+static struct clk __omap3_data clkout2_src_ck = {
.name = "clkout2_src_ck",
.ops = &clkops_omap2_dflt,
.init = &omap2_init_clksel_parent,
@@ -1025,7 +1025,7 @@ static const struct clksel sys_clkout2_clksel[] = {
{ .parent = NULL },
};
-static struct clk sys_clkout2 = {
+static struct clk __omap3_data sys_clkout2 = {
.name = "sys_clkout2",
.ops = &clkops_null,
.init = &omap2_init_clksel_parent,
@@ -1039,7 +1039,7 @@ static struct clk sys_clkout2 = {
/* CM OUTPUT CLOCKS */
-static struct clk corex2_fck = {
+static struct clk __omap3_data corex2_fck = {
.name = "corex2_fck",
.ops = &clkops_null,
.parent = &dpll3_m2x2_ck,
@@ -1064,7 +1064,7 @@ static const struct clksel div4_core_clksel[] = {
* REVISIT: Are these in DPLL power domain or CM power domain? docs
* may be inconsistent here?
*/
-static struct clk dpll1_fck = {
+static struct clk __omap3_data dpll1_fck = {
.name = "dpll1_fck",
.ops = &clkops_null,
.parent = &core_ck,
@@ -1075,7 +1075,7 @@ static struct clk dpll1_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk mpu_ck = {
+static struct clk __omap3_data mpu_ck = {
.name = "mpu_ck",
.ops = &clkops_null,
.parent = &dpll1_x2m2_ck,
@@ -1095,7 +1095,7 @@ static const struct clksel arm_fck_clksel[] = {
{ .parent = NULL }
};
-static struct clk arm_fck = {
+static struct clk __omap3_data arm_fck = {
.name = "arm_fck",
.ops = &clkops_null,
.parent = &mpu_ck,
@@ -1113,14 +1113,14 @@ static struct clk arm_fck = {
* REVISIT: This clock is never specifically defined in the 3430 TRM,
* although it is referenced - so this is a guess
*/
-static struct clk emu_mpu_alwon_ck = {
+static struct clk __omap3_data emu_mpu_alwon_ck = {
.name = "emu_mpu_alwon_ck",
.ops = &clkops_null,
.parent = &mpu_ck,
.recalc = &followparent_recalc,
};
-static struct clk dpll2_fck = {
+static struct clk __omap3_data dpll2_fck = {
.name = "dpll2_fck",
.ops = &clkops_null,
.parent = &core_ck,
@@ -1131,7 +1131,7 @@ static struct clk dpll2_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk iva2_ck = {
+static struct clk __omap3_data iva2_ck = {
.name = "iva2_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &dpll2_m2_ck,
@@ -1148,7 +1148,7 @@ static const struct clksel div2_core_clksel[] = {
{ .parent = NULL }
};
-static struct clk l3_ick = {
+static struct clk __omap3_data l3_ick = {
.name = "l3_ick",
.ops = &clkops_null,
.parent = &core_ck,
@@ -1165,7 +1165,7 @@ static const struct clksel div2_l3_clksel[] = {
{ .parent = NULL }
};
-static struct clk l4_ick = {
+static struct clk __omap3_data l4_ick = {
.name = "l4_ick",
.ops = &clkops_null,
.parent = &l3_ick,
@@ -1183,7 +1183,7 @@ static const struct clksel div2_l4_clksel[] = {
{ .parent = NULL }
};
-static struct clk rm_ick = {
+static struct clk __omap3_data rm_ick = {
.name = "rm_ick",
.ops = &clkops_null,
.parent = &l4_ick,
@@ -1204,7 +1204,7 @@ static const struct clksel gfx_l3_clksel[] = {
};
/* Virtual parent clock for gfx_l3_ick and gfx_l3_fck */
-static struct clk gfx_l3_ck = {
+static struct clk __omap3_data gfx_l3_ck = {
.name = "gfx_l3_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &l3_ick,
@@ -1213,7 +1213,7 @@ static struct clk gfx_l3_ck = {
.recalc = &followparent_recalc,
};
-static struct clk gfx_l3_fck = {
+static struct clk __omap3_data gfx_l3_fck = {
.name = "gfx_l3_fck",
.ops = &clkops_null,
.parent = &gfx_l3_ck,
@@ -1225,7 +1225,7 @@ static struct clk gfx_l3_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk gfx_l3_ick = {
+static struct clk __omap3_data gfx_l3_ick = {
.name = "gfx_l3_ick",
.ops = &clkops_null,
.parent = &gfx_l3_ck,
@@ -1233,7 +1233,7 @@ static struct clk gfx_l3_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gfx_cg1_ck = {
+static struct clk __omap3_data gfx_cg1_ck = {
.name = "gfx_cg1_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &gfx_l3_fck, /* REVISIT: correct? */
@@ -1243,7 +1243,7 @@ static struct clk gfx_cg1_ck = {
.recalc = &followparent_recalc,
};
-static struct clk gfx_cg2_ck = {
+static struct clk __omap3_data gfx_cg2_ck = {
.name = "gfx_cg2_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &gfx_l3_fck, /* REVISIT: correct? */
@@ -1287,7 +1287,7 @@ static const struct clksel sgx_clksel[] = {
{ .parent = NULL }
};
-static struct clk sgx_fck = {
+static struct clk __omap3_data sgx_fck = {
.name = "sgx_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -1302,7 +1302,7 @@ static struct clk sgx_fck = {
.round_rate = &omap2_clksel_round_rate
};
-static struct clk sgx_ick = {
+static struct clk __omap3_data sgx_ick = {
.name = "sgx_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &l3_ick,
@@ -1314,7 +1314,7 @@ static struct clk sgx_ick = {
/* CORE power domain */
-static struct clk d2d_26m_fck = {
+static struct clk __omap3_data d2d_26m_fck = {
.name = "d2d_26m_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &sys_ck,
@@ -1324,7 +1324,7 @@ static struct clk d2d_26m_fck = {
.recalc = &followparent_recalc,
};
-static struct clk modem_fck = {
+static struct clk __omap3_data modem_fck = {
.name = "modem_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &sys_ck,
@@ -1334,7 +1334,7 @@ static struct clk modem_fck = {
.recalc = &followparent_recalc,
};
-static struct clk sad2d_ick = {
+static struct clk __omap3_data sad2d_ick = {
.name = "sad2d_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &l3_ick,
@@ -1344,7 +1344,7 @@ static struct clk sad2d_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mad2d_ick = {
+static struct clk __omap3_data mad2d_ick = {
.name = "mad2d_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &l3_ick,
@@ -1360,7 +1360,7 @@ static const struct clksel omap343x_gpt_clksel[] = {
{ .parent = NULL}
};
-static struct clk gpt10_fck = {
+static struct clk __omap3_data gpt10_fck = {
.name = "gpt10_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &sys_ck,
@@ -1374,7 +1374,7 @@ static struct clk gpt10_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk gpt11_fck = {
+static struct clk __omap3_data gpt11_fck = {
.name = "gpt11_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &sys_ck,
@@ -1388,7 +1388,7 @@ static struct clk gpt11_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk cpefuse_fck = {
+static struct clk __omap3_data cpefuse_fck = {
.name = "cpefuse_fck",
.ops = &clkops_omap2_dflt,
.parent = &sys_ck,
@@ -1397,7 +1397,7 @@ static struct clk cpefuse_fck = {
.recalc = &followparent_recalc,
};
-static struct clk ts_fck = {
+static struct clk __omap3_data ts_fck = {
.name = "ts_fck",
.ops = &clkops_omap2_dflt,
.parent = &omap_32k_fck,
@@ -1406,7 +1406,7 @@ static struct clk ts_fck = {
.recalc = &followparent_recalc,
};
-static struct clk usbtll_fck = {
+static struct clk __omap3_data usbtll_fck = {
.name = "usbtll_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &dpll5_m2_ck,
@@ -1417,7 +1417,7 @@ static struct clk usbtll_fck = {
/* CORE 96M FCLK-derived clocks */
-static struct clk core_96m_fck = {
+static struct clk __omap3_data core_96m_fck = {
.name = "core_96m_fck",
.ops = &clkops_null,
.parent = &omap_96m_fck,
@@ -1425,7 +1425,7 @@ static struct clk core_96m_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mmchs3_fck = {
+static struct clk __omap3_data mmchs3_fck = {
.name = "mmchs3_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_96m_fck,
@@ -1435,7 +1435,7 @@ static struct clk mmchs3_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mmchs2_fck = {
+static struct clk __omap3_data mmchs2_fck = {
.name = "mmchs2_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_96m_fck,
@@ -1445,7 +1445,7 @@ static struct clk mmchs2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mspro_fck = {
+static struct clk __omap3_data mspro_fck = {
.name = "mspro_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_96m_fck,
@@ -1455,7 +1455,7 @@ static struct clk mspro_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mmchs1_fck = {
+static struct clk __omap3_data mmchs1_fck = {
.name = "mmchs1_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_96m_fck,
@@ -1465,7 +1465,7 @@ static struct clk mmchs1_fck = {
.recalc = &followparent_recalc,
};
-static struct clk i2c3_fck = {
+static struct clk __omap3_data i2c3_fck = {
.name = "i2c3_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_96m_fck,
@@ -1475,7 +1475,7 @@ static struct clk i2c3_fck = {
.recalc = &followparent_recalc,
};
-static struct clk i2c2_fck = {
+static struct clk __omap3_data i2c2_fck = {
.name = "i2c2_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_96m_fck,
@@ -1485,7 +1485,7 @@ static struct clk i2c2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk i2c1_fck = {
+static struct clk __omap3_data i2c1_fck = {
.name = "i2c1_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_96m_fck,
@@ -1515,7 +1515,7 @@ static const struct clksel mcbsp_15_clksel[] = {
{ .parent = NULL }
};
-static struct clk mcbsp5_fck = {
+static struct clk __omap3_data mcbsp5_fck = {
.name = "mcbsp5_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -1528,7 +1528,7 @@ static struct clk mcbsp5_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk mcbsp1_fck = {
+static struct clk __omap3_data mcbsp1_fck = {
.name = "mcbsp1_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -1543,7 +1543,7 @@ static struct clk mcbsp1_fck = {
/* CORE_48M_FCK-derived clocks */
-static struct clk core_48m_fck = {
+static struct clk __omap3_data core_48m_fck = {
.name = "core_48m_fck",
.ops = &clkops_null,
.parent = &omap_48m_fck,
@@ -1551,7 +1551,7 @@ static struct clk core_48m_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi4_fck = {
+static struct clk __omap3_data mcspi4_fck = {
.name = "mcspi4_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_48m_fck,
@@ -1560,7 +1560,7 @@ static struct clk mcspi4_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi3_fck = {
+static struct clk __omap3_data mcspi3_fck = {
.name = "mcspi3_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_48m_fck,
@@ -1569,7 +1569,7 @@ static struct clk mcspi3_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi2_fck = {
+static struct clk __omap3_data mcspi2_fck = {
.name = "mcspi2_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_48m_fck,
@@ -1578,7 +1578,7 @@ static struct clk mcspi2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi1_fck = {
+static struct clk __omap3_data mcspi1_fck = {
.name = "mcspi1_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_48m_fck,
@@ -1587,7 +1587,7 @@ static struct clk mcspi1_fck = {
.recalc = &followparent_recalc,
};
-static struct clk uart2_fck = {
+static struct clk __omap3_data uart2_fck = {
.name = "uart2_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_48m_fck,
@@ -1597,7 +1597,7 @@ static struct clk uart2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk uart1_fck = {
+static struct clk __omap3_data uart1_fck = {
.name = "uart1_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_48m_fck,
@@ -1607,7 +1607,7 @@ static struct clk uart1_fck = {
.recalc = &followparent_recalc,
};
-static struct clk fshostusb_fck = {
+static struct clk __omap3_data fshostusb_fck = {
.name = "fshostusb_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_48m_fck,
@@ -1618,7 +1618,7 @@ static struct clk fshostusb_fck = {
/* CORE_12M_FCK based clocks */
-static struct clk core_12m_fck = {
+static struct clk __omap3_data core_12m_fck = {
.name = "core_12m_fck",
.ops = &clkops_null,
.parent = &omap_12m_fck,
@@ -1626,7 +1626,7 @@ static struct clk core_12m_fck = {
.recalc = &followparent_recalc,
};
-static struct clk hdq_fck = {
+static struct clk __omap3_data hdq_fck = {
.name = "hdq_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_12m_fck,
@@ -1652,7 +1652,7 @@ static const struct clksel ssi_ssr_clksel[] = {
{ .parent = NULL }
};
-static struct clk ssi_ssr_fck_3430es1 = {
+static struct clk __omap3_data ssi_ssr_fck_3430es1 = {
.name = "ssi_ssr_fck",
.ops = &clkops_omap2_dflt,
.init = &omap2_init_clksel_parent,
@@ -1665,7 +1665,7 @@ static struct clk ssi_ssr_fck_3430es1 = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk ssi_ssr_fck_3430es2 = {
+static struct clk __omap3_data ssi_ssr_fck_3430es2 = {
.name = "ssi_ssr_fck",
.ops = &clkops_omap3430es2_ssi_wait,
.init = &omap2_init_clksel_parent,
@@ -1678,7 +1678,7 @@ static struct clk ssi_ssr_fck_3430es2 = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk ssi_sst_fck_3430es1 = {
+static struct clk __omap3_data ssi_sst_fck_3430es1 = {
.name = "ssi_sst_fck",
.ops = &clkops_null,
.parent = &ssi_ssr_fck_3430es1,
@@ -1686,7 +1686,7 @@ static struct clk ssi_sst_fck_3430es1 = {
.recalc = &omap_fixed_divisor_recalc,
};
-static struct clk ssi_sst_fck_3430es2 = {
+static struct clk __omap3_data ssi_sst_fck_3430es2 = {
.name = "ssi_sst_fck",
.ops = &clkops_null,
.parent = &ssi_ssr_fck_3430es2,
@@ -1702,7 +1702,7 @@ static struct clk ssi_sst_fck_3430es2 = {
* XXX must add clk_enable/clk_disable for these if standard code won't
* handle it
*/
-static struct clk core_l3_ick = {
+static struct clk __omap3_data core_l3_ick = {
.name = "core_l3_ick",
.ops = &clkops_null,
.parent = &l3_ick,
@@ -1710,7 +1710,7 @@ static struct clk core_l3_ick = {
.recalc = &followparent_recalc,
};
-static struct clk hsotgusb_ick_3430es1 = {
+static struct clk __omap3_data hsotgusb_ick_3430es1 = {
.name = "hsotgusb_ick",
.ops = &clkops_omap2_dflt,
.parent = &core_l3_ick,
@@ -1720,7 +1720,7 @@ static struct clk hsotgusb_ick_3430es1 = {
.recalc = &followparent_recalc,
};
-static struct clk hsotgusb_ick_3430es2 = {
+static struct clk __omap3_data hsotgusb_ick_3430es2 = {
.name = "hsotgusb_ick",
.ops = &clkops_omap3430es2_hsotgusb_wait,
.parent = &core_l3_ick,
@@ -1730,7 +1730,7 @@ static struct clk hsotgusb_ick_3430es2 = {
.recalc = &followparent_recalc,
};
-static struct clk sdrc_ick = {
+static struct clk __omap3_data sdrc_ick = {
.name = "sdrc_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l3_ick,
@@ -1741,7 +1741,7 @@ static struct clk sdrc_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpmc_fck = {
+static struct clk __omap3_data gpmc_fck = {
.name = "gpmc_fck",
.ops = &clkops_null,
.parent = &core_l3_ick,
@@ -1752,14 +1752,14 @@ static struct clk gpmc_fck = {
/* SECURITY_L3_ICK based clocks */
-static struct clk security_l3_ick = {
+static struct clk __omap3_data security_l3_ick = {
.name = "security_l3_ick",
.ops = &clkops_null,
.parent = &l3_ick,
.recalc = &followparent_recalc,
};
-static struct clk pka_ick = {
+static struct clk __omap3_data pka_ick = {
.name = "pka_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &security_l3_ick,
@@ -1770,7 +1770,7 @@ static struct clk pka_ick = {
/* CORE_L4_ICK based clocks */
-static struct clk core_l4_ick = {
+static struct clk __omap3_data core_l4_ick = {
.name = "core_l4_ick",
.ops = &clkops_null,
.parent = &l4_ick,
@@ -1778,7 +1778,7 @@ static struct clk core_l4_ick = {
.recalc = &followparent_recalc,
};
-static struct clk usbtll_ick = {
+static struct clk __omap3_data usbtll_ick = {
.name = "usbtll_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1788,7 +1788,7 @@ static struct clk usbtll_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mmchs3_ick = {
+static struct clk __omap3_data mmchs3_ick = {
.name = "mmchs3_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1799,7 +1799,7 @@ static struct clk mmchs3_ick = {
};
/* Intersystem Communication Registers - chassis mode only */
-static struct clk icr_ick = {
+static struct clk __omap3_data icr_ick = {
.name = "icr_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1809,7 +1809,7 @@ static struct clk icr_ick = {
.recalc = &followparent_recalc,
};
-static struct clk aes2_ick = {
+static struct clk __omap3_data aes2_ick = {
.name = "aes2_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1819,7 +1819,7 @@ static struct clk aes2_ick = {
.recalc = &followparent_recalc,
};
-static struct clk sha12_ick = {
+static struct clk __omap3_data sha12_ick = {
.name = "sha12_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1829,7 +1829,7 @@ static struct clk sha12_ick = {
.recalc = &followparent_recalc,
};
-static struct clk des2_ick = {
+static struct clk __omap3_data des2_ick = {
.name = "des2_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1839,7 +1839,7 @@ static struct clk des2_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mmchs2_ick = {
+static struct clk __omap3_data mmchs2_ick = {
.name = "mmchs2_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1849,7 +1849,7 @@ static struct clk mmchs2_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mmchs1_ick = {
+static struct clk __omap3_data mmchs1_ick = {
.name = "mmchs1_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1859,7 +1859,7 @@ static struct clk mmchs1_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mspro_ick = {
+static struct clk __omap3_data mspro_ick = {
.name = "mspro_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1869,7 +1869,7 @@ static struct clk mspro_ick = {
.recalc = &followparent_recalc,
};
-static struct clk hdq_ick = {
+static struct clk __omap3_data hdq_ick = {
.name = "hdq_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1879,7 +1879,7 @@ static struct clk hdq_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi4_ick = {
+static struct clk __omap3_data mcspi4_ick = {
.name = "mcspi4_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1889,7 +1889,7 @@ static struct clk mcspi4_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi3_ick = {
+static struct clk __omap3_data mcspi3_ick = {
.name = "mcspi3_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1899,7 +1899,7 @@ static struct clk mcspi3_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi2_ick = {
+static struct clk __omap3_data mcspi2_ick = {
.name = "mcspi2_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1909,7 +1909,7 @@ static struct clk mcspi2_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi1_ick = {
+static struct clk __omap3_data mcspi1_ick = {
.name = "mcspi1_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1919,7 +1919,7 @@ static struct clk mcspi1_ick = {
.recalc = &followparent_recalc,
};
-static struct clk i2c3_ick = {
+static struct clk __omap3_data i2c3_ick = {
.name = "i2c3_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1929,7 +1929,7 @@ static struct clk i2c3_ick = {
.recalc = &followparent_recalc,
};
-static struct clk i2c2_ick = {
+static struct clk __omap3_data i2c2_ick = {
.name = "i2c2_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1939,7 +1939,7 @@ static struct clk i2c2_ick = {
.recalc = &followparent_recalc,
};
-static struct clk i2c1_ick = {
+static struct clk __omap3_data i2c1_ick = {
.name = "i2c1_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1949,7 +1949,7 @@ static struct clk i2c1_ick = {
.recalc = &followparent_recalc,
};
-static struct clk uart2_ick = {
+static struct clk __omap3_data uart2_ick = {
.name = "uart2_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1959,7 +1959,7 @@ static struct clk uart2_ick = {
.recalc = &followparent_recalc,
};
-static struct clk uart1_ick = {
+static struct clk __omap3_data uart1_ick = {
.name = "uart1_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1969,7 +1969,7 @@ static struct clk uart1_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpt11_ick = {
+static struct clk __omap3_data gpt11_ick = {
.name = "gpt11_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1979,7 +1979,7 @@ static struct clk gpt11_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpt10_ick = {
+static struct clk __omap3_data gpt10_ick = {
.name = "gpt10_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1989,7 +1989,7 @@ static struct clk gpt10_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mcbsp5_ick = {
+static struct clk __omap3_data mcbsp5_ick = {
.name = "mcbsp5_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -1999,7 +1999,7 @@ static struct clk mcbsp5_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mcbsp1_ick = {
+static struct clk __omap3_data mcbsp1_ick = {
.name = "mcbsp1_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -2009,7 +2009,7 @@ static struct clk mcbsp1_ick = {
.recalc = &followparent_recalc,
};
-static struct clk fac_ick = {
+static struct clk __omap3_data fac_ick = {
.name = "fac_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -2019,7 +2019,7 @@ static struct clk fac_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mailboxes_ick = {
+static struct clk __omap3_data mailboxes_ick = {
.name = "mailboxes_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -2029,7 +2029,7 @@ static struct clk mailboxes_ick = {
.recalc = &followparent_recalc,
};
-static struct clk omapctrl_ick = {
+static struct clk __omap3_data omapctrl_ick = {
.name = "omapctrl_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -2041,7 +2041,7 @@ static struct clk omapctrl_ick = {
/* SSI_L4_ICK based clocks */
-static struct clk ssi_l4_ick = {
+static struct clk __omap3_data ssi_l4_ick = {
.name = "ssi_l4_ick",
.ops = &clkops_null,
.parent = &l4_ick,
@@ -2049,7 +2049,7 @@ static struct clk ssi_l4_ick = {
.recalc = &followparent_recalc,
};
-static struct clk ssi_ick_3430es1 = {
+static struct clk __omap3_data ssi_ick_3430es1 = {
.name = "ssi_ick",
.ops = &clkops_omap2_dflt,
.parent = &ssi_l4_ick,
@@ -2059,7 +2059,7 @@ static struct clk ssi_ick_3430es1 = {
.recalc = &followparent_recalc,
};
-static struct clk ssi_ick_3430es2 = {
+static struct clk __omap3_data ssi_ick_3430es2 = {
.name = "ssi_ick",
.ops = &clkops_omap3430es2_ssi_wait,
.parent = &ssi_l4_ick,
@@ -2077,7 +2077,7 @@ static const struct clksel usb_l4_clksel[] = {
{ .parent = NULL },
};
-static struct clk usb_l4_ick = {
+static struct clk __omap3_data usb_l4_ick = {
.name = "usb_l4_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &l4_ick,
@@ -2092,14 +2092,14 @@ static struct clk usb_l4_ick = {
/* SECURITY_L4_ICK2 based clocks */
-static struct clk security_l4_ick2 = {
+static struct clk __omap3_data security_l4_ick2 = {
.name = "security_l4_ick2",
.ops = &clkops_null,
.parent = &l4_ick,
.recalc = &followparent_recalc,
};
-static struct clk aes1_ick = {
+static struct clk __omap3_data aes1_ick = {
.name = "aes1_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &security_l4_ick2,
@@ -2108,7 +2108,7 @@ static struct clk aes1_ick = {
.recalc = &followparent_recalc,
};
-static struct clk rng_ick = {
+static struct clk __omap3_data rng_ick = {
.name = "rng_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &security_l4_ick2,
@@ -2117,7 +2117,7 @@ static struct clk rng_ick = {
.recalc = &followparent_recalc,
};
-static struct clk sha11_ick = {
+static struct clk __omap3_data sha11_ick = {
.name = "sha11_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &security_l4_ick2,
@@ -2126,7 +2126,7 @@ static struct clk sha11_ick = {
.recalc = &followparent_recalc,
};
-static struct clk des1_ick = {
+static struct clk __omap3_data des1_ick = {
.name = "des1_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &security_l4_ick2,
@@ -2136,7 +2136,7 @@ static struct clk des1_ick = {
};
/* DSS */
-static struct clk dss1_alwon_fck_3430es1 = {
+static struct clk __omap3_data dss1_alwon_fck_3430es1 = {
.name = "dss1_alwon_fck",
.ops = &clkops_omap2_dflt,
.parent = &dpll4_m4x2_ck,
@@ -2146,7 +2146,7 @@ static struct clk dss1_alwon_fck_3430es1 = {
.recalc = &followparent_recalc,
};
-static struct clk dss1_alwon_fck_3430es2 = {
+static struct clk __omap3_data dss1_alwon_fck_3430es2 = {
.name = "dss1_alwon_fck",
.ops = &clkops_omap3430es2_dss_usbhost_wait,
.parent = &dpll4_m4x2_ck,
@@ -2156,7 +2156,7 @@ static struct clk dss1_alwon_fck_3430es2 = {
.recalc = &followparent_recalc,
};
-static struct clk dss_tv_fck = {
+static struct clk __omap3_data dss_tv_fck = {
.name = "dss_tv_fck",
.ops = &clkops_omap2_dflt,
.parent = &omap_54m_fck,
@@ -2166,7 +2166,7 @@ static struct clk dss_tv_fck = {
.recalc = &followparent_recalc,
};
-static struct clk dss_96m_fck = {
+static struct clk __omap3_data dss_96m_fck = {
.name = "dss_96m_fck",
.ops = &clkops_omap2_dflt,
.parent = &omap_96m_fck,
@@ -2176,7 +2176,7 @@ static struct clk dss_96m_fck = {
.recalc = &followparent_recalc,
};
-static struct clk dss2_alwon_fck = {
+static struct clk __omap3_data dss2_alwon_fck = {
.name = "dss2_alwon_fck",
.ops = &clkops_omap2_dflt,
.parent = &sys_ck,
@@ -2186,7 +2186,7 @@ static struct clk dss2_alwon_fck = {
.recalc = &followparent_recalc,
};
-static struct clk dss_ick_3430es1 = {
+static struct clk __omap3_data dss_ick_3430es1 = {
/* Handles both L3 and L4 clocks */
.name = "dss_ick",
.ops = &clkops_omap2_dflt,
@@ -2197,7 +2197,7 @@ static struct clk dss_ick_3430es1 = {
.recalc = &followparent_recalc,
};
-static struct clk dss_ick_3430es2 = {
+static struct clk __omap3_data dss_ick_3430es2 = {
/* Handles both L3 and L4 clocks */
.name = "dss_ick",
.ops = &clkops_omap3430es2_dss_usbhost_wait,
@@ -2210,7 +2210,7 @@ static struct clk dss_ick_3430es2 = {
/* CAM */
-static struct clk cam_mclk = {
+static struct clk __omap3_data cam_mclk = {
.name = "cam_mclk",
.ops = &clkops_omap2_dflt,
.parent = &dpll4_m5x2_ck,
@@ -2220,7 +2220,7 @@ static struct clk cam_mclk = {
.recalc = &followparent_recalc,
};
-static struct clk cam_ick = {
+static struct clk __omap3_data cam_ick = {
/* Handles both L3 and L4 clocks */
.name = "cam_ick",
.ops = &clkops_omap2_dflt,
@@ -2231,7 +2231,7 @@ static struct clk cam_ick = {
.recalc = &followparent_recalc,
};
-static struct clk csi2_96m_fck = {
+static struct clk __omap3_data csi2_96m_fck = {
.name = "csi2_96m_fck",
.ops = &clkops_omap2_dflt,
.parent = &core_96m_fck,
@@ -2243,7 +2243,7 @@ static struct clk csi2_96m_fck = {
/* USBHOST - 3430ES2 only */
-static struct clk usbhost_120m_fck = {
+static struct clk __omap3_data usbhost_120m_fck = {
.name = "usbhost_120m_fck",
.ops = &clkops_omap2_dflt,
.parent = &dpll5_m2_ck,
@@ -2253,7 +2253,7 @@ static struct clk usbhost_120m_fck = {
.recalc = &followparent_recalc,
};
-static struct clk usbhost_48m_fck = {
+static struct clk __omap3_data usbhost_48m_fck = {
.name = "usbhost_48m_fck",
.ops = &clkops_omap3430es2_dss_usbhost_wait,
.parent = &omap_48m_fck,
@@ -2263,7 +2263,7 @@ static struct clk usbhost_48m_fck = {
.recalc = &followparent_recalc,
};
-static struct clk usbhost_ick = {
+static struct clk __omap3_data usbhost_ick = {
/* Handles both L3 and L4 clocks */
.name = "usbhost_ick",
.ops = &clkops_omap3430es2_dss_usbhost_wait,
@@ -2300,7 +2300,7 @@ static const struct clksel usim_clksel[] = {
};
/* 3430ES2 only */
-static struct clk usim_fck = {
+static struct clk __omap3_data usim_fck = {
.name = "usim_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2313,7 +2313,7 @@ static struct clk usim_fck = {
};
/* XXX should gpt1's clksel have wkup_32k_fck as the 32k opt? */
-static struct clk gpt1_fck = {
+static struct clk __omap3_data gpt1_fck = {
.name = "gpt1_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2326,7 +2326,7 @@ static struct clk gpt1_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk wkup_32k_fck = {
+static struct clk __omap3_data wkup_32k_fck = {
.name = "wkup_32k_fck",
.ops = &clkops_null,
.parent = &omap_32k_fck,
@@ -2334,7 +2334,7 @@ static struct clk wkup_32k_fck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio1_dbck = {
+static struct clk __omap3_data gpio1_dbck = {
.name = "gpio1_dbck",
.ops = &clkops_omap2_dflt,
.parent = &wkup_32k_fck,
@@ -2344,7 +2344,7 @@ static struct clk gpio1_dbck = {
.recalc = &followparent_recalc,
};
-static struct clk wdt2_fck = {
+static struct clk __omap3_data wdt2_fck = {
.name = "wdt2_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &wkup_32k_fck,
@@ -2354,7 +2354,7 @@ static struct clk wdt2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk wkup_l4_ick = {
+static struct clk __omap3_data wkup_l4_ick = {
.name = "wkup_l4_ick",
.ops = &clkops_null,
.parent = &sys_ck,
@@ -2364,7 +2364,7 @@ static struct clk wkup_l4_ick = {
/* 3430ES2 only */
/* Never specifically named in the TRM, so we have to infer a likely name */
-static struct clk usim_ick = {
+static struct clk __omap3_data usim_ick = {
.name = "usim_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &wkup_l4_ick,
@@ -2374,7 +2374,7 @@ static struct clk usim_ick = {
.recalc = &followparent_recalc,
};
-static struct clk wdt2_ick = {
+static struct clk __omap3_data wdt2_ick = {
.name = "wdt2_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &wkup_l4_ick,
@@ -2384,7 +2384,7 @@ static struct clk wdt2_ick = {
.recalc = &followparent_recalc,
};
-static struct clk wdt1_ick = {
+static struct clk __omap3_data wdt1_ick = {
.name = "wdt1_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &wkup_l4_ick,
@@ -2394,7 +2394,7 @@ static struct clk wdt1_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpio1_ick = {
+static struct clk __omap3_data gpio1_ick = {
.name = "gpio1_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &wkup_l4_ick,
@@ -2404,7 +2404,7 @@ static struct clk gpio1_ick = {
.recalc = &followparent_recalc,
};
-static struct clk omap_32ksync_ick = {
+static struct clk __omap3_data omap_32ksync_ick = {
.name = "omap_32ksync_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &wkup_l4_ick,
@@ -2415,7 +2415,7 @@ static struct clk omap_32ksync_ick = {
};
/* XXX This clock no longer exists in 3430 TRM rev F */
-static struct clk gpt12_ick = {
+static struct clk __omap3_data gpt12_ick = {
.name = "gpt12_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &wkup_l4_ick,
@@ -2425,7 +2425,7 @@ static struct clk gpt12_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpt1_ick = {
+static struct clk __omap3_data gpt1_ick = {
.name = "gpt1_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &wkup_l4_ick,
@@ -2439,7 +2439,7 @@ static struct clk gpt1_ick = {
/* PER clock domain */
-static struct clk per_96m_fck = {
+static struct clk __omap3_data per_96m_fck = {
.name = "per_96m_fck",
.ops = &clkops_null,
.parent = &omap_96m_alwon_fck,
@@ -2447,7 +2447,7 @@ static struct clk per_96m_fck = {
.recalc = &followparent_recalc,
};
-static struct clk per_48m_fck = {
+static struct clk __omap3_data per_48m_fck = {
.name = "per_48m_fck",
.ops = &clkops_null,
.parent = &omap_48m_fck,
@@ -2455,7 +2455,7 @@ static struct clk per_48m_fck = {
.recalc = &followparent_recalc,
};
-static struct clk uart3_fck = {
+static struct clk __omap3_data uart3_fck = {
.name = "uart3_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_48m_fck,
@@ -2465,7 +2465,7 @@ static struct clk uart3_fck = {
.recalc = &followparent_recalc,
};
-static struct clk uart4_fck = {
+static struct clk __omap3_data uart4_fck = {
.name = "uart4_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_48m_fck,
@@ -2475,7 +2475,7 @@ static struct clk uart4_fck = {
.recalc = &followparent_recalc,
};
-static struct clk gpt2_fck = {
+static struct clk __omap3_data gpt2_fck = {
.name = "gpt2_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2488,7 +2488,7 @@ static struct clk gpt2_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk gpt3_fck = {
+static struct clk __omap3_data gpt3_fck = {
.name = "gpt3_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2501,7 +2501,7 @@ static struct clk gpt3_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk gpt4_fck = {
+static struct clk __omap3_data gpt4_fck = {
.name = "gpt4_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2514,7 +2514,7 @@ static struct clk gpt4_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk gpt5_fck = {
+static struct clk __omap3_data gpt5_fck = {
.name = "gpt5_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2527,7 +2527,7 @@ static struct clk gpt5_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk gpt6_fck = {
+static struct clk __omap3_data gpt6_fck = {
.name = "gpt6_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2540,7 +2540,7 @@ static struct clk gpt6_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk gpt7_fck = {
+static struct clk __omap3_data gpt7_fck = {
.name = "gpt7_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2553,7 +2553,7 @@ static struct clk gpt7_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk gpt8_fck = {
+static struct clk __omap3_data gpt8_fck = {
.name = "gpt8_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2566,7 +2566,7 @@ static struct clk gpt8_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk gpt9_fck = {
+static struct clk __omap3_data gpt9_fck = {
.name = "gpt9_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2579,7 +2579,7 @@ static struct clk gpt9_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk per_32k_alwon_fck = {
+static struct clk __omap3_data per_32k_alwon_fck = {
.name = "per_32k_alwon_fck",
.ops = &clkops_null,
.parent = &omap_32k_fck,
@@ -2587,7 +2587,7 @@ static struct clk per_32k_alwon_fck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio6_dbck = {
+static struct clk __omap3_data gpio6_dbck = {
.name = "gpio6_dbck",
.ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck,
@@ -2597,7 +2597,7 @@ static struct clk gpio6_dbck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio5_dbck = {
+static struct clk __omap3_data gpio5_dbck = {
.name = "gpio5_dbck",
.ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck,
@@ -2607,7 +2607,7 @@ static struct clk gpio5_dbck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio4_dbck = {
+static struct clk __omap3_data gpio4_dbck = {
.name = "gpio4_dbck",
.ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck,
@@ -2617,7 +2617,7 @@ static struct clk gpio4_dbck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio3_dbck = {
+static struct clk __omap3_data gpio3_dbck = {
.name = "gpio3_dbck",
.ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck,
@@ -2627,7 +2627,7 @@ static struct clk gpio3_dbck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio2_dbck = {
+static struct clk __omap3_data gpio2_dbck = {
.name = "gpio2_dbck",
.ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck,
@@ -2637,7 +2637,7 @@ static struct clk gpio2_dbck = {
.recalc = &followparent_recalc,
};
-static struct clk wdt3_fck = {
+static struct clk __omap3_data wdt3_fck = {
.name = "wdt3_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_32k_alwon_fck,
@@ -2647,7 +2647,7 @@ static struct clk wdt3_fck = {
.recalc = &followparent_recalc,
};
-static struct clk per_l4_ick = {
+static struct clk __omap3_data per_l4_ick = {
.name = "per_l4_ick",
.ops = &clkops_null,
.parent = &l4_ick,
@@ -2655,7 +2655,7 @@ static struct clk per_l4_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpio6_ick = {
+static struct clk __omap3_data gpio6_ick = {
.name = "gpio6_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2665,7 +2665,7 @@ static struct clk gpio6_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpio5_ick = {
+static struct clk __omap3_data gpio5_ick = {
.name = "gpio5_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2675,7 +2675,7 @@ static struct clk gpio5_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpio4_ick = {
+static struct clk __omap3_data gpio4_ick = {
.name = "gpio4_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2685,7 +2685,7 @@ static struct clk gpio4_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpio3_ick = {
+static struct clk __omap3_data gpio3_ick = {
.name = "gpio3_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2695,7 +2695,7 @@ static struct clk gpio3_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpio2_ick = {
+static struct clk __omap3_data gpio2_ick = {
.name = "gpio2_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2705,7 +2705,7 @@ static struct clk gpio2_ick = {
.recalc = &followparent_recalc,
};
-static struct clk wdt3_ick = {
+static struct clk __omap3_data wdt3_ick = {
.name = "wdt3_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2715,7 +2715,7 @@ static struct clk wdt3_ick = {
.recalc = &followparent_recalc,
};
-static struct clk uart3_ick = {
+static struct clk __omap3_data uart3_ick = {
.name = "uart3_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2725,7 +2725,7 @@ static struct clk uart3_ick = {
.recalc = &followparent_recalc,
};
-static struct clk uart4_ick = {
+static struct clk __omap3_data uart4_ick = {
.name = "uart4_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2735,7 +2735,7 @@ static struct clk uart4_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpt9_ick = {
+static struct clk __omap3_data gpt9_ick = {
.name = "gpt9_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2745,7 +2745,7 @@ static struct clk gpt9_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpt8_ick = {
+static struct clk __omap3_data gpt8_ick = {
.name = "gpt8_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2755,7 +2755,7 @@ static struct clk gpt8_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpt7_ick = {
+static struct clk __omap3_data gpt7_ick = {
.name = "gpt7_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2765,7 +2765,7 @@ static struct clk gpt7_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpt6_ick = {
+static struct clk __omap3_data gpt6_ick = {
.name = "gpt6_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2775,7 +2775,7 @@ static struct clk gpt6_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpt5_ick = {
+static struct clk __omap3_data gpt5_ick = {
.name = "gpt5_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2785,7 +2785,7 @@ static struct clk gpt5_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpt4_ick = {
+static struct clk __omap3_data gpt4_ick = {
.name = "gpt4_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2795,7 +2795,7 @@ static struct clk gpt4_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpt3_ick = {
+static struct clk __omap3_data gpt3_ick = {
.name = "gpt3_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2805,7 +2805,7 @@ static struct clk gpt3_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpt2_ick = {
+static struct clk __omap3_data gpt2_ick = {
.name = "gpt2_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2815,7 +2815,7 @@ static struct clk gpt2_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mcbsp2_ick = {
+static struct clk __omap3_data mcbsp2_ick = {
.name = "mcbsp2_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2825,7 +2825,7 @@ static struct clk mcbsp2_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mcbsp3_ick = {
+static struct clk __omap3_data mcbsp3_ick = {
.name = "mcbsp3_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2835,7 +2835,7 @@ static struct clk mcbsp3_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mcbsp4_ick = {
+static struct clk __omap3_data mcbsp4_ick = {
.name = "mcbsp4_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &per_l4_ick,
@@ -2851,7 +2851,7 @@ static const struct clksel mcbsp_234_clksel[] = {
{ .parent = NULL }
};
-static struct clk mcbsp2_fck = {
+static struct clk __omap3_data mcbsp2_fck = {
.name = "mcbsp2_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2864,7 +2864,7 @@ static struct clk mcbsp2_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk mcbsp3_fck = {
+static struct clk __omap3_data mcbsp3_fck = {
.name = "mcbsp3_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2877,7 +2877,7 @@ static struct clk mcbsp3_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk mcbsp4_fck = {
+static struct clk __omap3_data mcbsp4_fck = {
.name = "mcbsp4_fck",
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
@@ -2927,7 +2927,7 @@ static const struct clksel emu_src_clksel[] = {
* to switch the source of some of the EMU clocks.
* XXX Are there CLKEN bits for these EMU clks?
*/
-static struct clk emu_src_ck = {
+static struct clk __omap3_data emu_src_ck = {
.name = "emu_src_ck",
.ops = &clkops_null,
.init = &omap2_init_clksel_parent,
@@ -2951,7 +2951,7 @@ static const struct clksel pclk_emu_clksel[] = {
{ .parent = NULL },
};
-static struct clk pclk_fck = {
+static struct clk __omap3_data pclk_fck = {
.name = "pclk_fck",
.ops = &clkops_null,
.init = &omap2_init_clksel_parent,
@@ -2974,7 +2974,7 @@ static const struct clksel pclkx2_emu_clksel[] = {
{ .parent = NULL },
};
-static struct clk pclkx2_fck = {
+static struct clk __omap3_data pclkx2_fck = {
.name = "pclkx2_fck",
.ops = &clkops_null,
.init = &omap2_init_clksel_parent,
@@ -2990,7 +2990,7 @@ static const struct clksel atclk_emu_clksel[] = {
{ .parent = NULL },
};
-static struct clk atclk_fck = {
+static struct clk __omap3_data atclk_fck = {
.name = "atclk_fck",
.ops = &clkops_null,
.init = &omap2_init_clksel_parent,
@@ -3001,7 +3001,7 @@ static struct clk atclk_fck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk traceclk_src_fck = {
+static struct clk __omap3_data traceclk_src_fck = {
.name = "traceclk_src_fck",
.ops = &clkops_null,
.init = &omap2_init_clksel_parent,
@@ -3024,7 +3024,7 @@ static const struct clksel traceclk_clksel[] = {
{ .parent = NULL },
};
-static struct clk traceclk_fck = {
+static struct clk __omap3_data traceclk_fck = {
.name = "traceclk_fck",
.ops = &clkops_null,
.init = &omap2_init_clksel_parent,
@@ -3038,7 +3038,7 @@ static struct clk traceclk_fck = {
/* SR clocks */
/* SmartReflex fclk (VDD1) */
-static struct clk sr1_fck = {
+static struct clk __omap3_data sr1_fck = {
.name = "sr1_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &sys_ck,
@@ -3048,7 +3048,7 @@ static struct clk sr1_fck = {
};
/* SmartReflex fclk (VDD2) */
-static struct clk sr2_fck = {
+static struct clk __omap3_data sr2_fck = {
.name = "sr2_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &sys_ck,
@@ -3057,7 +3057,7 @@ static struct clk sr2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk sr_l4_ick = {
+static struct clk __omap3_data sr_l4_ick = {
.name = "sr_l4_ick",
.ops = &clkops_null, /* RMK: missing? */
.parent = &l4_ick,
@@ -3067,14 +3067,14 @@ static struct clk sr_l4_ick = {
/* SECURE_32K_FCK clocks */
-static struct clk gpt12_fck = {
+static struct clk __omap3_data gpt12_fck = {
.name = "gpt12_fck",
.ops = &clkops_null,
.parent = &secure_32k_fck,
.recalc = &followparent_recalc,
};
-static struct clk wdt1_fck = {
+static struct clk __omap3_data wdt1_fck = {
.name = "wdt1_fck",
.ops = &clkops_null,
.parent = &secure_32k_fck,
@@ -3082,7 +3082,7 @@ static struct clk wdt1_fck = {
};
/* Clocks for AM35XX */
-static struct clk ipss_ick = {
+static struct clk __omap3_data ipss_ick = {
.name = "ipss_ick",
.ops = &clkops_am35xx_ipss_wait,
.parent = &core_l3_ick,
@@ -3092,7 +3092,7 @@ static struct clk ipss_ick = {
.recalc = &followparent_recalc,
};
-static struct clk emac_ick = {
+static struct clk __omap3_data emac_ick = {
.name = "emac_ick",
.ops = &clkops_am35xx_ipss_module_wait,
.parent = &ipss_ick,
@@ -3102,13 +3102,13 @@ static struct clk emac_ick = {
.recalc = &followparent_recalc,
};
-static struct clk rmii_ck = {
+static struct clk __omap3_data rmii_ck = {
.name = "rmii_ck",
.ops = &clkops_null,
.rate = 50000000,
};
-static struct clk emac_fck = {
+static struct clk __omap3_data emac_fck = {
.name = "emac_fck",
.ops = &clkops_omap2_dflt,
.parent = &rmii_ck,
@@ -3117,7 +3117,7 @@ static struct clk emac_fck = {
.recalc = &followparent_recalc,
};
-static struct clk hsotgusb_ick_am35xx = {
+static struct clk __omap3_data hsotgusb_ick_am35xx = {
.name = "hsotgusb_ick",
.ops = &clkops_am35xx_ipss_module_wait,
.parent = &ipss_ick,
@@ -3127,7 +3127,7 @@ static struct clk hsotgusb_ick_am35xx = {
.recalc = &followparent_recalc,
};
-static struct clk hsotgusb_fck_am35xx = {
+static struct clk __omap3_data hsotgusb_fck_am35xx = {
.name = "hsotgusb_fck",
.ops = &clkops_omap2_dflt,
.parent = &sys_ck,
@@ -3137,7 +3137,7 @@ static struct clk hsotgusb_fck_am35xx = {
.recalc = &followparent_recalc,
};
-static struct clk hecc_ck = {
+static struct clk __omap3_data hecc_ck = {
.name = "hecc_ck",
.ops = &clkops_am35xx_ipss_module_wait,
.parent = &sys_ck,
@@ -3147,7 +3147,7 @@ static struct clk hecc_ck = {
.recalc = &followparent_recalc,
};
-static struct clk vpfe_ick = {
+static struct clk __omap3_data vpfe_ick = {
.name = "vpfe_ick",
.ops = &clkops_am35xx_ipss_module_wait,
.parent = &ipss_ick,
@@ -3157,13 +3157,13 @@ static struct clk vpfe_ick = {
.recalc = &followparent_recalc,
};
-static struct clk pclk_ck = {
+static struct clk __omap3_data pclk_ck = {
.name = "pclk_ck",
.ops = &clkops_null,
.rate = 27000000,
};
-static struct clk vpfe_fck = {
+static struct clk __omap3_data vpfe_fck = {
.name = "vpfe_fck",
.ops = &clkops_omap2_dflt,
.parent = &pclk_ck,
@@ -3176,7 +3176,7 @@ static struct clk vpfe_fck = {
* The UART1/2 functional clock acts as the functional
* clock for UART4. No separate fclk control available.
*/
-static struct clk uart4_ick_am35xx = {
+static struct clk __omap3_data uart4_ick_am35xx = {
.name = "uart4_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_l4_ick,
@@ -3186,7 +3186,7 @@ static struct clk uart4_ick_am35xx = {
.recalc = &followparent_recalc,
};
-static struct clk dummy_apb_pclk = {
+static struct clk __omap3_data dummy_apb_pclk = {
.name = "apb_pclk",
.ops = &clkops_null,
};
@@ -3196,7 +3196,7 @@ static struct clk dummy_apb_pclk = {
*/
/* XXX At some point we should rename this file to clock3xxx_data.c */
-static struct omap_clk omap3xxx_clks[] = {
+static struct omap_clk __omap3_data omap3xxx_clks[] = {
CLK(NULL, "apb_pclk", &dummy_apb_pclk, CK_3XXX),
CLK(NULL, "omap_32k_fck", &omap_32k_fck, CK_3XXX),
CLK(NULL, "virt_12m_ck", &virt_12m_ck, CK_3XXX),
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index ed6bf4a..d435d46 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -36,50 +36,50 @@
* elsewhere.
*/
-static struct omap_hwmod omap3xxx_mpu_hwmod;
-static struct omap_hwmod omap3xxx_iva_hwmod;
-static struct omap_hwmod omap3xxx_l3_main_hwmod;
-static struct omap_hwmod omap3xxx_l4_core_hwmod;
-static struct omap_hwmod omap3xxx_l4_per_hwmod;
-static struct omap_hwmod omap3xxx_wd_timer2_hwmod;
-static struct omap_hwmod omap3xxx_i2c1_hwmod;
-static struct omap_hwmod omap3xxx_i2c2_hwmod;
-static struct omap_hwmod omap3xxx_i2c3_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_mpu_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_iva_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_l3_main_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_l4_core_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_l4_per_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_wd_timer2_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_i2c1_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_i2c2_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_i2c3_hwmod;
/* L3 -> L4_CORE interface */
-static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
+static struct omap_hwmod_ocp_if __omap3_data omap3xxx_l3_main__l4_core = {
.master = &omap3xxx_l3_main_hwmod,
.slave = &omap3xxx_l4_core_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L3 -> L4_PER interface */
-static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = {
+static struct omap_hwmod_ocp_if __omap3_data omap3xxx_l3_main__l4_per = {
.master = &omap3xxx_l3_main_hwmod,
.slave = &omap3xxx_l4_per_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* MPU -> L3 interface */
-static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = {
+static struct omap_hwmod_ocp_if __omap3_data omap3xxx_mpu__l3_main = {
.master = &omap3xxx_mpu_hwmod,
.slave = &omap3xxx_l3_main_hwmod,
.user = OCP_USER_MPU,
};
/* Slave interfaces on the L3 interconnect */
-static struct omap_hwmod_ocp_if *omap3xxx_l3_main_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_l3_main_slaves[] = {
&omap3xxx_mpu__l3_main,
};
/* Master interfaces on the L3 interconnect */
-static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_l3_main_masters[] = {
&omap3xxx_l3_main__l4_core,
&omap3xxx_l3_main__l4_per,
};
/* L3 */
-static struct omap_hwmod omap3xxx_l3_main_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_l3_main_hwmod = {
.name = "l3_main",
.class = &l3_hwmod_class,
.masters = omap3xxx_l3_main_masters,
@@ -90,21 +90,21 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = {
.flags = HWMOD_NO_IDLEST,
};
-static struct omap_hwmod omap3xxx_l4_wkup_hwmod;
-static struct omap_hwmod omap3xxx_uart1_hwmod;
-static struct omap_hwmod omap3xxx_uart2_hwmod;
-static struct omap_hwmod omap3xxx_uart3_hwmod;
-static struct omap_hwmod omap3xxx_uart4_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_l4_wkup_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_uart1_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_uart2_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_uart3_hwmod;
+static struct omap_hwmod __omap3_data omap3xxx_uart4_hwmod;
/* L4_CORE -> L4_WKUP interface */
-static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
+static struct omap_hwmod_ocp_if __omap3_data omap3xxx_l4_core__l4_wkup = {
.master = &omap3xxx_l4_core_hwmod,
.slave = &omap3xxx_l4_wkup_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L4 CORE -> UART1 interface */
-static struct omap_hwmod_addr_space omap3xxx_uart1_addr_space[] = {
+static struct omap_hwmod_addr_space __omap3_data omap3xxx_uart1_addr_space[] = {
{
.pa_start = OMAP3_UART1_BASE,
.pa_end = OMAP3_UART1_BASE + SZ_8K - 1,
@@ -112,7 +112,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart1_addr_space[] = {
},
};
-static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = {
+static struct omap_hwmod_ocp_if __omap3_data omap3_l4_core__uart1 = {
.master = &omap3xxx_l4_core_hwmod,
.slave = &omap3xxx_uart1_hwmod,
.clk = "uart1_ick",
@@ -122,7 +122,7 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = {
};
/* L4 CORE -> UART2 interface */
-static struct omap_hwmod_addr_space omap3xxx_uart2_addr_space[] = {
+static struct omap_hwmod_addr_space __omap3_data omap3xxx_uart2_addr_space[] = {
{
.pa_start = OMAP3_UART2_BASE,
.pa_end = OMAP3_UART2_BASE + SZ_1K - 1,
@@ -130,7 +130,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart2_addr_space[] = {
},
};
-static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = {
+static struct omap_hwmod_ocp_if __omap3_data omap3_l4_core__uart2 = {
.master = &omap3xxx_l4_core_hwmod,
.slave = &omap3xxx_uart2_hwmod,
.clk = "uart2_ick",
@@ -140,7 +140,7 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = {
};
/* L4 PER -> UART3 interface */
-static struct omap_hwmod_addr_space omap3xxx_uart3_addr_space[] = {
+static struct omap_hwmod_addr_space __omap3_data omap3xxx_uart3_addr_space[] = {
{
.pa_start = OMAP3_UART3_BASE,
.pa_end = OMAP3_UART3_BASE + SZ_1K - 1,
@@ -148,7 +148,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart3_addr_space[] = {
},
};
-static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = {
+static struct omap_hwmod_ocp_if __omap3_data omap3_l4_per__uart3 = {
.master = &omap3xxx_l4_per_hwmod,
.slave = &omap3xxx_uart3_hwmod,
.clk = "uart3_ick",
@@ -158,7 +158,7 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = {
};
/* L4 PER -> UART4 interface */
-static struct omap_hwmod_addr_space omap3xxx_uart4_addr_space[] = {
+static struct omap_hwmod_addr_space __omap3_data omap3xxx_uart4_addr_space[] = {
{
.pa_start = OMAP3_UART4_BASE,
.pa_end = OMAP3_UART4_BASE + SZ_1K - 1,
@@ -166,7 +166,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart4_addr_space[] = {
},
};
-static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = {
+static struct omap_hwmod_ocp_if __omap3_data omap3_l4_per__uart4 = {
.master = &omap3xxx_l4_per_hwmod,
.slave = &omap3xxx_uart4_hwmod,
.clk = "uart4_ick",
@@ -179,7 +179,7 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = {
#define OMAP2_I2C_AS_LEN 128
/* L4 CORE -> I2C1 interface */
-static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = {
+static struct omap_hwmod_addr_space __omap3_data omap3xxx_i2c1_addr_space[] = {
{
.pa_start = 0x48070000,
.pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1,
@@ -187,7 +187,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = {
},
};
-static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
+static struct omap_hwmod_ocp_if __omap3_data omap3_l4_core__i2c1 = {
.master = &omap3xxx_l4_core_hwmod,
.slave = &omap3xxx_i2c1_hwmod,
.clk = "i2c1_ick",
@@ -204,7 +204,7 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
};
/* L4 CORE -> I2C2 interface */
-static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = {
+static struct omap_hwmod_addr_space __omap3_data omap3xxx_i2c2_addr_space[] = {
{
.pa_start = 0x48072000,
.pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
@@ -212,7 +212,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = {
},
};
-static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = {
+static struct omap_hwmod_ocp_if __omap3_data omap3_l4_core__i2c2 = {
.master = &omap3xxx_l4_core_hwmod,
.slave = &omap3xxx_i2c2_hwmod,
.clk = "i2c2_ick",
@@ -229,7 +229,7 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = {
};
/* L4 CORE -> I2C3 interface */
-static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = {
+static struct omap_hwmod_addr_space __omap3_data omap3xxx_i2c3_addr_space[] = {
{
.pa_start = 0x48060000,
.pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1,
@@ -237,7 +237,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = {
},
};
-static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {
+static struct omap_hwmod_ocp_if __omap3_data omap3_l4_core__i2c3 = {
.master = &omap3xxx_l4_core_hwmod,
.slave = &omap3xxx_i2c3_hwmod,
.clk = "i2c3_ick",
@@ -254,12 +254,12 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {
};
/* Slave interfaces on the L4_CORE interconnect */
-static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_l4_core_slaves[] = {
&omap3xxx_l3_main__l4_core,
};
/* Master interfaces on the L4_CORE interconnect */
-static struct omap_hwmod_ocp_if *omap3xxx_l4_core_masters[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_l4_core_masters[] = {
&omap3xxx_l4_core__l4_wkup,
&omap3_l4_core__uart1,
&omap3_l4_core__uart2,
@@ -269,7 +269,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_l4_core_masters[] = {
};
/* L4 CORE */
-static struct omap_hwmod omap3xxx_l4_core_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_l4_core_hwmod = {
.name = "l4_core",
.class = &l4_hwmod_class,
.masters = omap3xxx_l4_core_masters,
@@ -281,18 +281,18 @@ static struct omap_hwmod omap3xxx_l4_core_hwmod = {
};
/* Slave interfaces on the L4_PER interconnect */
-static struct omap_hwmod_ocp_if *omap3xxx_l4_per_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_l4_per_slaves[] = {
&omap3xxx_l3_main__l4_per,
};
/* Master interfaces on the L4_PER interconnect */
-static struct omap_hwmod_ocp_if *omap3xxx_l4_per_masters[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_l4_per_masters[] = {
&omap3_l4_per__uart3,
&omap3_l4_per__uart4,
};
/* L4 PER */
-static struct omap_hwmod omap3xxx_l4_per_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_l4_per_hwmod = {
.name = "l4_per",
.class = &l4_hwmod_class,
.masters = omap3xxx_l4_per_masters,
@@ -304,16 +304,16 @@ static struct omap_hwmod omap3xxx_l4_per_hwmod = {
};
/* Slave interfaces on the L4_WKUP interconnect */
-static struct omap_hwmod_ocp_if *omap3xxx_l4_wkup_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_l4_wkup_slaves[] = {
&omap3xxx_l4_core__l4_wkup,
};
/* Master interfaces on the L4_WKUP interconnect */
-static struct omap_hwmod_ocp_if *omap3xxx_l4_wkup_masters[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_l4_wkup_masters[] = {
};
/* L4 WKUP */
-static struct omap_hwmod omap3xxx_l4_wkup_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_l4_wkup_hwmod = {
.name = "l4_wkup",
.class = &l4_hwmod_class,
.masters = omap3xxx_l4_wkup_masters,
@@ -325,12 +325,12 @@ static struct omap_hwmod omap3xxx_l4_wkup_hwmod = {
};
/* Master interfaces on the MPU device */
-static struct omap_hwmod_ocp_if *omap3xxx_mpu_masters[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_mpu_masters[] = {
&omap3xxx_mpu__l3_main,
};
/* MPU */
-static struct omap_hwmod omap3xxx_mpu_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_mpu_hwmod = {
.name = "mpu",
.class = &mpu_hwmod_class,
.main_clk = "arm_fck",
@@ -344,14 +344,14 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {
*/
/* IVA2 <- L3 interface */
-static struct omap_hwmod_ocp_if omap3xxx_l3__iva = {
+static struct omap_hwmod_ocp_if __omap3_data omap3xxx_l3__iva = {
.master = &omap3xxx_l3_main_hwmod,
.slave = &omap3xxx_iva_hwmod,
.clk = "iva2_ck",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_ocp_if *omap3xxx_iva_masters[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_iva_masters[] = {
&omap3xxx_l3__iva,
};
@@ -359,7 +359,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_iva_masters[] = {
* IVA2 (IVA2)
*/
-static struct omap_hwmod omap3xxx_iva_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_iva_hwmod = {
.name = "iva",
.class = &iva_hwmod_class,
.masters = omap3xxx_iva_masters,
@@ -368,7 +368,7 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
};
/* l4_wkup -> wd_timer2 */
-static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = {
+static struct omap_hwmod_addr_space __omap3_data omap3xxx_wd_timer2_addrs[] = {
{
.pa_start = 0x48314000,
.pa_end = 0x4831407f,
@@ -376,7 +376,7 @@ static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = {
},
};
-static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = {
+static struct omap_hwmod_ocp_if __omap3_data omap3xxx_l4_wkup__wd_timer2 = {
.master = &omap3xxx_l4_wkup_hwmod,
.slave = &omap3xxx_wd_timer2_hwmod,
.clk = "wdt2_ick",
@@ -391,7 +391,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = {
* overflow condition
*/
-static struct omap_hwmod_class_sysconfig omap3xxx_wd_timer_sysc = {
+static struct omap_hwmod_class_sysconfig __omap3_data omap3xxx_wd_timer_sysc = {
.rev_offs = 0x0000,
.sysc_offs = 0x0010,
.syss_offs = 0x0014,
@@ -403,7 +403,7 @@ static struct omap_hwmod_class_sysconfig omap3xxx_wd_timer_sysc = {
};
/* I2C common */
-static struct omap_hwmod_class_sysconfig i2c_sysc = {
+static struct omap_hwmod_class_sysconfig __omap3_data i2c_sysc = {
.rev_offs = 0x00,
.sysc_offs = 0x20,
.syss_offs = 0x10,
@@ -414,17 +414,17 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
.sysc_fields = &omap_hwmod_sysc_type1,
};
-static struct omap_hwmod_class omap3xxx_wd_timer_hwmod_class = {
+static struct omap_hwmod_class __omap3_data omap3xxx_wd_timer_hwmod_class = {
.name = "wd_timer",
.sysc = &omap3xxx_wd_timer_sysc,
};
/* wd_timer2 */
-static struct omap_hwmod_ocp_if *omap3xxx_wd_timer2_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_wd_timer2_slaves[] = {
&omap3xxx_l4_wkup__wd_timer2,
};
-static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_wd_timer2_hwmod = {
.name = "wd_timer2",
.class = &omap3xxx_wd_timer_hwmod_class,
.main_clk = "wdt2_fck",
@@ -444,7 +444,7 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
/* UART common */
-static struct omap_hwmod_class_sysconfig uart_sysc = {
+static struct omap_hwmod_class_sysconfig __omap3_data uart_sysc = {
.rev_offs = 0x50,
.sysc_offs = 0x54,
.syss_offs = 0x58,
@@ -455,27 +455,27 @@ static struct omap_hwmod_class_sysconfig uart_sysc = {
.sysc_fields = &omap_hwmod_sysc_type1,
};
-static struct omap_hwmod_class uart_class = {
+static struct omap_hwmod_class __omap3_data uart_class = {
.name = "uart",
.sysc = &uart_sysc,
};
/* UART1 */
-static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
+static struct omap_hwmod_irq_info __omap3_data uart1_mpu_irqs[] = {
{ .irq = INT_24XX_UART1_IRQ, },
};
-static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap3_data uart1_sdma_reqs[] = {
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
};
-static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_uart1_slaves[] = {
&omap3_l4_core__uart1,
};
-static struct omap_hwmod omap3xxx_uart1_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_uart1_hwmod = {
.name = "uart1",
.mpu_irqs = uart1_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
@@ -499,20 +499,20 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
/* UART2 */
-static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
+static struct omap_hwmod_irq_info __omap3_data uart2_mpu_irqs[] = {
{ .irq = INT_24XX_UART2_IRQ, },
};
-static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap3_data uart2_sdma_reqs[] = {
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
};
-static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_uart2_slaves[] = {
&omap3_l4_core__uart2,
};
-static struct omap_hwmod omap3xxx_uart2_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_uart2_hwmod = {
.name = "uart2",
.mpu_irqs = uart2_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
@@ -536,20 +536,20 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
/* UART3 */
-static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
+static struct omap_hwmod_irq_info __omap3_data uart3_mpu_irqs[] = {
{ .irq = INT_24XX_UART3_IRQ, },
};
-static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap3_data uart3_sdma_reqs[] = {
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
};
-static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_uart3_slaves[] = {
&omap3_l4_per__uart3,
};
-static struct omap_hwmod omap3xxx_uart3_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_uart3_hwmod = {
.name = "uart3",
.mpu_irqs = uart3_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
@@ -573,20 +573,20 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
/* UART4 */
-static struct omap_hwmod_irq_info uart4_mpu_irqs[] = {
+static struct omap_hwmod_irq_info __omap3_data uart4_mpu_irqs[] = {
{ .irq = INT_36XX_UART4_IRQ, },
};
-static struct omap_hwmod_dma_info uart4_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap3_data uart4_sdma_reqs[] = {
{ .name = "rx", .dma_req = OMAP36XX_DMA_UART4_RX, },
{ .name = "tx", .dma_req = OMAP36XX_DMA_UART4_TX, },
};
-static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_uart4_slaves[] = {
&omap3_l4_per__uart4,
};
-static struct omap_hwmod omap3xxx_uart4_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_uart4_hwmod = {
.name = "uart4",
.mpu_irqs = uart4_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart4_mpu_irqs),
@@ -608,31 +608,31 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
};
-static struct omap_hwmod_class i2c_class = {
+static struct omap_hwmod_class __omap3_data i2c_class = {
.name = "i2c",
.sysc = &i2c_sysc,
};
/* I2C1 */
-static struct omap_i2c_dev_attr i2c1_dev_attr = {
+static struct omap_i2c_dev_attr __omap3_data i2c1_dev_attr = {
.fifo_depth = 8, /* bytes */
};
-static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
+static struct omap_hwmod_irq_info __omap3_data i2c1_mpu_irqs[] = {
{ .irq = INT_24XX_I2C1_IRQ, },
};
-static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap3_data i2c1_sdma_reqs[] = {
{ .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
{ .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
};
-static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_i2c1_slaves[] = {
&omap3_l4_core__i2c1,
};
-static struct omap_hwmod omap3xxx_i2c1_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_i2c1_hwmod = {
.name = "i2c1",
.mpu_irqs = i2c1_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
@@ -656,24 +656,24 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {
/* I2C2 */
-static struct omap_i2c_dev_attr i2c2_dev_attr = {
+static struct omap_i2c_dev_attr __omap3_data i2c2_dev_attr = {
.fifo_depth = 8, /* bytes */
};
-static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
+static struct omap_hwmod_irq_info __omap3_data i2c2_mpu_irqs[] = {
{ .irq = INT_24XX_I2C2_IRQ, },
};
-static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap3_data i2c2_sdma_reqs[] = {
{ .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
{ .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
};
-static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_i2c2_slaves[] = {
&omap3_l4_core__i2c2,
};
-static struct omap_hwmod omap3xxx_i2c2_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_i2c2_hwmod = {
.name = "i2c2",
.mpu_irqs = i2c2_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs),
@@ -697,24 +697,24 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {
/* I2C3 */
-static struct omap_i2c_dev_attr i2c3_dev_attr = {
+static struct omap_i2c_dev_attr __omap3_data i2c3_dev_attr = {
.fifo_depth = 64, /* bytes */
};
-static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = {
+static struct omap_hwmod_irq_info __omap3_data i2c3_mpu_irqs[] = {
{ .irq = INT_34XX_I2C3_IRQ, },
};
-static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap3_data i2c3_sdma_reqs[] = {
{ .name = "tx", .dma_req = OMAP34XX_DMA_I2C3_TX },
{ .name = "rx", .dma_req = OMAP34XX_DMA_I2C3_RX },
};
-static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
+static struct omap_hwmod_ocp_if __omap3_data *omap3xxx_i2c3_slaves[] = {
&omap3_l4_core__i2c3,
};
-static struct omap_hwmod omap3xxx_i2c3_hwmod = {
+static struct omap_hwmod __omap3_data omap3xxx_i2c3_hwmod = {
.name = "i2c3",
.mpu_irqs = i2c3_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(i2c3_mpu_irqs),
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 5/6] omap4: mark some data as omap4-specific
2010-12-21 18:19 [RFC] Infrastructure for dynamic removal of code and data sections Thomas Petazzoni
` (2 preceding siblings ...)
2010-12-21 18:20 ` [PATCH 4/6] omap3: mark some data as omap3-specific Thomas Petazzoni
@ 2010-12-21 18:20 ` Thomas Petazzoni
2010-12-21 18:20 ` [PATCH 6/6] omap3: beagle: get rid of unused omap2/omap4 specific code/data Thomas Petazzoni
4 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2010-12-21 18:20 UTC (permalink / raw)
To: linux-omap; +Cc: Thomas Petazzoni, Thomas Petazzoni
From: Thomas Petazzoni <tpetazzoni@ti.com>
Use __omap4_data on clock related data and hwmod related data for
OMAP4 SoCs. This data will later be freed if we end up booting on a
non-OMAP4 SoC.
Signed-off-by: Thomas Petazzoni <t-petazzoni@ti.com>
---
arch/arm/mach-omap2/clock44xx_data.c | 438 ++++++++++++++--------------
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 278 +++++++++---------
2 files changed, 358 insertions(+), 358 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 1599836..0b0f213 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -38,79 +38,79 @@
/* Root clocks */
-static struct clk extalt_clkin_ck = {
+static struct clk __omap4_data extalt_clkin_ck = {
.name = "extalt_clkin_ck",
.rate = 59000000,
.ops = &clkops_null,
};
-static struct clk pad_clks_ck = {
+static struct clk __omap4_data pad_clks_ck = {
.name = "pad_clks_ck",
.rate = 12000000,
.ops = &clkops_null,
};
-static struct clk pad_slimbus_core_clks_ck = {
+static struct clk __omap4_data pad_slimbus_core_clks_ck = {
.name = "pad_slimbus_core_clks_ck",
.rate = 12000000,
.ops = &clkops_null,
};
-static struct clk secure_32k_clk_src_ck = {
+static struct clk __omap4_data secure_32k_clk_src_ck = {
.name = "secure_32k_clk_src_ck",
.rate = 32768,
.ops = &clkops_null,
};
-static struct clk slimbus_clk = {
+static struct clk __omap4_data slimbus_clk = {
.name = "slimbus_clk",
.rate = 12000000,
.ops = &clkops_null,
};
-static struct clk sys_32k_ck = {
+static struct clk __omap4_data sys_32k_ck = {
.name = "sys_32k_ck",
.rate = 32768,
.ops = &clkops_null,
};
-static struct clk virt_12000000_ck = {
+static struct clk __omap4_data virt_12000000_ck = {
.name = "virt_12000000_ck",
.ops = &clkops_null,
.rate = 12000000,
};
-static struct clk virt_13000000_ck = {
+static struct clk __omap4_data virt_13000000_ck = {
.name = "virt_13000000_ck",
.ops = &clkops_null,
.rate = 13000000,
};
-static struct clk virt_16800000_ck = {
+static struct clk __omap4_data virt_16800000_ck = {
.name = "virt_16800000_ck",
.ops = &clkops_null,
.rate = 16800000,
};
-static struct clk virt_19200000_ck = {
+static struct clk __omap4_data virt_19200000_ck = {
.name = "virt_19200000_ck",
.ops = &clkops_null,
.rate = 19200000,
};
-static struct clk virt_26000000_ck = {
+static struct clk __omap4_data virt_26000000_ck = {
.name = "virt_26000000_ck",
.ops = &clkops_null,
.rate = 26000000,
};
-static struct clk virt_27000000_ck = {
+static struct clk __omap4_data virt_27000000_ck = {
.name = "virt_27000000_ck",
.ops = &clkops_null,
.rate = 27000000,
};
-static struct clk virt_38400000_ck = {
+static struct clk __omap4_data virt_38400000_ck = {
.name = "virt_38400000_ck",
.ops = &clkops_null,
.rate = 38400000,
@@ -167,7 +167,7 @@ static const struct clksel sys_clkin_sel[] = {
{ .parent = NULL },
};
-static struct clk sys_clkin_ck = {
+static struct clk __omap4_data sys_clkin_ck = {
.name = "sys_clkin_ck",
.rate = 38400000,
.clksel = sys_clkin_sel,
@@ -178,31 +178,31 @@ static struct clk sys_clkin_ck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk tie_low_clock_ck = {
+static struct clk __omap4_data tie_low_clock_ck = {
.name = "tie_low_clock_ck",
.rate = 0,
.ops = &clkops_null,
};
-static struct clk utmi_phy_clkout_ck = {
+static struct clk __omap4_data utmi_phy_clkout_ck = {
.name = "utmi_phy_clkout_ck",
.rate = 60000000,
.ops = &clkops_null,
};
-static struct clk xclk60mhsp1_ck = {
+static struct clk __omap4_data xclk60mhsp1_ck = {
.name = "xclk60mhsp1_ck",
.rate = 60000000,
.ops = &clkops_null,
};
-static struct clk xclk60mhsp2_ck = {
+static struct clk __omap4_data xclk60mhsp2_ck = {
.name = "xclk60mhsp2_ck",
.rate = 60000000,
.ops = &clkops_null,
};
-static struct clk xclk60motg_ck = {
+static struct clk __omap4_data xclk60motg_ck = {
.name = "xclk60motg_ck",
.rate = 60000000,
.ops = &clkops_null,
@@ -216,14 +216,14 @@ static const struct clksel abe_dpll_bypass_clk_mux_sel[] = {
{ .parent = NULL },
};
-static struct clk abe_dpll_bypass_clk_mux_ck = {
+static struct clk __omap4_data abe_dpll_bypass_clk_mux_ck = {
.name = "abe_dpll_bypass_clk_mux_ck",
.parent = &sys_clkin_ck,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk abe_dpll_refclk_mux_ck = {
+static struct clk __omap4_data abe_dpll_refclk_mux_ck = {
.name = "abe_dpll_refclk_mux_ck",
.parent = &sys_clkin_ck,
.clksel = abe_dpll_bypass_clk_mux_sel,
@@ -235,7 +235,7 @@ static struct clk abe_dpll_refclk_mux_ck = {
};
/* DPLL_ABE */
-static struct dpll_data dpll_abe_dd = {
+static struct dpll_data __omap4_data dpll_abe_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_ABE,
.clk_bypass = &abe_dpll_bypass_clk_mux_ck,
.clk_ref = &abe_dpll_refclk_mux_ck,
@@ -254,7 +254,7 @@ static struct dpll_data dpll_abe_dd = {
};
-static struct clk dpll_abe_ck = {
+static struct clk __omap4_data dpll_abe_ck = {
.name = "dpll_abe_ck",
.parent = &abe_dpll_refclk_mux_ck,
.dpll_data = &dpll_abe_dd,
@@ -265,14 +265,14 @@ static struct clk dpll_abe_ck = {
.set_rate = &omap3_noncore_dpll_set_rate,
};
-static struct clk dpll_abe_m2x2_ck = {
+static struct clk __omap4_data dpll_abe_m2x2_ck = {
.name = "dpll_abe_m2x2_ck",
.parent = &dpll_abe_ck,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk abe_24m_fclk = {
+static struct clk __omap4_data abe_24m_fclk = {
.name = "abe_24m_fclk",
.parent = &dpll_abe_m2x2_ck,
.ops = &clkops_null,
@@ -291,7 +291,7 @@ static const struct clksel abe_clk_div[] = {
{ .parent = NULL },
};
-static struct clk abe_clk = {
+static struct clk __omap4_data abe_clk = {
.name = "abe_clk",
.parent = &dpll_abe_m2x2_ck,
.clksel = abe_clk_div,
@@ -314,7 +314,7 @@ static const struct clksel aess_fclk_div[] = {
{ .parent = NULL },
};
-static struct clk aess_fclk = {
+static struct clk __omap4_data aess_fclk = {
.name = "aess_fclk",
.parent = &abe_clk,
.clksel = aess_fclk_div,
@@ -366,7 +366,7 @@ static const struct clksel dpll_abe_m3_div[] = {
{ .parent = NULL },
};
-static struct clk dpll_abe_m3_ck = {
+static struct clk __omap4_data dpll_abe_m3_ck = {
.name = "dpll_abe_m3_ck",
.parent = &dpll_abe_ck,
.clksel = dpll_abe_m3_div,
@@ -384,7 +384,7 @@ static const struct clksel core_hsd_byp_clk_mux_sel[] = {
{ .parent = NULL },
};
-static struct clk core_hsd_byp_clk_mux_ck = {
+static struct clk __omap4_data core_hsd_byp_clk_mux_ck = {
.name = "core_hsd_byp_clk_mux_ck",
.parent = &sys_clkin_ck,
.clksel = core_hsd_byp_clk_mux_sel,
@@ -396,7 +396,7 @@ static struct clk core_hsd_byp_clk_mux_ck = {
};
/* DPLL_CORE */
-static struct dpll_data dpll_core_dd = {
+static struct dpll_data __omap4_data dpll_core_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_CORE,
.clk_bypass = &core_hsd_byp_clk_mux_ck,
.clk_ref = &sys_clkin_ck,
@@ -415,7 +415,7 @@ static struct dpll_data dpll_core_dd = {
};
-static struct clk dpll_core_ck = {
+static struct clk __omap4_data dpll_core_ck = {
.name = "dpll_core_ck",
.parent = &sys_clkin_ck,
.dpll_data = &dpll_core_dd,
@@ -429,7 +429,7 @@ static const struct clksel dpll_core_m6_div[] = {
{ .parent = NULL },
};
-static struct clk dpll_core_m6_ck = {
+static struct clk __omap4_data dpll_core_m6_ck = {
.name = "dpll_core_m6_ck",
.parent = &dpll_core_ck,
.clksel = dpll_core_m6_div,
@@ -447,14 +447,14 @@ static const struct clksel dbgclk_mux_sel[] = {
{ .parent = NULL },
};
-static struct clk dbgclk_mux_ck = {
+static struct clk __omap4_data dbgclk_mux_ck = {
.name = "dbgclk_mux_ck",
.parent = &sys_clkin_ck,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk dpll_core_m2_ck = {
+static struct clk __omap4_data dpll_core_m2_ck = {
.name = "dpll_core_m2_ck",
.parent = &dpll_core_ck,
.clksel = dpll_core_m6_div,
@@ -466,14 +466,14 @@ static struct clk dpll_core_m2_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk ddrphy_ck = {
+static struct clk __omap4_data ddrphy_ck = {
.name = "ddrphy_ck",
.parent = &dpll_core_m2_ck,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk dpll_core_m5_ck = {
+static struct clk __omap4_data dpll_core_m5_ck = {
.name = "dpll_core_m5_ck",
.parent = &dpll_core_ck,
.clksel = dpll_core_m6_div,
@@ -490,7 +490,7 @@ static const struct clksel div_core_div[] = {
{ .parent = NULL },
};
-static struct clk div_core_ck = {
+static struct clk __omap4_data div_core_ck = {
.name = "div_core_ck",
.parent = &dpll_core_m5_ck,
.clksel = div_core_div,
@@ -515,7 +515,7 @@ static const struct clksel div_iva_hs_clk_div[] = {
{ .parent = NULL },
};
-static struct clk div_iva_hs_clk = {
+static struct clk __omap4_data div_iva_hs_clk = {
.name = "div_iva_hs_clk",
.parent = &dpll_core_m5_ck,
.clksel = div_iva_hs_clk_div,
@@ -527,7 +527,7 @@ static struct clk div_iva_hs_clk = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk div_mpu_hs_clk = {
+static struct clk __omap4_data div_mpu_hs_clk = {
.name = "div_mpu_hs_clk",
.parent = &dpll_core_m5_ck,
.clksel = div_iva_hs_clk_div,
@@ -539,7 +539,7 @@ static struct clk div_mpu_hs_clk = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk dpll_core_m4_ck = {
+static struct clk __omap4_data dpll_core_m4_ck = {
.name = "dpll_core_m4_ck",
.parent = &dpll_core_ck,
.clksel = dpll_core_m6_div,
@@ -551,14 +551,14 @@ static struct clk dpll_core_m4_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk dll_clk_div_ck = {
+static struct clk __omap4_data dll_clk_div_ck = {
.name = "dll_clk_div_ck",
.parent = &dpll_core_m4_ck,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk dpll_abe_m2_ck = {
+static struct clk __omap4_data dpll_abe_m2_ck = {
.name = "dpll_abe_m2_ck",
.parent = &dpll_abe_ck,
.clksel = dpll_abe_m3_div,
@@ -570,7 +570,7 @@ static struct clk dpll_abe_m2_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk dpll_core_m3_ck = {
+static struct clk __omap4_data dpll_core_m3_ck = {
.name = "dpll_core_m3_ck",
.parent = &dpll_core_ck,
.clksel = dpll_core_m6_div,
@@ -582,7 +582,7 @@ static struct clk dpll_core_m3_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk dpll_core_m7_ck = {
+static struct clk __omap4_data dpll_core_m7_ck = {
.name = "dpll_core_m7_ck",
.parent = &dpll_core_ck,
.clksel = dpll_core_m6_div,
@@ -600,7 +600,7 @@ static const struct clksel iva_hsd_byp_clk_mux_sel[] = {
{ .parent = NULL },
};
-static struct clk iva_hsd_byp_clk_mux_ck = {
+static struct clk __omap4_data iva_hsd_byp_clk_mux_ck = {
.name = "iva_hsd_byp_clk_mux_ck",
.parent = &sys_clkin_ck,
.ops = &clkops_null,
@@ -608,7 +608,7 @@ static struct clk iva_hsd_byp_clk_mux_ck = {
};
/* DPLL_IVA */
-static struct dpll_data dpll_iva_dd = {
+static struct dpll_data __omap4_data dpll_iva_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_IVA,
.clk_bypass = &iva_hsd_byp_clk_mux_ck,
.clk_ref = &sys_clkin_ck,
@@ -627,7 +627,7 @@ static struct dpll_data dpll_iva_dd = {
};
-static struct clk dpll_iva_ck = {
+static struct clk __omap4_data dpll_iva_ck = {
.name = "dpll_iva_ck",
.parent = &sys_clkin_ck,
.dpll_data = &dpll_iva_dd,
@@ -643,7 +643,7 @@ static const struct clksel dpll_iva_m4_div[] = {
{ .parent = NULL },
};
-static struct clk dpll_iva_m4_ck = {
+static struct clk __omap4_data dpll_iva_m4_ck = {
.name = "dpll_iva_m4_ck",
.parent = &dpll_iva_ck,
.clksel = dpll_iva_m4_div,
@@ -655,7 +655,7 @@ static struct clk dpll_iva_m4_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk dpll_iva_m5_ck = {
+static struct clk __omap4_data dpll_iva_m5_ck = {
.name = "dpll_iva_m5_ck",
.parent = &dpll_iva_ck,
.clksel = dpll_iva_m4_div,
@@ -668,7 +668,7 @@ static struct clk dpll_iva_m5_ck = {
};
/* DPLL_MPU */
-static struct dpll_data dpll_mpu_dd = {
+static struct dpll_data __omap4_data dpll_mpu_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_MPU,
.clk_bypass = &div_mpu_hs_clk,
.clk_ref = &sys_clkin_ck,
@@ -687,7 +687,7 @@ static struct dpll_data dpll_mpu_dd = {
};
-static struct clk dpll_mpu_ck = {
+static struct clk __omap4_data dpll_mpu_ck = {
.name = "dpll_mpu_ck",
.parent = &sys_clkin_ck,
.dpll_data = &dpll_mpu_dd,
@@ -703,7 +703,7 @@ static const struct clksel dpll_mpu_m2_div[] = {
{ .parent = NULL },
};
-static struct clk dpll_mpu_m2_ck = {
+static struct clk __omap4_data dpll_mpu_m2_ck = {
.name = "dpll_mpu_m2_ck",
.parent = &dpll_mpu_ck,
.clksel = dpll_mpu_m2_div,
@@ -715,7 +715,7 @@ static struct clk dpll_mpu_m2_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk per_hs_clk_div_ck = {
+static struct clk __omap4_data per_hs_clk_div_ck = {
.name = "per_hs_clk_div_ck",
.parent = &dpll_abe_m3_ck,
.ops = &clkops_null,
@@ -728,7 +728,7 @@ static const struct clksel per_hsd_byp_clk_mux_sel[] = {
{ .parent = NULL },
};
-static struct clk per_hsd_byp_clk_mux_ck = {
+static struct clk __omap4_data per_hsd_byp_clk_mux_ck = {
.name = "per_hsd_byp_clk_mux_ck",
.parent = &sys_clkin_ck,
.clksel = per_hsd_byp_clk_mux_sel,
@@ -740,7 +740,7 @@ static struct clk per_hsd_byp_clk_mux_ck = {
};
/* DPLL_PER */
-static struct dpll_data dpll_per_dd = {
+static struct dpll_data __omap4_data dpll_per_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_PER,
.clk_bypass = &per_hsd_byp_clk_mux_ck,
.clk_ref = &sys_clkin_ck,
@@ -759,7 +759,7 @@ static struct dpll_data dpll_per_dd = {
};
-static struct clk dpll_per_ck = {
+static struct clk __omap4_data dpll_per_ck = {
.name = "dpll_per_ck",
.parent = &sys_clkin_ck,
.dpll_data = &dpll_per_dd,
@@ -775,7 +775,7 @@ static const struct clksel dpll_per_m2_div[] = {
{ .parent = NULL },
};
-static struct clk dpll_per_m2_ck = {
+static struct clk __omap4_data dpll_per_m2_ck = {
.name = "dpll_per_m2_ck",
.parent = &dpll_per_ck,
.clksel = dpll_per_m2_div,
@@ -787,14 +787,14 @@ static struct clk dpll_per_m2_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk dpll_per_m2x2_ck = {
+static struct clk __omap4_data dpll_per_m2x2_ck = {
.name = "dpll_per_m2x2_ck",
.parent = &dpll_per_ck,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk dpll_per_m3_ck = {
+static struct clk __omap4_data dpll_per_m3_ck = {
.name = "dpll_per_m3_ck",
.parent = &dpll_per_ck,
.clksel = dpll_per_m2_div,
@@ -806,7 +806,7 @@ static struct clk dpll_per_m3_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk dpll_per_m4_ck = {
+static struct clk __omap4_data dpll_per_m4_ck = {
.name = "dpll_per_m4_ck",
.parent = &dpll_per_ck,
.clksel = dpll_per_m2_div,
@@ -818,7 +818,7 @@ static struct clk dpll_per_m4_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk dpll_per_m5_ck = {
+static struct clk __omap4_data dpll_per_m5_ck = {
.name = "dpll_per_m5_ck",
.parent = &dpll_per_ck,
.clksel = dpll_per_m2_div,
@@ -830,7 +830,7 @@ static struct clk dpll_per_m5_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk dpll_per_m6_ck = {
+static struct clk __omap4_data dpll_per_m6_ck = {
.name = "dpll_per_m6_ck",
.parent = &dpll_per_ck,
.clksel = dpll_per_m2_div,
@@ -842,7 +842,7 @@ static struct clk dpll_per_m6_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk dpll_per_m7_ck = {
+static struct clk __omap4_data dpll_per_m7_ck = {
.name = "dpll_per_m7_ck",
.parent = &dpll_per_ck,
.clksel = dpll_per_m2_div,
@@ -855,7 +855,7 @@ static struct clk dpll_per_m7_ck = {
};
/* DPLL_UNIPRO */
-static struct dpll_data dpll_unipro_dd = {
+static struct dpll_data __omap4_data dpll_unipro_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_UNIPRO,
.clk_bypass = &sys_clkin_ck,
.clk_ref = &sys_clkin_ck,
@@ -874,7 +874,7 @@ static struct dpll_data dpll_unipro_dd = {
};
-static struct clk dpll_unipro_ck = {
+static struct clk __omap4_data dpll_unipro_ck = {
.name = "dpll_unipro_ck",
.parent = &sys_clkin_ck,
.dpll_data = &dpll_unipro_dd,
@@ -890,7 +890,7 @@ static const struct clksel dpll_unipro_m2x2_div[] = {
{ .parent = NULL },
};
-static struct clk dpll_unipro_m2x2_ck = {
+static struct clk __omap4_data dpll_unipro_m2x2_ck = {
.name = "dpll_unipro_m2x2_ck",
.parent = &dpll_unipro_ck,
.clksel = dpll_unipro_m2x2_div,
@@ -902,7 +902,7 @@ static struct clk dpll_unipro_m2x2_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk usb_hs_clk_div_ck = {
+static struct clk __omap4_data usb_hs_clk_div_ck = {
.name = "usb_hs_clk_div_ck",
.parent = &dpll_abe_m3_ck,
.ops = &clkops_null,
@@ -910,7 +910,7 @@ static struct clk usb_hs_clk_div_ck = {
};
/* DPLL_USB */
-static struct dpll_data dpll_usb_dd = {
+static struct dpll_data __omap4_data dpll_usb_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_USB,
.clk_bypass = &usb_hs_clk_div_ck,
.flags = DPLL_J_TYPE | DPLL_NO_DCO_SEL,
@@ -930,7 +930,7 @@ static struct dpll_data dpll_usb_dd = {
};
-static struct clk dpll_usb_ck = {
+static struct clk __omap4_data dpll_usb_ck = {
.name = "dpll_usb_ck",
.parent = &sys_clkin_ck,
.dpll_data = &dpll_usb_dd,
@@ -941,7 +941,7 @@ static struct clk dpll_usb_ck = {
.set_rate = &omap3_noncore_dpll_set_rate,
};
-static struct clk dpll_usb_clkdcoldo_ck = {
+static struct clk __omap4_data dpll_usb_clkdcoldo_ck = {
.name = "dpll_usb_clkdcoldo_ck",
.parent = &dpll_usb_ck,
.ops = &clkops_null,
@@ -953,7 +953,7 @@ static const struct clksel dpll_usb_m2_div[] = {
{ .parent = NULL },
};
-static struct clk dpll_usb_m2_ck = {
+static struct clk __omap4_data dpll_usb_m2_ck = {
.name = "dpll_usb_m2_ck",
.parent = &dpll_usb_ck,
.clksel = dpll_usb_m2_div,
@@ -971,7 +971,7 @@ static const struct clksel ducati_clk_mux_sel[] = {
{ .parent = NULL },
};
-static struct clk ducati_clk_mux_ck = {
+static struct clk __omap4_data ducati_clk_mux_ck = {
.name = "ducati_clk_mux_ck",
.parent = &div_core_ck,
.clksel = ducati_clk_mux_sel,
@@ -982,21 +982,21 @@ static struct clk ducati_clk_mux_ck = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk func_12m_fclk = {
+static struct clk __omap4_data func_12m_fclk = {
.name = "func_12m_fclk",
.parent = &dpll_per_m2x2_ck,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk func_24m_clk = {
+static struct clk __omap4_data func_24m_clk = {
.name = "func_24m_clk",
.parent = &dpll_per_m2_ck,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk func_24mc_fclk = {
+static struct clk __omap4_data func_24mc_fclk = {
.name = "func_24mc_fclk",
.parent = &dpll_per_m2x2_ck,
.ops = &clkops_null,
@@ -1014,7 +1014,7 @@ static const struct clksel func_48m_fclk_div[] = {
{ .parent = NULL },
};
-static struct clk func_48m_fclk = {
+static struct clk __omap4_data func_48m_fclk = {
.name = "func_48m_fclk",
.parent = &dpll_per_m2x2_ck,
.clksel = func_48m_fclk_div,
@@ -1026,7 +1026,7 @@ static struct clk func_48m_fclk = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk func_48mc_fclk = {
+static struct clk __omap4_data func_48mc_fclk = {
.name = "func_48mc_fclk",
.parent = &dpll_per_m2x2_ck,
.ops = &clkops_null,
@@ -1044,7 +1044,7 @@ static const struct clksel func_64m_fclk_div[] = {
{ .parent = NULL },
};
-static struct clk func_64m_fclk = {
+static struct clk __omap4_data func_64m_fclk = {
.name = "func_64m_fclk",
.parent = &dpll_per_m4_ck,
.clksel = func_64m_fclk_div,
@@ -1061,7 +1061,7 @@ static const struct clksel func_96m_fclk_div[] = {
{ .parent = NULL },
};
-static struct clk func_96m_fclk = {
+static struct clk __omap4_data func_96m_fclk = {
.name = "func_96m_fclk",
.parent = &dpll_per_m2x2_ck,
.clksel = func_96m_fclk_div,
@@ -1079,7 +1079,7 @@ static const struct clksel hsmmc6_fclk_sel[] = {
{ .parent = NULL },
};
-static struct clk hsmmc6_fclk = {
+static struct clk __omap4_data hsmmc6_fclk = {
.name = "hsmmc6_fclk",
.parent = &func_64m_fclk,
.ops = &clkops_null,
@@ -1097,7 +1097,7 @@ static const struct clksel init_60m_fclk_div[] = {
{ .parent = NULL },
};
-static struct clk init_60m_fclk = {
+static struct clk __omap4_data init_60m_fclk = {
.name = "init_60m_fclk",
.parent = &dpll_usb_m2_ck,
.clksel = init_60m_fclk_div,
@@ -1114,7 +1114,7 @@ static const struct clksel l3_div_div[] = {
{ .parent = NULL },
};
-static struct clk l3_div_ck = {
+static struct clk __omap4_data l3_div_ck = {
.name = "l3_div_ck",
.parent = &div_core_ck,
.clksel = l3_div_div,
@@ -1131,7 +1131,7 @@ static const struct clksel l4_div_div[] = {
{ .parent = NULL },
};
-static struct clk l4_div_ck = {
+static struct clk __omap4_data l4_div_ck = {
.name = "l4_div_ck",
.parent = &l3_div_ck,
.clksel = l4_div_div,
@@ -1143,7 +1143,7 @@ static struct clk l4_div_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk lp_clk_div_ck = {
+static struct clk __omap4_data lp_clk_div_ck = {
.name = "lp_clk_div_ck",
.parent = &dpll_abe_m2x2_ck,
.ops = &clkops_null,
@@ -1156,7 +1156,7 @@ static const struct clksel l4_wkup_clk_mux_sel[] = {
{ .parent = NULL },
};
-static struct clk l4_wkup_clk_mux_ck = {
+static struct clk __omap4_data l4_wkup_clk_mux_ck = {
.name = "l4_wkup_clk_mux_ck",
.parent = &sys_clkin_ck,
.clksel = l4_wkup_clk_mux_sel,
@@ -1172,7 +1172,7 @@ static const struct clksel per_abe_nc_fclk_div[] = {
{ .parent = NULL },
};
-static struct clk per_abe_nc_fclk = {
+static struct clk __omap4_data per_abe_nc_fclk = {
.name = "per_abe_nc_fclk",
.parent = &dpll_abe_m2_ck,
.clksel = per_abe_nc_fclk_div,
@@ -1190,28 +1190,28 @@ static const struct clksel mcasp2_fclk_sel[] = {
{ .parent = NULL },
};
-static struct clk mcasp2_fclk = {
+static struct clk __omap4_data mcasp2_fclk = {
.name = "mcasp2_fclk",
.parent = &func_96m_fclk,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk mcasp3_fclk = {
+static struct clk __omap4_data mcasp3_fclk = {
.name = "mcasp3_fclk",
.parent = &func_96m_fclk,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk ocp_abe_iclk = {
+static struct clk __omap4_data ocp_abe_iclk = {
.name = "ocp_abe_iclk",
.parent = &aess_fclk,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk per_abe_24m_fclk = {
+static struct clk __omap4_data per_abe_24m_fclk = {
.name = "per_abe_24m_fclk",
.parent = &dpll_abe_m2_ck,
.ops = &clkops_null,
@@ -1225,14 +1225,14 @@ static const struct clksel pmd_stm_clock_mux_sel[] = {
{ .parent = NULL },
};
-static struct clk pmd_stm_clock_mux_ck = {
+static struct clk __omap4_data pmd_stm_clock_mux_ck = {
.name = "pmd_stm_clock_mux_ck",
.parent = &sys_clkin_ck,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
-static struct clk pmd_trace_clk_mux_ck = {
+static struct clk __omap4_data pmd_trace_clk_mux_ck = {
.name = "pmd_trace_clk_mux_ck",
.parent = &sys_clkin_ck,
.ops = &clkops_null,
@@ -1244,7 +1244,7 @@ static const struct clksel syc_clk_div_div[] = {
{ .parent = NULL },
};
-static struct clk syc_clk_div_ck = {
+static struct clk __omap4_data syc_clk_div_ck = {
.name = "syc_clk_div_ck",
.parent = &sys_clkin_ck,
.clksel = syc_clk_div_div,
@@ -1258,7 +1258,7 @@ static struct clk syc_clk_div_ck = {
/* Leaf clocks controlled by modules */
-static struct clk aes1_fck = {
+static struct clk __omap4_data aes1_fck = {
.name = "aes1_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4SEC_AES1_CLKCTRL,
@@ -1268,7 +1268,7 @@ static struct clk aes1_fck = {
.recalc = &followparent_recalc,
};
-static struct clk aes2_fck = {
+static struct clk __omap4_data aes2_fck = {
.name = "aes2_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4SEC_AES2_CLKCTRL,
@@ -1278,7 +1278,7 @@ static struct clk aes2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk aess_fck = {
+static struct clk __omap4_data aess_fck = {
.name = "aess_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL,
@@ -1288,7 +1288,7 @@ static struct clk aess_fck = {
.recalc = &followparent_recalc,
};
-static struct clk bandgap_fclk = {
+static struct clk __omap4_data bandgap_fclk = {
.name = "bandgap_fclk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL,
@@ -1298,7 +1298,7 @@ static struct clk bandgap_fclk = {
.recalc = &followparent_recalc,
};
-static struct clk des3des_fck = {
+static struct clk __omap4_data des3des_fck = {
.name = "des3des_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4SEC_DES3DES_CLKCTRL,
@@ -1315,7 +1315,7 @@ static const struct clksel dmic_sync_mux_sel[] = {
{ .parent = NULL },
};
-static struct clk dmic_sync_mux_ck = {
+static struct clk __omap4_data dmic_sync_mux_ck = {
.name = "dmic_sync_mux_ck",
.parent = &abe_24m_fclk,
.clksel = dmic_sync_mux_sel,
@@ -1334,7 +1334,7 @@ static const struct clksel func_dmic_abe_gfclk_sel[] = {
};
/* Merged func_dmic_abe_gfclk into dmic */
-static struct clk dmic_fck = {
+static struct clk __omap4_data dmic_fck = {
.name = "dmic_fck",
.parent = &dmic_sync_mux_ck,
.clksel = func_dmic_abe_gfclk_sel,
@@ -1348,7 +1348,7 @@ static struct clk dmic_fck = {
.clkdm_name = "abe_clkdm",
};
-static struct clk dsp_fck = {
+static struct clk __omap4_data dsp_fck = {
.name = "dsp_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL,
@@ -1358,7 +1358,7 @@ static struct clk dsp_fck = {
.recalc = &followparent_recalc,
};
-static struct clk dss_sys_clk = {
+static struct clk __omap4_data dss_sys_clk = {
.name = "dss_sys_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
@@ -1368,7 +1368,7 @@ static struct clk dss_sys_clk = {
.recalc = &followparent_recalc,
};
-static struct clk dss_tv_clk = {
+static struct clk __omap4_data dss_tv_clk = {
.name = "dss_tv_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
@@ -1378,7 +1378,7 @@ static struct clk dss_tv_clk = {
.recalc = &followparent_recalc,
};
-static struct clk dss_dss_clk = {
+static struct clk __omap4_data dss_dss_clk = {
.name = "dss_dss_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
@@ -1388,7 +1388,7 @@ static struct clk dss_dss_clk = {
.recalc = &followparent_recalc,
};
-static struct clk dss_48mhz_clk = {
+static struct clk __omap4_data dss_48mhz_clk = {
.name = "dss_48mhz_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
@@ -1398,7 +1398,7 @@ static struct clk dss_48mhz_clk = {
.recalc = &followparent_recalc,
};
-static struct clk dss_fck = {
+static struct clk __omap4_data dss_fck = {
.name = "dss_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
@@ -1408,7 +1408,7 @@ static struct clk dss_fck = {
.recalc = &followparent_recalc,
};
-static struct clk efuse_ctrl_cust_fck = {
+static struct clk __omap4_data efuse_ctrl_cust_fck = {
.name = "efuse_ctrl_cust_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL,
@@ -1418,7 +1418,7 @@ static struct clk efuse_ctrl_cust_fck = {
.recalc = &followparent_recalc,
};
-static struct clk emif1_fck = {
+static struct clk __omap4_data emif1_fck = {
.name = "emif1_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL,
@@ -1429,7 +1429,7 @@ static struct clk emif1_fck = {
.recalc = &followparent_recalc,
};
-static struct clk emif2_fck = {
+static struct clk __omap4_data emif2_fck = {
.name = "emif2_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL,
@@ -1446,7 +1446,7 @@ static const struct clksel fdif_fclk_div[] = {
};
/* Merged fdif_fclk into fdif */
-static struct clk fdif_fck = {
+static struct clk __omap4_data fdif_fck = {
.name = "fdif_fck",
.parent = &dpll_per_m4_ck,
.clksel = fdif_fclk_div,
@@ -1461,7 +1461,7 @@ static struct clk fdif_fck = {
.clkdm_name = "iss_clkdm",
};
-static struct clk fpka_fck = {
+static struct clk __omap4_data fpka_fck = {
.name = "fpka_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4SEC_PKAEIP29_CLKCTRL,
@@ -1471,7 +1471,7 @@ static struct clk fpka_fck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio1_dbclk = {
+static struct clk __omap4_data gpio1_dbclk = {
.name = "gpio1_dbclk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_WKUP_GPIO1_CLKCTRL,
@@ -1481,7 +1481,7 @@ static struct clk gpio1_dbclk = {
.recalc = &followparent_recalc,
};
-static struct clk gpio1_ick = {
+static struct clk __omap4_data gpio1_ick = {
.name = "gpio1_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_WKUP_GPIO1_CLKCTRL,
@@ -1491,7 +1491,7 @@ static struct clk gpio1_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpio2_dbclk = {
+static struct clk __omap4_data gpio2_dbclk = {
.name = "gpio2_dbclk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_GPIO2_CLKCTRL,
@@ -1501,7 +1501,7 @@ static struct clk gpio2_dbclk = {
.recalc = &followparent_recalc,
};
-static struct clk gpio2_ick = {
+static struct clk __omap4_data gpio2_ick = {
.name = "gpio2_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_GPIO2_CLKCTRL,
@@ -1511,7 +1511,7 @@ static struct clk gpio2_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpio3_dbclk = {
+static struct clk __omap4_data gpio3_dbclk = {
.name = "gpio3_dbclk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_GPIO3_CLKCTRL,
@@ -1521,7 +1521,7 @@ static struct clk gpio3_dbclk = {
.recalc = &followparent_recalc,
};
-static struct clk gpio3_ick = {
+static struct clk __omap4_data gpio3_ick = {
.name = "gpio3_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_GPIO3_CLKCTRL,
@@ -1531,7 +1531,7 @@ static struct clk gpio3_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpio4_dbclk = {
+static struct clk __omap4_data gpio4_dbclk = {
.name = "gpio4_dbclk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_GPIO4_CLKCTRL,
@@ -1541,7 +1541,7 @@ static struct clk gpio4_dbclk = {
.recalc = &followparent_recalc,
};
-static struct clk gpio4_ick = {
+static struct clk __omap4_data gpio4_ick = {
.name = "gpio4_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_GPIO4_CLKCTRL,
@@ -1551,7 +1551,7 @@ static struct clk gpio4_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpio5_dbclk = {
+static struct clk __omap4_data gpio5_dbclk = {
.name = "gpio5_dbclk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_GPIO5_CLKCTRL,
@@ -1561,7 +1561,7 @@ static struct clk gpio5_dbclk = {
.recalc = &followparent_recalc,
};
-static struct clk gpio5_ick = {
+static struct clk __omap4_data gpio5_ick = {
.name = "gpio5_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_GPIO5_CLKCTRL,
@@ -1571,7 +1571,7 @@ static struct clk gpio5_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpio6_dbclk = {
+static struct clk __omap4_data gpio6_dbclk = {
.name = "gpio6_dbclk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_GPIO6_CLKCTRL,
@@ -1581,7 +1581,7 @@ static struct clk gpio6_dbclk = {
.recalc = &followparent_recalc,
};
-static struct clk gpio6_ick = {
+static struct clk __omap4_data gpio6_ick = {
.name = "gpio6_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_GPIO6_CLKCTRL,
@@ -1591,7 +1591,7 @@ static struct clk gpio6_ick = {
.recalc = &followparent_recalc,
};
-static struct clk gpmc_ick = {
+static struct clk __omap4_data gpmc_ick = {
.name = "gpmc_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3_2_GPMC_CLKCTRL,
@@ -1608,7 +1608,7 @@ static const struct clksel sgx_clk_mux_sel[] = {
};
/* Merged sgx_clk_mux into gpu */
-static struct clk gpu_fck = {
+static struct clk __omap4_data gpu_fck = {
.name = "gpu_fck",
.parent = &dpll_core_m7_ck,
.clksel = sgx_clk_mux_sel,
@@ -1622,7 +1622,7 @@ static struct clk gpu_fck = {
.clkdm_name = "l3_gfx_clkdm",
};
-static struct clk hdq1w_fck = {
+static struct clk __omap4_data hdq1w_fck = {
.name = "hdq1w_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_HDQ1W_CLKCTRL,
@@ -1638,7 +1638,7 @@ static const struct clksel hsi_fclk_div[] = {
};
/* Merged hsi_fclk into hsi */
-static struct clk hsi_fck = {
+static struct clk __omap4_data hsi_fck = {
.name = "hsi_fck",
.parent = &dpll_per_m2x2_ck,
.clksel = hsi_fclk_div,
@@ -1653,7 +1653,7 @@ static struct clk hsi_fck = {
.clkdm_name = "l3_init_clkdm",
};
-static struct clk i2c1_fck = {
+static struct clk __omap4_data i2c1_fck = {
.name = "i2c1_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_I2C1_CLKCTRL,
@@ -1663,7 +1663,7 @@ static struct clk i2c1_fck = {
.recalc = &followparent_recalc,
};
-static struct clk i2c2_fck = {
+static struct clk __omap4_data i2c2_fck = {
.name = "i2c2_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_I2C2_CLKCTRL,
@@ -1673,7 +1673,7 @@ static struct clk i2c2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk i2c3_fck = {
+static struct clk __omap4_data i2c3_fck = {
.name = "i2c3_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_I2C3_CLKCTRL,
@@ -1683,7 +1683,7 @@ static struct clk i2c3_fck = {
.recalc = &followparent_recalc,
};
-static struct clk i2c4_fck = {
+static struct clk __omap4_data i2c4_fck = {
.name = "i2c4_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_I2C4_CLKCTRL,
@@ -1693,7 +1693,7 @@ static struct clk i2c4_fck = {
.recalc = &followparent_recalc,
};
-static struct clk ipu_fck = {
+static struct clk __omap4_data ipu_fck = {
.name = "ipu_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL,
@@ -1703,7 +1703,7 @@ static struct clk ipu_fck = {
.recalc = &followparent_recalc,
};
-static struct clk iss_ctrlclk = {
+static struct clk __omap4_data iss_ctrlclk = {
.name = "iss_ctrlclk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_CAM_ISS_CLKCTRL,
@@ -1713,7 +1713,7 @@ static struct clk iss_ctrlclk = {
.recalc = &followparent_recalc,
};
-static struct clk iss_fck = {
+static struct clk __omap4_data iss_fck = {
.name = "iss_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_CAM_ISS_CLKCTRL,
@@ -1723,7 +1723,7 @@ static struct clk iss_fck = {
.recalc = &followparent_recalc,
};
-static struct clk iva_fck = {
+static struct clk __omap4_data iva_fck = {
.name = "iva_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_IVAHD_IVAHD_CLKCTRL,
@@ -1733,7 +1733,7 @@ static struct clk iva_fck = {
.recalc = &followparent_recalc,
};
-static struct clk kbd_fck = {
+static struct clk __omap4_data kbd_fck = {
.name = "kbd_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL,
@@ -1743,7 +1743,7 @@ static struct clk kbd_fck = {
.recalc = &followparent_recalc,
};
-static struct clk l3_instr_ick = {
+static struct clk __omap4_data l3_instr_ick = {
.name = "l3_instr_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL,
@@ -1753,7 +1753,7 @@ static struct clk l3_instr_ick = {
.recalc = &followparent_recalc,
};
-static struct clk l3_main_3_ick = {
+static struct clk __omap4_data l3_main_3_ick = {
.name = "l3_main_3_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL,
@@ -1763,7 +1763,7 @@ static struct clk l3_main_3_ick = {
.recalc = &followparent_recalc,
};
-static struct clk mcasp_sync_mux_ck = {
+static struct clk __omap4_data mcasp_sync_mux_ck = {
.name = "mcasp_sync_mux_ck",
.parent = &abe_24m_fclk,
.clksel = dmic_sync_mux_sel,
@@ -1782,7 +1782,7 @@ static const struct clksel func_mcasp_abe_gfclk_sel[] = {
};
/* Merged func_mcasp_abe_gfclk into mcasp */
-static struct clk mcasp_fck = {
+static struct clk __omap4_data mcasp_fck = {
.name = "mcasp_fck",
.parent = &mcasp_sync_mux_ck,
.clksel = func_mcasp_abe_gfclk_sel,
@@ -1796,7 +1796,7 @@ static struct clk mcasp_fck = {
.clkdm_name = "abe_clkdm",
};
-static struct clk mcbsp1_sync_mux_ck = {
+static struct clk __omap4_data mcbsp1_sync_mux_ck = {
.name = "mcbsp1_sync_mux_ck",
.parent = &abe_24m_fclk,
.clksel = dmic_sync_mux_sel,
@@ -1815,7 +1815,7 @@ static const struct clksel func_mcbsp1_gfclk_sel[] = {
};
/* Merged func_mcbsp1_gfclk into mcbsp1 */
-static struct clk mcbsp1_fck = {
+static struct clk __omap4_data mcbsp1_fck = {
.name = "mcbsp1_fck",
.parent = &mcbsp1_sync_mux_ck,
.clksel = func_mcbsp1_gfclk_sel,
@@ -1829,7 +1829,7 @@ static struct clk mcbsp1_fck = {
.clkdm_name = "abe_clkdm",
};
-static struct clk mcbsp2_sync_mux_ck = {
+static struct clk __omap4_data mcbsp2_sync_mux_ck = {
.name = "mcbsp2_sync_mux_ck",
.parent = &abe_24m_fclk,
.clksel = dmic_sync_mux_sel,
@@ -1848,7 +1848,7 @@ static const struct clksel func_mcbsp2_gfclk_sel[] = {
};
/* Merged func_mcbsp2_gfclk into mcbsp2 */
-static struct clk mcbsp2_fck = {
+static struct clk __omap4_data mcbsp2_fck = {
.name = "mcbsp2_fck",
.parent = &mcbsp2_sync_mux_ck,
.clksel = func_mcbsp2_gfclk_sel,
@@ -1862,7 +1862,7 @@ static struct clk mcbsp2_fck = {
.clkdm_name = "abe_clkdm",
};
-static struct clk mcbsp3_sync_mux_ck = {
+static struct clk __omap4_data mcbsp3_sync_mux_ck = {
.name = "mcbsp3_sync_mux_ck",
.parent = &abe_24m_fclk,
.clksel = dmic_sync_mux_sel,
@@ -1881,7 +1881,7 @@ static const struct clksel func_mcbsp3_gfclk_sel[] = {
};
/* Merged func_mcbsp3_gfclk into mcbsp3 */
-static struct clk mcbsp3_fck = {
+static struct clk __omap4_data mcbsp3_fck = {
.name = "mcbsp3_fck",
.parent = &mcbsp3_sync_mux_ck,
.clksel = func_mcbsp3_gfclk_sel,
@@ -1895,7 +1895,7 @@ static struct clk mcbsp3_fck = {
.clkdm_name = "abe_clkdm",
};
-static struct clk mcbsp4_sync_mux_ck = {
+static struct clk __omap4_data mcbsp4_sync_mux_ck = {
.name = "mcbsp4_sync_mux_ck",
.parent = &func_96m_fclk,
.clksel = mcasp2_fclk_sel,
@@ -1913,7 +1913,7 @@ static const struct clksel per_mcbsp4_gfclk_sel[] = {
};
/* Merged per_mcbsp4_gfclk into mcbsp4 */
-static struct clk mcbsp4_fck = {
+static struct clk __omap4_data mcbsp4_fck = {
.name = "mcbsp4_fck",
.parent = &mcbsp4_sync_mux_ck,
.clksel = per_mcbsp4_gfclk_sel,
@@ -1927,7 +1927,7 @@ static struct clk mcbsp4_fck = {
.clkdm_name = "l4_per_clkdm",
};
-static struct clk mcpdm_fck = {
+static struct clk __omap4_data mcpdm_fck = {
.name = "mcpdm_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL,
@@ -1937,7 +1937,7 @@ static struct clk mcpdm_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi1_fck = {
+static struct clk __omap4_data mcspi1_fck = {
.name = "mcspi1_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_MCSPI1_CLKCTRL,
@@ -1947,7 +1947,7 @@ static struct clk mcspi1_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi2_fck = {
+static struct clk __omap4_data mcspi2_fck = {
.name = "mcspi2_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_MCSPI2_CLKCTRL,
@@ -1957,7 +1957,7 @@ static struct clk mcspi2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi3_fck = {
+static struct clk __omap4_data mcspi3_fck = {
.name = "mcspi3_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_MCSPI3_CLKCTRL,
@@ -1967,7 +1967,7 @@ static struct clk mcspi3_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mcspi4_fck = {
+static struct clk __omap4_data mcspi4_fck = {
.name = "mcspi4_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_MCSPI4_CLKCTRL,
@@ -1978,7 +1978,7 @@ static struct clk mcspi4_fck = {
};
/* Merged hsmmc1_fclk into mmc1 */
-static struct clk mmc1_fck = {
+static struct clk __omap4_data mmc1_fck = {
.name = "mmc1_fck",
.parent = &func_64m_fclk,
.clksel = hsmmc6_fclk_sel,
@@ -1993,7 +1993,7 @@ static struct clk mmc1_fck = {
};
/* Merged hsmmc2_fclk into mmc2 */
-static struct clk mmc2_fck = {
+static struct clk __omap4_data mmc2_fck = {
.name = "mmc2_fck",
.parent = &func_64m_fclk,
.clksel = hsmmc6_fclk_sel,
@@ -2007,7 +2007,7 @@ static struct clk mmc2_fck = {
.clkdm_name = "l3_init_clkdm",
};
-static struct clk mmc3_fck = {
+static struct clk __omap4_data mmc3_fck = {
.name = "mmc3_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL,
@@ -2017,7 +2017,7 @@ static struct clk mmc3_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mmc4_fck = {
+static struct clk __omap4_data mmc4_fck = {
.name = "mmc4_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL,
@@ -2027,7 +2027,7 @@ static struct clk mmc4_fck = {
.recalc = &followparent_recalc,
};
-static struct clk mmc5_fck = {
+static struct clk __omap4_data mmc5_fck = {
.name = "mmc5_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL,
@@ -2037,7 +2037,7 @@ static struct clk mmc5_fck = {
.recalc = &followparent_recalc,
};
-static struct clk ocp2scp_usb_phy_phy_48m = {
+static struct clk __omap4_data ocp2scp_usb_phy_phy_48m = {
.name = "ocp2scp_usb_phy_phy_48m",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL,
@@ -2047,7 +2047,7 @@ static struct clk ocp2scp_usb_phy_phy_48m = {
.recalc = &followparent_recalc,
};
-static struct clk ocp2scp_usb_phy_ick = {
+static struct clk __omap4_data ocp2scp_usb_phy_ick = {
.name = "ocp2scp_usb_phy_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL,
@@ -2057,7 +2057,7 @@ static struct clk ocp2scp_usb_phy_ick = {
.recalc = &followparent_recalc,
};
-static struct clk ocp_wp_noc_ick = {
+static struct clk __omap4_data ocp_wp_noc_ick = {
.name = "ocp_wp_noc_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL,
@@ -2067,7 +2067,7 @@ static struct clk ocp_wp_noc_ick = {
.recalc = &followparent_recalc,
};
-static struct clk rng_ick = {
+static struct clk __omap4_data rng_ick = {
.name = "rng_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4SEC_RNG_CLKCTRL,
@@ -2077,7 +2077,7 @@ static struct clk rng_ick = {
.recalc = &followparent_recalc,
};
-static struct clk sha2md5_fck = {
+static struct clk __omap4_data sha2md5_fck = {
.name = "sha2md5_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL,
@@ -2087,7 +2087,7 @@ static struct clk sha2md5_fck = {
.recalc = &followparent_recalc,
};
-static struct clk sl2if_ick = {
+static struct clk __omap4_data sl2if_ick = {
.name = "sl2if_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_IVAHD_SL2_CLKCTRL,
@@ -2097,7 +2097,7 @@ static struct clk sl2if_ick = {
.recalc = &followparent_recalc,
};
-static struct clk slimbus1_fclk_1 = {
+static struct clk __omap4_data slimbus1_fclk_1 = {
.name = "slimbus1_fclk_1",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL,
@@ -2107,7 +2107,7 @@ static struct clk slimbus1_fclk_1 = {
.recalc = &followparent_recalc,
};
-static struct clk slimbus1_fclk_0 = {
+static struct clk __omap4_data slimbus1_fclk_0 = {
.name = "slimbus1_fclk_0",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL,
@@ -2117,7 +2117,7 @@ static struct clk slimbus1_fclk_0 = {
.recalc = &followparent_recalc,
};
-static struct clk slimbus1_fclk_2 = {
+static struct clk __omap4_data slimbus1_fclk_2 = {
.name = "slimbus1_fclk_2",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL,
@@ -2127,7 +2127,7 @@ static struct clk slimbus1_fclk_2 = {
.recalc = &followparent_recalc,
};
-static struct clk slimbus1_slimbus_clk = {
+static struct clk __omap4_data slimbus1_slimbus_clk = {
.name = "slimbus1_slimbus_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL,
@@ -2137,7 +2137,7 @@ static struct clk slimbus1_slimbus_clk = {
.recalc = &followparent_recalc,
};
-static struct clk slimbus1_fck = {
+static struct clk __omap4_data slimbus1_fck = {
.name = "slimbus1_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL,
@@ -2147,7 +2147,7 @@ static struct clk slimbus1_fck = {
.recalc = &followparent_recalc,
};
-static struct clk slimbus2_fclk_1 = {
+static struct clk __omap4_data slimbus2_fclk_1 = {
.name = "slimbus2_fclk_1",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL,
@@ -2157,7 +2157,7 @@ static struct clk slimbus2_fclk_1 = {
.recalc = &followparent_recalc,
};
-static struct clk slimbus2_fclk_0 = {
+static struct clk __omap4_data slimbus2_fclk_0 = {
.name = "slimbus2_fclk_0",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL,
@@ -2167,7 +2167,7 @@ static struct clk slimbus2_fclk_0 = {
.recalc = &followparent_recalc,
};
-static struct clk slimbus2_slimbus_clk = {
+static struct clk __omap4_data slimbus2_slimbus_clk = {
.name = "slimbus2_slimbus_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL,
@@ -2177,7 +2177,7 @@ static struct clk slimbus2_slimbus_clk = {
.recalc = &followparent_recalc,
};
-static struct clk slimbus2_fck = {
+static struct clk __omap4_data slimbus2_fck = {
.name = "slimbus2_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL,
@@ -2187,7 +2187,7 @@ static struct clk slimbus2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk smartreflex_core_fck = {
+static struct clk __omap4_data smartreflex_core_fck = {
.name = "smartreflex_core_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_ALWON_SR_CORE_CLKCTRL,
@@ -2197,7 +2197,7 @@ static struct clk smartreflex_core_fck = {
.recalc = &followparent_recalc,
};
-static struct clk smartreflex_iva_fck = {
+static struct clk __omap4_data smartreflex_iva_fck = {
.name = "smartreflex_iva_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_ALWON_SR_IVA_CLKCTRL,
@@ -2207,7 +2207,7 @@ static struct clk smartreflex_iva_fck = {
.recalc = &followparent_recalc,
};
-static struct clk smartreflex_mpu_fck = {
+static struct clk __omap4_data smartreflex_mpu_fck = {
.name = "smartreflex_mpu_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_ALWON_SR_MPU_CLKCTRL,
@@ -2218,7 +2218,7 @@ static struct clk smartreflex_mpu_fck = {
};
/* Merged dmt1_clk_mux into timer1 */
-static struct clk timer1_fck = {
+static struct clk __omap4_data timer1_fck = {
.name = "timer1_fck",
.parent = &sys_clkin_ck,
.clksel = abe_dpll_bypass_clk_mux_sel,
@@ -2233,7 +2233,7 @@ static struct clk timer1_fck = {
};
/* Merged cm2_dm10_mux into timer10 */
-static struct clk timer10_fck = {
+static struct clk __omap4_data timer10_fck = {
.name = "timer10_fck",
.parent = &sys_clkin_ck,
.clksel = abe_dpll_bypass_clk_mux_sel,
@@ -2248,7 +2248,7 @@ static struct clk timer10_fck = {
};
/* Merged cm2_dm11_mux into timer11 */
-static struct clk timer11_fck = {
+static struct clk __omap4_data timer11_fck = {
.name = "timer11_fck",
.parent = &sys_clkin_ck,
.clksel = abe_dpll_bypass_clk_mux_sel,
@@ -2263,7 +2263,7 @@ static struct clk timer11_fck = {
};
/* Merged cm2_dm2_mux into timer2 */
-static struct clk timer2_fck = {
+static struct clk __omap4_data timer2_fck = {
.name = "timer2_fck",
.parent = &sys_clkin_ck,
.clksel = abe_dpll_bypass_clk_mux_sel,
@@ -2278,7 +2278,7 @@ static struct clk timer2_fck = {
};
/* Merged cm2_dm3_mux into timer3 */
-static struct clk timer3_fck = {
+static struct clk __omap4_data timer3_fck = {
.name = "timer3_fck",
.parent = &sys_clkin_ck,
.clksel = abe_dpll_bypass_clk_mux_sel,
@@ -2293,7 +2293,7 @@ static struct clk timer3_fck = {
};
/* Merged cm2_dm4_mux into timer4 */
-static struct clk timer4_fck = {
+static struct clk __omap4_data timer4_fck = {
.name = "timer4_fck",
.parent = &sys_clkin_ck,
.clksel = abe_dpll_bypass_clk_mux_sel,
@@ -2314,7 +2314,7 @@ static const struct clksel timer5_sync_mux_sel[] = {
};
/* Merged timer5_sync_mux into timer5 */
-static struct clk timer5_fck = {
+static struct clk __omap4_data timer5_fck = {
.name = "timer5_fck",
.parent = &syc_clk_div_ck,
.clksel = timer5_sync_mux_sel,
@@ -2329,7 +2329,7 @@ static struct clk timer5_fck = {
};
/* Merged timer6_sync_mux into timer6 */
-static struct clk timer6_fck = {
+static struct clk __omap4_data timer6_fck = {
.name = "timer6_fck",
.parent = &syc_clk_div_ck,
.clksel = timer5_sync_mux_sel,
@@ -2344,7 +2344,7 @@ static struct clk timer6_fck = {
};
/* Merged timer7_sync_mux into timer7 */
-static struct clk timer7_fck = {
+static struct clk __omap4_data timer7_fck = {
.name = "timer7_fck",
.parent = &syc_clk_div_ck,
.clksel = timer5_sync_mux_sel,
@@ -2359,7 +2359,7 @@ static struct clk timer7_fck = {
};
/* Merged timer8_sync_mux into timer8 */
-static struct clk timer8_fck = {
+static struct clk __omap4_data timer8_fck = {
.name = "timer8_fck",
.parent = &syc_clk_div_ck,
.clksel = timer5_sync_mux_sel,
@@ -2374,7 +2374,7 @@ static struct clk timer8_fck = {
};
/* Merged cm2_dm9_mux into timer9 */
-static struct clk timer9_fck = {
+static struct clk __omap4_data timer9_fck = {
.name = "timer9_fck",
.parent = &sys_clkin_ck,
.clksel = abe_dpll_bypass_clk_mux_sel,
@@ -2388,7 +2388,7 @@ static struct clk timer9_fck = {
.clkdm_name = "l4_per_clkdm",
};
-static struct clk uart1_fck = {
+static struct clk __omap4_data uart1_fck = {
.name = "uart1_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_UART1_CLKCTRL,
@@ -2398,7 +2398,7 @@ static struct clk uart1_fck = {
.recalc = &followparent_recalc,
};
-static struct clk uart2_fck = {
+static struct clk __omap4_data uart2_fck = {
.name = "uart2_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_UART2_CLKCTRL,
@@ -2408,7 +2408,7 @@ static struct clk uart2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk uart3_fck = {
+static struct clk __omap4_data uart3_fck = {
.name = "uart3_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_UART3_CLKCTRL,
@@ -2418,7 +2418,7 @@ static struct clk uart3_fck = {
.recalc = &followparent_recalc,
};
-static struct clk uart4_fck = {
+static struct clk __omap4_data uart4_fck = {
.name = "uart4_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L4PER_UART4_CLKCTRL,
@@ -2428,7 +2428,7 @@ static struct clk uart4_fck = {
.recalc = &followparent_recalc,
};
-static struct clk usb_host_fs_fck = {
+static struct clk __omap4_data usb_host_fs_fck = {
.name = "usb_host_fs_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_HOST_FS_CLKCTRL,
@@ -2438,7 +2438,7 @@ static struct clk usb_host_fs_fck = {
.recalc = &followparent_recalc,
};
-static struct clk usb_host_hs_utmi_p3_clk = {
+static struct clk __omap4_data usb_host_hs_utmi_p3_clk = {
.name = "usb_host_hs_utmi_p3_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL,
@@ -2448,7 +2448,7 @@ static struct clk usb_host_hs_utmi_p3_clk = {
.recalc = &followparent_recalc,
};
-static struct clk usb_host_hs_hsic60m_p1_clk = {
+static struct clk __omap4_data usb_host_hs_hsic60m_p1_clk = {
.name = "usb_host_hs_hsic60m_p1_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL,
@@ -2458,7 +2458,7 @@ static struct clk usb_host_hs_hsic60m_p1_clk = {
.recalc = &followparent_recalc,
};
-static struct clk usb_host_hs_hsic60m_p2_clk = {
+static struct clk __omap4_data usb_host_hs_hsic60m_p2_clk = {
.name = "usb_host_hs_hsic60m_p2_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL,
@@ -2474,7 +2474,7 @@ static const struct clksel utmi_p1_gfclk_sel[] = {
{ .parent = NULL },
};
-static struct clk utmi_p1_gfclk = {
+static struct clk __omap4_data utmi_p1_gfclk = {
.name = "utmi_p1_gfclk",
.parent = &init_60m_fclk,
.clksel = utmi_p1_gfclk_sel,
@@ -2485,7 +2485,7 @@ static struct clk utmi_p1_gfclk = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk usb_host_hs_utmi_p1_clk = {
+static struct clk __omap4_data usb_host_hs_utmi_p1_clk = {
.name = "usb_host_hs_utmi_p1_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL,
@@ -2501,7 +2501,7 @@ static const struct clksel utmi_p2_gfclk_sel[] = {
{ .parent = NULL },
};
-static struct clk utmi_p2_gfclk = {
+static struct clk __omap4_data utmi_p2_gfclk = {
.name = "utmi_p2_gfclk",
.parent = &init_60m_fclk,
.clksel = utmi_p2_gfclk_sel,
@@ -2512,7 +2512,7 @@ static struct clk utmi_p2_gfclk = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk usb_host_hs_utmi_p2_clk = {
+static struct clk __omap4_data usb_host_hs_utmi_p2_clk = {
.name = "usb_host_hs_utmi_p2_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL,
@@ -2522,7 +2522,7 @@ static struct clk usb_host_hs_utmi_p2_clk = {
.recalc = &followparent_recalc,
};
-static struct clk usb_host_hs_hsic480m_p1_clk = {
+static struct clk __omap4_data usb_host_hs_hsic480m_p1_clk = {
.name = "usb_host_hs_hsic480m_p1_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL,
@@ -2532,7 +2532,7 @@ static struct clk usb_host_hs_hsic480m_p1_clk = {
.recalc = &followparent_recalc,
};
-static struct clk usb_host_hs_hsic480m_p2_clk = {
+static struct clk __omap4_data usb_host_hs_hsic480m_p2_clk = {
.name = "usb_host_hs_hsic480m_p2_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL,
@@ -2542,7 +2542,7 @@ static struct clk usb_host_hs_hsic480m_p2_clk = {
.recalc = &followparent_recalc,
};
-static struct clk usb_host_hs_func48mclk = {
+static struct clk __omap4_data usb_host_hs_func48mclk = {
.name = "usb_host_hs_func48mclk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL,
@@ -2552,7 +2552,7 @@ static struct clk usb_host_hs_func48mclk = {
.recalc = &followparent_recalc,
};
-static struct clk usb_host_hs_fck = {
+static struct clk __omap4_data usb_host_hs_fck = {
.name = "usb_host_hs_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL,
@@ -2568,7 +2568,7 @@ static const struct clksel otg_60m_gfclk_sel[] = {
{ .parent = NULL },
};
-static struct clk otg_60m_gfclk = {
+static struct clk __omap4_data otg_60m_gfclk = {
.name = "otg_60m_gfclk",
.parent = &utmi_phy_clkout_ck,
.clksel = otg_60m_gfclk_sel,
@@ -2579,7 +2579,7 @@ static struct clk otg_60m_gfclk = {
.recalc = &omap2_clksel_recalc,
};
-static struct clk usb_otg_hs_xclk = {
+static struct clk __omap4_data usb_otg_hs_xclk = {
.name = "usb_otg_hs_xclk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL,
@@ -2589,7 +2589,7 @@ static struct clk usb_otg_hs_xclk = {
.recalc = &followparent_recalc,
};
-static struct clk usb_otg_hs_ick = {
+static struct clk __omap4_data usb_otg_hs_ick = {
.name = "usb_otg_hs_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL,
@@ -2599,7 +2599,7 @@ static struct clk usb_otg_hs_ick = {
.recalc = &followparent_recalc,
};
-static struct clk usb_phy_cm_clk32k = {
+static struct clk __omap4_data usb_phy_cm_clk32k = {
.name = "usb_phy_cm_clk32k",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_ALWON_USBPHY_CLKCTRL,
@@ -2609,7 +2609,7 @@ static struct clk usb_phy_cm_clk32k = {
.recalc = &followparent_recalc,
};
-static struct clk usb_tll_hs_usb_ch2_clk = {
+static struct clk __omap4_data usb_tll_hs_usb_ch2_clk = {
.name = "usb_tll_hs_usb_ch2_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL,
@@ -2619,7 +2619,7 @@ static struct clk usb_tll_hs_usb_ch2_clk = {
.recalc = &followparent_recalc,
};
-static struct clk usb_tll_hs_usb_ch0_clk = {
+static struct clk __omap4_data usb_tll_hs_usb_ch0_clk = {
.name = "usb_tll_hs_usb_ch0_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL,
@@ -2629,7 +2629,7 @@ static struct clk usb_tll_hs_usb_ch0_clk = {
.recalc = &followparent_recalc,
};
-static struct clk usb_tll_hs_usb_ch1_clk = {
+static struct clk __omap4_data usb_tll_hs_usb_ch1_clk = {
.name = "usb_tll_hs_usb_ch1_clk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL,
@@ -2639,7 +2639,7 @@ static struct clk usb_tll_hs_usb_ch1_clk = {
.recalc = &followparent_recalc,
};
-static struct clk usb_tll_hs_ick = {
+static struct clk __omap4_data usb_tll_hs_ick = {
.name = "usb_tll_hs_ick",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL,
@@ -2660,7 +2660,7 @@ static const struct clksel usim_fclk_div[] = {
{ .parent = NULL },
};
-static struct clk usim_ck = {
+static struct clk __omap4_data usim_ck = {
.name = "usim_ck",
.parent = &dpll_per_m4_ck,
.clksel = usim_fclk_div,
@@ -2672,7 +2672,7 @@ static struct clk usim_ck = {
.set_rate = &omap2_clksel_set_rate,
};
-static struct clk usim_fclk = {
+static struct clk __omap4_data usim_fclk = {
.name = "usim_fclk",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_WKUP_USIM_CLKCTRL,
@@ -2682,7 +2682,7 @@ static struct clk usim_fclk = {
.recalc = &followparent_recalc,
};
-static struct clk usim_fck = {
+static struct clk __omap4_data usim_fck = {
.name = "usim_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_WKUP_USIM_CLKCTRL,
@@ -2692,7 +2692,7 @@ static struct clk usim_fck = {
.recalc = &followparent_recalc,
};
-static struct clk wd_timer2_fck = {
+static struct clk __omap4_data wd_timer2_fck = {
.name = "wd_timer2_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_WKUP_WDT2_CLKCTRL,
@@ -2702,7 +2702,7 @@ static struct clk wd_timer2_fck = {
.recalc = &followparent_recalc,
};
-static struct clk wd_timer3_fck = {
+static struct clk __omap4_data wd_timer3_fck = {
.name = "wd_timer3_fck",
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM1_ABE_WDT3_CLKCTRL,
@@ -2718,7 +2718,7 @@ static const struct clksel stm_clk_div_div[] = {
{ .parent = NULL },
};
-static struct clk stm_clk_div_ck = {
+static struct clk __omap4_data stm_clk_div_ck = {
.name = "stm_clk_div_ck",
.parent = &pmd_stm_clock_mux_ck,
.clksel = stm_clk_div_div,
@@ -2735,7 +2735,7 @@ static const struct clksel trace_clk_div_div[] = {
{ .parent = NULL },
};
-static struct clk trace_clk_div_ck = {
+static struct clk __omap4_data trace_clk_div_ck = {
.name = "trace_clk_div_ck",
.parent = &pmd_trace_clk_mux_ck,
.clksel = trace_clk_div_div,
@@ -2751,7 +2751,7 @@ static struct clk trace_clk_div_ck = {
* clkdev
*/
-static struct omap_clk omap44xx_clks[] = {
+static struct omap_clk __omap4_data omap44xx_clks[] = {
CLK(NULL, "extalt_clkin_ck", &extalt_clkin_ck, CK_443X),
CLK(NULL, "pad_clks_ck", &pad_clks_ck, CK_443X),
CLK(NULL, "pad_slimbus_core_clks_ck", &pad_slimbus_core_clks_ck, CK_443X),
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 0d5c6eb..76fc0fe 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -35,18 +35,18 @@
#define OMAP44XX_DMA_REQ_START 1
/* Backward references (IPs with Bus Master capability) */
-static struct omap_hwmod omap44xx_dmm_hwmod;
-static struct omap_hwmod omap44xx_emif_fw_hwmod;
-static struct omap_hwmod omap44xx_l3_instr_hwmod;
-static struct omap_hwmod omap44xx_l3_main_1_hwmod;
-static struct omap_hwmod omap44xx_l3_main_2_hwmod;
-static struct omap_hwmod omap44xx_l3_main_3_hwmod;
-static struct omap_hwmod omap44xx_l4_abe_hwmod;
-static struct omap_hwmod omap44xx_l4_cfg_hwmod;
-static struct omap_hwmod omap44xx_l4_per_hwmod;
-static struct omap_hwmod omap44xx_l4_wkup_hwmod;
-static struct omap_hwmod omap44xx_mpu_hwmod;
-static struct omap_hwmod omap44xx_mpu_private_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_dmm_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_emif_fw_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_l3_instr_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_l3_main_1_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_l3_main_2_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_l3_main_3_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_l4_abe_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_l4_cfg_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_l4_per_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_l4_wkup_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_mpu_hwmod;
+static struct omap_hwmod __omap4_data omap44xx_mpu_private_hwmod;
/*
* Interconnects omap_hwmod structures
@@ -57,13 +57,13 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod;
* 'dmm' class
* instance(s): dmm
*/
-static struct omap_hwmod_class omap44xx_dmm_hwmod_class = {
+static struct omap_hwmod_class __omap4_data omap44xx_dmm_hwmod_class = {
.name = "dmm",
};
/* dmm interface data */
/* l3_main_1 -> dmm */
-static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l3_main_1__dmm = {
.master = &omap44xx_l3_main_1_hwmod,
.slave = &omap44xx_dmm_hwmod,
.clk = "l3_div_ck",
@@ -71,7 +71,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {
};
/* mpu -> dmm */
-static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_mpu__dmm = {
.master = &omap44xx_mpu_hwmod,
.slave = &omap44xx_dmm_hwmod,
.clk = "l3_div_ck",
@@ -79,16 +79,16 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {
};
/* dmm slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_dmm_slaves[] = {
&omap44xx_l3_main_1__dmm,
&omap44xx_mpu__dmm,
};
-static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = {
+static struct omap_hwmod_irq_info __omap4_data omap44xx_dmm_irqs[] = {
{ .irq = 113 + OMAP44XX_IRQ_GIC_START },
};
-static struct omap_hwmod omap44xx_dmm_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_dmm_hwmod = {
.name = "dmm",
.class = &omap44xx_dmm_hwmod_class,
.slaves = omap44xx_dmm_slaves,
@@ -102,13 +102,13 @@ static struct omap_hwmod omap44xx_dmm_hwmod = {
* 'emif_fw' class
* instance(s): emif_fw
*/
-static struct omap_hwmod_class omap44xx_emif_fw_hwmod_class = {
+static struct omap_hwmod_class __omap4_data omap44xx_emif_fw_hwmod_class = {
.name = "emif_fw",
};
/* emif_fw interface data */
/* dmm -> emif_fw */
-static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_dmm__emif_fw = {
.master = &omap44xx_dmm_hwmod,
.slave = &omap44xx_emif_fw_hwmod,
.clk = "l3_div_ck",
@@ -116,7 +116,7 @@ static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = {
};
/* l4_cfg -> emif_fw */
-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_cfg__emif_fw = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_emif_fw_hwmod,
.clk = "l4_div_ck",
@@ -124,12 +124,12 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = {
};
/* emif_fw slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_emif_fw_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_emif_fw_slaves[] = {
&omap44xx_dmm__emif_fw,
&omap44xx_l4_cfg__emif_fw,
};
-static struct omap_hwmod omap44xx_emif_fw_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_emif_fw_hwmod = {
.name = "emif_fw",
.class = &omap44xx_emif_fw_hwmod_class,
.slaves = omap44xx_emif_fw_slaves,
@@ -141,13 +141,13 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = {
* 'l3' class
* instance(s): l3_instr, l3_main_1, l3_main_2, l3_main_3
*/
-static struct omap_hwmod_class omap44xx_l3_hwmod_class = {
+static struct omap_hwmod_class __omap4_data omap44xx_l3_hwmod_class = {
.name = "l3",
};
/* l3_instr interface data */
/* l3_main_3 -> l3_instr */
-static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l3_main_3__l3_instr = {
.master = &omap44xx_l3_main_3_hwmod,
.slave = &omap44xx_l3_instr_hwmod,
.clk = "l3_div_ck",
@@ -155,11 +155,11 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = {
};
/* l3_instr slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_l3_instr_slaves[] = {
&omap44xx_l3_main_3__l3_instr,
};
-static struct omap_hwmod omap44xx_l3_instr_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_l3_instr_hwmod = {
.name = "l3_instr",
.class = &omap44xx_l3_hwmod_class,
.slaves = omap44xx_l3_instr_slaves,
@@ -168,7 +168,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
};
/* l3_main_2 -> l3_main_1 */
-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l3_main_2__l3_main_1 = {
.master = &omap44xx_l3_main_2_hwmod,
.slave = &omap44xx_l3_main_1_hwmod,
.clk = "l3_div_ck",
@@ -176,7 +176,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = {
};
/* l4_cfg -> l3_main_1 */
-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_1 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_cfg__l3_main_1 = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_l3_main_1_hwmod,
.clk = "l4_div_ck",
@@ -184,7 +184,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_1 = {
};
/* mpu -> l3_main_1 */
-static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_mpu__l3_main_1 = {
.master = &omap44xx_mpu_hwmod,
.slave = &omap44xx_l3_main_1_hwmod,
.clk = "l3_div_ck",
@@ -192,13 +192,13 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
};
/* l3_main_1 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_l3_main_1_slaves[] = {
&omap44xx_l3_main_2__l3_main_1,
&omap44xx_l4_cfg__l3_main_1,
&omap44xx_mpu__l3_main_1,
};
-static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_l3_main_1_hwmod = {
.name = "l3_main_1",
.class = &omap44xx_l3_hwmod_class,
.slaves = omap44xx_l3_main_1_slaves,
@@ -208,7 +208,7 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
/* l3_main_2 interface data */
/* l3_main_1 -> l3_main_2 */
-static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l3_main_1__l3_main_2 = {
.master = &omap44xx_l3_main_1_hwmod,
.slave = &omap44xx_l3_main_2_hwmod,
.clk = "l3_div_ck",
@@ -216,7 +216,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
};
/* l4_cfg -> l3_main_2 */
-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_cfg__l3_main_2 = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_l3_main_2_hwmod,
.clk = "l4_div_ck",
@@ -224,12 +224,12 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
};
/* l3_main_2 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_l3_main_2_slaves[] = {
&omap44xx_l3_main_1__l3_main_2,
&omap44xx_l4_cfg__l3_main_2,
};
-static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_l3_main_2_hwmod = {
.name = "l3_main_2",
.class = &omap44xx_l3_hwmod_class,
.slaves = omap44xx_l3_main_2_slaves,
@@ -239,7 +239,7 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
/* l3_main_3 interface data */
/* l3_main_1 -> l3_main_3 */
-static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l3_main_1__l3_main_3 = {
.master = &omap44xx_l3_main_1_hwmod,
.slave = &omap44xx_l3_main_3_hwmod,
.clk = "l3_div_ck",
@@ -247,7 +247,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = {
};
/* l3_main_2 -> l3_main_3 */
-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_3 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l3_main_2__l3_main_3 = {
.master = &omap44xx_l3_main_2_hwmod,
.slave = &omap44xx_l3_main_3_hwmod,
.clk = "l3_div_ck",
@@ -255,7 +255,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_3 = {
};
/* l4_cfg -> l3_main_3 */
-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_cfg__l3_main_3 = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_l3_main_3_hwmod,
.clk = "l4_div_ck",
@@ -263,13 +263,13 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = {
};
/* l3_main_3 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_l3_main_3_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_l3_main_3_slaves[] = {
&omap44xx_l3_main_1__l3_main_3,
&omap44xx_l3_main_2__l3_main_3,
&omap44xx_l4_cfg__l3_main_3,
};
-static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_l3_main_3_hwmod = {
.name = "l3_main_3",
.class = &omap44xx_l3_hwmod_class,
.slaves = omap44xx_l3_main_3_slaves,
@@ -281,13 +281,13 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
* 'l4' class
* instance(s): l4_abe, l4_cfg, l4_per, l4_wkup
*/
-static struct omap_hwmod_class omap44xx_l4_hwmod_class = {
+static struct omap_hwmod_class __omap4_data omap44xx_l4_hwmod_class = {
.name = "l4",
};
/* l4_abe interface data */
/* l3_main_1 -> l4_abe */
-static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_abe = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l3_main_1__l4_abe = {
.master = &omap44xx_l3_main_1_hwmod,
.slave = &omap44xx_l4_abe_hwmod,
.clk = "l3_div_ck",
@@ -295,7 +295,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_abe = {
};
/* mpu -> l4_abe */
-static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_mpu__l4_abe = {
.master = &omap44xx_mpu_hwmod,
.slave = &omap44xx_l4_abe_hwmod,
.clk = "ocp_abe_iclk",
@@ -303,12 +303,12 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = {
};
/* l4_abe slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_l4_abe_slaves[] = {
&omap44xx_l3_main_1__l4_abe,
&omap44xx_mpu__l4_abe,
};
-static struct omap_hwmod omap44xx_l4_abe_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_l4_abe_hwmod = {
.name = "l4_abe",
.class = &omap44xx_l4_hwmod_class,
.slaves = omap44xx_l4_abe_slaves,
@@ -318,7 +318,7 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = {
/* l4_cfg interface data */
/* l3_main_1 -> l4_cfg */
-static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l3_main_1__l4_cfg = {
.master = &omap44xx_l3_main_1_hwmod,
.slave = &omap44xx_l4_cfg_hwmod,
.clk = "l3_div_ck",
@@ -326,11 +326,11 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = {
};
/* l4_cfg slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_l4_cfg_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_l4_cfg_slaves[] = {
&omap44xx_l3_main_1__l4_cfg,
};
-static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_l4_cfg_hwmod = {
.name = "l4_cfg",
.class = &omap44xx_l4_hwmod_class,
.slaves = omap44xx_l4_cfg_slaves,
@@ -340,7 +340,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
/* l4_per interface data */
/* l3_main_2 -> l4_per */
-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l3_main_2__l4_per = {
.master = &omap44xx_l3_main_2_hwmod,
.slave = &omap44xx_l4_per_hwmod,
.clk = "l3_div_ck",
@@ -348,11 +348,11 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = {
};
/* l4_per slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_l4_per_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_l4_per_slaves[] = {
&omap44xx_l3_main_2__l4_per,
};
-static struct omap_hwmod omap44xx_l4_per_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_l4_per_hwmod = {
.name = "l4_per",
.class = &omap44xx_l4_hwmod_class,
.slaves = omap44xx_l4_per_slaves,
@@ -362,7 +362,7 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = {
/* l4_wkup interface data */
/* l4_cfg -> l4_wkup */
-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_cfg__l4_wkup = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_l4_wkup_hwmod,
.clk = "l4_div_ck",
@@ -370,11 +370,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = {
};
/* l4_wkup slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_l4_wkup_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_l4_wkup_slaves[] = {
&omap44xx_l4_cfg__l4_wkup,
};
-static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_l4_wkup_hwmod = {
.name = "l4_wkup",
.class = &omap44xx_l4_hwmod_class,
.slaves = omap44xx_l4_wkup_slaves,
@@ -387,7 +387,7 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
* multimaster high-speed i2c controller
*/
-static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = {
+static struct omap_hwmod_class_sysconfig __omap4_data omap44xx_i2c_sysc = {
.sysc_offs = 0x0010,
.syss_offs = 0x0090,
.sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
@@ -397,23 +397,23 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = {
.sysc_fields = &omap_hwmod_sysc_type1,
};
-static struct omap_hwmod_class omap44xx_i2c_hwmod_class = {
+static struct omap_hwmod_class __omap4_data omap44xx_i2c_hwmod_class = {
.name = "i2c",
.sysc = &omap44xx_i2c_sysc,
};
/* i2c1 */
-static struct omap_hwmod omap44xx_i2c1_hwmod;
-static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = {
+static struct omap_hwmod __omap4_data omap44xx_i2c1_hwmod;
+static struct omap_hwmod_irq_info __omap4_data omap44xx_i2c1_irqs[] = {
{ .irq = 56 + OMAP44XX_IRQ_GIC_START },
};
-static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap4_data omap44xx_i2c1_sdma_reqs[] = {
{ .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START },
};
-static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = {
+static struct omap_hwmod_addr_space __omap4_data omap44xx_i2c1_addrs[] = {
{
.pa_start = 0x48070000,
.pa_end = 0x480700ff,
@@ -422,7 +422,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = {
};
/* l4_per -> i2c1 */
-static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_per__i2c1 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_i2c1_hwmod,
.clk = "l4_div_ck",
@@ -432,11 +432,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = {
};
/* i2c1 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_i2c1_slaves[] = {
&omap44xx_l4_per__i2c1,
};
-static struct omap_hwmod omap44xx_i2c1_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_i2c1_hwmod = {
.name = "i2c1",
.class = &omap44xx_i2c_hwmod_class,
.flags = HWMOD_INIT_NO_RESET,
@@ -456,17 +456,17 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
};
/* i2c2 */
-static struct omap_hwmod omap44xx_i2c2_hwmod;
-static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = {
+static struct omap_hwmod __omap4_data omap44xx_i2c2_hwmod;
+static struct omap_hwmod_irq_info __omap4_data omap44xx_i2c2_irqs[] = {
{ .irq = 57 + OMAP44XX_IRQ_GIC_START },
};
-static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap4_data omap44xx_i2c2_sdma_reqs[] = {
{ .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START },
};
-static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = {
+static struct omap_hwmod_addr_space __omap4_data omap44xx_i2c2_addrs[] = {
{
.pa_start = 0x48072000,
.pa_end = 0x480720ff,
@@ -475,7 +475,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = {
};
/* l4_per -> i2c2 */
-static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_per__i2c2 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_i2c2_hwmod,
.clk = "l4_div_ck",
@@ -485,11 +485,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = {
};
/* i2c2 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_i2c2_slaves[] = {
&omap44xx_l4_per__i2c2,
};
-static struct omap_hwmod omap44xx_i2c2_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_i2c2_hwmod = {
.name = "i2c2",
.class = &omap44xx_i2c_hwmod_class,
.flags = HWMOD_INIT_NO_RESET,
@@ -509,17 +509,17 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
};
/* i2c3 */
-static struct omap_hwmod omap44xx_i2c3_hwmod;
-static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = {
+static struct omap_hwmod __omap4_data omap44xx_i2c3_hwmod;
+static struct omap_hwmod_irq_info __omap4_data omap44xx_i2c3_irqs[] = {
{ .irq = 61 + OMAP44XX_IRQ_GIC_START },
};
-static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap4_data omap44xx_i2c3_sdma_reqs[] = {
{ .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START },
};
-static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = {
+static struct omap_hwmod_addr_space __omap4_data omap44xx_i2c3_addrs[] = {
{
.pa_start = 0x48060000,
.pa_end = 0x480600ff,
@@ -528,7 +528,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = {
};
/* l4_per -> i2c3 */
-static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_per__i2c3 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_i2c3_hwmod,
.clk = "l4_div_ck",
@@ -538,11 +538,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = {
};
/* i2c3 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_i2c3_slaves[] = {
&omap44xx_l4_per__i2c3,
};
-static struct omap_hwmod omap44xx_i2c3_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_i2c3_hwmod = {
.name = "i2c3",
.class = &omap44xx_i2c_hwmod_class,
.flags = HWMOD_INIT_NO_RESET,
@@ -562,17 +562,17 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
};
/* i2c4 */
-static struct omap_hwmod omap44xx_i2c4_hwmod;
-static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = {
+static struct omap_hwmod __omap4_data omap44xx_i2c4_hwmod;
+static struct omap_hwmod_irq_info __omap4_data omap44xx_i2c4_irqs[] = {
{ .irq = 62 + OMAP44XX_IRQ_GIC_START },
};
-static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap4_data omap44xx_i2c4_sdma_reqs[] = {
{ .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START },
};
-static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = {
+static struct omap_hwmod_addr_space __omap4_data omap44xx_i2c4_addrs[] = {
{
.pa_start = 0x48350000,
.pa_end = 0x483500ff,
@@ -581,7 +581,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = {
};
/* l4_per -> i2c4 */
-static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_per__i2c4 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_i2c4_hwmod,
.clk = "l4_div_ck",
@@ -591,11 +591,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = {
};
/* i2c4 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_i2c4_slaves[] = {
&omap44xx_l4_per__i2c4,
};
-static struct omap_hwmod omap44xx_i2c4_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_i2c4_hwmod = {
.name = "i2c4",
.class = &omap44xx_i2c_hwmod_class,
.flags = HWMOD_INIT_NO_RESET,
@@ -618,13 +618,13 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
* 'mpu_bus' class
* instance(s): mpu_private
*/
-static struct omap_hwmod_class omap44xx_mpu_bus_hwmod_class = {
+static struct omap_hwmod_class __omap4_data omap44xx_mpu_bus_hwmod_class = {
.name = "mpu_bus",
};
/* mpu_private interface data */
/* mpu -> mpu_private */
-static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_mpu__mpu_private = {
.master = &omap44xx_mpu_hwmod,
.slave = &omap44xx_mpu_private_hwmod,
.clk = "l3_div_ck",
@@ -632,11 +632,11 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = {
};
/* mpu_private slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_mpu_private_slaves[] = {
&omap44xx_mpu__mpu_private,
};
-static struct omap_hwmod omap44xx_mpu_private_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_mpu_private_hwmod = {
.name = "mpu_private",
.class = &omap44xx_mpu_bus_hwmod_class,
.slaves = omap44xx_mpu_private_slaves,
@@ -649,25 +649,25 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
* mpu sub-system
*/
-static struct omap_hwmod_class omap44xx_mpu_hwmod_class = {
+static struct omap_hwmod_class __omap4_data omap44xx_mpu_hwmod_class = {
.name = "mpu",
};
/* mpu */
-static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = {
+static struct omap_hwmod_irq_info __omap4_data omap44xx_mpu_irqs[] = {
{ .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START },
{ .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START },
{ .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START },
};
/* mpu master ports */
-static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_mpu_masters[] = {
&omap44xx_mpu__l3_main_1,
&omap44xx_mpu__l4_abe,
&omap44xx_mpu__dmm,
};
-static struct omap_hwmod omap44xx_mpu_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_mpu_hwmod = {
.name = "mpu",
.class = &omap44xx_mpu_hwmod_class,
.flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
@@ -690,7 +690,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
* overflow condition
*/
-static struct omap_hwmod_class_sysconfig omap44xx_wd_timer_sysc = {
+static struct omap_hwmod_class_sysconfig __omap4_data omap44xx_wd_timer_sysc = {
.rev_offs = 0x0000,
.sysc_offs = 0x0010,
.syss_offs = 0x0014,
@@ -705,7 +705,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_wd_timer_sysc = {
* universal asynchronous receiver/transmitter (uart)
*/
-static struct omap_hwmod_class_sysconfig omap44xx_uart_sysc = {
+static struct omap_hwmod_class_sysconfig __omap4_data omap44xx_uart_sysc = {
.rev_offs = 0x0050,
.sysc_offs = 0x0054,
.syss_offs = 0x0058,
@@ -715,18 +715,18 @@ static struct omap_hwmod_class_sysconfig omap44xx_uart_sysc = {
.sysc_fields = &omap_hwmod_sysc_type1,
};
-static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = {
+static struct omap_hwmod_class __omap4_data omap44xx_wd_timer_hwmod_class = {
.name = "wd_timer",
.sysc = &omap44xx_wd_timer_sysc,
};
/* wd_timer2 */
-static struct omap_hwmod omap44xx_wd_timer2_hwmod;
-static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = {
+static struct omap_hwmod __omap4_data omap44xx_wd_timer2_hwmod;
+static struct omap_hwmod_irq_info __omap4_data omap44xx_wd_timer2_irqs[] = {
{ .irq = 80 + OMAP44XX_IRQ_GIC_START },
};
-static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {
+static struct omap_hwmod_addr_space __omap4_data omap44xx_wd_timer2_addrs[] = {
{
.pa_start = 0x4a314000,
.pa_end = 0x4a31407f,
@@ -734,23 +734,23 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {
},
};
-static struct omap_hwmod_class omap44xx_uart_hwmod_class = {
+static struct omap_hwmod_class __omap4_data omap44xx_uart_hwmod_class = {
.name = "uart",
.sysc = &omap44xx_uart_sysc,
};
/* uart1 */
-static struct omap_hwmod omap44xx_uart1_hwmod;
-static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = {
+static struct omap_hwmod __omap4_data omap44xx_uart1_hwmod;
+static struct omap_hwmod_irq_info __omap4_data omap44xx_uart1_irqs[] = {
{ .irq = 72 + OMAP44XX_IRQ_GIC_START },
};
-static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap4_data omap44xx_uart1_sdma_reqs[] = {
{ .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START },
};
-static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = {
+static struct omap_hwmod_addr_space __omap4_data omap44xx_uart1_addrs[] = {
{
.pa_start = 0x4806a000,
.pa_end = 0x4806a0ff,
@@ -759,7 +759,7 @@ static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = {
};
/* l4_per -> uart1 */
-static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_per__uart1 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_uart1_hwmod,
.clk = "l4_div_ck",
@@ -769,11 +769,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = {
};
/* uart1 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_uart1_slaves[] = {
&omap44xx_l4_per__uart1,
};
-static struct omap_hwmod omap44xx_uart1_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_uart1_hwmod = {
.name = "uart1",
.class = &omap44xx_uart_hwmod_class,
.mpu_irqs = omap44xx_uart1_irqs,
@@ -792,17 +792,17 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
};
/* uart2 */
-static struct omap_hwmod omap44xx_uart2_hwmod;
-static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = {
+static struct omap_hwmod __omap4_data omap44xx_uart2_hwmod;
+static struct omap_hwmod_irq_info __omap4_data omap44xx_uart2_irqs[] = {
{ .irq = 73 + OMAP44XX_IRQ_GIC_START },
};
-static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap4_data omap44xx_uart2_sdma_reqs[] = {
{ .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START },
};
-static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = {
+static struct omap_hwmod_addr_space __omap4_data omap44xx_uart2_addrs[] = {
{
.pa_start = 0x4806c000,
.pa_end = 0x4806c0ff,
@@ -811,7 +811,7 @@ static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = {
};
/* l4_wkup -> wd_timer2 */
-static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_wkup__wd_timer2 = {
.master = &omap44xx_l4_wkup_hwmod,
.slave = &omap44xx_wd_timer2_hwmod,
.clk = "l4_wkup_clk_mux_ck",
@@ -821,11 +821,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = {
};
/* wd_timer2 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_wd_timer2_slaves[] = {
&omap44xx_l4_wkup__wd_timer2,
};
-static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_wd_timer2_hwmod = {
.name = "wd_timer2",
.class = &omap44xx_wd_timer_hwmod_class,
.mpu_irqs = omap44xx_wd_timer2_irqs,
@@ -842,12 +842,12 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
};
/* wd_timer3 */
-static struct omap_hwmod omap44xx_wd_timer3_hwmod;
-static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = {
+static struct omap_hwmod __omap4_data omap44xx_wd_timer3_hwmod;
+static struct omap_hwmod_irq_info __omap4_data omap44xx_wd_timer3_irqs[] = {
{ .irq = 36 + OMAP44XX_IRQ_GIC_START },
};
-static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = {
+static struct omap_hwmod_addr_space __omap4_data omap44xx_wd_timer3_addrs[] = {
{
.pa_start = 0x40130000,
.pa_end = 0x4013007f,
@@ -856,7 +856,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = {
};
/* l4_per -> uart2 */
-static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_per__uart2 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_uart2_hwmod,
.clk = "l4_div_ck",
@@ -866,11 +866,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = {
};
/* uart2 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_uart2_slaves[] = {
&omap44xx_l4_per__uart2,
};
-static struct omap_hwmod omap44xx_uart2_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_uart2_hwmod = {
.name = "uart2",
.class = &omap44xx_uart_hwmod_class,
.mpu_irqs = omap44xx_uart2_irqs,
@@ -889,17 +889,17 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
};
/* uart3 */
-static struct omap_hwmod omap44xx_uart3_hwmod;
-static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = {
+static struct omap_hwmod __omap4_data omap44xx_uart3_hwmod;
+static struct omap_hwmod_irq_info __omap4_data omap44xx_uart3_irqs[] = {
{ .irq = 74 + OMAP44XX_IRQ_GIC_START },
};
-static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap4_data omap44xx_uart3_sdma_reqs[] = {
{ .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START },
};
-static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = {
+static struct omap_hwmod_addr_space __omap4_data omap44xx_uart3_addrs[] = {
{
.pa_start = 0x48020000,
.pa_end = 0x480200ff,
@@ -908,7 +908,7 @@ static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = {
};
/* l4_abe -> wd_timer3 */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_abe__wd_timer3 = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_wd_timer3_hwmod,
.clk = "ocp_abe_iclk",
@@ -918,7 +918,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = {
};
/* l4_abe -> wd_timer3 (dma) */
-static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = {
+static struct omap_hwmod_addr_space __omap4_data omap44xx_wd_timer3_dma_addrs[] = {
{
.pa_start = 0x49030000,
.pa_end = 0x4903007f,
@@ -927,7 +927,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = {
};
/* l4_per -> uart3 */
-static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_per__uart3 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_uart3_hwmod,
.clk = "l4_div_ck",
@@ -937,11 +937,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = {
};
/* uart3 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_uart3_slaves[] = {
&omap44xx_l4_per__uart3,
};
-static struct omap_hwmod omap44xx_uart3_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_uart3_hwmod = {
.name = "uart3",
.class = &omap44xx_uart_hwmod_class,
.flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
@@ -961,17 +961,17 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
};
/* uart4 */
-static struct omap_hwmod omap44xx_uart4_hwmod;
-static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = {
+static struct omap_hwmod __omap4_data omap44xx_uart4_hwmod;
+static struct omap_hwmod_irq_info __omap4_data omap44xx_uart4_irqs[] = {
{ .irq = 70 + OMAP44XX_IRQ_GIC_START },
};
-static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = {
+static struct omap_hwmod_dma_info __omap4_data omap44xx_uart4_sdma_reqs[] = {
{ .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START },
};
-static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = {
+static struct omap_hwmod_addr_space __omap4_data omap44xx_uart4_addrs[] = {
{
.pa_start = 0x4806e000,
.pa_end = 0x4806e0ff,
@@ -979,7 +979,7 @@ static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = {
},
};
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_abe__wd_timer3_dma = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_wd_timer3_hwmod,
.clk = "ocp_abe_iclk",
@@ -989,12 +989,12 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {
};
/* wd_timer3 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_wd_timer3_slaves[] = {
&omap44xx_l4_abe__wd_timer3,
&omap44xx_l4_abe__wd_timer3_dma,
};
-static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_wd_timer3_hwmod = {
.name = "wd_timer3",
.class = &omap44xx_wd_timer_hwmod_class,
.mpu_irqs = omap44xx_wd_timer3_irqs,
@@ -1011,7 +1011,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
};
/* l4_per -> uart4 */
-static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = {
+static struct omap_hwmod_ocp_if __omap4_data omap44xx_l4_per__uart4 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_uart4_hwmod,
.clk = "l4_div_ck",
@@ -1021,11 +1021,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = {
};
/* uart4 slave ports */
-static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = {
+static struct omap_hwmod_ocp_if __omap4_data *omap44xx_uart4_slaves[] = {
&omap44xx_l4_per__uart4,
};
-static struct omap_hwmod omap44xx_uart4_hwmod = {
+static struct omap_hwmod __omap4_data omap44xx_uart4_hwmod = {
.name = "uart4",
.class = &omap44xx_uart_hwmod_class,
.mpu_irqs = omap44xx_uart4_irqs,
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 6/6] omap3: beagle: get rid of unused omap2/omap4 specific code/data
2010-12-21 18:19 [RFC] Infrastructure for dynamic removal of code and data sections Thomas Petazzoni
` (3 preceding siblings ...)
2010-12-21 18:20 ` [PATCH 5/6] omap4: mark some data as omap4-specific Thomas Petazzoni
@ 2010-12-21 18:20 ` Thomas Petazzoni
2010-12-21 19:15 ` Menon, Nishanth
4 siblings, 1 reply; 18+ messages in thread
From: Thomas Petazzoni @ 2010-12-21 18:20 UTC (permalink / raw)
To: linux-omap; +Cc: Thomas Petazzoni, Thomas Petazzoni
From: Thomas Petazzoni <tpetazzoni@ti.com>
Using the new condsections infrastructure, get rid of the unused
code/data for OMAP2 and OMAP4 when booting on BeagleBoard OMAP3.
Signed-off-by: Thomas Petazzoni <t-petazzoni@ti.com>
---
arch/arm/mach-omap2/board-omap3beagle.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 14f4224..900964a 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -23,6 +23,7 @@
#include <linux/gpio.h>
#include <linux/input.h>
#include <linux/gpio_keys.h>
+#include <linux/condsections.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
@@ -581,6 +582,9 @@ static void __init omap3_beagle_init(void)
omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
beagle_display_init();
+
+ free_unused_cond_section("omap2");
+ free_unused_cond_section("omap4");
}
MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH 6/6] omap3: beagle: get rid of unused omap2/omap4 specific code/data
2010-12-21 18:20 ` [PATCH 6/6] omap3: beagle: get rid of unused omap2/omap4 specific code/data Thomas Petazzoni
@ 2010-12-21 19:15 ` Menon, Nishanth
2010-12-21 21:57 ` Thomas Petazzoni
0 siblings, 1 reply; 18+ messages in thread
From: Menon, Nishanth @ 2010-12-21 19:15 UTC (permalink / raw)
To: Thomas Petazzoni; +Cc: linux-omap, Thomas Petazzoni, Thomas Petazzoni
On Tue, Dec 21, 2010 at 12:20, Thomas Petazzoni
<thomas.petazzoni@free-electrons.com> wrote:
>
> From: Thomas Petazzoni <tpetazzoni@ti.com>
>
> Using the new condsections infrastructure, get rid of the unused
> code/data for OMAP2 and OMAP4 when booting on BeagleBoard OMAP3.
>
> Signed-off-by: Thomas Petazzoni <t-petazzoni@ti.com>
> ---
> arch/arm/mach-omap2/board-omap3beagle.c | 4 ++++
> 1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
> index 14f4224..900964a 100644
> --- a/arch/arm/mach-omap2/board-omap3beagle.c
> +++ b/arch/arm/mach-omap2/board-omap3beagle.c
> @@ -23,6 +23,7 @@
> #include <linux/gpio.h>
> #include <linux/input.h>
> #include <linux/gpio_keys.h>
> +#include <linux/condsections.h>
>
> #include <linux/mtd/mtd.h>
> #include <linux/mtd/partitions.h>
> @@ -581,6 +582,9 @@ static void __init omap3_beagle_init(void)
> omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
>
> beagle_display_init();
> +
> + free_unused_cond_section("omap2");
> + free_unused_cond_section("omap4");
Potentially a dumb idea: given that silicon wont change after boot,
cant we make it independent of the board file - I mean some common
file with cpu_is check and free of conditional sections accordingly?
Regards,
Nishanth Menon
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH 6/6] omap3: beagle: get rid of unused omap2/omap4 specific code/data
2010-12-21 19:15 ` Menon, Nishanth
@ 2010-12-21 21:57 ` Thomas Petazzoni
0 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2010-12-21 21:57 UTC (permalink / raw)
To: Menon, Nishanth; +Cc: linux-omap, Thomas Petazzoni
On Tue, 21 Dec 2010 13:15:23 -0600
"Menon, Nishanth" <nm@ti.com> wrote:
> Potentially a dumb idea: given that silicon wont change after boot,
> cant we make it independent of the board file - I mean some common
> file with cpu_is check and free of conditional sections accordingly?
Yes, definitely. The current location in the BeagleBoard board code was
just to make a quick test. It belongs somewhere in the CPU detection
code.
Thanks for your feedback!
Regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 18+ messages in thread