From mboxrd@z Thu Jan  1 00:00:00 1970
From: Tony Lindgren <tony@atomide.com>
Subject: Re: [RFT/PATCH 05/10] cbus: retu: move to threaded IRQ and GENIRQ
Date: Thu, 6 Jan 2011 19:04:50 -0800
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To: Felipe Balbi <balbi@ti.com>
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* Felipe Balbi <balbi@ti.com> [110104 22:37]:
> Hi,
> 
> On Tue, Jan 04, 2011 at 11:14:00AM -0800, Tony Lindgren wrote:
> > I think there's been some patches related to this to get rid
> > of NR_IRQS? Might be worth taking a look at those first as it's
> > a generic solution.
> 
> Yeah, one way would be to use Sparse IRQ numbering scheme and define
> different bases for different IRQ chips. We could use for example,
> something like:
> 
> IRQ	|	Chip
> =====================
> 0-299	|	INTC
> 300-499	|	TWL4030
> 500-599	|	MENELAUS
> 600-799	|	RETU
> 800-999	|	TAHVO
> 
> and so on. But I'm not sure that's good enough (numbers are just from
> the top of my head, didn't really check how many IRQs each one have).
> 
> The only problem I see is with INTC, what happens if we give it an
> interval which ends up not being big enough for next OMAP versions ?

I think that's the way to go, but we should not allocate that
many irqs.. We can define the ranges like we already do in irqs.h
based on what gets compiled in. There are few more blocks though:

INTC
GPIO		
MPUIO
GIC
FPGA
RETU
TAHVO
MENELAUS
TWL4030

The numbers for INTC we know assuming new omaps will use GIC. The
external chips rarely have more than few interrupts.

Regards,

Tony