From: "Avinash.H.M." <avinashhm@ti.com>
To: Paul Walmsley <paul@pwsan.com>,
linux-omap@vger.kernel.org, Rajendra Nayak <rnayak@ti.com>,
Benoit Cousson <b-cousson@ti.com>, Kevin Hilman <khilman@ti.com>
Subject: Re: [PATCH] omap: hwmod: add syss reset done flags to omap2, omap3 hwmods
Date: Thu, 31 Mar 2011 20:10:38 +0530 [thread overview]
Message-ID: <20110331144010.GA18054@avinash-laptop> (raw)
In-Reply-To: <20110326113538.GB3668@avinash-laptop>
> > > [ 0.208892] omap_hwmod: i2c1: softreset failed (waited 10000 usec)
> > > [ 0.223114] omap_hwmod: i2c2: softreset failed (waited 10000 usec)
> > > [ 0.237335] omap_hwmod: i2c3: softreset failed (waited 10000 usec)
> > > [ 0.251525] omap_hwmod: gpio2: softreset failed (waited 10000 usec)
> > > [ 0.265594] omap_hwmod: gpio3: softreset failed (waited 10000 usec)
> > > [ 0.279693] omap_hwmod: gpio4: softreset failed (waited 10000 usec)
> > > [ 0.293762] omap_hwmod: gpio5: softreset failed (waited 10000 usec)
> > > [ 0.307861] omap_hwmod: gpio6: softreset failed (waited 10000 usec)
Hi Paul,
I tested this on one more board and still got these softreset warnings.
So this wasn't a board specific issue and debugged into what is causing
these.
The problem is the FCLK isn't enabled for these gpios(2..6) while
resetting. So the GPIO's are not resetting properly. Once i enable FCLK
for them and then set the SYSCONFIG.SOFTRESET, then they are resetting
and it is reflected in RESETDONE bit.
That being said, I was looking for accessing gpio2_fck in the
gpio2_hwmod. But i find the structure as below,
static struct omap_hwmod omap3xxx_gpio2_hwmod = {
.name = "gpio2",
.mpu_irqs = omap3xxx_gpio2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs),
.main_clk = "gpio2_ick",
Is there any reason, why 'iclk' is set as the 'main_clk' and not 'fclk'.
Also 'fclk' is structured as 'gpio2_dbck' and made as an optional clock.
I wasn't very sure, why the name 'dbck'?
> >
> > Just FYI, I don't see the gpio softreset failures on my boards here.
Most likely you aren't seeing this in N800 and beagle because the
bootloader may be enabling the clocks.
I am sorry if the above question seems silly. I am fairly new to this
frameworks and hence the question :-). Please clarify.
br ,
- avinash
next prev parent reply other threads:[~2011-03-31 14:40 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-24 10:08 [PATCH] omap: hwmod: add syss reset done flags to omap2, omap3 hwmods Avinash.H.M
2011-03-03 21:28 ` Paul Walmsley
2011-03-14 16:16 ` Avinash.H.M.
2011-03-25 5:38 ` Paul Walmsley
2011-03-25 6:26 ` Avinash.H.M.
2011-03-25 7:20 ` Avinash.H.M.
2011-03-25 17:24 ` Paul Walmsley
2011-03-26 11:35 ` Avinash.H.M.
2011-03-26 19:38 ` Paul Walmsley
2011-03-31 14:40 ` Avinash.H.M. [this message]
2011-03-31 15:04 ` Kevin Hilman
2011-03-31 15:51 ` Avinash.H.M.
2011-03-31 15:56 ` Cousson, Benoit
2011-03-31 16:22 ` Avinash.H.M.
2011-03-25 14:42 ` Cousson, Benoit
2011-03-25 17:23 ` Paul Walmsley
2011-03-26 11:31 ` Avinash.H.M.
2011-03-31 13:06 ` Avinash.H.M.
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