From: Todd Poynor <toddpoynor@google.com>
To: Tero Kristo <t-kristo@ti.com>
Cc: linux-omap@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
"Avinash.H.M" <avinashhm@ti.com>, Kevin Hilman <khilman@ti.com>,
"Cousson, Benoit" <b-cousson@ti.com>,
Tony Lindgren <tony@atomide.com>,
"Govindraj.R" <govindraj.raja@ti.com>,
Felipe Balbi <balbi@ti.com>
Subject: Re: [PATCHv5 01/11] OMAP: prcm: switch to a chained IRQ handler mechanism
Date: Fri, 15 Jul 2011 09:40:46 -0700 [thread overview]
Message-ID: <20110715164046.GA16552@google.com> (raw)
In-Reply-To: <1309861677-2769-2-git-send-email-t-kristo@ti.com>
On Tue, Jul 05, 2011 at 01:27:47PM +0300, Tero Kristo wrote:
> Introduce a chained interrupt handler mechanism for the PRCM
> interrupt, so that individual PRCM event can cleanly be handled by
> handlers in separate drivers. We do this by introducing PRCM event
> names, which are then matched to the particular PRCM interrupt bit
> depending on the specific OMAP SoC being used.
>
> arch/arm/mach-omap2/prcm.c implements the chained interrupt mechanism
> itself, with individual PRCM events for OMAP3 and OMAP4 being
> described in arch/arm/mach-omap2/prcm3xxx.c and
> arch/arm/mach-omap2/prcm4xxx.c respectively. At initialization time,
> the set of PRCM events is filtered against the SoC on which we are
> running, keeping only the ones that are actually useful. All the logic
> is written to be generic with regard to OMAP3/OMAP4, even though OMAP3
> has single PRCM event registers and OMAP4 has two PRCM event
> registers.
>
...
> +
> + prcm_wkup_irq = omap_prcm_event_to_irq("wkup");
> + prcm_io_irq = omap_prcm_event_to_irq("io");
Should check error return for both.
> +
> + ret = request_irq(prcm_wkup_irq, _prcm_int_handle_wakeup,
> + IRQF_NO_SUSPEND | IRQF_DISABLED, "prcm_wkup", NULL);
>
...
> + for (i = 0; i <= max_irq / 32; i++) {
> + gc = irq_alloc_generic_chip("PRCM", 1,
> + irq_setup->base_irq + i * 32, NULL, handle_level_irq);
> +
Should check NULL return for out of memory.
> + ct = gc->chip_types;
...
> + /* Copy setup from __initdata section */
> + irq_setup = kmalloc(sizeof(struct omap_prcm_irq_setup), GFP_KERNEL);
Check NULL return.
> + memcpy(irq_setup, setup, sizeof(struct omap_prcm_irq_setup));
> +
> + irqs = kmalloc(sizeof(struct omap_prcm_irq) *
> + setup->num_irqs, GFP_KERNEL);
Check NULL return.
> + memcpy(irqs, setup->irqs, sizeof(struct omap_prcm_irq) *
> + setup->num_irqs);
Todd
next prev parent reply other threads:[~2011-07-15 16:41 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-05 10:27 [PATCHv5 00/11] PRCM chain handler Tero Kristo
2011-07-05 10:27 ` [PATCHv5 01/11] OMAP: prcm: switch to a chained IRQ handler mechanism Tero Kristo
2011-07-05 11:18 ` Felipe Balbi
2011-07-05 11:32 ` Tero Kristo
2011-07-05 11:33 ` Felipe Balbi
2011-07-15 13:23 ` Govindraj
2011-07-15 16:40 ` Todd Poynor [this message]
2011-07-18 12:19 ` Tero Kristo
2011-07-22 22:58 ` Kevin Hilman
2011-07-22 23:46 ` Felipe Balbi
2011-07-05 10:27 ` [PATCHv5 02/11] OMAP2+: hwmod: Add API to enable IO ring wakeup Tero Kristo
2011-07-05 10:27 ` [PATCHv5 03/11] OMAP2+: hwmod: Add API to check IO PAD wakeup status Tero Kristo
2011-07-05 10:27 ` [PATCHv5 04/11] OMAP2+: hwmod: add support for PAD wakeup interrupts Tero Kristo
2011-07-22 23:04 ` Kevin Hilman
2011-07-05 10:27 ` [PATCHv5 05/11] TEMP: OMAP3: pm: remove serial resume / idle calls from idle path Tero Kristo
2011-07-22 23:51 ` Felipe Balbi
2011-07-25 16:33 ` Tero Kristo
2011-07-05 10:27 ` [PATCHv5 06/11] TEMP: OMAP3: serial: made serial to work properly with PRCM chain handler Tero Kristo
2011-07-05 10:27 ` [PATCHv5 07/11] TEMP: serial: added mux support Tero Kristo
2011-07-05 10:27 ` [PATCHv5 08/11] TEMP: OMAP device: change pr_warnings to pr_debugs Tero Kristo
2011-07-05 10:27 ` [PATCHv5 09/11] TEMP: OMAP: serial: remove padconf hacks Tero Kristo
2011-07-05 10:27 ` [PATCHv5 10/11] TEMP: OMAP3: pm: disable / enable PRCM chain interrupts during wakeup from suspend Tero Kristo
2011-07-05 10:27 ` [PATCHv5 11/11] OMAP3: pm: do not enable PRCM MPU interrupts manually Tero Kristo
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