Re: [PATCH v3 2/5] ASoC: OMAP4: omap-dmic: Initial support for OMAP DMIC

[Mark Brown <broonie@opensource.wolfsonmicro.com>]

On Fri, Nov 25, 2011 at 02:20:33PM +0200, Peter Ujfalusi wrote:

> +	/*
> +	 * 192KHz rate is only supported with 19.2MHz/3.84MHz clock
> +	 * configuration. The same clock configuration allows 96KHz sampling
> +	 * rate as well. omap_dmic_select_divider() function configures the
> +	 * dividers for 96KHz, if the current stream is running in 192KHz we
> +	 * can change the divider value, while respecting the machine driver
> +	 * requested clock configuration.
> +	 */
> +	if (params_rate(params) == 192000) {
> +		if (dmic->fclk_freq == 19200000 && dmic->clk_div == 0x1) {
> +			dmic->clk_div = 0x6;
> +		} else {
> +			dev_err(dmic->dev,
> +				"invalid clock configuration for 192KHz\n");
> +			return -EINVAL;
> +		}
> +	}

So what happens if the user starts recording at 192kHz then goes back to
96kHz?  This all feels a bit clunky and fragile.  It seems like the
neatest solution here is to just record the desired DMICCLK rate when
the user sets it and then apply it here rather than doing this patching
later on.