From: Russell King - ARM Linux <linux@arm.linux.org.uk>
To: "Shilimkar, Santosh" <santosh.shilimkar@ti.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Aneesh V <aneesh@ti.com>, Joe Woodward <jw@terrafix.co.uk>,
"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
linux-arm <linux-arm-kernel@lists.infradead.org>
Subject: Re: OMAP3 L2/outer cache enabled in kernel (after being disabled by uBoot)?
Date: Tue, 17 Jan 2012 19:43:27 +0000 [thread overview]
Message-ID: <20120117194327.GH16726@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <CAMQu2gwANxCe-ou_qv29ueLixodoHv9i6VyfvDi2rjEOvhttqA@mail.gmail.com>
On Tue, Jan 17, 2012 at 02:58:18PM +0100, Shilimkar, Santosh wrote:
> Patching in boot-loaders isn't an option either since every customers
> prefers to use there own boot-loader and then controlling
> this vital bits is impossible.
>
> So I re-iterate that we need to have solution to this problem.
And I'll re-iterate that it'll create an absolute abonimation of code
to do this in the kernel - not only will it be extremely fragile, it
will be hell to maintain in the longer term. It will also be highly
platform specific.
Essentially, what you're asking is for us to find some way to call a
platform specific function depending on the platform (which we haven't
parsed yet), which uses a set of undefined registers, which may corrupt
an undefined set of registers. And call that function from a place in
the kernel which requires a set of registers to be preserved, with no
stack available to save registers, and call the function via a PC
relative branch (as its virtual address is useless to us at this point.)
If anything goes wrong, there's no way to report that as your only
option is to stop dead (if you're lucky) or maybe end up with the
processor trying to execute instructions from a non-existent or
uninitialized vectors page, etc.
This is far too much. This is far too fragile. This is asking for
undebuggable problems. This is asking for lots of people with unbootable
kernels.
No. Thanks.
next prev parent reply other threads:[~2012-01-17 19:43 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-16 10:03 OMAP3 L2/outer cache enabled in kernel (after being disabled by uBoot)? Joe Woodward
2012-01-16 10:18 ` Shilimkar, Santosh
2012-01-16 10:59 ` Russell King - ARM Linux
2012-01-16 12:43 ` Shilimkar, Santosh
2012-01-16 13:13 ` Russell King - ARM Linux
2012-01-16 13:22 ` Shilimkar, Santosh
2012-01-17 8:54 ` Joe Woodward
2012-01-17 12:11 ` Catalin Marinas
2012-01-17 12:27 ` Aneesh V
[not found] ` <CAMQu2gyft96O61Toja-h-MPpzFTQ8dpJWauw3o6qcPQBXEC_6A@mail.gmail.com>
2012-01-17 13:39 ` Catalin Marinas
2012-01-17 13:58 ` Shilimkar, Santosh
2012-01-17 16:27 ` Catalin Marinas
2012-01-17 17:27 ` Shilimkar, Santosh
2012-01-17 19:39 ` Nicolas Pitre
2012-01-17 20:27 ` Shilimkar, Santosh
2012-01-17 20:45 ` Nicolas Pitre
2012-01-17 20:57 ` Nicolas Pitre
2012-01-17 20:58 ` Shilimkar, Santosh
2012-01-17 21:02 ` Nicolas Pitre
2012-01-18 8:43 ` Shilimkar, Santosh
2012-01-17 21:15 ` Russell King - ARM Linux
2012-01-17 19:47 ` Russell King - ARM Linux
2012-01-17 20:11 ` Shilimkar, Santosh
2012-01-17 20:48 ` Russell King - ARM Linux
2012-01-17 19:43 ` Russell King - ARM Linux [this message]
2012-01-20 8:57 ` Joe Woodward
2012-01-27 11:45 ` Joe Woodward
2012-01-27 17:30 ` Catalin Marinas
2012-01-31 5:21 ` Aneesh V
2012-01-31 7:31 ` Catalin Marinas
2012-01-31 7:38 ` Shilimkar, Santosh
2012-01-31 8:54 ` Catalin Marinas
2012-01-31 9:05 ` Shilimkar, Santosh
2012-01-31 9:53 ` Catalin Marinas
2012-01-31 10:10 ` Russell King - ARM Linux
2012-01-31 12:10 ` Catalin Marinas
2012-01-31 18:09 ` Nicolas Pitre
2012-02-02 14:32 ` Catalin Marinas
2012-02-02 14:49 ` Russell King - ARM Linux
2012-02-02 15:10 ` Catalin Marinas
2012-01-31 9:56 ` Russell King - ARM Linux
2012-01-31 10:51 ` Shilimkar, Santosh
2012-01-31 18:27 ` Nicolas Pitre
2012-02-01 7:12 ` Shilimkar, Santosh
2012-01-17 14:18 ` Grazvydas Ignotas
2012-01-17 13:41 ` Catalin Marinas
2012-01-17 13:54 ` Aneesh V
2012-01-17 14:23 ` Måns Rullgård
2012-01-17 12:01 ` Aneesh V
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