[PATCH 0/2] ARM: omap: dmtimer: fix incorrect TCRR value in posted mode

[PATCH 0/2] ARM: omap: dmtimer: fix incorrect TCRR value in posted mode

[Tarun Kanti DebBarma]

Timers in PER domain periodically report old time from TCRR in posted mode
unless ICLK >= 4 * FCLK. The problem is addressed in the following manner:

Patch 1: Adds ick alias in the clkdev table so that dmtimer code can
extract the iclk rate using clk_get_rate().

Patch 2: The final logic added in omap_dm_timer_prepare() where timer is
set to non-posted mode if iclk < 4*fclk.

Rajendra Nayak (1):
  ARM: omap: hwmod: Add an 'ick' clkdev alias

Tarun Kanti DebBarma (1):
  ARM: omap: dmtimer: set non-posted mode if iclk less than 4*fck

 arch/arm/plat-omap/dmtimer.c     |   12 ++++++++++++
 arch/arm/plat-omap/omap_device.c |    3 +++
 2 files changed, 15 insertions(+), 0 deletions(-)

[PATCH 1/2] ARM: omap: hwmod: Add an 'ick' clkdev alias

[Tarun Kanti DebBarma]

From: Rajendra Nayak <rnayak@ti.com>

For all hwmods' with just one slave interface, use the
slave->clk to add an 'ick' clkdev alias in the table.
This is useful for drivers of such devices to get
the interface clock using 'clk_get(dev, "ick")'

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/plat-omap/omap_device.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index d50cbc6..c8bc005 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -311,6 +311,9 @@ static void _add_hwmod_clocks_clkdev(struct omap_device *od,
 
 	for (i = 0; i < oh->opt_clks_cnt; i++)
 		_add_clkdev(od, oh->opt_clks[i].role, oh->opt_clks[i].clk);
+
+	if (oh->slaves_cnt == 1)
+		_add_clkdev(od, "ick", oh->slaves[0]->clk);
 }
 
 
-- 
1.7.0.4

[PATCH 2/2] ARM: omap: dmtimer: set non-posted mode if iclk less than 4*fck

[Tarun Kanti DebBarma]

Timers in PER domain periodically report old time from TCRR in
posted mode if ick < 4*fck. Therefore, set timer to non-posted
whenever ick < 4*fck for all timers.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
 arch/arm/plat-omap/dmtimer.c |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 15e7882..a81b85e 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -378,6 +378,7 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
 {
 	int ret;
 	struct dmtimer_platform_data *pdata;
+	struct clk *iclk;
 
 	if (unlikely(!timer))
 		return -EINVAL;
@@ -388,6 +389,17 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
 		return -EINVAL;
 
 	ret = pdata->set_timer_src(timer->pdev, source);
+	/*
+	 * Timers in PER domain periodically report old time
+	 * from TCRR in posted mode if ick < 4*fck. Hence,
+	 * when this condition is satisfied setting the timer
+	 * to non-posted mode, instead.
+	 */
+	if (!IS_ERR(&ret)) {
+		iclk = clk_get(&timer->pdev->dev, "ick");
+		if (clk_get_rate(iclk) < (4 * clk_get_rate(timer->fclk)))
+			timer->posted = 0;
+	}
 
 	return ret;
 }
-- 
1.7.0.4

Re: [PATCH 2/2] ARM: omap: dmtimer: set non-posted mode if iclk less than 4*fck

[Kevin Hilman]

Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:

> Timers in PER domain periodically report old time from TCRR in
> posted mode if ick < 4*fck. Therefore, set timer to non-posted
> whenever ick < 4*fck for all timers.

Is there an erratum assocaited with this?

Does this problem affect every SoC?

Kevin

Re: [PATCH 2/2] ARM: omap: dmtimer: set non-posted mode if iclk less than 4*fck

[DebBarma, Tarun Kanti]

On Wed, May 30, 2012 at 2:51 AM, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> Timers in PER domain periodically report old time from TCRR in
>> posted mode if ick < 4*fck. Therefore, set timer to non-posted
>> whenever ick < 4*fck for all timers.
>
> Is there an erratum assocaited with this?
Yes, but it has not yet got into the document. Right now what we have
is a hardware defect.
>
> Does this problem affect every SoC?
Not quite sure about OMAP2 but it affects OMAP3+.
--
Tarun
>
> Kevin

Re: [PATCH 2/2] ARM: omap: dmtimer: set non-posted mode if iclk less than 4*fck

[Tony Lindgren]

* DebBarma, Tarun Kanti <tarun.kanti@ti.com> [120606 04:15]:
> On Wed, May 30, 2012 at 2:51 AM, Kevin Hilman <khilman@ti.com> wrote:
> > Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> >
> >> Timers in PER domain periodically report old time from TCRR in
> >> posted mode if ick < 4*fck. Therefore, set timer to non-posted
> >> whenever ick < 4*fck for all timers.
> >
> > Is there an erratum assocaited with this?
> Yes, but it has not yet got into the document. Right now what we have
> is a hardware defect.
> >
> > Does this problem affect every SoC?
> Not quite sure about OMAP2 but it affects OMAP3+.

This seems not too urgent and OK to queue into fixes-non-critical?

Tony

Re: [PATCH 2/2] ARM: omap: dmtimer: set non-posted mode if iclk less than 4*fck

[Shilimkar, Santosh]

Tony,

On Wed, Jun 20, 2012 at 6:43 PM, Tony Lindgren <tony@atomide.com> wrote:
>
> * DebBarma, Tarun Kanti <tarun.kanti@ti.com> [120606 04:15]:
> > On Wed, May 30, 2012 at 2:51 AM, Kevin Hilman <khilman@ti.com> wrote:
> > > Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> > >
> > >> Timers in PER domain periodically report old time from TCRR in
> > >> posted mode if ick < 4*fck. Therefore, set timer to non-posted
> > >> whenever ick < 4*fck for all timers.
> > >
> > > Is there an erratum assocaited with this?
> > Yes, but it has not yet got into the document. Right now what we have
> > is a hardware defect.
> > >
> > > Does this problem affect every SoC?
> > Not quite sure about OMAP2 but it affects OMAP3+.
>
> This seems not too urgent and OK to queue into fixes-non-critical?
>
Lets hold on this entire series. We are thinking of better WA especially to
avoid static dependencies. So just ignore this series all together for now.

Regards
Santosh

Re: [PATCH 2/2] ARM: omap: dmtimer: set non-posted mode if iclk less than 4*fck

[Tony Lindgren]

* Shilimkar, Santosh <santosh.shilimkar@ti.com> [120620 06:21]:
> Tony,
> 
> On Wed, Jun 20, 2012 at 6:43 PM, Tony Lindgren <tony@atomide.com> wrote:
> >
> > * DebBarma, Tarun Kanti <tarun.kanti@ti.com> [120606 04:15]:
> > > On Wed, May 30, 2012 at 2:51 AM, Kevin Hilman <khilman@ti.com> wrote:
> > > > Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> > > >
> > > >> Timers in PER domain periodically report old time from TCRR in
> > > >> posted mode if ick < 4*fck. Therefore, set timer to non-posted
> > > >> whenever ick < 4*fck for all timers.
> > > >
> > > > Is there an erratum assocaited with this?
> > > Yes, but it has not yet got into the document. Right now what we have
> > > is a hardware defect.
> > > >
> > > > Does this problem affect every SoC?
> > > Not quite sure about OMAP2 but it affects OMAP3+.
> >
> > This seems not too urgent and OK to queue into fixes-non-critical?
> >
> Lets hold on this entire series. We are thinking of better WA especially to
> avoid static dependencies. So just ignore this series all together for now.

OK

Tony