From: Andreas Kemnade <andreas@kemnade.info>
To: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: linux-omap@vger.kernel.org
Subject: Re: receiving data from mcbsp1 in master mode
Date: Thu, 23 Aug 2012 11:32:44 +0200 [thread overview]
Message-ID: <20120823113244.1307371d@kemnade.info> (raw)
In-Reply-To: <5035EE3F.9000903@ti.com>
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On Thu, 23 Aug 2012 11:47:59 +0300
Peter Ujfalusi <peter.ujfalusi@ti.com> wrote:
> On 08/22/2012 11:19 PM, Andreas Kemnade wrote:
> > if I understand the TRM correctly, according to Figure 21-26 in chapter 21.4.2.3.
> > if GSYNC is set, the receiver uses the signal from the sample rate generator,
> > so CLKX does not need to be the CLKR source.
> > But I tried also with the DEVCONF0 MCBSP1_CLKR bit as you proposed.
> > I tried
> > snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_CLKR_SRC_CLKX, 0,
> > SND_SOC_CLOCK_OUT);
> > snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_FSR_SRC_FSX, 0,
> > SND_SOC_CLOCK_OUT);
>
> There is an issue with the 6pin mux code, try to add this patch:
> http://mailman.alsa-project.org/pipermail/alsa-devel/2012-August/054041.html
>
That is exactly the patch I was talking about in the next line, see
http://marc.info/?l=linux-omap&m=134540540412165&w=2
> > That is why I send you my patch about that mux settings. But I had no success.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> > The CLKX as CLKR source and FSX as FSR source setting I have only seen when
> > mcbsp1 is used in slave mode. If you know any working code which uses mcbsp1 in
> > master mode then let me know.
>
> No, I don't have board which uses McBSP1.
>
> --
> Péter
>
>
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prev parent reply other threads:[~2012-08-23 9:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-21 5:42 receiving data from mcbsp1 in master mode Andreas Kemnade
2012-08-21 13:42 ` Peter Ujfalusi
2012-08-22 20:19 ` Andreas Kemnade
2012-08-23 8:47 ` Peter Ujfalusi
2012-08-23 9:32 ` Andreas Kemnade [this message]
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