* [RFC/PATCH 0/3] arm: omap: patches from -rt
@ 2013-08-01 12:12 Felipe Balbi
2013-08-01 12:12 ` [RFC/PATCH 1/3] i2c/omap: drop the lock hard irq context Felipe Balbi
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Felipe Balbi @ 2013-08-01 12:12 UTC (permalink / raw)
To: Linux OMAP Mailing List; +Cc: Linux ARM Kernel Mailing List, Felipe Balbi
Hi,
the next three patches were taken from v3.10.4-rt1 patchset.
I don't have any boards available to test them, so I'd suggest
testing in as many platforms as possible before pushing
upstream.
By pushing these patches upstream, we help decrease the amount
of out-of-tree changes rt folks need to carry.
Frank Rowand (1):
arm: omap: convert omap boot_lock to raw
Sebastian Andrzej Siewior (1):
i2c/omap: drop the lock hard irq context
Thomas Gleixner (1):
serial: omap: fix omap lock crap
arch/arm/mach-omap2/omap-smp.c | 10 +++++-----
drivers/i2c/busses/i2c-omap.c | 5 +----
drivers/tty/serial/omap-serial.c | 12 ++++--------
3 files changed, 10 insertions(+), 17 deletions(-)
--
1.8.3.4.840.g6a90778
^ permalink raw reply [flat|nested] 7+ messages in thread* [RFC/PATCH 1/3] i2c/omap: drop the lock hard irq context 2013-08-01 12:12 [RFC/PATCH 0/3] arm: omap: patches from -rt Felipe Balbi @ 2013-08-01 12:12 ` Felipe Balbi 2013-08-01 12:12 ` [RFC/PATCH 2/3] serial: omap: fix omap lock crap Felipe Balbi ` (2 subsequent siblings) 3 siblings, 0 replies; 7+ messages in thread From: Felipe Balbi @ 2013-08-01 12:12 UTC (permalink / raw) To: Linux OMAP Mailing List Cc: Linux ARM Kernel Mailing List, Sebastian Andrzej Siewior, Felipe Balbi From: Sebastian Andrzej Siewior <bigeasy@linutronix.de> The lock is taken while reading two registers. On RT the first lock is taken in hard irq where it might sleep and in the threaded irq. The threaded irq runs in oneshot mode so the hard irq does not run until the thread the completes so there is no reason to grab the lock. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com> --- drivers/i2c/busses/i2c-omap.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 142b694d..8ceb98a 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -884,15 +884,12 @@ omap_i2c_isr(int irq, void *dev_id) u16 mask; u16 stat; - spin_lock(&dev->lock); - mask = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); + mask = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); if (stat & mask) ret = IRQ_WAKE_THREAD; - spin_unlock(&dev->lock); - return ret; } -- 1.8.3.4.840.g6a90778 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [RFC/PATCH 2/3] serial: omap: fix omap lock crap 2013-08-01 12:12 [RFC/PATCH 0/3] arm: omap: patches from -rt Felipe Balbi 2013-08-01 12:12 ` [RFC/PATCH 1/3] i2c/omap: drop the lock hard irq context Felipe Balbi @ 2013-08-01 12:12 ` Felipe Balbi 2013-08-01 12:12 ` [RFC/PATCH 3/3] arm: omap: convert omap boot_lock to raw Felipe Balbi 2013-08-01 17:07 ` [RFC/PATCH 0/3] arm: omap: patches from -rt Sourav Poddar 3 siblings, 0 replies; 7+ messages in thread From: Felipe Balbi @ 2013-08-01 12:12 UTC (permalink / raw) To: Linux OMAP Mailing List Cc: Linux ARM Kernel Mailing List, Thomas Gleixner, Felipe Balbi From: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com> --- drivers/tty/serial/omap-serial.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index b6d1728..7882d25 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -1170,13 +1170,10 @@ serial_omap_console_write(struct console *co, const char *s, pm_runtime_get_sync(up->dev); - local_irq_save(flags); - if (up->port.sysrq) - locked = 0; - else if (oops_in_progress) - locked = spin_trylock(&up->port.lock); + if (up->port.sysrq || oops_in_progress) + locked = spin_trylock_irqsave(&up->port.lock, flags); else - spin_lock(&up->port.lock); + spin_lock_irqsave(&up->port.lock, flags); /* * First save the IER then disable the interrupts @@ -1205,8 +1202,7 @@ serial_omap_console_write(struct console *co, const char *s, pm_runtime_mark_last_busy(up->dev); pm_runtime_put_autosuspend(up->dev); if (locked) - spin_unlock(&up->port.lock); - local_irq_restore(flags); + spin_unlock_irqrestore(&up->port.lock, flags); } static int __init -- 1.8.3.4.840.g6a90778 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [RFC/PATCH 3/3] arm: omap: convert omap boot_lock to raw 2013-08-01 12:12 [RFC/PATCH 0/3] arm: omap: patches from -rt Felipe Balbi 2013-08-01 12:12 ` [RFC/PATCH 1/3] i2c/omap: drop the lock hard irq context Felipe Balbi 2013-08-01 12:12 ` [RFC/PATCH 2/3] serial: omap: fix omap lock crap Felipe Balbi @ 2013-08-01 12:12 ` Felipe Balbi 2013-08-01 13:37 ` Russell King - ARM Linux 2013-08-01 17:07 ` [RFC/PATCH 0/3] arm: omap: patches from -rt Sourav Poddar 3 siblings, 1 reply; 7+ messages in thread From: Felipe Balbi @ 2013-08-01 12:12 UTC (permalink / raw) To: Linux OMAP Mailing List Cc: Linux ARM Kernel Mailing List, Frank Rowand, Thomas Gleixner From: Frank Rowand <frank.rowand@am.sony.com> The omap boot_lock is used by the secondary processor startup code. The locking task is the idle thread, which has idle->sched_class == &idle_sched_class. idle_sched_class->enqueue_task == NULL, so if the idle task blocks on the lock, the attempt to wake it when the lock becomes available will fail: try_to_wake_up() ... activate_task() enqueue_task() p->sched_class->enqueue_task(rq, p, flags) Fix by converting boot_lock to a raw spin lock. [ balbi@ti.com: taken from RT v3.10.4-rt1 patchset ] Signed-off-by: Frank Rowand <frank.rowand@am.sony.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> --- arch/arm/mach-omap2/omap-smp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 8708b2a..c4caa18 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -44,7 +44,7 @@ u16 pm44xx_errata; /* SCU base address */ static void __iomem *scu_base; -static DEFINE_SPINLOCK(boot_lock); +static DEFINE_RAW_SPINLOCK(boot_lock); void __iomem *omap4_get_scu_base(void) { @@ -68,8 +68,8 @@ static void omap4_secondary_init(unsigned int cpu) /* * Synchronise with the boot thread. */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); + raw_spin_lock(&boot_lock); + raw_spin_unlock(&boot_lock); } static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) @@ -83,7 +83,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) * Set synchronisation state between this boot processor * and the secondary one */ - spin_lock(&boot_lock); + raw_spin_lock(&boot_lock); /* * Update the AuxCoreBoot0 with boot state for secondary core. @@ -160,7 +160,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) * Now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ - spin_unlock(&boot_lock); + raw_spin_unlock(&boot_lock); return 0; } -- 1.8.3.4.840.g6a90778 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [RFC/PATCH 3/3] arm: omap: convert omap boot_lock to raw 2013-08-01 12:12 ` [RFC/PATCH 3/3] arm: omap: convert omap boot_lock to raw Felipe Balbi @ 2013-08-01 13:37 ` Russell King - ARM Linux 2013-08-01 13:48 ` [RFC/PATCH v2] arm: convert arm " Felipe Balbi 0 siblings, 1 reply; 7+ messages in thread From: Russell King - ARM Linux @ 2013-08-01 13:37 UTC (permalink / raw) To: Felipe Balbi Cc: Linux OMAP Mailing List, Frank Rowand, Thomas Gleixner, Linux ARM Kernel Mailing List On Thu, Aug 01, 2013 at 03:12:45PM +0300, Felipe Balbi wrote: > From: Frank Rowand <frank.rowand@am.sony.com> > > The omap boot_lock is used by the secondary processor startup code. The locking > task is the idle thread, which has idle->sched_class == &idle_sched_class. > idle_sched_class->enqueue_task == NULL, so if the idle task blocks on the > lock, the attempt to wake it when the lock becomes available will fail: > > try_to_wake_up() > ... > activate_task() > enqueue_task() > p->sched_class->enqueue_task(rq, p, flags) > > Fix by converting boot_lock to a raw spin lock. > > [ balbi@ti.com: taken from RT v3.10.4-rt1 patchset ] > > Signed-off-by: Frank Rowand <frank.rowand@am.sony.com> > Signed-off-by: Thomas Gleixner <tglx@linutronix.de> There's a whole bunch of these, OMAP is not the only one. If someone's going to fix one case, the rest should also be fixed. See: arch/arm/mach-exynos/platsmp.c arch/arm/mach-msm/platsmp.c arch/arm/mach-prima2/platsmp.c arch/arm/mach-spear/platsmp.c arch/arm/mach-sti/platsmp.c arch/arm/mach-ux500/platsmp.c ^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFC/PATCH v2] arm: convert arm boot_lock to raw 2013-08-01 13:37 ` Russell King - ARM Linux @ 2013-08-01 13:48 ` Felipe Balbi 0 siblings, 0 replies; 7+ messages in thread From: Felipe Balbi @ 2013-08-01 13:48 UTC (permalink / raw) To: Tony Lindgren Cc: Russell King, Linux OMAP Mailing List, Linux ARM Kernel Mailing List, Frank Rowand, Thomas Gleixner, Felipe Balbi From: Frank Rowand <frank.rowand@am.sony.com> The arm boot_lock is used by the secondary processor startup code. The locking task is the idle thread, which has idle->sched_class == &idle_sched_class. idle_sched_class->enqueue_task == NULL, so if the idle task blocks on the lock, the attempt to wake it when the lock becomes available will fail: try_to_wake_up() ... activate_task() enqueue_task() p->sched_class->enqueue_task(rq, p, flags) Fix by converting boot_lock to a raw spin lock. [ balbi@ti.com : fixes raw_spinlock_t definition for mach-spear ] Signed-off-by: Frank Rowand <frank.rowand@am.sony.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com> --- arch/arm/mach-exynos/platsmp.c | 12 ++++++------ arch/arm/mach-msm/platsmp.c | 10 +++++----- arch/arm/mach-omap2/omap-smp.c | 10 +++++----- arch/arm/mach-prima2/platsmp.c | 10 +++++----- arch/arm/mach-spear/platsmp.c | 10 +++++----- arch/arm/mach-ux500/platsmp.c | 10 +++++----- arch/arm/plat-versatile/platsmp.c | 10 +++++----- 7 files changed, 36 insertions(+), 36 deletions(-) diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 58b43e6..f56f767 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -73,7 +73,7 @@ static void __iomem *scu_base_addr(void) return (void __iomem *)(S5P_VA_SCU); } -static DEFINE_SPINLOCK(boot_lock); +static DEFINE_RAW_SPINLOCK(boot_lock); static void exynos_secondary_init(unsigned int cpu) { @@ -86,8 +86,8 @@ static void exynos_secondary_init(unsigned int cpu) /* * Synchronise with the boot thread. */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); + raw_spin_lock(&boot_lock); + raw_spin_unlock(&boot_lock); } static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) @@ -99,7 +99,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) * Set synchronisation state between this boot processor * and the secondary one */ - spin_lock(&boot_lock); + raw_spin_lock(&boot_lock); /* * The secondary processor is waiting to be released from @@ -128,7 +128,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) if (timeout == 0) { printk(KERN_ERR "cpu1 power enable failed"); - spin_unlock(&boot_lock); + raw_spin_unlock(&boot_lock); return -ETIMEDOUT; } } @@ -167,7 +167,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) * now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ - spin_unlock(&boot_lock); + raw_spin_unlock(&boot_lock); return pen_release != -1 ? -ENOSYS : 0; } diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index 3f06edc..fc09a04 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -30,7 +30,7 @@ extern void msm_secondary_startup(void); -static DEFINE_SPINLOCK(boot_lock); +static DEFINE_RAW_SPINLOCK(boot_lock); static inline int get_core_count(void) { @@ -50,8 +50,8 @@ static void msm_secondary_init(unsigned int cpu) /* * Synchronise with the boot thread. */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); + raw_spin_lock(&boot_lock); + raw_spin_unlock(&boot_lock); } static void prepare_cold_cpu(unsigned int cpu) @@ -88,7 +88,7 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) * set synchronisation state between this boot processor * and the secondary one */ - spin_lock(&boot_lock); + raw_spin_lock(&boot_lock); /* * The secondary processor is waiting to be released from @@ -122,7 +122,7 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) * now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ - spin_unlock(&boot_lock); + raw_spin_unlock(&boot_lock); return pen_release != -1 ? -ENOSYS : 0; } diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 8708b2a..c4caa18 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -44,7 +44,7 @@ u16 pm44xx_errata; /* SCU base address */ static void __iomem *scu_base; -static DEFINE_SPINLOCK(boot_lock); +static DEFINE_RAW_SPINLOCK(boot_lock); void __iomem *omap4_get_scu_base(void) { @@ -68,8 +68,8 @@ static void omap4_secondary_init(unsigned int cpu) /* * Synchronise with the boot thread. */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); + raw_spin_lock(&boot_lock); + raw_spin_unlock(&boot_lock); } static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) @@ -83,7 +83,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) * Set synchronisation state between this boot processor * and the secondary one */ - spin_lock(&boot_lock); + raw_spin_lock(&boot_lock); /* * Update the AuxCoreBoot0 with boot state for secondary core. @@ -160,7 +160,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) * Now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ - spin_unlock(&boot_lock); + raw_spin_unlock(&boot_lock); return 0; } diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c index 3dbcb1a..42837dc4 100644 --- a/arch/arm/mach-prima2/platsmp.c +++ b/arch/arm/mach-prima2/platsmp.c @@ -23,7 +23,7 @@ static void __iomem *scu_base; static void __iomem *rsc_base; -static DEFINE_SPINLOCK(boot_lock); +static DEFINE_RAW_SPINLOCK(boot_lock); static struct map_desc scu_io_desc __initdata = { .length = SZ_4K, @@ -56,8 +56,8 @@ static void sirfsoc_secondary_init(unsigned int cpu) /* * Synchronise with the boot thread. */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); + raw_spin_lock(&boot_lock); + raw_spin_unlock(&boot_lock); } static struct of_device_id rsc_ids[] = { @@ -95,7 +95,7 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle) /* make sure write buffer is drained */ mb(); - spin_lock(&boot_lock); + raw_spin_lock(&boot_lock); /* * The secondary processor is waiting to be released from @@ -128,7 +128,7 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle) * now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ - spin_unlock(&boot_lock); + raw_spin_unlock(&boot_lock); return pen_release != -1 ? -ENOSYS : 0; } diff --git a/arch/arm/mach-spear/platsmp.c b/arch/arm/mach-spear/platsmp.c index 5c4a198..33dc270 100644 --- a/arch/arm/mach-spear/platsmp.c +++ b/arch/arm/mach-spear/platsmp.c @@ -20,7 +20,7 @@ #include <mach/spear.h> #include "generic.h" -static DEFINE_SPINLOCK(boot_lock); +static DEFINE_RAW_SPINLOCK(boot_lock); static void __iomem *scu_base = IOMEM(VA_SCU_BASE); @@ -36,8 +36,8 @@ static void spear13xx_secondary_init(unsigned int cpu) /* * Synchronise with the boot thread. */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); + raw_spin_lock(&boot_lock); + raw_spin_unlock(&boot_lock); } static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) @@ -48,7 +48,7 @@ static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) * set synchronisation state between this boot processor * and the secondary one */ - spin_lock(&boot_lock); + raw_spin_lock(&boot_lock); /* * The secondary processor is waiting to be released from @@ -75,7 +75,7 @@ static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) * now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ - spin_unlock(&boot_lock); + raw_spin_unlock(&boot_lock); return pen_release != -1 ? -ENOSYS : 0; } diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 1f296e7..eeb5916 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -52,7 +52,7 @@ static void __iomem *scu_base_addr(void) return NULL; } -static DEFINE_SPINLOCK(boot_lock); +static DEFINE_RAW_SPINLOCK(boot_lock); static void ux500_secondary_init(unsigned int cpu) { @@ -65,8 +65,8 @@ static void ux500_secondary_init(unsigned int cpu) /* * Synchronise with the boot thread. */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); + raw_spin_lock(&boot_lock); + raw_spin_unlock(&boot_lock); } static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle) @@ -77,7 +77,7 @@ static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle) * set synchronisation state between this boot processor * and the secondary one */ - spin_lock(&boot_lock); + raw_spin_lock(&boot_lock); /* * The secondary processor is waiting to be released from @@ -98,7 +98,7 @@ static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle) * now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ - spin_unlock(&boot_lock); + raw_spin_unlock(&boot_lock); return pen_release != -1 ? -ENOSYS : 0; } diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c index 39895d8..b2e0858 100644 --- a/arch/arm/plat-versatile/platsmp.c +++ b/arch/arm/plat-versatile/platsmp.c @@ -31,7 +31,7 @@ static void write_pen_release(int val) outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1)); } -static DEFINE_SPINLOCK(boot_lock); +static DEFINE_RAW_SPINLOCK(boot_lock); void versatile_secondary_init(unsigned int cpu) { @@ -44,8 +44,8 @@ void versatile_secondary_init(unsigned int cpu) /* * Synchronise with the boot thread. */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); + raw_spin_lock(&boot_lock); + raw_spin_unlock(&boot_lock); } int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) @@ -56,7 +56,7 @@ int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) * Set synchronisation state between this boot processor * and the secondary one */ - spin_lock(&boot_lock); + raw_spin_lock(&boot_lock); /* * This is really belt and braces; we hold unintended secondary @@ -86,7 +86,7 @@ int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) * now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ - spin_unlock(&boot_lock); + raw_spin_unlock(&boot_lock); return pen_release != -1 ? -ENOSYS : 0; } -- 1.8.3.4.840.g6a90778 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [RFC/PATCH 0/3] arm: omap: patches from -rt 2013-08-01 12:12 [RFC/PATCH 0/3] arm: omap: patches from -rt Felipe Balbi ` (2 preceding siblings ...) 2013-08-01 12:12 ` [RFC/PATCH 3/3] arm: omap: convert omap boot_lock to raw Felipe Balbi @ 2013-08-01 17:07 ` Sourav Poddar 3 siblings, 0 replies; 7+ messages in thread From: Sourav Poddar @ 2013-08-01 17:07 UTC (permalink / raw) To: Felipe Balbi; +Cc: Linux OMAP Mailing List, Linux ARM Kernel Mailing List On Thursday 01 August 2013 05:42 PM, Felipe Balbi wrote: > Hi, > > the next three patches were taken from v3.10.4-rt1 patchset. > > I don't have any boards available to test them, so I'd suggest > testing in as many platforms as possible before pushing > upstream. > > By pushing these patches upstream, we help decrease the amount > of out-of-tree changes rt folks need to carry. > > Frank Rowand (1): > arm: omap: convert omap boot_lock to raw > > Sebastian Andrzej Siewior (1): > i2c/omap: drop the lock hard irq context > > Thomas Gleixner (1): > serial: omap: fix omap lock crap > > arch/arm/mach-omap2/omap-smp.c | 10 +++++----- > drivers/i2c/busses/i2c-omap.c | 5 +---- > drivers/tty/serial/omap-serial.c | 12 ++++-------- > 3 files changed, 10 insertions(+), 17 deletions(-) > Tested this series on omap4-sdp: - Boot tested . - run i2c dump on buses where devices were present. - check wakeup from suspend. omap5-uevm: - Boot tested. - Tested this series on buses where devices are present. dra7-evm: - Boot tested. - run i2c dump on buses where devices are present. Tested-by: Sourav Poddar <sourav.poddar@ti.com> ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2013-08-01 17:08 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-08-01 12:12 [RFC/PATCH 0/3] arm: omap: patches from -rt Felipe Balbi 2013-08-01 12:12 ` [RFC/PATCH 1/3] i2c/omap: drop the lock hard irq context Felipe Balbi 2013-08-01 12:12 ` [RFC/PATCH 2/3] serial: omap: fix omap lock crap Felipe Balbi 2013-08-01 12:12 ` [RFC/PATCH 3/3] arm: omap: convert omap boot_lock to raw Felipe Balbi 2013-08-01 13:37 ` Russell King - ARM Linux 2013-08-01 13:48 ` [RFC/PATCH v2] arm: convert arm " Felipe Balbi 2013-08-01 17:07 ` [RFC/PATCH 0/3] arm: omap: patches from -rt Sourav Poddar
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).