Re: [PATCH] mfd: twl6040: Correct HPPLL configuration for 19.2 and 38.4 MHz mclk

Lee Jones
2014-05-09T10:00:53Z

> When the MCLK is 19.2 or 38.4 MHz the HPPLL need to be enabled and can be
> put in bypass mode.
> This will fix HPPLL use on boards with 19.2MHz mclk.
>
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> ---
> drivers/mfd/twl6040.c | 13 +++++--------
> 1 file changed, 5 insertions(+), 8 deletions(-)

Applied, thanks.

--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
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