Re: [PATCH 07/10] ARM: OMAP5 / DRA7: Enable CPU RET on suspend

[Nishanth Menon <nm@ti.com>]

On 20:23-20140908, Grazvydas Ignotas wrote:
> On Sat, Sep 6, 2014 at 12:15 AM, Nishanth Menon <nm@ti.com> wrote:
> >
> > Hi,
> >
> > Updated patch below:
> > Do let me know if this is ok with folks.
> >
> > ---8<----
> > From 1b9e11834dac2bd75c396aa7495c806b027653fe Mon Sep 17 00:00:00 2001
> > From: Rajendra Nayak <rnayak@ti.com>
> > Date: Mon, 27 May 2013 15:46:44 +0530
> > Subject: [PATCH V2 7/10] ARM: OMAP5 / DRA7: Enable CPU RET on suspend
> >
> > On OMAP5 / DRA7, prevent a CPU powerdomain OFF and resulting MPU OSWR
> > and instead attempt a CPU RET and side effect, MPU RET in suspend.
> >
> > NOTE: the hardware was originally designed to be capable of achieving
> > deep power states such as OFF and OSWR, however due to various issues
> > and risks, deepest valid state was determined to be CSWR - hence we use
> 
> Would be great to have some more details here..

Sorry, I have no details that can be published publically. Lets say, "TI
refocus"?

> So there is no hope for OFF mode on OMAP5?

Yep, There is *NO* hope for OFF or OSWR on OMAP5/DRA7.

-- 
Regards,
Nishanth Menon