From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tony Lindgren Subject: Re: [PATCH] ARM: dts: dra7: fix DSS PLL clock mux registers Date: Wed, 12 Nov 2014 07:25:49 -0800 Message-ID: <20141112152549.GG26481@atomide.com> References: <1413190241-13527-1-git-send-email-tomi.valkeinen@ti.com> <20141112152401.GF26481@atomide.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from mho-03-ewr.mailhop.org ([204.13.248.66]:14999 "EHLO mho-01-ewr.mailhop.org" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752871AbaKLP01 (ORCPT ); Wed, 12 Nov 2014 10:26:27 -0500 Content-Disposition: inline In-Reply-To: <20141112152401.GF26481@atomide.com> Sender: linux-omap-owner@vger.kernel.org List-Id: linux-omap@vger.kernel.org To: Tomi Valkeinen Cc: linux-omap@vger.kernel.org, Tero Kristo , paul@pwsan.com, Somnath Mukherjee * Tony Lindgren [141112 07:26]: > * Tomi Valkeinen [141013 01:52]: > > The clock nodes for DSS VIDEO1/2 and HDMI have wrong register addresses. > > This patch fixes the addresses so that they point to > > CM_CLKSEL_VIDEO1_PLL_SYS, CM_CLKSEL_VIDEO2_PLL_SYS and > > CM_CLKSEL_HDMI_PLL_SYS. > > > > Reported-by: Somnath Mukherjee > > Signed-off-by: Tomi Valkeinen > > Applying into omap-for-v3.19/fixes-not-urgent thanks. Actually this one would be good to have an ack from Tero as he may need to fix his scripts generating these entries. So dropping for now. Regards, Tony