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From: Nishanth Menon <nm@ti.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Alexandre Courbot <gnurou@gmail.com>,
	Benoit Cousson <bcousson@baylibre.com>,
	Tony Lindgren <tony@atomide.com>,
	Santosh Shilimkar <ssantosh@kernel.org>,
	Shawn Guo <shawn.guo@linaro.org>,
	Sascha Hauer <kernel@pengutronix.de>,
	Kukjin Kim <kgene.kim@samsung.com>,
	Simon Horman <horms@verge.net.au>,
	Magnus Damm <magnus.damm@gmail.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Jason Cooper <jason@lakedaemon.net>,
	Thomas Gleixner <tglx@linutronix.de>,
	linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-omap@vger.kernel.org
Subject: Re: [PATCH v2 05/21] DT: tegra: add binding for the legacy interrupt controller
Date: Thu, 8 Jan 2015 09:12:08 -0600	[thread overview]
Message-ID: <20150108151208.GC24654@kahuna> (raw)
In-Reply-To: <1420652576-22309-6-git-send-email-marc.zyngier@arm.com>

On 17:42-20150107, Marc Zyngier wrote:
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  .../interrupt-controller/nvidia,tegra-ictlr.txt    | 39 ++++++++++++++++++++++
>  1 file changed, 39 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra-ictlr.txt
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra-ictlr.txt b/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra-ictlr.txt
> new file mode 100644
> index 0000000..44fd873
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra-ictlr.txt
> @@ -0,0 +1,39 @@
> +NVIDIA Legacy Interrupt Controller
> +
> +All Tegra SoCs contain a legacy interrupt controller that routes
> +interrupts to the GIC, and also serves as a wakeup source. It is also
> +refered to as "ictlr", hence the name of the binding.
> +
> +The HW block exposes a number of frames, each implementing a set of 32
> +interrupts.
> +
> +Reguired properties:
> +
> +- compatible : should contain at least "nvidia,tegra-ictlr".

perhaps list the specific versions here..?

+WARNING: DT compatible string "nvidia,tegra114-ictlr" appears un-documented -- check ./Documentation/devicetree/bindings/
+#39: FILE: arch/arm/boot/dts/tegra114.dtsi:141:
++		compatible = "nvidia,tegra114-ictlr", "nvidia,tegra-ictlr";
+WARNING: DT compatible string "nvidia,tegra-ictlr" appears un-documented -- check ./Documentation/devicetree/bindings/
+#39: FILE: arch/arm/boot/dts/tegra114.dtsi:141:
++		compatible = "nvidia,tegra114-ictlr", "nvidia,tegra-ictlr";
+WARNING: DT compatible string "nvidia,tegra124-ictlr" appears un-documented -- check ./Documentation/devicetree/bindings/
+#84: FILE: arch/arm/boot/dts/tegra124.dtsi:195:
++		compatible = "nvidia,tegra124-ictlr", "nvidia,tegra-ictlr";
+WARNING: DT compatible string "nvidia,tegra-ictlr" appears un-documented -- check ./Documentation/devicetree/bindings/
+#84: FILE: arch/arm/boot/dts/tegra124.dtsi:195:
++		compatible = "nvidia,tegra124-ictlr", "nvidia,tegra-ictlr";
+WARNING: DT compatible string "nvidia,tegra20-ictlr" appears un-documented -- check ./Documentation/devicetree/bindings/
+#139: FILE: arch/arm/boot/dts/tegra20.dtsi:171:
++		compatible = "nvidia,tegra20-ictlr", "nvidia,tegra-ictlr";
+WARNING: DT compatible string "nvidia,tegra-ictlr" appears un-documented -- check ./Documentation/devicetree/bindings/
+#139: FILE: arch/arm/boot/dts/tegra20.dtsi:171:
++		compatible = "nvidia,tegra20-ictlr", "nvidia,tegra-ictlr";
+WARNING: DT compatible string "nvidia,tegra30-ictlr" appears un-documented -- check ./Documentation/devicetree/bindings/
+#186: FILE: arch/arm/boot/dts/tegra30.dtsi:256:
++		compatible = "nvidia,tegra30-ictlr", "nvidia,tegra-ictlr";
+WARNING: DT compatible string "nvidia,tegra-ictlr" appears un-documented -- check ./Documentation/devicetree/bindings/
+#186: FILE: arch/arm/boot/dts/tegra30.dtsi:256:
++		compatible = "nvidia,tegra30-ictlr", "nvidia,tegra-ictlr";
> +- reg : Specifies base physical address and size of the registers.
> +  Each frame must be described separately.
> +- interrupt-controller : Identifies the node as an interrupt controller.
> +- #interrupt-cells : Specifies the number of cells needed to encode an
> +  interrupt source. The value must be 3.
> +- interrupt-parent : a phandle to the GIC these interrupts are routed
> +  to.
> +
> +Notes:
> +
> +- Because this HW ultimately routes interrupts to the GIC, the
> +  interrupt specifier must be that of the GIC.
> +- Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
> +  are explicitely forbiden.
> +
> +Example:
> +
> +	ictlr: interrupt-controller@60004000 {
> +		compatible = "nvidia,tegra20-ictlr", "nvidia,tegra-ictlr";

> +		reg = <0x60004000 64>,
> +		      <0x60004100 64>,
> +		      <0x60004200 64>,
> +		      <0x60004300 64>;
> +		interrupt-controller;
> +		#interrupt-cells = <3>;
> +		interrupt-parent = <&intc>;
> +	};
> -- 
> 2.1.4

Might be good to have this patch before patch #3, since the binding
defined here is implemented in #3 and used in #4. also:

+WARNING: 'refered' may be misspelled - perhaps 'referred'?
+#23: FILE: Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra-ictlr.txt:5:
++refered to as "ictlr", hence the name of the binding.
+WARNING: 'explicitely' may be misspelled - perhaps 'explicitly'?
+#44: FILE: Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra-ictlr.txt:26:
++  are explicitely forbiden.
-- 
Regards,
Nishanth Menon

  parent reply	other threads:[~2015-01-08 15:12 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-07 17:42 [PATCH v2 00/21] irqchip: gic: killing gic_arch_extn and co, slowly Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 01/21] ARM: tegra: irq: nuke leftovers from non-DT support Marc Zyngier
2015-01-08  8:56   ` Thierry Reding
2015-01-07 17:42 ` [PATCH v2 02/21] irqchip: tegra: add DT-based support for legacy interrupt controller Marc Zyngier
2015-01-08 10:13   ` Thierry Reding
2015-01-08 15:06   ` Nishanth Menon
2015-01-10 12:28     ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 03/21] ARM: tegra: skip gic_arch_extn setup if DT has a LIC node Marc Zyngier
2015-01-08 10:16   ` Thierry Reding
2015-01-07 17:42 ` [PATCH v2 04/21] ARM: tegra: update DTs to expose legacy interrupt controller Marc Zyngier
2015-01-08 10:41   ` Thierry Reding
2015-01-10 12:37     ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 05/21] DT: tegra: add binding for the " Marc Zyngier
2015-01-08 10:51   ` Thierry Reding
2015-01-08 15:12   ` Nishanth Menon [this message]
2015-01-07 17:42 ` [PATCH v2 06/21] ARM: tegra: remove old LIC support Marc Zyngier
2015-01-08 11:29   ` Thierry Reding
2015-01-10 12:43     ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 07/21] genirq: Add irqchip_set_wake_parent Marc Zyngier
2015-01-08 15:15   ` Nishanth Menon
2015-01-10 12:46     ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 08/21] irqchip: crossbar: convert dra7 crossbar to stacked domains Marc Zyngier
2015-01-08 14:39   ` Nishanth Menon
2015-01-10 12:59     ` Marc Zyngier
2015-01-08 15:20   ` Nishanth Menon
2015-01-07 17:42 ` [PATCH v2 09/21] DT: update ti,irq-crossbar binding Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 10/21] irqchip: GIC: get rid of routable domain Marc Zyngier
2015-01-08 16:13   ` Nishanth Menon
2015-01-07 17:42 ` [PATCH v2 11/21] DT: arm,gic: kill arm,routable-irqs Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 12/21] ARM: omap: convert wakeupgen to stacked domains Marc Zyngier
2015-01-08 16:44   ` Nishanth Menon
2015-01-10 13:17     ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 13/21] DT: omap4/5: add binding for the wake-up generator Marc Zyngier
2015-01-08 16:52   ` Nishanth Menon
2015-01-10 13:22     ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 14/21] ARM: imx6: convert GPC to stacked domains Marc Zyngier
2015-01-08 16:57   ` Nishanth Menon
2015-01-09 17:40   ` Stefan Agner
2015-01-10 13:34     ` Marc Zyngier
2015-01-10 14:16       ` Stefan Agner
2015-01-07 17:42 ` [PATCH v2 15/21] ARM: exynos4/5: convert pmu wakeup " Marc Zyngier
2015-01-08 16:58   ` Nishanth Menon
2015-01-07 17:42 ` [PATCH v2 16/21] DT: exynos: update PMU binding Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 17/21] irqchip: gic: add an entry point to set up irqchip flags Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 18/21] ARM: shmobile: remove use of gic_arch_extn.irq_set_wake Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 19/21] ARM: ux500: switch from gic_arch_extn to gic_set_irqchip_flags Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 20/21] ARM: zynq: " Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 21/21] irqchip: gic: Drop support for gic_arch_extn Marc Zyngier
2015-01-07 18:45 ` [PATCH v2 00/21] irqchip: gic: killing gic_arch_extn and co, slowly santosh shilimkar
2015-01-08  3:31 ` Nishanth Menon
2015-01-10 13:45 ` Marc Zyngier
2015-01-12 14:14 ` Rob Herring
2015-01-12 15:39   ` Marc Zyngier

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