[PATCH 0/2] mtd: nand: omap2: Fix SDMA support for NAND DMA prefetch

[PATCH 0/2] mtd: nand: omap2: Fix SDMA support for NAND DMA prefetch

[Franklin S Cooper Jr]

NAND DMA prefetch for SDMA based devices has been broken for awhile. This
patchset fixes it so SOCs that use the SDMA can make use of the NAND
DMA prefetch.

I've decided to split this patchset from the slightly larger patchset that
included EDMA support. Adding EDMA support will be added in a later
patchset.

Tested using the latest master on:
am37 gp evm

Due to a silicon issue Dra7 SoCs are unable to use NAND DMA prefetch.

Cooper Jr., Franklin (2):
  mtd: nand: omap2: Start dma request before enabling prefetch
  mtd: nand: omap2: Fix high memory dma prefetch transfer

 drivers/mtd/nand/omap2.c | 22 +++++++---------------
 1 file changed, 7 insertions(+), 15 deletions(-)

-- 
2.7.0

[PATCH 1/2] mtd: nand: omap2: Start dma request before enabling prefetch

[Franklin S Cooper Jr]

From: "Cooper Jr., Franklin" <fcooper@ti.com>

The prefetch engine sends a dma request once a FIFO threshold has
been met. No other requests are received until the previous request
is handled.

Starting a dma transfer (dma_async_issue_pending) results in any
previous event for the dma channel to be cleared. Therefore, starting
the prefetch engine before initiating the dma transfer may result in
the prefetch triggering a dma request but instead of it being handled
it can end up being cleared. This will result in a hang since the code
will continue to wait for the dma request to complete.

By initiating the dma request before enabling the prefetch engine this
race condition is avoided and no dma request are missed/cleared.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
---
 drivers/mtd/nand/omap2.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 0749ca1..762e0ed 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -497,6 +497,11 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
 	tx->callback_param = &info->comp;
 	dmaengine_submit(tx);
 
+	init_completion(&info->comp);
+
+	/* setup and start DMA using dma_addr */
+	dma_async_issue_pending(info->dma);
+
 	/*  configure and start prefetch transfer */
 	ret = omap_prefetch_enable(info->gpmc_cs,
 		PREFETCH_FIFOTHRESHOLD_MAX, 0x1, len, is_write, info);
@@ -504,10 +509,6 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
 		/* PFPW engine is busy, use cpu copy method */
 		goto out_copy_unmap;
 
-	init_completion(&info->comp);
-	dma_async_issue_pending(info->dma);
-
-	/* setup and start DMA using dma_addr */
 	wait_for_completion(&info->comp);
 	tim = 0;
 	limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
-- 
2.7.0

[PATCH 2/2] mtd: nand: omap2: Fix high memory dma prefetch transfer

[Franklin S Cooper Jr]

From: "Cooper Jr., Franklin" <fcooper@ti.com>

Based on DMA documentation and testing using high memory buffer when doing
dma transfers can lead to various issues including kernel panics.

To workaround this simply use cpu copy.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
---
 drivers/mtd/nand/omap2.c | 13 ++-----------
 1 file changed, 2 insertions(+), 11 deletions(-)

diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 762e0ed..8d0ae3a 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -467,17 +467,8 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
 	int ret;
 	u32 val;
 
-	if (addr >= high_memory) {
-		struct page *p1;
-
-		if (((size_t)addr & PAGE_MASK) !=
-			((size_t)(addr + len - 1) & PAGE_MASK))
-			goto out_copy;
-		p1 = vmalloc_to_page(addr);
-		if (!p1)
-			goto out_copy;
-		addr = page_address(p1) + ((size_t)addr & ~PAGE_MASK);
-	}
+	if (!virt_addr_valid(addr))
+		goto out_copy;
 
 	sg_init_one(&sg, addr, len);
 	n = dma_map_sg(info->dma->device->dev, &sg, 1, dir);
-- 
2.7.0

Re: [PATCH 0/2] mtd: nand: omap2: Fix SDMA support for NAND DMA prefetch

[Boris Brezillon]

On Fri, 15 Apr 2016 15:28:57 -0500
Franklin S Cooper Jr <fcooper@ti.com> wrote:

> NAND DMA prefetch for SDMA based devices has been broken for awhile. This
> patchset fixes it so SOCs that use the SDMA can make use of the NAND
> DMA prefetch.
> 
> I've decided to split this patchset from the slightly larger patchset that
> included EDMA support. Adding EDMA support will be added in a later
> patchset.
> 
> Tested using the latest master on:
> am37 gp evm
> 
> Due to a silicon issue Dra7 SoCs are unable to use NAND DMA prefetch.

Applied, thanks.

Boris

> 
> Cooper Jr., Franklin (2):
>   mtd: nand: omap2: Start dma request before enabling prefetch
>   mtd: nand: omap2: Fix high memory dma prefetch transfer
> 
>  drivers/mtd/nand/omap2.c | 22 +++++++---------------
>  1 file changed, 7 insertions(+), 15 deletions(-)
> 



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com