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From: Grygorii Strashko <grygorii.strashko@ti.com>
To: "David S. Miller" <davem@davemloft.net>,
	netdev@vger.kernel.org, Mugunthan V N <mugunthanvnm@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>,
	linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
	Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org>,
	Grygorii Strashko <grygorii.strashko@ti.com>
Subject: [PATCH 5/7] Documentation: DT: net: cpsw: allow to specify descriptors pool size
Date: Thu, 1 Dec 2016 17:34:30 -0600	[thread overview]
Message-ID: <20161201233432.6182-6-grygorii.strashko@ti.com> (raw)
In-Reply-To: <20161201233432.6182-1-grygorii.strashko@ti.com>

Add optional property "descs_pool_size" to specify buffer descriptor's
pool size. The "descs_pool_size" should define total number of CPDMA
CPPI descriptors to be used for both ingress/egress packets
processing. If not specified - the default value 256 will be used
which will allow to place descriptor's pool into the internal CPPI
RAM on most of TI SoC.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
---
 Documentation/devicetree/bindings/net/cpsw.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/cpsw.txt b/Documentation/devicetree/bindings/net/cpsw.txt
index 5ad439f..b99d196 100644
--- a/Documentation/devicetree/bindings/net/cpsw.txt
+++ b/Documentation/devicetree/bindings/net/cpsw.txt
@@ -35,6 +35,11 @@ Optional properties:
 			  For example in dra72x-evm, pcf gpio has to be
 			  driven low so that cpsw slave 0 and phy data
 			  lines are connected via mux.
+- descs_pool_size	: total number of CPDMA CPPI descriptors to be used for
+			  both ingress/egress packets processing. if not
+			  specified the default value 256 will be used which
+			  will allow to place descriptors pool into the
+			  internal CPPI RAM.
 
 
 Slave Properties:
-- 
2.10.1

  parent reply	other threads:[~2016-12-01 23:34 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-01 23:34 [PATCH 0/7] net: ethernet: ti: cpsw: support placing CPDMA descriptors into DDR Grygorii Strashko
2016-12-01 23:34 ` [PATCH 1/7] net: ethernet: ti: cpdma: am437x: allow descs to be plased in ddr Grygorii Strashko
2016-12-03 20:34   ` David Miller
2016-12-05 17:57     ` Grygorii Strashko
2016-12-01 23:34 ` [PATCH 2/7] net: ethernet: ti: cpdma: fix desc re-queuing Grygorii Strashko
2016-12-02 11:03   ` Ivan Khoronzhuk
2016-12-02 16:45     ` Grygorii Strashko
2016-12-02 23:28       ` Ivan Khoronzhuk
2016-12-05 18:22         ` Grygorii Strashko
2016-12-01 23:34 ` [PATCH 3/7] net: ethernet: ti: cpdma: minimize number of parameters in cpdma_desc_pool_create/destroy() Grygorii Strashko
2016-12-01 23:34 ` [PATCH 4/7] net: ethernet: ti: cpdma: use devm_ioremap Grygorii Strashko
2016-12-01 23:34 ` Grygorii Strashko [this message]
2016-12-02 11:28   ` [PATCH 5/7] Documentation: DT: net: cpsw: allow to specify descriptors pool size Ivan Khoronzhuk
2016-12-02 17:21     ` Grygorii Strashko
2016-12-07 19:41       ` Grygorii Strashko
2016-12-02 17:22     ` Grygorii Strashko
2016-12-01 23:34 ` [PATCH 6/7] net: ethernet: ti: cpsw: add support for descs_pool_size dt property Grygorii Strashko
2016-12-01 23:34 ` [PATCH 7/7] Documentation: DT: net: cpsw: remove no_bd_ram property Grygorii Strashko

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