From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65F9FC4741F for ; Fri, 6 Nov 2020 05:08:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B73F6208B3 for ; Fri, 6 Nov 2020 05:08:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="PBkohtGD" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725616AbgKFFIO (ORCPT ); Fri, 6 Nov 2020 00:08:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725306AbgKFFIN (ORCPT ); Fri, 6 Nov 2020 00:08:13 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C54CC0613CF for ; Thu, 5 Nov 2020 21:08:13 -0800 (PST) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id DF45BB16; Fri, 6 Nov 2020 06:08:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1604639292; bh=EvGcaW0gKHQgA1E5M/q/O1AdjNDbdASwjkVEuH4XRA8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=PBkohtGDV0mwqYG4ksxp/HPMOO/6A0gw5OlnhUCKJMqkKH1V7s81n2985T4Le9KmT MJXZEmCgzeffJAadPnSIpEHMeZ4ZoB9e52AQRF8NvOCKD0saKrJXaNDAGSTUp79O29 RSvbK27Q3tMoh0FyquSre2rZfSVt+la6mfqQ5pUs= Date: Fri, 6 Nov 2020 07:08:10 +0200 From: Laurent Pinchart To: Tomi Valkeinen Cc: Sebastian Reichel , Nikhil Devshatwar , linux-omap@vger.kernel.org, dri-devel@lists.freedesktop.org, Sekhar Nori , Tony Lindgren , "H . Nikolaus Schaller" , Sebastian Reichel Subject: Re: [PATCH v3 07/56] drm/omap: panel-dsi-cm: convert to transfer API Message-ID: <20201106050810.GB25769@pendragon.ideasonboard.com> References: <20201105120333.947408-1-tomi.valkeinen@ti.com> <20201105120333.947408-8-tomi.valkeinen@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20201105120333.947408-8-tomi.valkeinen@ti.com> Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Hi Tomi and Sebastian, Thank you for the patch. On Thu, Nov 05, 2020 at 02:02:44PM +0200, Tomi Valkeinen wrote: > From: Sebastian Reichel > > This converts the panel-dsi-cm driver to use the transfer > API instead of specific functions, so that the specific > functions can be unexported and squashed into the generic > transfer function. > > Signed-off-by: Sebastian Reichel > Signed-off-by: Tomi Valkeinen There are a few very minor comments I would have made below, but as this file is going away later in this series, it doesn't matter. Acked-by: Laurent Pinchart > --- > .../gpu/drm/omapdrm/displays/panel-dsi-cm.c | 132 +++++++++++++----- > 1 file changed, 95 insertions(+), 37 deletions(-) > > diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c > index b8f3a7aacbf4..8b2e80129bd8 100644 > --- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c > +++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c > @@ -140,45 +140,61 @@ static void hw_guard_wait(struct panel_drv_data *ddata) > static int dsicm_dcs_read_1(struct panel_drv_data *ddata, u8 dcs_cmd, u8 *data) > { > struct omap_dss_device *src = ddata->src; > - int r; > - u8 buf[1]; > - > - r = src->ops->dsi.dcs_read(src, ddata->channel, dcs_cmd, buf, 1); > - > - if (r < 0) > - return r; > - > - *data = buf[0]; > + const struct mipi_dsi_msg msg = { > + .channel = ddata->channel, > + .type = MIPI_DSI_DCS_READ, > + .tx_len = 1, > + .tx_buf = &dcs_cmd, > + .rx_len = 1, > + .rx_buf = data > + }; > > - return 0; > + return src->ops->dsi.transfer(src, &msg); > } > > static int dsicm_dcs_write_0(struct panel_drv_data *ddata, u8 dcs_cmd) > { > struct omap_dss_device *src = ddata->src; > + const struct mipi_dsi_msg msg = { > + .channel = ddata->channel, > + .type = MIPI_DSI_DCS_SHORT_WRITE, > + .tx_buf = &dcs_cmd, > + .tx_len = 1, > + }; > > - return src->ops->dsi.dcs_write(src, ddata->channel, &dcs_cmd, 1); > + return src->ops->dsi.transfer(src, &msg); > } > > static int dsicm_dcs_write_1(struct panel_drv_data *ddata, u8 dcs_cmd, u8 param) > { > struct omap_dss_device *src = ddata->src; > - u8 buf[2] = { dcs_cmd, param }; > + const u8 buf[] = { dcs_cmd, param }; > + const struct mipi_dsi_msg msg = { > + .channel = ddata->channel, > + .type = MIPI_DSI_DCS_SHORT_WRITE_PARAM, > + .tx_buf = &buf, > + .tx_len = 2, > + }; > > - return src->ops->dsi.dcs_write(src, ddata->channel, buf, 2); > + return src->ops->dsi.transfer(src, &msg); > } > > static int dsicm_sleep_in(struct panel_drv_data *ddata) > > { > struct omap_dss_device *src = ddata->src; > - u8 cmd; > int r; > + const u8 cmd = MIPI_DCS_ENTER_SLEEP_MODE; > + const struct mipi_dsi_msg msg = { > + .channel = ddata->channel, > + .type = MIPI_DSI_DCS_SHORT_WRITE, > + .tx_buf = &cmd, > + .tx_len = 1, > + }; > > hw_guard_wait(ddata); > > - cmd = MIPI_DCS_ENTER_SLEEP_MODE; > - r = src->ops->dsi.dcs_write_nosync(src, ddata->channel, &cmd, 1); > + r = src->ops->dsi.transfer(src, &msg); > if (r) > return r; > > @@ -233,28 +249,43 @@ static int dsicm_set_update_window(struct panel_drv_data *ddata, > u16 y1 = y; > u16 y2 = y + h - 1; > > - u8 buf[5]; > - buf[0] = MIPI_DCS_SET_COLUMN_ADDRESS; > - buf[1] = (x1 >> 8) & 0xff; > - buf[2] = (x1 >> 0) & 0xff; > - buf[3] = (x2 >> 8) & 0xff; > - buf[4] = (x2 >> 0) & 0xff; > + const u8 paramX[] = { > + MIPI_DCS_SET_COLUMN_ADDRESS, > + (x1 >> 8) & 0xff, > + (x1 >> 0) & 0xff, > + (x2 >> 8) & 0xff, > + (x2 >> 0) & 0xff, > + }; > > - r = src->ops->dsi.dcs_write_nosync(src, ddata->channel, buf, sizeof(buf)); > - if (r) > - return r; > + const struct mipi_dsi_msg msgX = { > + .channel = ddata->channel, > + .type = MIPI_DSI_GENERIC_LONG_WRITE, > + .tx_buf = paramX, > + .tx_len = 5, > + }; > + > + const u8 paramY[] = { > + MIPI_DCS_SET_PAGE_ADDRESS, > + (y1 >> 8) & 0xff, > + (y1 >> 0) & 0xff, > + (y2 >> 8) & 0xff, > + (y2 >> 0) & 0xff, > + }; > > - buf[0] = MIPI_DCS_SET_PAGE_ADDRESS; > - buf[1] = (y1 >> 8) & 0xff; > - buf[2] = (y1 >> 0) & 0xff; > - buf[3] = (y2 >> 8) & 0xff; > - buf[4] = (y2 >> 0) & 0xff; > + const struct mipi_dsi_msg msgY = { > + .channel = ddata->channel, > + .type = MIPI_DSI_GENERIC_LONG_WRITE, > + .tx_buf = paramY, > + .tx_len = 5, > + }; > > - r = src->ops->dsi.dcs_write_nosync(src, ddata->channel, buf, sizeof(buf)); > + r = src->ops->dsi.transfer(src, &msgX); > if (r) > return r; > > - src->ops->dsi.bta_sync(src, ddata->channel); > + r = src->ops->dsi.transfer(src, &msgY); > + if (r) > + return r; > > return r; > } > @@ -991,6 +1022,27 @@ static int dsicm_get_te(struct omap_dss_device *dssdev) > return r; > } > > +static int dsicm_set_max_rx_packet_size(struct omap_dss_device *dssdev, > + u16 size) > +{ > + struct panel_drv_data *ddata = to_panel_data(dssdev); > + struct omap_dss_device *src = ddata->src; > + > + const u8 buf[] = { > + size & 0xff, > + size >> 8 & 0xff, > + }; > + > + const struct mipi_dsi_msg msg = { > + .channel = ddata->channel, > + .type = MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE, > + .tx_buf = buf, > + .tx_len = 2, > + }; > + > + return src->ops->dsi.transfer(src, &msg); > +} > + > static int dsicm_memory_read(struct omap_dss_device *dssdev, > void *buf, size_t size, > u16 x, u16 y, u16 w, u16 h) > @@ -1031,17 +1083,23 @@ static int dsicm_memory_read(struct omap_dss_device *dssdev, > > dsicm_set_update_window(ddata, x, y, w, h); > > - r = src->ops->dsi.set_max_rx_packet_size(src, ddata->channel, plen); > + r = dsicm_set_max_rx_packet_size(dssdev, plen); > if (r) > goto err2; > > while (buf_used < size) { > u8 dcs_cmd = first ? 0x2e : 0x3e; > + const struct mipi_dsi_msg msg = { > + .channel = ddata->channel, > + .type = MIPI_DSI_DCS_READ, > + .tx_buf = &dcs_cmd, > + .tx_len = 1, > + .rx_buf = buf + buf_used, > + .rx_len = size - buf_used, > + }; > first = 0; > > - r = src->ops->dsi.dcs_read(src, ddata->channel, dcs_cmd, > - buf + buf_used, size - buf_used); > - > + r = src->ops->dsi.transfer(src, &msg); > if (r < 0) { > dev_err(dssdev->dev, "read error\n"); > goto err3; > @@ -1065,7 +1123,7 @@ static int dsicm_memory_read(struct omap_dss_device *dssdev, > r = buf_used; > > err3: > - src->ops->dsi.set_max_rx_packet_size(src, ddata->channel, 1); > + dsicm_set_max_rx_packet_size(dssdev, 1); > err2: > src->ops->dsi.bus_unlock(src); > err1: -- Regards, Laurent Pinchart