[PATCH 0/3] PCI: J721E: Fix Broken DT w.r.t SYSCON DT

Kishon Vijay Abraham I
2020-11-16T17:32:29Z

Previously a subnode to syscon node was added which has the
exact memory mapped address of pcie_ctrl but based on review comment
provided by Rob [1], the offset is now being passed as argument to
"ti,syscon-pcie-ctrl" phandle.

This series has both driver change and DT change and both has to
get in together in the -rc cycle.

[1] -> Link: http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com

Kishon Vijay Abraham I (3):
dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" to take argument
PCI: j721e: Get offset within "syscon" from "ti,syscon-pcie-ctrl"
phandle arg
arm64: dts: ti: k3-j721e-main: Remove "syscon" nodes added for
pcieX_ctrl

.../bindings/pci/ti,j721e-pci-ep.yaml | 12 +++--
.../bindings/pci/ti,j721e-pci-host.yaml | 12 +++--
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 48 ++++---------------
drivers/pci/controller/cadence/pci-j721e.c | 28 +++++++----
4 files changed, 43 insertions(+), 57 deletions(-)

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2.17.1