public inbox for linux-omap@vger.kernel.org
 help / color / mirror / Atom feed
From: Billy Tsai <billy_tsai@aspeedtech.com>
To: Tony Lindgren <tony@atomide.com>,
	Haojian Zhuang <haojian.zhuang@linaro.org>,
	Linus Walleij <linusw@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-omap@vger.kernel.org>, <linux-gpio@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <andrew@codeconstruct.com.au>,
	<BMC-SW@aspeedtech.com>, Billy Tsai <billy_tsai@aspeedtech.com>
Subject: [PATCH v2 0/3] pinctrl: single: bit-per-mux DT flexibility, probe robustness, and consistent pinconf offsets
Date: Fri, 23 Jan 2026 11:41:22 +0800	[thread overview]
Message-ID: <20260123-upstream_pinctrl_single-v2-0-40f8063cc5a2@aspeedtech.com> (raw)

This series is motivated by the pinmux and pin configuration register layout
of the ASPEED AST2700 SoC, which exposes several limitations in the current
pinctrl-single behavior on bit-per-mux platforms.

On AST2700, pinmux registers are laid out contiguously per pin, with each pin
occupying a fixed-width bitfield and pins packed sequentially within shared
registers. While the existing pinctrl-single,bits binding can represent this
layout, doing so requires manually constructing offset/mask/value tuples that
do not map naturally to the hardware model and are error-prone to maintain.
In practice, describing pinmux configuration in terms of <pin_index func_sel>
better reflects the underlying design, improves DTS readability, and reduces
the chance of mask or shift mistakes, while still preserving
pinctrl-single,bits as the preferred and fully supported binding when present.

AST2700 pin configuration registers follow the same per-pin packing scheme as
pinmux, with both multi-bit and single-bit fields arranged sequentially per
pin. However, the current pinctrl-single pinconf offset calculation assumes a
linear per-register layout, which does not align with this bit-per-pin scheme
when bit-per-mux or function-mask configurations are in use. Aligning pinconf
offset computation with the pinmux logic ensures consistent and predictable
behavior and avoids incorrect pinconf operations on such platforms.

In addition, on many AST2700 systems the SCU register range containing the
pinctrl registers is commonly reserved by a top-level syscon node or by
firmware. In this configuration, devm_request_mem_region() can return -EBUSY
even though the registers are valid and intended to be shared. Since
pinctrl-single is a direct MMIO-based driver and does not integrate with
syscon/regmap, failing probe in this case prevents any pinmux configuration
from being applied. Treating this condition as a warning allows the driver to
initialize while still reporting the shared-resource situation.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
---
Changes in v2:
- Updated the cover letter to better explain the AST2700-specific motivation
  for this series and why the current pinctrl-single behavior is insufficient
  on such platforms.
- Clarified the rationale for allowing probe to continue when the MMIO region
  is already reserved.
- No functional changes compared to v1.
- Link to v1: https://lore.kernel.org/r/20251222-upstream_pinctrl_single-v1-0-e4aaa4eeb936@aspeedtech.com

---
Billy Tsai (3):
      pinctrl: single: add per-pin binding support for bit-per-mux
      pinctrl: single: Allow probe to continue if mem region busy
      pinctrl: single: unify pinconf offset mapping with pinmux

 drivers/pinctrl/pinctrl-single.c | 150 ++++++++++++++++++++++++++++-----------
 1 file changed, 110 insertions(+), 40 deletions(-)
---
base-commit: dd9b004b7ff3289fb7bae35130c0a5c0537266af
change-id: 20251222-upstream_pinctrl_single-99e8df1fe2b9

Best regards,
-- 
Billy Tsai <billy_tsai@aspeedtech.com>


             reply	other threads:[~2026-01-23  3:46 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-23  3:41 Billy Tsai [this message]
2026-01-23  3:41 ` [PATCH v2 1/3] pinctrl: single: add per-pin binding support for bit-per-mux Billy Tsai
2026-01-23  3:41 ` [PATCH v2 2/3] pinctrl: single: Allow probe to continue if mem region busy Billy Tsai
2026-01-23  3:41 ` [PATCH v2 3/3] pinctrl: single: unify pinconf offset mapping with pinmux Billy Tsai
2026-02-03  0:13 ` [PATCH v2 0/3] pinctrl: single: bit-per-mux DT flexibility, probe robustness, and consistent pinconf offsets Linus Walleij
2026-02-04  6:54   ` Billy Tsai
2026-02-06  4:22     ` Tony Lindgren
2026-02-06  7:24       ` Billy Tsai
2026-02-06 11:04         ` Linus Walleij
2026-02-06 11:34           ` Billy Tsai
2026-02-06 12:50             ` Linus Walleij
2026-02-09  2:25               ` Billy Tsai
2026-02-09  9:50                 ` Linus Walleij
2026-02-09 14:42                   ` Tony Lindgren
2026-02-10  6:28                     ` Billy Tsai
2026-02-11  1:48                       ` Andrew Jeffery

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260123-upstream_pinctrl_single-v2-0-40f8063cc5a2@aspeedtech.com \
    --to=billy_tsai@aspeedtech.com \
    --cc=BMC-SW@aspeedtech.com \
    --cc=andrew@codeconstruct.com.au \
    --cc=haojian.zhuang@linaro.org \
    --cc=linusw@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-omap@vger.kernel.org \
    --cc=tony@atomide.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox