[PATCH] ARM: OMAP: omap_uwire: wait for tx complete before starting the next one

Imre Deak
2006-06-09T15:17:50Z

The TDR register shouldn't be written when the CSRB flag is set. The fix
solves the problem where one SPI transfer includes multiple 8 or 16 bit
tx elements and the current transfer can be corrupted by accessing the
TDR too early.

Signed-off-by: Imre Deak <imre.deak@nokia.com>

diff --git a/drivers/spi/omap_uwire.c b/drivers/spi/omap_uwire.c
index ce4b992..6375256 100644
--- a/drivers/spi/omap_uwire.c
+++ b/drivers/spi/omap_uwire.c
@@ -240,12 +240,13 @@ static int uwire_txrx(struct spi_device
pr_debug("%s: write-%d =%04x\n",
spi->dev.bus_id, bits, val);
#endif
+ if (wait_uwire_csr_flag(CSRB, 0, 0))
+ goto eio;
+
uwire_write_reg(UWIRE_TDR, val);

/* start write */
val = START | w | (bits << 5);
- if (wait_uwire_csr_flag(CSRB, 0, 0))
- goto eio;

uwire_write_reg(UWIRE_CSR, val);
len -= bytes;