ADC timeout on Overo

ADC timeout on Overo

[Frank Agius]

I'm trying to enable ADC measurements on an Overo/Summit system running 
Linux 2.6.28.  I started with a fresh git pull of 2.6.28.  I added what 
I thought was the appropriate code to the Overo specific initialization:

--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -152,6 +152,10 @@ static struct twl4030_gpio_platform_data 
overo_gpio_data =
         .irq_end        = TWL4030_GPIO_IRQ_END,
  };

+static struct twl4030_madc_platform_data overo_madc_data = {
+       .irq_line       = 1,
+};
+
  static struct twl4030_usb_data overo_usb_data = {
         .usb_mode       = T2_USB_MODE_ULPI,
  };
@@ -162,6 +166,7 @@ static struct twl4030_platform_data overo_twldata = {
         .gpio           = &overo_gpio_data,
         .usb            = &overo_usb_data,
         .power          = GENERIC3430_T2SCRIPTS_DATA,
+        .madc           = &overo_madc_data,
  };

I built the kernel and the MADC driver module (twl4030-madc.ko).  After 
inserting the module, the file twl4030-madc showed up in /dev.  So far, 
so good.  I coded a small user space application that issued a raw read 
ioctl for adc channel 3.  The read timed out, as did reads for all other 
channels I tried.  I did some preliminary debug of the driver and found 
that the reason for the failure is that once the ADC conversion starts, 
the EOC_SW1 bit in the CTRL_SW1 register (the indicator of completion) 
never goes to 1.  Further debug shows that in the module initialization 
routine twl4030_madc_set_power, as soon as the MADC is powered on by 
setting CTRL1[0] MADCON bit to 1, the BUSY bit of CTRL_SW1 turns on and 
never turns off.  I'm guessing this constant state of busy is why the 
conversion never completes. This leads me to believe that the MADC is 
not set up properly. Steve Sakoman confirmed that the HFCLKIN signal is 
26 MHz for the Overo, so it does not look like a clock setup problem. 
Any ideas as to why the BUSY bit comes on and never turns off? Any other 
ideas?

regards,
frank

Re: ADC timeout on Overo

[frank agius]

Frank Agius wrote:

> Further debug shows that in the module initialization 
> routine twl4030_madc_set_power, as soon as the MADC is powered on by 
> setting CTRL1[0] MADCON bit to 1, the BUSY bit of CTRL_SW1 turns on and 
> never turns off.  I'm guessing this constant state of busy is why the 
> conversion never completes. 

I'm still having the same problem with the conversion never completing, 
but my initial debug analysis was wrong.  The BUSY bit does not turn on 
when power is applied.  BUSY turns on when the conversion is started. 
The conversion never completes (BUSY never turns off). BUSY can only be 
reset with a power cycle (removing and reinserting the driver does not 
clear BUSY).

Im trying to understand if this is a driver problem or something 
specific to the Overo.  Can anyone with one of the boards that has 
support enabled for the twl4030 driver (EVM2, EVM3, LDP and 
2340/3430sdp)confirm the status of ADC on that board?  If it's 
functional, what is the Linux revision of the working driver?

regards,
frank

Re: ADC timeout on Overo

[Frank Agius]

frank agius wrote:

> Im trying to understand if this is a driver problem or something 
> specific to the Overo.  Can anyone with one of the boards that has 
> support enabled for the twl4030 driver (EVM2, EVM3, LDP and 
> 2340/3430sdp)confirm the status of ADC on that board?  If it's 
> functional, what is the Linux revision of the working driver?

Can I assume that since no one has confirmed ADC working on any of the 
boards using the twl4030 driver that it means that ADC is not working on 
any of those boards?

frank