[PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[Govindraj.R]

From: Govindraj R <govindraj.raja@ti.com>

This patch adds support for OMAP3430-HIGH SPEED UART Controller.

Signed-off-by:	Govindraj R <govindraj.raja@ti.com>
Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Reviewed-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/plat-omap/include/mach/omap-serial.h |  156 ++
 drivers/serial/Kconfig                        |   47
 drivers/serial/Makefile                       |    1
 drivers/serial/omap-serial.c                  | 1745 ++++++++++++++++++++++++++
 4 files changed, 1949 insertions(+)

diff --git a/arch/arm/plat-omap/include/mach/omap-serial.h
b/arch/arm/plat-omap/include/mach/omap-serial.h
new file mode 100644
index 0000000..17b6d17
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap-serial.h
@@ -0,0 +1,156 @@
+/*
+ * arch/arm/plat-omap/include/mach/omap-serial.h
+ *
+ * Driver for OMAP3430 UART controller.
+ *
+ * Copyright (C) 2009 Texas Instruments.
+ *
+ * Authors:
+ *	Govindraj R	<govindraj.raja@ti.com>
+ *	Thara Gopinath	<thara@ti.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#ifndef __OMAP_SERIAL_H__
+#define __OMAP_SERIAL_H__
+
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+
+#ifdef CONFIG_PM
+#include <../arch/arm/mach-omap2/prm.h>
+#include <../arch/arm/mach-omap2/pm.h>
+#include <../arch/arm/mach-omap2/prm-regbits-34xx.h>
+#include <mach/control.h>
+#endif
+
+/* TI OMAP CONSOLE */
+#define PORT_OMAP       86
+#define DRIVER_NAME	"omap-hsuart"
+
+/* tty device name used by omap-serial driver,
+ * in bootargs we specify as console=ttyO0 if uart1
+ * is used as console uart.
+ */
+#define DEVICE_NAME	"ttyO"
+
+/*
+ * We default to IRQ0 for the "no irq" hack.   Some
+ * machine types want others as well - they're free
+ * to redefine this in their header file.
+ */
+#define is_real_interrupt(irq)  ((irq) != 0)
+
+#if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+#define SUPPORT_SYSRQ
+#endif
+
+#ifdef CONFIG_ARCH_OMAP34XX
+#define OMAP_MDR1_DISABLE 	0x07
+#define OMAP_MDR1_MODE13X 	0x03
+#define OMAP_MDR1_MODE16X 	0x00
+#define OMAP_MODE13X_SPEED	230400
+#endif
+
+#define CONSOLE_NAME	"console="
+
+#define UART_CLK	(48000000)
+#define QUART_CLK	(1843200)
+
+#define QUART		(0x3)
+
+#define SLEEP_TIMEOUT 	(5 * HZ)
+#define RX_TIMEOUT 	(3 * HZ)
+
+struct uart_dma_info {
+	int dma_enabled;
+	int rx_dma_bufsize;
+	int rx_timeout;
+	};
+
+struct omap_uart_state {
+	int clocked;
+	struct clk *ick;
+	struct clk *fck;
+	int num;
+	int can_sleep;
+
+	void __iomem *wk_st;
+	void __iomem *wk_en;
+	u32 wk_mask;
+	u32 padconf;
+
+#ifdef CONFIG_PM
+	struct timer_list timer;
+	u32 timeout;
+	int context_valid;
+	/* Registers to be saved/restored for OFF-mode */
+	u16 dll;
+	u16 dlh;
+	u16 ier;
+	u16 sysc;
+	u16 scr;
+	u16 wer;
+#endif
+};
+
+struct uart_omap_dma {
+	u8 			uart_dma_tx;
+	u8 			uart_dma_rx;
+	int		 	rx_dma_channel;
+	int 			tx_dma_channel;
+	/* Physical adress of RX DMA buffer */
+	dma_addr_t 		rx_buf_dma_phys;
+	/* Physical adress of TX DMA buffer */
+	dma_addr_t	 	tx_buf_dma_phys;
+	/*
+	 * Buffer for rx dma.It is not required for tx because the buffer
+	 * comes from port structure
+	 */
+	unsigned int 		uart_base;
+	unsigned char 		*rx_buf;
+	unsigned int 		prev_rx_dma_pos;
+	int 			tx_buf_size;
+	int 			tx_dma_state;
+	int 			rx_dma_state;
+	spinlock_t 		tx_lock;
+	spinlock_t 		rx_lock;
+	/* timer to poll activity on rx dma */
+	struct timer_list 	rx_timer;
+	int 			rx_buf_size;
+	int 			rx_timeout;
+};
+
+struct uart_omap_port {
+	struct uart_port	port;
+	struct uart_omap_dma	uart_dma;
+	struct platform_device	*pdev;
+
+	unsigned char		ier;
+	unsigned char		lcr;
+	unsigned char		mcr;
+	unsigned char		fcr;
+	unsigned char		efr;
+
+	int			use_dma;
+	int			is_buf_dma_alloced;
+	/*
+	 * Some bits in registers are cleared on a read, so they must
+	 * be saved whenever the register is read but the bits will not
+	 * be immediately processed.
+	 */
+	unsigned int		lsr_break_flag;
+#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
+	unsigned char		msr_saved_flags;
+	char			name[20];
+	spinlock_t		uart_lock;
+	unsigned long 		port_activity;
+};
+
+extern void omap_uart_idle_init(int num);
+extern char *saved_command_line;
+
+#endif /* __OMAP_SERIAL_H__ */
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 6553833..67a7129 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM
 	  Currently, only 8250 compatible ports are supported, but
 	  others can easily be added.

+config SERIAL_OMAP
+	bool "OMAP serial port support"
+	depends on ARM && ARCH_OMAP
+	select SERIAL_CORE
+	help
+	If you have a machine based on an Texas Instruments OMAP CPU you
+	can enable its onboard serial ports by enabling this option.
+
+config SERIAL_OMAP_CONSOLE
+	bool "Console on OMAP serial port"
+	depends on SERIAL_OMAP
+	select SERIAL_CORE_CONSOLE
+	help
+	If you have enabled the serial port on the Texas Instruments OMAP
+	CPU you can make it the console by answering Y to this option.
+
+	Even if you say Y here, the currently visible virtual console
+	(/dev/tty0) will still be used as the system console by default, but
+	you can alter that using a kernel command line option such as
+	"console=ttyS0". (Try "man bootparam" or see the documentation of
+	your boot loader (lilo or loadlin) about how to pass options to the
+	kernel at boot time.)
+
+config SERIAL_OMAP_DMA_UART1
+	bool "UART1 DMA support"
+	depends on SERIAL_OMAP
+	help
+	If you have enabled the serial port on the Texas Instruments OMAP
+	CPU you can enable the DMA transfer on UART 1 by answering
+	to this option.
+
+config SERIAL_OMAP_DMA_UART2
+	bool "UART2 DMA support"
+	depends on SERIAL_OMAP
+	help
+	If you have enabled the serial port on the Texas Instruments OMAP
+	CPU you can enable the DMA transfer on UART 2 by answering
+	to this option.
+
+config SERIAL_OMAP_DMA_UART3
+	bool "UART3 DMA support"
+	depends on SERIAL_OMAP
+	help
+	If you have enabled the serial port on the Texas Instruments OMAP
+	CPU you can enable the DMA transfer on UART 3 by answering
+	to this option.
+
 config SERIAL_OF_PLATFORM_NWPSERIAL
 	tristate "NWP serial port driver"
 	depends on PPC_OF && PPC_DCR
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index d5a2998..db38f2c 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -79,3 +79,4 @@ obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
 obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o
 obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
 obj-$(CONFIG_SERIAL_TIMBERDALE)	+= timbuart.o
+obj-$(CONFIG_SERIAL_OMAP) += omap-serial.o
diff --git a/drivers/serial/omap-serial.c b/drivers/serial/omap-serial.c
new file mode 100644
index 0000000..527642f
--- /dev/null
+++ b/drivers/serial/omap-serial.c
@@ -0,0 +1,1745 @@
+/*
+ * drivers/serial/omap-serial.c
+ *
+ * Driver for OMAP3430 UART controller.
+ *
+ * Copyright (C) 2009 Texas Instruments.
+ *
+ * Authors:
+ *	Govindraj R	<govindraj.raja@ti.com>
+ *	Thara Gopinath	<thara@ti.com>
+ *
+ * PM Framework based on arch/arm/mach-omap2/serial.c
+ * by Kevin Hilman.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/serial_reg.h>
+#include <linux/delay.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/io.h>
+#include <linux/dma-mapping.h>
+#include <linux/clk.h>
+
+#include <asm/irq.h>
+#include <mach/dma.h>
+#include <mach/dmtimer.h>
+#include <mach/omap-serial.h>
+
+static struct uart_omap_port *ui[OMAP_MAX_NR_PORTS];
+static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS];
+
+/* Forward declaration of functions */
+static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
+static void serial_omap_rx_timeout(unsigned long uart_no);
+static void serial_omap_start_rxdma(struct uart_omap_port *up);
+static int serial_omap_remove(struct platform_device *dev);
+
+static inline void omap_uart_block_sleep(int num);
+static void omap_uart_smart_idle_enable(int num, int enable);
+static inline void omap_uart_enable_clocks(int num);
+
+#ifdef DEBUG
+static void serial_omap_display_reg(struct uart_port *port);
+#endif
+
+int console_detect(char *str)
+{
+	char *next, *start = NULL;
+	int i;
+
+	i = strlen(CONSOLE_NAME);
+	next = saved_command_line;
+
+	while ((next = strchr(next, 'c')) != NULL) {
+		if (!strncmp(next, CONSOLE_NAME, i)) {
+			start = next;
+			break;
+		} else {
+			next++;
+		}
+	}
+	if (!start)
+		return -EPERM;
+	i = 0;
+	start = strchr(start, '=') + 1;
+	while (*start != ',') {
+		str[i++] = *start++;
+		if (i > 6) {
+			pr_err("%s : Invalid Console Name\n", __func__);
+			return -EPERM;
+		}
+	}
+	str[i] = '\0';
+	return 0;
+}
+
+static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
+{
+	offset <<= up->port.regshift;
+	if (up->pdev->id != 4)
+		return readb(up->port.membase + offset);
+	else
+		return readw(up->port.membase + offset);
+}
+
+static inline void serial_out(struct uart_omap_port *up, int offset, int value)
+{
+	offset <<= up->port.regshift;
+	if (up->pdev->id != 4)
+		writeb(value, up->port.membase + offset);
+	else
+		writew(value, up->port.membase + offset);
+}
+
+static inline void serial_omap_clear_fifos(struct uart_omap_port *port)
+{
+		struct uart_omap_port *up = (struct uart_omap_port *)port;
+		serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
+		serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
+			       UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
+		serial_out(up, UART_FCR, 0);
+}
+
+/*
+ * We have written our own function to get the divisor so as to support
+ * 13x mode.
+ */
+static unsigned int
+serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
+{
+	unsigned int divisor;
+	if (baud > OMAP_MODE13X_SPEED && baud != 3000000)
+		divisor = 13;
+	else
+		divisor = 16;
+	return port->uartclk/(baud * divisor);
+}
+
+static void serial_omap_stop_rxdma(struct uart_omap_port *up)
+{
+	if (up->uart_dma.rx_dma_state) {
+		del_timer_sync(&up->uart_dma.rx_timer);
+		omap_stop_dma(up->uart_dma.rx_dma_channel);
+		omap_free_dma(up->uart_dma.rx_dma_channel);
+		up->uart_dma.rx_dma_channel = 0xFF;
+		up->uart_dma.rx_dma_state = 0x0;
+	}
+}
+
+static void serial_omap_enable_ms(struct uart_port *port)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+
+	dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->pdev->id);
+	up->ier |= UART_IER_MSI;
+	serial_out(up, UART_IER, up->ier);
+}
+
+static void serial_omap_stop_tx(struct uart_port *port)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+	if (up->use_dma) {
+		if (up->uart_dma.tx_dma_channel != 0xFF) {
+			/*
+			 * Check if dma is still active . If yes do nothing,
+			 * return. Else stop dma
+			 */
+			int status = omap_readl(OMAP34XX_DMA4_BASE +
+				    OMAP_DMA4_CCR(up->uart_dma.tx_dma_channel));
+			if (status & (1 << 7))
+				return;
+			omap_stop_dma(up->uart_dma.tx_dma_channel);
+			omap_free_dma(up->uart_dma.tx_dma_channel);
+			up->uart_dma.tx_dma_channel = 0xFF;
+		}
+	}
+
+	if (up->ier & UART_IER_THRI) {
+		up->ier &= ~UART_IER_THRI;
+		serial_out(up, UART_IER, up->ier);
+	}
+}
+
+static void serial_omap_stop_rx(struct uart_port *port)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+	serial_omap_stop_rxdma(up);
+	up->ier &= ~UART_IER_RLSI;
+	up->port.read_status_mask &= ~UART_LSR_DR;
+	serial_out(up, UART_IER, up->ier);
+
+}
+
+static inline void receive_chars(struct uart_omap_port *up, int *status)
+{
+	struct tty_struct *tty = up->port.info->port.tty;
+	unsigned int ch, flag;
+	int max_count = 256;
+
+	do {
+		ch = serial_in(up, UART_RX);
+		flag = TTY_NORMAL;
+		up->port.icount.rx++;
+
+		if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
+				       UART_LSR_FE | UART_LSR_OE))) {
+			/*
+			 * For statistics only
+			 */
+			if (*status & UART_LSR_BI) {
+				*status &= ~(UART_LSR_FE | UART_LSR_PE);
+				up->port.icount.brk++;
+				/*
+				 * We do the SysRQ and SAK checking
+				 * here because otherwise the break
+				 * may get masked by ignore_status_mask
+				 * or read_status_mask.
+				 */
+				if (uart_handle_break(&up->port))
+					goto ignore_char;
+			} else if (*status & UART_LSR_PE)
+				up->port.icount.parity++;
+			else if (*status & UART_LSR_FE)
+				up->port.icount.frame++;
+			if (*status & UART_LSR_OE)
+				up->port.icount.overrun++;
+
+			/*
+			 * Mask off conditions which should be ignored.
+			 */
+			*status &= up->port.read_status_mask;
+
+#ifdef CONFIG_SERIAL_OMAP_CONSOLE
+			if (up->port.line == up->port.cons->index) {
+				/* Recover the break flag from console xmit */
+				*status |= up->lsr_break_flag;
+				up->lsr_break_flag = 0;
+			}
+#endif
+			if (*status & UART_LSR_BI)
+				flag = TTY_BREAK;
+			else if (*status & UART_LSR_PE)
+				flag = TTY_PARITY;
+			else if (*status & UART_LSR_FE)
+				flag = TTY_FRAME;
+		}
+
+		if (uart_handle_sysrq_char(&up->port, ch))
+			goto ignore_char;
+		uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
+ignore_char:
+		*status = serial_in(up, UART_LSR);
+	} while ((*status & UART_LSR_DR) && (max_count-- > 0));
+	tty_flip_buffer_push(tty);
+}
+
+static void transmit_chars(struct uart_omap_port *up)
+{
+	struct circ_buf *xmit = &up->port.info->xmit;
+	int count;
+
+	if (up->port.x_char) {
+		serial_out(up, UART_TX, up->port.x_char);
+		up->port.icount.tx++;
+		up->port.x_char = 0;
+		return;
+	}
+	if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
+		serial_omap_stop_tx(&up->port);
+		return;
+	}
+
+	count = up->port.fifosize / 4;
+	do {
+		serial_out(up, UART_TX, xmit->buf[xmit->tail]);
+		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+		up->port.icount.tx++;
+		if (uart_circ_empty(xmit))
+			break;
+	} while (--count > 0);
+
+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+		uart_write_wakeup(&up->port);
+
+	if (uart_circ_empty(xmit))
+		serial_omap_stop_tx(&up->port);
+}
+
+static void serial_omap_start_tx(struct uart_port *port)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+
+	if (up->use_dma && !(up->port.x_char)) {
+
+		struct circ_buf *xmit = &up->port.info->xmit;
+		unsigned int start = up->uart_dma.tx_buf_dma_phys +
+				     (xmit->tail & (UART_XMIT_SIZE - 1));
+		if (uart_circ_empty(xmit) || up->uart_dma.tx_dma_state)
+			return;
+		spin_lock(&(up->uart_dma.tx_lock));
+		up->uart_dma.tx_dma_state = 1;
+		spin_unlock(&(up->uart_dma.tx_lock));
+
+		up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
+		/* It is a circular buffer. See if the buffer has wounded back.
+		 * If yes it will have to be transferred in two separate dma
+		 * transfers */
+		if (start + up->uart_dma.tx_buf_size >=
+				up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
+			up->uart_dma.tx_buf_size =
+				(up->uart_dma.tx_buf_dma_phys +
+				UART_XMIT_SIZE) - start;
+
+		if (up->uart_dma.tx_dma_channel == 0xFF)
+			omap_request_dma(up->uart_dma.uart_dma_tx,
+					"UART Tx DMA",
+					(void *)uart_tx_dma_callback, up,
+					&(up->uart_dma.tx_dma_channel));
+		omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
+					 OMAP_DMA_AMODE_CONSTANT,
+					 up->uart_dma.uart_base, 0, 0);
+		omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
+					OMAP_DMA_AMODE_POST_INC, start, 0, 0);
+
+		omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
+					     OMAP_DMA_DATA_TYPE_S8,
+					     up->uart_dma.tx_buf_size, 1,
+					     OMAP_DMA_SYNC_ELEMENT,
+					     up->uart_dma.uart_dma_tx, 0);
+
+		omap_start_dma(up->uart_dma.tx_dma_channel);
+
+	} else if (!(up->ier & UART_IER_THRI)) {
+		up->ier |= UART_IER_THRI;
+		serial_out(up, UART_IER, up->ier);
+	}
+}
+
+static unsigned int check_modem_status(struct uart_omap_port *up)
+{
+	int status;
+	status = serial_in(up, UART_MSR);
+
+	status |= up->msr_saved_flags;
+	up->msr_saved_flags = 0;
+
+	if ((status & UART_MSR_ANY_DELTA) == 0)
+		return status;
+	if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
+	    up->port.info != NULL) {
+		if (status & UART_MSR_TERI)
+			up->port.icount.rng++;
+		if (status & UART_MSR_DDSR)
+			up->port.icount.dsr++;
+		if (status & UART_MSR_DDCD)
+			uart_handle_dcd_change
+				(&up->port, status & UART_MSR_DCD);
+		if (status & UART_MSR_DCTS)
+			uart_handle_cts_change
+				(&up->port, status & UART_MSR_CTS);
+		wake_up_interruptible(&up->port.info->delta_msr_wait);
+	}
+
+	return status;
+}
+
+/*
+ * This handles the interrupt from one port.
+ */
+static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
+{
+	struct uart_omap_port *up = dev_id;
+	unsigned int iir, lsr;
+
+	omap_uart_block_sleep(up->pdev->id - 1);
+
+	iir = serial_in(up, UART_IIR);
+	if (iir & UART_IIR_NO_INT)
+		return IRQ_NONE;
+
+	lsr = serial_in(up, UART_LSR);
+	if ((iir & 0x4) && up->use_dma) {
+		up->ier &= ~UART_IER_RDI;
+		serial_out(up, UART_IER, up->ier);
+		serial_omap_start_rxdma(up);
+	} else if (lsr & UART_LSR_DR) {
+		receive_chars(up, &lsr);
+	}
+	check_modem_status(up);
+	if ((lsr & UART_LSR_THRE) && (iir & 0x2))
+		transmit_chars(up);
+
+	up->port_activity = jiffies;
+	return IRQ_HANDLED;
+}
+
+static unsigned int serial_omap_tx_empty(struct uart_port *port)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+	unsigned long flags;
+	unsigned int ret;
+
+	dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->pdev->id);
+	spin_lock_irqsave(&up->port.lock, flags);
+	ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
+	spin_unlock_irqrestore(&up->port.lock, flags);
+
+	return ret;
+}
+
+static unsigned int serial_omap_get_mctrl(struct uart_port *port)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+	unsigned char status;
+	unsigned int ret;
+
+	status = check_modem_status(up);
+	dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->pdev->id);
+
+	ret = 0;
+	if (status & UART_MSR_DCD)
+		ret |= TIOCM_CAR;
+	if (status & UART_MSR_RI)
+		ret |= TIOCM_RNG;
+	if (status & UART_MSR_DSR)
+		ret |= TIOCM_DSR;
+	if (status & UART_MSR_CTS)
+		ret |= TIOCM_CTS;
+	return ret;
+}
+
+static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+	unsigned char mcr = 0;
+
+	dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->pdev->id);
+	if (mctrl & TIOCM_RTS)
+		mcr |= UART_MCR_RTS;
+	if (mctrl & TIOCM_DTR)
+		mcr |= UART_MCR_DTR;
+	if (mctrl & TIOCM_OUT1)
+		mcr |= UART_MCR_OUT1;
+	if (mctrl & TIOCM_OUT2)
+		mcr |= UART_MCR_OUT2;
+	if (mctrl & TIOCM_LOOP)
+		mcr |= UART_MCR_LOOP;
+
+	mcr |= up->mcr;
+	serial_out(up, UART_MCR, mcr);
+}
+
+static void serial_omap_break_ctl(struct uart_port *port, int break_state)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+	unsigned long flags;
+
+	dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->pdev->id);
+	spin_lock_irqsave(&up->port.lock, flags);
+	if (break_state == -1)
+		up->lcr |= UART_LCR_SBC;
+	else
+		up->lcr &= ~UART_LCR_SBC;
+	serial_out(up, UART_LCR, up->lcr);
+	spin_unlock_irqrestore(&up->port.lock, flags);
+}
+
+static int serial_omap_startup(struct uart_port *port)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+	unsigned long flags;
+	int irq_flags = 0;
+	int retval;
+
+	omap_uart_smart_idle_enable(up->pdev->id - 1, 0);
+
+	if (up->port.flags & UPF_SHARE_IRQ)
+		irq_flags |= IRQF_SHARED;
+
+	/*
+	 * Allocate the IRQ
+	 */
+	retval = request_irq(up->port.irq, serial_omap_irq, irq_flags,
+				up->name, up);
+	if (retval)
+		return retval;
+
+	dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->pdev->id);
+
+	/*
+	 * Clear the FIFO buffers and disable them.
+	 * (they will be reenabled in set_termios())
+	 */
+	serial_omap_clear_fifos(up);
+	/* For Hardware flow control */
+	serial_out(up, UART_MCR, 0x2);
+
+	/*
+	 * Clear the interrupt registers.
+	 */
+	(void) serial_in(up, UART_LSR);
+	(void) serial_in(up, UART_RX);
+	(void) serial_in(up, UART_IIR);
+	(void) serial_in(up, UART_MSR);
+
+	/*
+	 * Now, initialize the UART
+	 */
+	serial_out(up, UART_LCR, UART_LCR_WLEN8);
+	spin_lock_irqsave(&up->port.lock, flags);
+	if (up->port.flags & UPF_FOURPORT) {
+		if (!is_real_interrupt(up->port.irq))
+			up->port.mctrl |= TIOCM_OUT1;
+	} else {
+		/*
+		 * Most PC uarts need OUT2 raised to enable interrupts.
+		 */
+		if (is_real_interrupt(up->port.irq))
+			up->port.mctrl |= TIOCM_OUT2;
+	}
+	serial_omap_set_mctrl(&up->port, up->port.mctrl);
+	spin_unlock_irqrestore(&up->port.lock, flags);
+
+	up->msr_saved_flags = 0;
+
+	if (up->port.flags & UPF_FOURPORT) {
+		unsigned int icp;
+		/*
+		 * Enable interrupts on the AST Fourport board
+		 */
+		icp = (up->port.iobase & 0xfe0) | 0x01f;
+		outb_p(0x80, icp);
+		(void) inb_p(icp);
+	}
+
+	if (up->use_dma) {
+		if (!up->is_buf_dma_alloced) {
+			free_page((unsigned long)up->port.info->xmit.buf);
+			up->port.info->xmit.buf = NULL;
+			up->port.info->xmit.buf = dma_alloc_coherent(NULL,
+				UART_XMIT_SIZE,
+				(dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
+				0);
+			up->is_buf_dma_alloced = 1;
+		}
+		init_timer(&(up->uart_dma.rx_timer));
+		up->uart_dma.rx_timer.function = serial_omap_rx_timeout;
+		up->uart_dma.rx_timer.data = up->pdev->id;
+		/* Currently the buffer size is 4KB. Can increase it */
+		up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
+			up->uart_dma.rx_buf_size,
+			(dma_addr_t *)&(up->uart_dma.rx_buf_dma_phys), 0);
+	}
+
+	/*
+	* Finally, enable interrupts.  Note: Modem status interrupts
+	* are set via set_termios(), which will be occurring imminently
+	* anyway, so we don't enable them here.
+	*/
+	up->ier = UART_IER_RLSI | UART_IER_RDI;
+	serial_out(up, UART_IER, up->ier);
+
+	up->port_activity = jiffies;
+	return 0;
+}
+
+static void serial_omap_shutdown(struct uart_port *port)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+	unsigned long flags;
+
+	dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->pdev->id);
+	/*
+	 * Disable interrupts from this port
+	 */
+	up->ier = 0;
+	serial_out(up, UART_IER, 0);
+
+	spin_lock_irqsave(&up->port.lock, flags);
+	if (up->port.flags & UPF_FOURPORT) {
+		/* reset interrupts on the AST Fourport board */
+		inb((up->port.iobase & 0xfe0) | 0x1f);
+		up->port.mctrl |= TIOCM_OUT1;
+	} else
+		up->port.mctrl &= ~TIOCM_OUT2;
+	serial_omap_set_mctrl(&up->port, up->port.mctrl);
+	spin_unlock_irqrestore(&up->port.lock, flags);
+
+	/*
+	 * Disable break condition and FIFOs
+	 */
+	serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
+	serial_omap_clear_fifos(up);
+
+	/*
+	 * Read data port to reset things, and then free the irq
+	 */
+	(void) serial_in(up, UART_RX);
+	if (up->use_dma) {
+		int tmp;
+		if (up->is_buf_dma_alloced) {
+			dma_free_coherent(up->port.dev,
+				  UART_XMIT_SIZE,
+				  up->port.info->xmit.buf,
+				  up->uart_dma.tx_buf_dma_phys);
+			up->port.info->xmit.buf = NULL;
+			up->is_buf_dma_alloced = 0;
+		}
+		serial_omap_stop_rx(port);
+		dma_free_coherent(up->port.dev,
+				  up->uart_dma.rx_buf_size,
+				  up->uart_dma.rx_buf,
+				  up->uart_dma.rx_buf_dma_phys);
+		up->uart_dma.rx_buf = NULL;
+		tmp = serial_in(up, UART_OMAP_SYSC) & 0x7;
+		serial_out(up, UART_OMAP_SYSC, tmp); /* force-idle */
+	}
+
+	free_irq(up->port.irq, up);
+}
+
+static inline void
+serial_omap_configure_xonxoff
+		(struct uart_omap_port *up, struct ktermios *termios)
+{
+	unsigned char efr = 0;
+
+	up->lcr = serial_in(up, UART_LCR);
+	serial_out(up, UART_LCR, 0xbf);
+	up->efr = serial_in(up, UART_EFR);
+	serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB);
+
+	serial_out(up, UART_XON1, termios->c_cc[VSTART]);
+	serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
+
+	/* IXON Flag:
+	 * Enable XON/XOFF flow control on output.
+	 * Transmit XON1, XOFF1
+	 */
+	if (termios->c_iflag & IXON)
+		efr |= 0x01 << 3;
+
+	/* IXOFF Flag:
+	 * Enable XON/XOFF flow control on input.
+	 * Receiver compares XON1, XOFF1.
+	 */
+	if (termios->c_iflag & IXOFF)
+		efr |= 0x01 << 1;
+
+	serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
+	serial_out(up, UART_LCR, 0x80);
+
+	up->mcr = serial_in(up, UART_MCR);
+
+	/* IXANY Flag:
+	 * Enable any character to restart output.
+	 * Operation resumes after receiving any
+	 * character after recognition of the XOFF character
+	 */
+	if (termios->c_iflag & IXANY)
+		up->mcr |= 1<<5;
+
+	serial_out(up, UART_MCR, up->mcr | 1<<6);
+
+	serial_out(up, UART_LCR, 0xbf);
+	serial_out(up, UART_TI752_TCR, 0x0f);
+	/* Enable special char function UARTi.EFR_REG[5] and
+	 * load the new software flow control mode IXON or IXOFF
+	 * and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
+	 */
+	serial_out(up, UART_EFR, up->efr | efr | 1<<5);
+	serial_out(up, UART_LCR, 0x80);
+
+	serial_out(up, UART_MCR, up->mcr & ~(1<<6));
+	serial_out(up, UART_LCR, up->lcr);
+}
+
+static void
+serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
+			struct ktermios *old)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+	unsigned char cval;
+	unsigned char efr = 0;
+	unsigned long flags;
+	unsigned int baud, quot;
+
+	switch (termios->c_cflag & CSIZE) {
+	case CS5:
+		cval = UART_LCR_WLEN5;
+		break;
+	case CS6:
+		cval = UART_LCR_WLEN6;
+		break;
+	case CS7:
+		cval = UART_LCR_WLEN7;
+		break;
+	default:
+	case CS8:
+		cval = UART_LCR_WLEN8;
+		break;
+	}
+
+	if (termios->c_cflag & CSTOPB)
+		cval |= UART_LCR_STOP;
+	if (termios->c_cflag & PARENB)
+		cval |= UART_LCR_PARITY;
+	if (!(termios->c_cflag & PARODD))
+		cval |= UART_LCR_EPAR;
+
+	/*
+	 * Ask the core to calculate the divisor for us.
+	 */
+
+	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
+	quot = serial_omap_get_divisor(port, baud);
+
+	if (up->use_dma)
+		up->fcr = UART_FCR_ENABLE_FIFO
+					| 0x1 << 6 | 0x1 << 4
+					| UART_FCR_DMA_SELECT;
+	else
+		up->fcr = UART_FCR_ENABLE_FIFO
+					| 0x1 << 6 | 0x1 << 4;
+
+	/*
+	 * Ok, we're now changing the port state.  Do it with
+	 * interrupts disabled.
+	 */
+	spin_lock_irqsave(&up->port.lock, flags);
+
+	/*
+	 * Update the per-port timeout.
+	 */
+	uart_update_timeout(port, termios->c_cflag, baud);
+
+	up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
+	if (termios->c_iflag & INPCK)
+		up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
+	if (termios->c_iflag & (BRKINT | PARMRK))
+		up->port.read_status_mask |= UART_LSR_BI;
+
+	/*
+	 * Characters to ignore
+	 */
+	up->port.ignore_status_mask = 0;
+	if (termios->c_iflag & IGNPAR)
+		up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
+	if (termios->c_iflag & IGNBRK) {
+		up->port.ignore_status_mask |= UART_LSR_BI;
+		/*
+		 * If we're ignoring parity and break indicators,
+		 * ignore overruns too (for real raw support).
+		 */
+		if (termios->c_iflag & IGNPAR)
+			up->port.ignore_status_mask |= UART_LSR_OE;
+	}
+
+	/*
+	 * ignore all characters if CREAD is not set
+	 */
+	if ((termios->c_cflag & CREAD) == 0)
+		up->port.ignore_status_mask |= UART_LSR_DR;
+
+	/*
+	 * Modem status interrupts
+	 */
+	up->ier &= ~UART_IER_MSI;
+	if (UART_ENABLE_MS(&up->port, termios->c_cflag))
+		up->ier |= UART_IER_MSI;
+	serial_out(up, UART_IER, up->ier);
+	serial_out(up, UART_LCR, cval);		/* reset DLAB */
+
+	/*-----------FIFOs and DMA Settings -----------*/
+	serial_out(up, UART_LCR, UART_LCR_DLAB);
+	serial_out(up, UART_DLL, 0);
+	serial_out(up, UART_DLM, 0);
+	serial_out(up, UART_LCR, 0);
+
+	serial_out(up, UART_LCR, 0xbf);
+
+	up->efr = serial_in(up, UART_EFR);
+	serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
+	serial_out(up, UART_LCR, 0x0);			/* Access FCR */
+
+	up->mcr = serial_in(up, UART_MCR);
+	serial_out(up, UART_MCR, up->mcr | 0x40);        /* Access TLR*/
+	/* FIFO ENABLE, DMA MODE */
+	serial_out(up, UART_FCR, up->fcr);
+	serial_out(up, UART_LCR, 0xbf);			/* Access EFR */
+
+	if (up->use_dma) {
+		serial_out(up, UART_TI752_TLR, 0x00);
+		serial_out(up, UART_OMAP_SCR, ((1 << 6) | (1 << 7)));
+	}
+
+	serial_out(up, UART_EFR, up->efr);
+	serial_out(up, UART_LCR, 0x80);
+	serial_out(up, UART_MCR, up->mcr);        /* Restore TLR */
+
+	/*-----Protocol, Baud Rate, and Interrupt Settings -- */
+
+	serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_DISABLE);
+
+	serial_out(up, UART_LCR, 0xbf); /* Access EFR */
+
+	up->efr = serial_in(up, UART_EFR);
+	serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
+
+	serial_out(up, UART_LCR, 0);
+	serial_out(up, UART_IER, 0);
+	serial_out(up, UART_LCR, 0xbf);
+
+	serial_out(up, UART_DLL, quot & 0xff);          /* LS of divisor */
+	serial_out(up, UART_DLM, quot >> 8);            /* MS of divisor */
+
+	serial_out(up, UART_LCR, 0);
+	serial_out(up, UART_IER, up->ier);
+	serial_out(up, UART_LCR, 0xbf); /* Access EFR */
+
+	serial_out(up, UART_EFR, up->efr);
+	serial_out(up, UART_LCR, cval);
+
+	if (baud > 230400 && baud != 3000000)
+		serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE13X);
+	else
+		serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE16X);
+
+	/* Hardware Flow Control Configuration */
+
+	if (termios->c_cflag & CRTSCTS) {
+		efr |= (UART_EFR_CTS | UART_EFR_RTS);
+		serial_out(up, UART_LCR, 0x80);
+
+		up->mcr = serial_in(up, UART_MCR);
+		serial_out(up, UART_MCR, up->mcr | 0x40);
+
+		serial_out(up, UART_LCR, 0xbf); /* Access EFR */
+
+		up->efr = serial_in(up, UART_EFR);
+		serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
+
+		serial_out(up, UART_TI752_TCR, 0x0f);
+		serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */
+		serial_out(up, UART_LCR, 0x80);
+		serial_out(up, UART_MCR, up->mcr | 0x02);
+		serial_out(up, UART_LCR, cval);
+	}
+
+	serial_omap_set_mctrl(&up->port, up->port.mctrl);
+	/* ----Software Flow Control Configuration----- */
+	if (termios->c_iflag & (IXON | IXOFF))
+		serial_omap_configure_xonxoff(up, termios);
+
+	spin_unlock_irqrestore(&up->port.lock, flags);
+	dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->pdev->id);
+
+#ifdef DEBUG
+	serial_omap_display_reg(port);
+#endif
+}
+
+static void
+serial_omap_pm(struct uart_port *port, unsigned int state,
+	       unsigned int oldstate)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+	unsigned char efr;
+	dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
+	efr = serial_in(up, UART_EFR);
+	serial_out(up, UART_LCR, 0xBF);
+	serial_out(up, UART_EFR, efr | UART_EFR_ECB);
+	serial_out(up, UART_LCR, 0);
+
+	serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
+	serial_out(up, UART_LCR, 0xBF);
+	serial_out(up, UART_EFR, efr);
+	serial_out(up, UART_LCR, 0);
+}
+
+static void serial_omap_release_port(struct uart_port *port)
+{
+	dev_dbg(port->dev, "serial_omap_release_port+\n");
+}
+
+static int serial_omap_request_port(struct uart_port *port)
+{
+	dev_dbg(port->dev, "serial_omap_request_port+\n");
+	return 0;
+}
+
+static void serial_omap_config_port(struct uart_port *port, int flags)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+
+	dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
+							up->pdev->id);
+	up->port.type = PORT_OMAP;
+}
+
+static int
+serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser)
+{
+	/* we don't want the core code to modify any port params */
+	dev_dbg(port->dev, "serial_omap_verify_port+\n");
+	return -EINVAL;
+}
+
+static const char *
+serial_omap_type(struct uart_port *port)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+
+	dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->pdev->id);
+	return up->name;
+}
+
+#ifdef CONFIG_SERIAL_OMAP_CONSOLE
+
+static struct uart_omap_port *serial_omap_console_ports[4];
+
+static struct uart_driver serial_omap_reg;
+
+#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
+
+/*
+ *	Wait for transmitter & holding register to empty
+ */
+static inline void wait_for_xmitr(struct uart_omap_port *up)
+{
+	unsigned int status, tmout = 10000;
+
+	/* Wait up to 10ms for the character(s) to be sent. */
+	do {
+		status = serial_in(up, UART_LSR);
+
+		if (status & UART_LSR_BI)
+			up->lsr_break_flag = UART_LSR_BI;
+
+		if (--tmout == 0)
+			break;
+		udelay(1);
+	} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
+
+	/* Wait up to 1s for flow control if necessary */
+	if (up->port.flags & UPF_CONS_FLOW) {
+		tmout = 1000000;
+		for (tmout = 1000000; tmout; tmout--) {
+			unsigned int msr = serial_in(up, UART_MSR);
+			up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
+			if (msr & UART_MSR_CTS)
+				break;
+			udelay(1);
+		}
+	}
+}
+
+static void serial_omap_console_putchar(struct uart_port *port, int ch)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+
+	wait_for_xmitr(up);
+	serial_out(up, UART_TX, ch);
+}
+
+/*
+ * Print a string to the serial port trying not to disturb
+ * any possible real use of the port...
+ *
+ *	The console_lock must be held when we get here.
+ */
+static void
+serial_omap_console_write(struct console *co, const char *s,
+		unsigned int count)
+{
+	struct uart_omap_port *up = serial_omap_console_ports[co->index];
+	unsigned int ier;
+
+	/*
+	 *	First save the IER then disable the interrupts
+	 */
+	ier = serial_in(up, UART_IER);
+	serial_out(up, UART_IER, 0);
+
+	uart_console_write(&up->port, s, count, serial_omap_console_putchar);
+
+	/*
+	 *	Finally, wait for transmitter to become empty
+	 *	and restore the IER
+	 */
+	wait_for_xmitr(up);
+	serial_out(up, UART_IER, ier);
+	/*
+	 *	The receive handling will happen properly because the
+	 *	receive ready bit will still be set; it is not cleared
+	 *	on read.  However, modem control will not, we must
+	 *	call it if we have saved something in the saved flags
+	 *	while processing with interrupts off.
+	 */
+	if (up->msr_saved_flags)
+		check_modem_status(up);
+}
+
+static int __init
+serial_omap_console_setup(struct console *co, char *options)
+{
+	struct uart_omap_port *up;
+	int baud = 9600;
+	int bits = 8;
+	int parity = 'n';
+	int flow = 'n';
+	int r;
+
+	if (serial_omap_console_ports[co->index] == NULL)
+		return -ENODEV;
+	up = serial_omap_console_ports[co->index];
+
+	if (options)
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+	r = uart_set_options(&up->port, co, baud, parity, bits, flow);
+
+	return r;
+}
+
+static struct console serial_omap_console = {
+	.name		= DEVICE_NAME,
+	.write		= serial_omap_console_write,
+	.device		= uart_console_device,
+	.setup		= serial_omap_console_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+	.data		= &serial_omap_reg,
+};
+
+static void serial_omap_add_console_port(struct uart_omap_port *up)
+{
+	serial_omap_console_ports[up->pdev->id - 1] = up;
+}
+
+#define OMAP_CONSOLE	(&serial_omap_console)
+
+#else
+
+#define OMAP_CONSOLE	NULL
+
+static inline void serial_omap_add_console_port(struct uart_omap_port *up) {}
+
+#endif
+
+struct uart_ops serial_omap_pops = {
+	.tx_empty	= serial_omap_tx_empty,
+	.set_mctrl	= serial_omap_set_mctrl,
+	.get_mctrl	= serial_omap_get_mctrl,
+	.stop_tx	= serial_omap_stop_tx,
+	.start_tx	= serial_omap_start_tx,
+	.stop_rx	= serial_omap_stop_rx,
+	.enable_ms	= serial_omap_enable_ms,
+	.break_ctl	= serial_omap_break_ctl,
+	.startup	= serial_omap_startup,
+	.shutdown	= serial_omap_shutdown,
+	.set_termios	= serial_omap_set_termios,
+	.pm		= serial_omap_pm,
+	.type		= serial_omap_type,
+	.release_port	= serial_omap_release_port,
+	.request_port	= serial_omap_request_port,
+	.config_port	= serial_omap_config_port,
+	.verify_port	= serial_omap_verify_port,
+};
+
+static struct uart_driver serial_omap_reg = {
+	.owner		= THIS_MODULE,
+	.driver_name	= "OMAP-SERIAL",
+	.dev_name	= DEVICE_NAME,
+	.major		= TTY_MAJOR,
+	.minor		= 64,
+	.nr		= OMAP_MAX_NR_PORTS,
+	.cons		= OMAP_CONSOLE,
+};
+
+static
+int serial_omap_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct uart_omap_port *up = platform_get_drvdata(pdev);
+
+	if (up)
+		uart_suspend_port(&serial_omap_reg, &up->port);
+	return 0;
+}
+
+static int serial_omap_resume(struct platform_device *dev)
+{
+	struct uart_omap_port *up = platform_get_drvdata(dev);
+	if (up)
+		uart_resume_port(&serial_omap_reg, &up->port);
+	return 0;
+}
+
+static void serial_omap_rx_timeout(unsigned long uart_no)
+{
+	struct uart_omap_port *up = ui[uart_no - 1];
+	unsigned int curr_dma_pos;
+	curr_dma_pos = omap_readl(OMAP34XX_DMA4_BASE +
+				  OMAP_DMA4_CDAC(up->uart_dma.rx_dma_channel));
+	if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
+			     (curr_dma_pos == 0)) {
+		if (jiffies_to_msecs(jiffies - up->port_activity) <
+								RX_TIMEOUT) {
+			mod_timer(&up->uart_dma.rx_timer, jiffies +
+				usecs_to_jiffies(up->uart_dma.rx_timeout));
+		} else {
+			serial_omap_stop_rxdma(up);
+			up->ier |= UART_IER_RDI;
+			serial_out(up, UART_IER, up->ier);
+		}
+		return;
+	} else {
+		unsigned int curr_transmitted_size = curr_dma_pos -
+						up->uart_dma.prev_rx_dma_pos;
+		up->port.icount.rx += curr_transmitted_size;
+		tty_insert_flip_string(up->port.info->port.tty,
+				up->uart_dma.rx_buf +
+				(up->uart_dma.prev_rx_dma_pos -
+				up->uart_dma.rx_buf_dma_phys),
+				curr_transmitted_size);
+		tty_flip_buffer_push(up->port.info->port.tty);
+		up->uart_dma.prev_rx_dma_pos = curr_dma_pos;
+		if (up->uart_dma.rx_buf_size +
+				up->uart_dma.rx_buf_dma_phys == curr_dma_pos)
+			serial_omap_start_rxdma(up);
+		else
+			mod_timer(&up->uart_dma.rx_timer, jiffies +
+				usecs_to_jiffies(up->uart_dma.rx_timeout));
+		up->port_activity = jiffies;
+	}
+}
+
+static void uart_rx_dma_callback(int lch, u16 ch_status, void *data)
+{
+	return;
+}
+
+static void serial_omap_start_rxdma(struct uart_omap_port *up)
+{
+	if (up->uart_dma.rx_dma_channel == 0xFF) {
+		omap_request_dma(up->uart_dma.uart_dma_rx, "UART Rx DMA",
+			(void *)uart_rx_dma_callback, up,
+				&(up->uart_dma.rx_dma_channel));
+
+		omap_set_dma_src_params(up->uart_dma.rx_dma_channel, 0,
+				OMAP_DMA_AMODE_CONSTANT,
+				up->uart_dma.uart_base, 0, 0);
+		omap_set_dma_dest_params(up->uart_dma.rx_dma_channel, 0,
+				OMAP_DMA_AMODE_POST_INC,
+				up->uart_dma.rx_buf_dma_phys, 0, 0);
+		omap_set_dma_transfer_params(up->uart_dma.rx_dma_channel,
+				OMAP_DMA_DATA_TYPE_S8,
+				up->uart_dma.rx_buf_size, 1,
+				OMAP_DMA_SYNC_ELEMENT,
+				up->uart_dma.uart_dma_rx, 0);
+	}
+	up->uart_dma.prev_rx_dma_pos = up->uart_dma.rx_buf_dma_phys;
+	omap_writel(0, OMAP34XX_DMA4_BASE
+			+ OMAP_DMA4_CDAC(up->uart_dma.rx_dma_channel));
+	omap_start_dma(up->uart_dma.rx_dma_channel);
+	mod_timer(&up->uart_dma.rx_timer, jiffies +
+				usecs_to_jiffies(up->uart_dma.rx_timeout));
+	up->uart_dma.rx_dma_state = 1;
+}
+
+static void serial_omap_continue_tx(struct uart_omap_port *up)
+{
+	struct circ_buf *xmit = &up->port.info->xmit;
+	int start = up->uart_dma.tx_buf_dma_phys
+			+ (xmit->tail & (UART_XMIT_SIZE - 1));
+	if (uart_circ_empty(xmit))
+		return;
+
+	up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
+	/* It is a circular buffer. See if the buffer has wounded back.
+	 * If yes it will have to be transferred in two separate dma
+	 * transfers
+	 */
+	if (start + up->uart_dma.tx_buf_size >=
+			up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
+		up->uart_dma.tx_buf_size =
+			(up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE) - start;
+	omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
+				 OMAP_DMA_AMODE_CONSTANT,
+				 up->uart_dma.uart_base, 0, 0);
+	omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
+		OMAP_DMA_AMODE_POST_INC, start, 0, 0);
+
+	omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
+				     OMAP_DMA_DATA_TYPE_S8,
+				     up->uart_dma.tx_buf_size, 1,
+				     OMAP_DMA_SYNC_ELEMENT,
+				     up->uart_dma.uart_dma_tx, 0);
+
+	omap_start_dma(up->uart_dma.tx_dma_channel);
+}
+
+static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)data;
+	struct circ_buf *xmit = &up->port.info->xmit;
+	xmit->tail = (xmit->tail + up->uart_dma.tx_buf_size) & \
+			(UART_XMIT_SIZE - 1);
+	up->port.icount.tx += up->uart_dma.tx_buf_size;
+
+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+		uart_write_wakeup(&up->port);
+
+	if (uart_circ_empty(xmit)) {
+		spin_lock(&(up->uart_dma.tx_lock));
+		serial_omap_stop_tx(&up->port);
+		up->uart_dma.tx_dma_state = 0;
+		spin_unlock(&(up->uart_dma.tx_lock));
+	} else {
+		omap_stop_dma(up->uart_dma.tx_dma_channel);
+		serial_omap_continue_tx(up);
+	}
+	up->port_activity = jiffies;
+	return;
+}
+
+static int serial_omap_probe(struct platform_device *pdev)
+{
+	struct uart_omap_port	*up;
+	struct resource		*mem, *irq, *dma_tx, *dma_rx;
+	struct uart_dma_info *up_dma = pdev->dev.platform_data;
+	int ret = -ENOSPC;
+	char str[7];
+
+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!mem) {
+		dev_err(&pdev->dev, "no mem resource?\n");
+		return -ENODEV;
+	}
+	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+	if (!irq) {
+		dev_err(&pdev->dev, "no irq resource?\n");
+		return -ENODEV;
+	}
+
+	ret = (int) request_mem_region(mem->start, (mem->end - mem->start) + 1,
+				     pdev->dev.driver->name);
+	if (!ret) {
+		dev_err(&pdev->dev, "memory region already claimed\n");
+		return -EBUSY;
+	}
+
+	dma_tx = platform_get_resource(pdev, IORESOURCE_DMA, 0);
+	if (!dma_tx) {
+		ret = -EINVAL;
+		goto err;
+	}
+
+	dma_rx = platform_get_resource(pdev, IORESOURCE_DMA, 1);
+	if (!dma_rx) {
+		ret = -EINVAL;
+		goto err;
+	}
+
+	up = kzalloc(sizeof(*up), GFP_KERNEL);
+	if (up == NULL) {
+		ret = -ENOMEM;
+		goto do_release_region;
+	}
+	sprintf(up->name, "OMAP UART%d", pdev->id);
+	up->pdev = pdev;
+	up->port.dev = &pdev->dev;
+	up->port.type = PORT_OMAP;
+	up->port.iotype = UPIO_MEM;
+	up->port.mapbase = mem->start;
+	up->port.irq = irq->start;
+
+	up->uart_dma.uart_dma_tx = dma_tx->start;
+	up->uart_dma.uart_dma_rx = dma_rx->start;
+	up->uart_dma.uart_base = mem->start;
+
+	up->port.fifosize = 64;
+	up->port.ops = &serial_omap_pops;
+	up->port.line = pdev->id - 1;
+	if ((pdev->id - 1) == QUART) {
+		up->port.membase = ioremap_nocache(mem->start, 0x16 << 1);
+		up->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
+		up->port.uartclk = QUART_CLK;
+		up->port.regshift = 1;
+	} else {
+		up->port.membase = (void *) OMAP2_IO_ADDRESS(mem->start);
+		up->port.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
+		up->port.uartclk = UART_CLK;
+		up->port.regshift = 2;
+	}
+
+	if (up_dma->dma_enabled) {
+		up->use_dma = 1;
+		up->uart_dma.rx_buf_size = up_dma->rx_dma_bufsize;
+		up->uart_dma.rx_timeout = up_dma->rx_timeout;
+	}
+
+	if (up->use_dma) {
+		spin_lock_init(&(up->uart_dma.tx_lock));
+		spin_lock_init(&(up->uart_dma.rx_lock));
+		up->uart_dma.tx_dma_channel = 0xFF;
+		up->uart_dma.rx_dma_channel = 0xFF;
+	}
+	if (console_detect(str)) {
+		pr_err("\n %s: Invalid console paramter...\n", __func__);
+		pr_err("\n %s: UART Driver Init Failed!\n", __func__);
+		return -EPERM;
+	}
+	ui[pdev->id - 1] = up;
+	serial_omap_add_console_port(up);
+
+	ret = uart_add_one_port(&serial_omap_reg, &up->port);
+	if (ret != 0)
+		goto do_release_region;
+
+	platform_set_drvdata(pdev, up);
+	return 0;
+err:
+	dev_err(&pdev->dev, "[UART%d]: failure [%s]\n",
+					pdev->id, __func__);
+do_release_region:
+	release_mem_region(mem->start, (mem->end - mem->start) + 1);
+	return ret;
+}
+
+static int serial_omap_remove(struct platform_device *dev)
+{
+	struct uart_omap_port *up = platform_get_drvdata(dev);
+	platform_set_drvdata(dev, NULL);
+	if (up) {
+		uart_remove_one_port(&serial_omap_reg, &up->port);
+		kfree(up);
+	}
+	return 0;
+}
+
+static struct platform_driver serial_omap_driver = {
+	.probe          = serial_omap_probe,
+	.remove         = serial_omap_remove,
+
+	.suspend	= serial_omap_suspend,
+	.resume		= serial_omap_resume,
+	.driver		= {
+		.name	= "omap-uart",
+	},
+};
+
+int __init serial_omap_init(void)
+{
+	int ret;
+
+	ret = uart_register_driver(&serial_omap_reg);
+	if (ret != 0)
+		return ret;
+	ret = platform_driver_register(&serial_omap_driver);
+	if (ret != 0)
+		uart_unregister_driver(&serial_omap_reg);
+	return ret;
+}
+
+void __exit serial_omap_exit(void)
+{
+	platform_driver_unregister(&serial_omap_driver);
+	uart_unregister_driver(&serial_omap_reg);
+}
+
+#ifdef CONFIG_PM
+static void omap_uart_save_context(int num)
+{
+	struct omap_uart_state *uart = &omap_uart[num];
+	struct uart_omap_port *up = ui[num];
+
+	u16 lcr = 0;
+	lcr = serial_in(up, UART_LCR);
+	serial_out(up, UART_LCR, 0xBF);
+	uart->dll = serial_in(up, UART_DLL);
+	uart->dlh = serial_in(up, UART_DLM);
+	serial_out(up, UART_LCR, lcr);
+	uart->ier = serial_in(up, UART_IER);
+	uart->sysc = serial_in(up, UART_OMAP_SYSC);
+	uart->scr = serial_in(up, UART_OMAP_SCR);
+	uart->wer = serial_in(up, UART_OMAP_WER);
+
+	uart->context_valid = 1;
+}
+
+static void omap_uart_restore_context(int num)
+{
+	struct omap_uart_state *uart = &omap_uart[num];
+	struct uart_omap_port *up = ui[num];
+	u16 efr = 0;
+
+	if (!uart->context_valid)
+		 return;
+
+	uart->context_valid = 0;
+
+	serial_out(up, UART_OMAP_MDR1, 0x7);
+	serial_out(up, UART_LCR, 0xBF); /* Config B mode */
+	efr = serial_in(up, UART_EFR);
+	serial_out(up, UART_EFR, UART_EFR_ECB);
+	serial_out(up, UART_LCR, 0x0); /* Operational mode */
+	serial_out(up, UART_IER, 0x0);
+	serial_out(up, UART_LCR, 0xBF); /* Config B mode */
+	serial_out(up, UART_DLL, uart->dll);
+	serial_out(up, UART_DLM, uart->dlh);
+	serial_out(up, UART_LCR, 0x0); /* Operational mode */
+	serial_out(up, UART_IER, uart->ier);
+	serial_out(up, UART_FCR, up->fcr);
+	serial_out(up, UART_LCR, 0xBF); /* Config B mode */
+	serial_out(up, UART_EFR, efr);
+	serial_out(up, UART_LCR, UART_LCR_WLEN8);
+	serial_out(up, UART_OMAP_SCR, uart->scr);
+	serial_out(up, UART_OMAP_WER, uart->wer);
+	serial_out(up, UART_OMAP_SYSC, uart->sysc | (0x2 << 3));
+	serial_out(up, UART_OMAP_MDR1, 0x00); /* UART 16x mode */
+}
+
+/* Remove this during /mach-omap2/serial.c cleanup for 8250 support */
+void omap_uart_enable_irqs(int enable) {}
+
+static inline void omap_uart_disable_clocks(int num)
+{
+	struct omap_uart_state *uart = &omap_uart[num];
+	if (!uart->clocked)
+		return;
+
+	omap_uart_save_context(num);
+	uart->clocked = 0;
+	clk_disable(uart->ick);
+	clk_disable(uart->fck);
+}
+
+void omap_uart_enable_wakeup(int num)
+{
+	struct omap_uart_state *uart = &omap_uart[num];
+	/* Set wake-enable bit */
+	if (uart->wk_en && uart->wk_mask) {
+		u32 v = __raw_readl(uart->wk_en);
+		v |= uart->wk_mask;
+		__raw_writel(v, uart->wk_en);
+	}
+
+	/* Ensure IOPAD wake-enables are set */
+	if (cpu_is_omap34xx() && uart->padconf) {
+		u16 v = omap_ctrl_readw(uart->padconf);
+		v |= OMAP3_PADCONF_WAKEUPENABLE0;
+		omap_ctrl_writew(v, uart->padconf);
+	}
+}
+
+static void omap_uart_smart_idle_enable(int num, int enable)
+{
+	struct uart_omap_port *up = ui[num];
+	u16 sysc;
+
+	sysc = serial_in(up, UART_OMAP_SYSC) & 0x7;
+
+	if (enable)
+		/* Errata 2.15: Force idle if in DMA mode */
+		sysc |= up->use_dma ? 0x0 : (0x2 << 3);
+	else
+		sysc |= 0x1 << 3;
+
+	serial_out(up, UART_OMAP_SYSC, sysc);
+}
+
+static void omap_uart_block_sleep(int num)
+{
+	struct omap_uart_state *uart = &omap_uart[num];
+
+	omap_uart_enable_clocks(num);
+
+	omap_uart_smart_idle_enable(num, 0);
+	uart->can_sleep = 0;
+	if (uart->timeout)
+		mod_timer(&uart->timer, jiffies + uart->timeout);
+}
+
+static void omap_uart_allow_sleep(int num)
+{
+	struct omap_uart_state *uart = &omap_uart[num];
+	if (!uart->clocked)
+		return;
+
+	if (uart->padconf)
+		omap_uart_enable_wakeup(num);
+
+	omap_uart_smart_idle_enable(num, 1);
+	uart->can_sleep = 1;
+
+	if (uart->timeout)
+		del_timer_sync(&uart->timer);
+}
+
+void omap_uart_prepare_idle(int num)
+{
+	omap_uart_disable_clocks(num);
+}
+
+void omap_uart_resume_idle(int num)
+{
+	struct omap_uart_state *uart = &omap_uart[num];
+
+	omap_uart_enable_clocks(num);
+
+	/* Check for IO pad wakeup */
+	if (cpu_is_omap34xx() && uart->padconf) {
+		u16 p = omap_ctrl_readw(uart->padconf);
+
+	if (p & OMAP3_PADCONF_WAKEUPEVENT0)
+		omap_uart_block_sleep(num);
+	}
+
+	/* Check for normal UART wakeup */
+	if (__raw_readl(uart->wk_st) & uart->wk_mask)
+		omap_uart_block_sleep(num);
+}
+
+void omap_uart_prepare_suspend(void)
+{
+	int j;
+	for (j = 0; j < OMAP_MAX_NR_PORTS; j++)
+		omap_uart_allow_sleep(j);
+}
+
+int omap_uart_can_sleep(void)
+{
+	int can_sleep = 1;
+	int j;
+
+	for (j = 0; j < OMAP_MAX_NR_PORTS; j++) {
+		struct omap_uart_state *uart = &omap_uart[j];
+
+		if (!uart->clocked)
+			continue;
+
+		if (!uart->can_sleep) {
+			can_sleep = 0;
+			continue;
+		}
+
+		omap_uart_allow_sleep(j);
+	}
+	return can_sleep;
+}
+
+static void omap_uart_init_wakeup_source(int num)
+{
+	struct omap_uart_state *uart = &omap_uart[num];
+
+	if (cpu_is_omap34xx()) {
+		u32 mod = (uart->num == 2) ? OMAP3430_PER_MOD : CORE_MOD;
+		u32 wk_mask = 0;
+		u32 padconf = 0;
+
+		uart->wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1);
+		uart->wk_st = OMAP34XX_PRM_REGADDR(mod, PM_WKST1);
+		switch (uart->num) {
+		case 0:
+			wk_mask = OMAP3430_ST_UART1_MASK;
+			padconf = 0x182;
+			break;
+		case 1:
+			wk_mask = OMAP3430_ST_UART2_MASK;
+			padconf = 0x17a;
+			break;
+		case 2:
+			wk_mask = OMAP3430_ST_UART3_MASK;
+			padconf = 0x19e;
+			break;
+		}
+		uart->wk_mask = wk_mask;
+		uart->padconf = padconf;
+	} else if (cpu_is_omap24xx()) {
+		u32 wk_mask = 0;
+
+		if (cpu_is_omap2430()) {
+			uart->wk_en = OMAP2430_PRM_REGADDR(CORE_MOD, PM_WKEN1);
+			uart->wk_st = OMAP2430_PRM_REGADDR(CORE_MOD, PM_WKST1);
+		} else if (cpu_is_omap2420()) {
+			uart->wk_en = OMAP2420_PRM_REGADDR(CORE_MOD, PM_WKEN1);
+			uart->wk_st = OMAP2420_PRM_REGADDR(CORE_MOD, PM_WKST1);
+		}
+		switch (uart->num) {
+		case 0:
+			wk_mask = OMAP24XX_ST_UART1_MASK;
+			break;
+		case 1:
+			wk_mask = OMAP24XX_ST_UART2_MASK;
+			break;
+		case 2:
+			wk_mask = OMAP24XX_ST_UART3_MASK;
+			break;
+		}
+		uart->wk_mask = wk_mask;
+	} else {
+		uart->wk_en = 0;
+		uart->wk_st = 0;
+		uart->wk_mask = 0;
+		uart->padconf = 0;
+	}
+}
+
+static void omap_uart_idle_timer(unsigned long data)
+{
+
+	struct omap_uart_state *uart = (struct omap_uart_state *)data;
+	struct uart_omap_port *up = ui[uart->num];
+
+	if (up->use_dma && (up->uart_dma.tx_dma_channel != 0xFF
+			|| up->uart_dma.rx_dma_channel != 0xFF)) {
+		omap_uart_block_sleep(uart->num);
+		return;
+	}
+
+	omap_uart_allow_sleep(uart->num);
+}
+
+void omap_uart_idle_init(int num)
+{
+	struct omap_uart_state *uart = &omap_uart[num];
+
+	uart->can_sleep = 0;
+	uart->timeout = SLEEP_TIMEOUT;
+	setup_timer(&uart->timer, omap_uart_idle_timer,
+				(unsigned long) uart);
+
+	mod_timer(&uart->timer, jiffies + uart->timeout);
+
+	omap_uart_init_wakeup_source(num);
+}
+
+#else
+static inline void omap_uart_restore_context(int num) {}
+static inline void omap_uart_block_sleep(int num) {}
+static void omap_uart_smart_idle_enable(int num, int enable) {}
+#endif /* CONFIG_PM */
+
+static inline void omap_uart_enable_clocks(int num)
+{
+	struct omap_uart_state *uart = &omap_uart[num];
+	if (uart->clocked)
+		return;
+
+	clk_enable(uart->ick);
+	clk_enable(uart->fck);
+	uart->clocked = 1;
+	omap_uart_restore_context(num);
+}
+
+void __init omap_serial_early_init()
+{
+	int i;
+	char name[16];
+
+	for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
+		struct omap_uart_state *uart = &omap_uart[i];
+		sprintf(name, "uart%d_ick", i+1);
+		uart->ick = clk_get(NULL, name);
+
+		if (IS_ERR(uart->ick)) {
+			printk(KERN_ERR "Could not get uart%d_ick\n", i+1);
+			uart->ick = NULL;
+		}
+
+		sprintf(name, "uart%d_fck", i+1);
+		uart->fck = clk_get(NULL, name);
+
+		if (IS_ERR(uart->fck)) {
+			printk(KERN_ERR "Could not get uart%d_fck\n", i+1);
+			uart->fck = NULL;
+		}
+
+		uart->num = i;
+		omap_uart_enable_clocks(i);
+	}
+}
+
+#ifdef DEBUG
+#define UART_OMAP_SPR           0x07    /* Scratchpad register */
+static void serial_omap_display_reg(struct uart_port *port)
+{
+	struct uart_omap_port *up = (struct uart_omap_port *)port;
+	unsigned int lcr, efr, mcr, dll, dlh, xon1, xon2, xoff1, xoff2;
+	unsigned int tcr, tlr, uasr;
+	pr_debug("Register dump for UART%d\n", up->pdev->id);
+	pr_debug("IER_REG = 0x%x\n", serial_in(up, UART_IER));
+	pr_debug("IIR_REG = 0x%x\n", serial_in(up, UART_IIR));
+	lcr = serial_in(up, UART_LCR);
+	pr_debug("LCR_REG = 0x%x\n", lcr);
+	mcr = serial_in(up, UART_MCR);
+	pr_debug("MCR_REG = 0x%x\n", mcr);
+	pr_debug("LSR_REG = 0x%x\n", serial_in(up, UART_LSR));
+	pr_debug("MSR_REG = 0x%x\n", serial_in(up, UART_MSR));
+	pr_debug("SPR_REG = 0x%x\n", serial_in(up, UART_OMAP_SPR));
+	pr_debug("MDR1_REG = 0x%x\n", serial_in(up, UART_OMAP_MDR1));
+	pr_debug("MDR2_REG = 0x%x\n", serial_in(up, UART_OMAP_MDR2));
+	pr_debug("SCR_REG = 0x%x\n", serial_in(up, UART_OMAP_SCR));
+	pr_debug("SSR_REG = 0x%x\n", serial_in(up, UART_OMAP_SSR));
+	pr_debug("MVR_REG = 0x%x\n", serial_in(up, UART_OMAP_MVER));
+	pr_debug("SYSC_REG = 0x%x\n", serial_in(up, UART_OMAP_SYSC));
+	pr_debug("SYSS_REG = 0x%x\n", serial_in(up, UART_OMAP_SYSS));
+	pr_debug("WER_REG = 0x%x\n", serial_in(up, UART_OMAP_WER));
+
+	serial_out(up, UART_LCR, 0xBF);
+	dll = serial_in(up, UART_DLL);
+	dlh = serial_in(up, UART_DLM);
+	efr = serial_in(up, UART_EFR);
+	xon1 = serial_in(up, UART_XON1);
+	xon2 = serial_in(up, UART_XON2);
+
+	serial_out(up, UART_EFR, efr | UART_EFR_ECB);
+	serial_out(up, UART_LCR, lcr);
+	serial_out(up, UART_MCR, mcr | UART_MCR_TCRTLR);
+	serial_out(up, UART_LCR, 0xBF);
+
+	tcr = serial_in(up, UART_TI752_TCR);
+	tlr = serial_in(up, UART_TI752_TLR);
+
+	serial_out(up, UART_LCR, lcr);
+	serial_out(up, UART_MCR, mcr);
+	serial_out(up, UART_LCR, 0xBF);
+
+	xoff1 = serial_in(up, UART_XOFF1);
+	xoff2 = serial_in(up, UART_XOFF2);
+	uasr = serial_in(up, UART_OMAP_UASR);
+
+	serial_out(up, UART_EFR, efr);
+	serial_out(up, UART_LCR, lcr);
+
+	pr_debug("DLL_REG = 0x%x\n", dll);
+	pr_debug("DLH_REG = 0x%x\n", dlh);
+	pr_debug("EFR_REG = 0x%x\n", efr);
+
+	pr_debug("XON1_ADDR_REG = 0x%x\n", xon1);
+	pr_debug("XON2_ADDR_REG = 0x%x\n", xon2);
+	pr_debug("TCR_REG = 0x%x\n", tcr);
+	pr_debug("TLR_REG = 0x%x\n", tlr);
+
+	pr_debug("XOFF1_REG = 0x%x\n", xoff1);
+	pr_debug("XOFF2_REG = 0x%x\n", xoff2);
+	pr_debug("UASR_REG = 0x%x\n", uasr);
+}
+#endif /* DEBUG */
+
+subsys_initcall(serial_omap_init);
+module_exit(serial_omap_exit);
+
+MODULE_DESCRIPTION("OMAP High Speed UART driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:" DRIVER_NAME);
+MODULE_AUTHOR("Texas Instruments Inc");

Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[Jonathan McDowell]

On Thu, Sep 24, 2009 at 03:57:13PM +0530, Govindraj.R wrote:
> From: Govindraj R <govindraj.raja@ti.com>
> 
> This patch adds support for OMAP3430-HIGH SPEED UART Controller.
> 
> Signed-off-by:	Govindraj R <govindraj.raja@ti.com>
> Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
> Reviewed-by: Tony Lindgren <tony@atomide.com>
> ---
 
> +config SERIAL_OMAP
> +	bool "OMAP serial port support"
> +	depends on ARM && ARCH_OMAP
> +	select SERIAL_CORE
> +	help
> +	If you have a machine based on an Texas Instruments OMAP CPU you
> +	can enable its onboard serial ports by enabling this option.

If it's OMAP3 hardware then should the "depends on" be ARCH_OMAP3 ||
ARCH_OMAP4, rather than allowing it for OMAP1 + 2 as well?

J.

-- 
Revd. Jonathan McDowell, ULC | If they can't take a joke....fuck 'em.

Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[Kevin Hilman]

"Govindraj.R" <govindraj.raja@ti.com> writes:

> From: Govindraj R <govindraj.raja@ti.com>
>
> This patch adds support for OMAP3430-HIGH SPEED UART Controller.
>
> Signed-off-by:	Govindraj R <govindraj.raja@ti.com>
> Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
> Reviewed-by: Tony Lindgren <tony@atomide.com>

Hi Govindraj,

Sorry for the delay in reviewing this.  Some comments below...

> ---
>  arch/arm/plat-omap/include/mach/omap-serial.h |  156 ++
>  drivers/serial/Kconfig                        |   47
>  drivers/serial/Makefile                       |    1
>  drivers/serial/omap-serial.c                  | 1745 ++++++++++++++++++++++++++
>  4 files changed, 1949 insertions(+)
>
> diff --git a/arch/arm/plat-omap/include/mach/omap-serial.h
> b/arch/arm/plat-omap/include/mach/omap-serial.h
> new file mode 100644
> index 0000000..17b6d17
> --- /dev/null
> +++ b/arch/arm/plat-omap/include/mach/omap-serial.h
> @@ -0,0 +1,156 @@
> +/*
> + * arch/arm/plat-omap/include/mach/omap-serial.h
> + *
> + * Driver for OMAP3430 UART controller.
> + *
> + * Copyright (C) 2009 Texas Instruments.
> + *
> + * Authors:
> + *	Govindraj R	<govindraj.raja@ti.com>
> + *	Thara Gopinath	<thara@ti.com>

And all the serial PM stuff was done by me, based on intial work by
Tero Kristo.

It should also acknowledge the work based on the 8250 driver.

> + * This file is licensed under the terms of the GNU General Public License
> + * version 2. This program is licensed "as is" without any warranty of any
> + * kind, whether express or implied.
> + */
> +
> +#ifndef __OMAP_SERIAL_H__
> +#define __OMAP_SERIAL_H__
> +
> +#include <linux/serial_core.h>
> +#include <linux/platform_device.h>
> +
> +#ifdef CONFIG_PM
> +#include <../arch/arm/mach-omap2/prm.h>
> +#include <../arch/arm/mach-omap2/pm.h>
> +#include <../arch/arm/mach-omap2/prm-regbits-34xx.h>

Hmm, I don't like this.  I know I initially suggested that most of the
PM stuff could live directly in the driver, but based on this, I think
we still need some separation between the driver and platform
specifics.  I now think we should keep most of the separation that was
done for the 8250 driver.

This will allow us to get the core of the driver upstream while still
being able to work on the PM aspects.  Now that omap_device/omap_hwmod
and the new runtime PM framework are in mainline, I think this driver
should be adapted to those for PM.  Keeping the separation will also
make it clearer what exactly is change wrt current code in PM branch.

> +#include <mach/control.h>
> +#endif
> +
> +/* TI OMAP CONSOLE */
> +#define PORT_OMAP       86

It's not terribly clear where this number comes from and how it
will remain portable.

> +#define DRIVER_NAME	"omap-hsuart"
> +
> +/* tty device name used by omap-serial driver,
> + * in bootargs we specify as console=ttyO0 if uart1
> + * is used as console uart.
> + */
> +#define DEVICE_NAME	"ttyO"
> +

Hmm, this will break a lot of existing environments.  Any reason
ttyS cannot be used?


> +/*
> + * We default to IRQ0 for the "no irq" hack.   Some
> + * machine types want others as well - they're free
> + * to redefine this in their header file.
> + */
> +#define is_real_interrupt(irq)  ((irq) != 0)
> +
> +#if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
> +#define SUPPORT_SYSRQ
> +#endif
> +
> +#ifdef CONFIG_ARCH_OMAP34XX
> +#define OMAP_MDR1_DISABLE 	0x07
> +#define OMAP_MDR1_MODE13X 	0x03
> +#define OMAP_MDR1_MODE16X 	0x00
> +#define OMAP_MODE13X_SPEED	230400
> +#endif

Drop these ifdefs, they're not necessary and with them it wont compile for !34xx.

> +#define CONSOLE_NAME	"console="
> +
> +#define UART_CLK	(48000000)
> +#define QUART_CLK	(1843200)

Why is this driver handling the QUART on Z2.  That is not an OMAP UART
and should be handled by the 8250 driver.

Also UART clock rates are something that should be passed in
platform_data from platform specific code.

> +#define QUART		(0x3)
> +
> +#define SLEEP_TIMEOUT 	(5 * HZ)
> +#define RX_TIMEOUT 	(3 * HZ)
> +
> +struct uart_dma_info {
> +	int dma_enabled;
> +	int rx_dma_bufsize;
> +	int rx_timeout;
> +	};
> +
> +struct omap_uart_state {
> +	int clocked;
> +	struct clk *ick;
> +	struct clk *fck;
> +	int num;
> +	int can_sleep;
> +
> +	void __iomem *wk_st;
> +	void __iomem *wk_en;
> +	u32 wk_mask;
> +	u32 padconf;
> +
> +#ifdef CONFIG_PM
> +	struct timer_list timer;
> +	u32 timeout;
> +	int context_valid;
> +	/* Registers to be saved/restored for OFF-mode */
> +	u16 dll;
> +	u16 dlh;
> +	u16 ier;
> +	u16 sysc;
> +	u16 scr;
> +	u16 wer;
> +#endif
> +};
> +
> +struct uart_omap_dma {
> +	u8 			uart_dma_tx;
> +	u8 			uart_dma_rx;
> +	int		 	rx_dma_channel;
> +	int 			tx_dma_channel;
> +	/* Physical adress of RX DMA buffer */
> +	dma_addr_t 		rx_buf_dma_phys;
> +	/* Physical adress of TX DMA buffer */
> +	dma_addr_t	 	tx_buf_dma_phys;
> +	/*
> +	 * Buffer for rx dma.It is not required for tx because the buffer
> +	 * comes from port structure
> +	 */
> +	unsigned int 		uart_base;
> +	unsigned char 		*rx_buf;
> +	unsigned int 		prev_rx_dma_pos;
> +	int 			tx_buf_size;
> +	int 			tx_dma_state;
> +	int 			rx_dma_state;
> +	spinlock_t 		tx_lock;
> +	spinlock_t 		rx_lock;
> +	/* timer to poll activity on rx dma */
> +	struct timer_list 	rx_timer;
> +	int 			rx_buf_size;
> +	int 			rx_timeout;
> +};
> +
> +struct uart_omap_port {
> +	struct uart_port	port;
> +	struct uart_omap_dma	uart_dma;
> +	struct platform_device	*pdev;
> +
> +	unsigned char		ier;
> +	unsigned char		lcr;
> +	unsigned char		mcr;
> +	unsigned char		fcr;
> +	unsigned char		efr;
> +
> +	int			use_dma;
> +	int			is_buf_dma_alloced;
> +	/*
> +	 * Some bits in registers are cleared on a read, so they must
> +	 * be saved whenever the register is read but the bits will not
> +	 * be immediately processed.
> +	 */
> +	unsigned int		lsr_break_flag;
> +#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
> +	unsigned char		msr_saved_flags;
> +	char			name[20];
> +	spinlock_t		uart_lock;
> +	unsigned long 		port_activity;
> +};
> +
> +extern void omap_uart_idle_init(int num);
> +extern char *saved_command_line;
> +
> +#endif /* __OMAP_SERIAL_H__ */
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 6553833..67a7129 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM
>  	  Currently, only 8250 compatible ports are supported, but
>  	  others can easily be added.
>
> +config SERIAL_OMAP
> +	bool "OMAP serial port support"
> +	depends on ARM && ARCH_OMAP
> +	select SERIAL_CORE
> +	help
> +	If you have a machine based on an Texas Instruments OMAP CPU you
> +	can enable its onboard serial ports by enabling this option.
> +
> +config SERIAL_OMAP_CONSOLE
> +	bool "Console on OMAP serial port"
> +	depends on SERIAL_OMAP
> +	select SERIAL_CORE_CONSOLE
> +	help
> +	If you have enabled the serial port on the Texas Instruments OMAP
> +	CPU you can make it the console by answering Y to this option.
> +
> +	Even if you say Y here, the currently visible virtual console
> +	(/dev/tty0) will still be used as the system console by default, but
> +	you can alter that using a kernel command line option such as
> +	"console=ttyS0". (Try "man bootparam" or see the documentation of
> +	your boot loader (lilo or loadlin) about how to pass options to the
> +	kernel at boot time.)
> +
> +config SERIAL_OMAP_DMA_UART1
> +	bool "UART1 DMA support"
> +	depends on SERIAL_OMAP
> +	help
> +	If you have enabled the serial port on the Texas Instruments OMAP
> +	CPU you can enable the DMA transfer on UART 1 by answering
> +	to this option.
> +
> +config SERIAL_OMAP_DMA_UART2
> +	bool "UART2 DMA support"
> +	depends on SERIAL_OMAP
> +	help
> +	If you have enabled the serial port on the Texas Instruments OMAP
> +	CPU you can enable the DMA transfer on UART 2 by answering
> +	to this option.
> +
> +config SERIAL_OMAP_DMA_UART3
> +	bool "UART3 DMA support"
> +	depends on SERIAL_OMAP
> +	help
> +	If you have enabled the serial port on the Texas Instruments OMAP
> +	CPU you can enable the DMA transfer on UART 3 by answering
> +	to this option.
> +
>  config SERIAL_OF_PLATFORM_NWPSERIAL
>  	tristate "NWP serial port driver"
>  	depends on PPC_OF && PPC_DCR
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index d5a2998..db38f2c 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -79,3 +79,4 @@ obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
>  obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o
>  obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
>  obj-$(CONFIG_SERIAL_TIMBERDALE)	+= timbuart.o
> +obj-$(CONFIG_SERIAL_OMAP) += omap-serial.o
> diff --git a/drivers/serial/omap-serial.c b/drivers/serial/omap-serial.c
> new file mode 100644
> index 0000000..527642f
> --- /dev/null
> +++ b/drivers/serial/omap-serial.c
> @@ -0,0 +1,1745 @@
> +/*
> + * drivers/serial/omap-serial.c
> + *
> + * Driver for OMAP3430 UART controller.
> + *
> + * Copyright (C) 2009 Texas Instruments.
> + *
> + * Authors:
> + *	Govindraj R	<govindraj.raja@ti.com>
> + *	Thara Gopinath	<thara@ti.com>
> + *
> + * PM Framework based on arch/arm/mach-omap2/serial.c
> + * by Kevin Hilman.
> + *
> + * This file is licensed under the terms of the GNU General Public License
> + * version 2. This program is licensed "as is" without any warranty of any
> + * kind, whether express or implied.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/init.h>
> +#include <linux/console.h>
> +#include <linux/serial_reg.h>
> +#include <linux/delay.h>
> +#include <linux/tty.h>
> +#include <linux/tty_flip.h>
> +#include <linux/io.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/clk.h>
> +
> +#include <asm/irq.h>
> +#include <mach/dma.h>
> +#include <mach/dmtimer.h>
> +#include <mach/omap-serial.h>
> +
> +static struct uart_omap_port *ui[OMAP_MAX_NR_PORTS];
> +static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS];
> +
> +/* Forward declaration of functions */
> +static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
> +static void serial_omap_rx_timeout(unsigned long uart_no);
> +static void serial_omap_start_rxdma(struct uart_omap_port *up);
> +static int serial_omap_remove(struct platform_device *dev);
> +
> +static inline void omap_uart_block_sleep(int num);
> +static void omap_uart_smart_idle_enable(int num, int enable);
> +static inline void omap_uart_enable_clocks(int num);
> +
> +#ifdef DEBUG
> +static void serial_omap_display_reg(struct uart_port *port);
> +#endif
> +
> +int console_detect(char *str)
> +{
> +	char *next, *start = NULL;
> +	int i;
> +
> +	i = strlen(CONSOLE_NAME);
> +	next = saved_command_line;
> +
> +	while ((next = strchr(next, 'c')) != NULL) {
> +		if (!strncmp(next, CONSOLE_NAME, i)) {
> +			start = next;
> +			break;
> +		} else {
> +			next++;
> +		}
> +	}
> +	if (!start)
> +		return -EPERM;
> +	i = 0;
> +	start = strchr(start, '=') + 1;
> +	while (*start != ',') {
> +		str[i++] = *start++;
> +		if (i > 6) {
> +			pr_err("%s : Invalid Console Name\n", __func__);
> +			return -EPERM;
> +		}
> +	}
> +	str[i] = '\0';
> +	return 0;
> +}
> +
> +static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
> +{
> +	offset <<= up->port.regshift;
> +	if (up->pdev->id != 4)
> +		return readb(up->port.membase + offset);
> +	else
> +		return readw(up->port.membase + offset);
> +}
> +
> +static inline void serial_out(struct uart_omap_port *up, int offset, int value)
> +{
> +	offset <<= up->port.regshift;
> +	if (up->pdev->id != 4)
> +		writeb(value, up->port.membase + offset);
> +	else
> +		writew(value, up->port.membase + offset);
> +}
> +
> +static inline void serial_omap_clear_fifos(struct uart_omap_port *port)
> +{
> +		struct uart_omap_port *up = (struct uart_omap_port *)port;
> +		serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
> +		serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
> +			       UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
> +		serial_out(up, UART_FCR, 0);
> +}
> +
> +/*
> + * We have written our own function to get the divisor so as to support
> + * 13x mode.
> + */
> +static unsigned int
> +serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
> +{
> +	unsigned int divisor;
> +	if (baud > OMAP_MODE13X_SPEED && baud != 3000000)
> +		divisor = 13;
> +	else
> +		divisor = 16;
> +	return port->uartclk/(baud * divisor);
> +}
> +
> +static void serial_omap_stop_rxdma(struct uart_omap_port *up)
> +{
> +	if (up->uart_dma.rx_dma_state) {
> +		del_timer_sync(&up->uart_dma.rx_timer);
> +		omap_stop_dma(up->uart_dma.rx_dma_channel);
> +		omap_free_dma(up->uart_dma.rx_dma_channel);
> +		up->uart_dma.rx_dma_channel = 0xFF;
> +		up->uart_dma.rx_dma_state = 0x0;
> +	}
> +}
> +
> +static void serial_omap_enable_ms(struct uart_port *port)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +
> +	dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->pdev->id);
> +	up->ier |= UART_IER_MSI;
> +	serial_out(up, UART_IER, up->ier);
> +}
> +
> +static void serial_omap_stop_tx(struct uart_port *port)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +	if (up->use_dma) {
> +		if (up->uart_dma.tx_dma_channel != 0xFF) {
> +			/*
> +			 * Check if dma is still active . If yes do nothing,
> +			 * return. Else stop dma
> +			 */
> +			int status = omap_readl(OMAP34XX_DMA4_BASE +
> +				    OMAP_DMA4_CCR(up->uart_dma.tx_dma_channel));
> +			if (status & (1 << 7))
> +				return;
> +			omap_stop_dma(up->uart_dma.tx_dma_channel);
> +			omap_free_dma(up->uart_dma.tx_dma_channel);
> +			up->uart_dma.tx_dma_channel = 0xFF;
> +		}
> +	}
> +
> +	if (up->ier & UART_IER_THRI) {
> +		up->ier &= ~UART_IER_THRI;
> +		serial_out(up, UART_IER, up->ier);
> +	}
> +}
> +
> +static void serial_omap_stop_rx(struct uart_port *port)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +	serial_omap_stop_rxdma(up);
> +	up->ier &= ~UART_IER_RLSI;
> +	up->port.read_status_mask &= ~UART_LSR_DR;
> +	serial_out(up, UART_IER, up->ier);
> +
> +}
> +
> +static inline void receive_chars(struct uart_omap_port *up, int *status)
> +{
> +	struct tty_struct *tty = up->port.info->port.tty;
> +	unsigned int ch, flag;
> +	int max_count = 256;
> +
> +	do {
> +		ch = serial_in(up, UART_RX);
> +		flag = TTY_NORMAL;
> +		up->port.icount.rx++;
> +
> +		if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
> +				       UART_LSR_FE | UART_LSR_OE))) {
> +			/*
> +			 * For statistics only
> +			 */
> +			if (*status & UART_LSR_BI) {
> +				*status &= ~(UART_LSR_FE | UART_LSR_PE);
> +				up->port.icount.brk++;
> +				/*
> +				 * We do the SysRQ and SAK checking
> +				 * here because otherwise the break
> +				 * may get masked by ignore_status_mask
> +				 * or read_status_mask.
> +				 */
> +				if (uart_handle_break(&up->port))
> +					goto ignore_char;
> +			} else if (*status & UART_LSR_PE)
> +				up->port.icount.parity++;
> +			else if (*status & UART_LSR_FE)
> +				up->port.icount.frame++;
> +			if (*status & UART_LSR_OE)
> +				up->port.icount.overrun++;
> +
> +			/*
> +			 * Mask off conditions which should be ignored.
> +			 */
> +			*status &= up->port.read_status_mask;
> +
> +#ifdef CONFIG_SERIAL_OMAP_CONSOLE
> +			if (up->port.line == up->port.cons->index) {
> +				/* Recover the break flag from console xmit */
> +				*status |= up->lsr_break_flag;
> +				up->lsr_break_flag = 0;
> +			}
> +#endif
> +			if (*status & UART_LSR_BI)
> +				flag = TTY_BREAK;
> +			else if (*status & UART_LSR_PE)
> +				flag = TTY_PARITY;
> +			else if (*status & UART_LSR_FE)
> +				flag = TTY_FRAME;
> +		}
> +
> +		if (uart_handle_sysrq_char(&up->port, ch))
> +			goto ignore_char;
> +		uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
> +ignore_char:
> +		*status = serial_in(up, UART_LSR);
> +	} while ((*status & UART_LSR_DR) && (max_count-- > 0));
> +	tty_flip_buffer_push(tty);
> +}
> +
> +static void transmit_chars(struct uart_omap_port *up)
> +{
> +	struct circ_buf *xmit = &up->port.info->xmit;
> +	int count;
> +
> +	if (up->port.x_char) {
> +		serial_out(up, UART_TX, up->port.x_char);
> +		up->port.icount.tx++;
> +		up->port.x_char = 0;
> +		return;
> +	}
> +	if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
> +		serial_omap_stop_tx(&up->port);
> +		return;
> +	}
> +
> +	count = up->port.fifosize / 4;
> +	do {
> +		serial_out(up, UART_TX, xmit->buf[xmit->tail]);
> +		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
> +		up->port.icount.tx++;
> +		if (uart_circ_empty(xmit))
> +			break;
> +	} while (--count > 0);
> +
> +	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
> +		uart_write_wakeup(&up->port);
> +
> +	if (uart_circ_empty(xmit))
> +		serial_omap_stop_tx(&up->port);
> +}
> +
> +static void serial_omap_start_tx(struct uart_port *port)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +
> +	if (up->use_dma && !(up->port.x_char)) {
> +
> +		struct circ_buf *xmit = &up->port.info->xmit;
> +		unsigned int start = up->uart_dma.tx_buf_dma_phys +
> +				     (xmit->tail & (UART_XMIT_SIZE - 1));
> +		if (uart_circ_empty(xmit) || up->uart_dma.tx_dma_state)
> +			return;
> +		spin_lock(&(up->uart_dma.tx_lock));
> +		up->uart_dma.tx_dma_state = 1;
> +		spin_unlock(&(up->uart_dma.tx_lock));
> +
> +		up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
> +		/* It is a circular buffer. See if the buffer has wounded back.
> +		 * If yes it will have to be transferred in two separate dma
> +		 * transfers */
> +		if (start + up->uart_dma.tx_buf_size >=
> +				up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
> +			up->uart_dma.tx_buf_size =
> +				(up->uart_dma.tx_buf_dma_phys +
> +				UART_XMIT_SIZE) - start;
> +
> +		if (up->uart_dma.tx_dma_channel == 0xFF)
> +			omap_request_dma(up->uart_dma.uart_dma_tx,
> +					"UART Tx DMA",
> +					(void *)uart_tx_dma_callback, up,
> +					&(up->uart_dma.tx_dma_channel));
> +		omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
> +					 OMAP_DMA_AMODE_CONSTANT,
> +					 up->uart_dma.uart_base, 0, 0);
> +		omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
> +					OMAP_DMA_AMODE_POST_INC, start, 0, 0);
> +
> +		omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
> +					     OMAP_DMA_DATA_TYPE_S8,
> +					     up->uart_dma.tx_buf_size, 1,
> +					     OMAP_DMA_SYNC_ELEMENT,
> +					     up->uart_dma.uart_dma_tx, 0);
> +
> +		omap_start_dma(up->uart_dma.tx_dma_channel);
> +
> +	} else if (!(up->ier & UART_IER_THRI)) {
> +		up->ier |= UART_IER_THRI;
> +		serial_out(up, UART_IER, up->ier);
> +	}
> +}
> +
> +static unsigned int check_modem_status(struct uart_omap_port *up)
> +{
> +	int status;
> +	status = serial_in(up, UART_MSR);
> +
> +	status |= up->msr_saved_flags;
> +	up->msr_saved_flags = 0;
> +
> +	if ((status & UART_MSR_ANY_DELTA) == 0)
> +		return status;
> +	if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
> +	    up->port.info != NULL) {
> +		if (status & UART_MSR_TERI)
> +			up->port.icount.rng++;
> +		if (status & UART_MSR_DDSR)
> +			up->port.icount.dsr++;
> +		if (status & UART_MSR_DDCD)
> +			uart_handle_dcd_change
> +				(&up->port, status & UART_MSR_DCD);
> +		if (status & UART_MSR_DCTS)
> +			uart_handle_cts_change
> +				(&up->port, status & UART_MSR_CTS);
> +		wake_up_interruptible(&up->port.info->delta_msr_wait);
> +	}
> +
> +	return status;
> +}
> +
> +/*
> + * This handles the interrupt from one port.
> + */
> +static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
> +{
> +	struct uart_omap_port *up = dev_id;
> +	unsigned int iir, lsr;
> +
> +	omap_uart_block_sleep(up->pdev->id - 1);
> +
> +	iir = serial_in(up, UART_IIR);
> +	if (iir & UART_IIR_NO_INT)
> +		return IRQ_NONE;
> +
> +	lsr = serial_in(up, UART_LSR);
> +	if ((iir & 0x4) && up->use_dma) {
> +		up->ier &= ~UART_IER_RDI;
> +		serial_out(up, UART_IER, up->ier);
> +		serial_omap_start_rxdma(up);
> +	} else if (lsr & UART_LSR_DR) {
> +		receive_chars(up, &lsr);
> +	}
> +	check_modem_status(up);
> +	if ((lsr & UART_LSR_THRE) && (iir & 0x2))
> +		transmit_chars(up);
> +
> +	up->port_activity = jiffies;
> +	return IRQ_HANDLED;
> +}
> +
> +static unsigned int serial_omap_tx_empty(struct uart_port *port)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +	unsigned long flags;
> +	unsigned int ret;
> +
> +	dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->pdev->id);
> +	spin_lock_irqsave(&up->port.lock, flags);
> +	ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
> +	spin_unlock_irqrestore(&up->port.lock, flags);
> +
> +	return ret;
> +}
> +
> +static unsigned int serial_omap_get_mctrl(struct uart_port *port)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +	unsigned char status;
> +	unsigned int ret;
> +
> +	status = check_modem_status(up);
> +	dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->pdev->id);
> +
> +	ret = 0;
> +	if (status & UART_MSR_DCD)
> +		ret |= TIOCM_CAR;
> +	if (status & UART_MSR_RI)
> +		ret |= TIOCM_RNG;
> +	if (status & UART_MSR_DSR)
> +		ret |= TIOCM_DSR;
> +	if (status & UART_MSR_CTS)
> +		ret |= TIOCM_CTS;
> +	return ret;
> +}
> +
> +static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +	unsigned char mcr = 0;
> +
> +	dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->pdev->id);
> +	if (mctrl & TIOCM_RTS)
> +		mcr |= UART_MCR_RTS;
> +	if (mctrl & TIOCM_DTR)
> +		mcr |= UART_MCR_DTR;
> +	if (mctrl & TIOCM_OUT1)
> +		mcr |= UART_MCR_OUT1;
> +	if (mctrl & TIOCM_OUT2)
> +		mcr |= UART_MCR_OUT2;
> +	if (mctrl & TIOCM_LOOP)
> +		mcr |= UART_MCR_LOOP;
> +
> +	mcr |= up->mcr;
> +	serial_out(up, UART_MCR, mcr);
> +}
> +
> +static void serial_omap_break_ctl(struct uart_port *port, int break_state)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +	unsigned long flags;
> +
> +	dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->pdev->id);
> +	spin_lock_irqsave(&up->port.lock, flags);
> +	if (break_state == -1)
> +		up->lcr |= UART_LCR_SBC;
> +	else
> +		up->lcr &= ~UART_LCR_SBC;
> +	serial_out(up, UART_LCR, up->lcr);
> +	spin_unlock_irqrestore(&up->port.lock, flags);
> +}
> +
> +static int serial_omap_startup(struct uart_port *port)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +	unsigned long flags;
> +	int irq_flags = 0;
> +	int retval;
> +
> +	omap_uart_smart_idle_enable(up->pdev->id - 1, 0);
> +
> +	if (up->port.flags & UPF_SHARE_IRQ)
> +		irq_flags |= IRQF_SHARED;
> +
> +	/*
> +	 * Allocate the IRQ
> +	 */
> +	retval = request_irq(up->port.irq, serial_omap_irq, irq_flags,
> +				up->name, up);
> +	if (retval)
> +		return retval;
> +
> +	dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->pdev->id);
> +
> +	/*
> +	 * Clear the FIFO buffers and disable them.
> +	 * (they will be reenabled in set_termios())
> +	 */
> +	serial_omap_clear_fifos(up);
> +	/* For Hardware flow control */
> +	serial_out(up, UART_MCR, 0x2);
> +
> +	/*
> +	 * Clear the interrupt registers.
> +	 */
> +	(void) serial_in(up, UART_LSR);
> +	(void) serial_in(up, UART_RX);
> +	(void) serial_in(up, UART_IIR);
> +	(void) serial_in(up, UART_MSR);
> +
> +	/*
> +	 * Now, initialize the UART
> +	 */
> +	serial_out(up, UART_LCR, UART_LCR_WLEN8);
> +	spin_lock_irqsave(&up->port.lock, flags);
> +	if (up->port.flags & UPF_FOURPORT) {
> +		if (!is_real_interrupt(up->port.irq))
> +			up->port.mctrl |= TIOCM_OUT1;
> +	} else {
> +		/*
> +		 * Most PC uarts need OUT2 raised to enable interrupts.
> +		 */
> +		if (is_real_interrupt(up->port.irq))
> +			up->port.mctrl |= TIOCM_OUT2;
> +	}
> +	serial_omap_set_mctrl(&up->port, up->port.mctrl);
> +	spin_unlock_irqrestore(&up->port.lock, flags);
> +
> +	up->msr_saved_flags = 0;
> +
> +	if (up->port.flags & UPF_FOURPORT) {
> +		unsigned int icp;
> +		/*
> +		 * Enable interrupts on the AST Fourport board
> +		 */
> +		icp = (up->port.iobase & 0xfe0) | 0x01f;
> +		outb_p(0x80, icp);
> +		(void) inb_p(icp);
> +	}
> +
> +	if (up->use_dma) {
> +		if (!up->is_buf_dma_alloced) {
> +			free_page((unsigned long)up->port.info->xmit.buf);
> +			up->port.info->xmit.buf = NULL;
> +			up->port.info->xmit.buf = dma_alloc_coherent(NULL,
> +				UART_XMIT_SIZE,
> +				(dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
> +				0);
> +			up->is_buf_dma_alloced = 1;
> +		}
> +		init_timer(&(up->uart_dma.rx_timer));
> +		up->uart_dma.rx_timer.function = serial_omap_rx_timeout;
> +		up->uart_dma.rx_timer.data = up->pdev->id;
> +		/* Currently the buffer size is 4KB. Can increase it */
> +		up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
> +			up->uart_dma.rx_buf_size,
> +			(dma_addr_t *)&(up->uart_dma.rx_buf_dma_phys), 0);
> +	}
> +
> +	/*
> +	* Finally, enable interrupts.  Note: Modem status interrupts
> +	* are set via set_termios(), which will be occurring imminently
> +	* anyway, so we don't enable them here.
> +	*/
> +	up->ier = UART_IER_RLSI | UART_IER_RDI;
> +	serial_out(up, UART_IER, up->ier);
> +
> +	up->port_activity = jiffies;
> +	return 0;
> +}
> +
> +static void serial_omap_shutdown(struct uart_port *port)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +	unsigned long flags;
> +
> +	dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->pdev->id);
> +	/*
> +	 * Disable interrupts from this port
> +	 */
> +	up->ier = 0;
> +	serial_out(up, UART_IER, 0);
> +
> +	spin_lock_irqsave(&up->port.lock, flags);
> +	if (up->port.flags & UPF_FOURPORT) {
> +		/* reset interrupts on the AST Fourport board */
> +		inb((up->port.iobase & 0xfe0) | 0x1f);
> +		up->port.mctrl |= TIOCM_OUT1;
> +	} else
> +		up->port.mctrl &= ~TIOCM_OUT2;
> +	serial_omap_set_mctrl(&up->port, up->port.mctrl);
> +	spin_unlock_irqrestore(&up->port.lock, flags);
> +
> +	/*
> +	 * Disable break condition and FIFOs
> +	 */
> +	serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
> +	serial_omap_clear_fifos(up);
> +
> +	/*
> +	 * Read data port to reset things, and then free the irq
> +	 */
> +	(void) serial_in(up, UART_RX);
> +	if (up->use_dma) {
> +		int tmp;
> +		if (up->is_buf_dma_alloced) {
> +			dma_free_coherent(up->port.dev,
> +				  UART_XMIT_SIZE,
> +				  up->port.info->xmit.buf,
> +				  up->uart_dma.tx_buf_dma_phys);
> +			up->port.info->xmit.buf = NULL;
> +			up->is_buf_dma_alloced = 0;
> +		}
> +		serial_omap_stop_rx(port);
> +		dma_free_coherent(up->port.dev,
> +				  up->uart_dma.rx_buf_size,
> +				  up->uart_dma.rx_buf,
> +				  up->uart_dma.rx_buf_dma_phys);
> +		up->uart_dma.rx_buf = NULL;
> +		tmp = serial_in(up, UART_OMAP_SYSC) & 0x7;
> +		serial_out(up, UART_OMAP_SYSC, tmp); /* force-idle */
> +	}
> +
> +	free_irq(up->port.irq, up);
> +}
> +
> +static inline void
> +serial_omap_configure_xonxoff
> +		(struct uart_omap_port *up, struct ktermios *termios)
> +{
> +	unsigned char efr = 0;
> +
> +	up->lcr = serial_in(up, UART_LCR);
> +	serial_out(up, UART_LCR, 0xbf);
> +	up->efr = serial_in(up, UART_EFR);
> +	serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB);
> +
> +	serial_out(up, UART_XON1, termios->c_cc[VSTART]);
> +	serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
> +
> +	/* IXON Flag:
> +	 * Enable XON/XOFF flow control on output.
> +	 * Transmit XON1, XOFF1
> +	 */
> +	if (termios->c_iflag & IXON)
> +		efr |= 0x01 << 3;
> +
> +	/* IXOFF Flag:
> +	 * Enable XON/XOFF flow control on input.
> +	 * Receiver compares XON1, XOFF1.
> +	 */
> +	if (termios->c_iflag & IXOFF)
> +		efr |= 0x01 << 1;
> +
> +	serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
> +	serial_out(up, UART_LCR, 0x80);
> +
> +	up->mcr = serial_in(up, UART_MCR);
> +
> +	/* IXANY Flag:
> +	 * Enable any character to restart output.
> +	 * Operation resumes after receiving any
> +	 * character after recognition of the XOFF character
> +	 */
> +	if (termios->c_iflag & IXANY)
> +		up->mcr |= 1<<5;
> +
> +	serial_out(up, UART_MCR, up->mcr | 1<<6);
> +
> +	serial_out(up, UART_LCR, 0xbf);
> +	serial_out(up, UART_TI752_TCR, 0x0f);
> +	/* Enable special char function UARTi.EFR_REG[5] and
> +	 * load the new software flow control mode IXON or IXOFF
> +	 * and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
> +	 */
> +	serial_out(up, UART_EFR, up->efr | efr | 1<<5);
> +	serial_out(up, UART_LCR, 0x80);
> +
> +	serial_out(up, UART_MCR, up->mcr & ~(1<<6));
> +	serial_out(up, UART_LCR, up->lcr);
> +}
> +
> +static void
> +serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
> +			struct ktermios *old)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +	unsigned char cval;
> +	unsigned char efr = 0;
> +	unsigned long flags;
> +	unsigned int baud, quot;
> +
> +	switch (termios->c_cflag & CSIZE) {
> +	case CS5:
> +		cval = UART_LCR_WLEN5;
> +		break;
> +	case CS6:
> +		cval = UART_LCR_WLEN6;
> +		break;
> +	case CS7:
> +		cval = UART_LCR_WLEN7;
> +		break;
> +	default:
> +	case CS8:
> +		cval = UART_LCR_WLEN8;
> +		break;
> +	}
> +
> +	if (termios->c_cflag & CSTOPB)
> +		cval |= UART_LCR_STOP;
> +	if (termios->c_cflag & PARENB)
> +		cval |= UART_LCR_PARITY;
> +	if (!(termios->c_cflag & PARODD))
> +		cval |= UART_LCR_EPAR;
> +
> +	/*
> +	 * Ask the core to calculate the divisor for us.
> +	 */
> +
> +	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
> +	quot = serial_omap_get_divisor(port, baud);
> +
> +	if (up->use_dma)
> +		up->fcr = UART_FCR_ENABLE_FIFO
> +					| 0x1 << 6 | 0x1 << 4
> +					| UART_FCR_DMA_SELECT;
> +	else
> +		up->fcr = UART_FCR_ENABLE_FIFO
> +					| 0x1 << 6 | 0x1 << 4;
> +
> +	/*
> +	 * Ok, we're now changing the port state.  Do it with
> +	 * interrupts disabled.
> +	 */
> +	spin_lock_irqsave(&up->port.lock, flags);
> +
> +	/*
> +	 * Update the per-port timeout.
> +	 */
> +	uart_update_timeout(port, termios->c_cflag, baud);
> +
> +	up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
> +	if (termios->c_iflag & INPCK)
> +		up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
> +	if (termios->c_iflag & (BRKINT | PARMRK))
> +		up->port.read_status_mask |= UART_LSR_BI;
> +
> +	/*
> +	 * Characters to ignore
> +	 */
> +	up->port.ignore_status_mask = 0;
> +	if (termios->c_iflag & IGNPAR)
> +		up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
> +	if (termios->c_iflag & IGNBRK) {
> +		up->port.ignore_status_mask |= UART_LSR_BI;
> +		/*
> +		 * If we're ignoring parity and break indicators,
> +		 * ignore overruns too (for real raw support).
> +		 */
> +		if (termios->c_iflag & IGNPAR)
> +			up->port.ignore_status_mask |= UART_LSR_OE;
> +	}
> +
> +	/*
> +	 * ignore all characters if CREAD is not set
> +	 */
> +	if ((termios->c_cflag & CREAD) == 0)
> +		up->port.ignore_status_mask |= UART_LSR_DR;
> +
> +	/*
> +	 * Modem status interrupts
> +	 */
> +	up->ier &= ~UART_IER_MSI;
> +	if (UART_ENABLE_MS(&up->port, termios->c_cflag))
> +		up->ier |= UART_IER_MSI;
> +	serial_out(up, UART_IER, up->ier);
> +	serial_out(up, UART_LCR, cval);		/* reset DLAB */
> +
> +	/*-----------FIFOs and DMA Settings -----------*/
> +	serial_out(up, UART_LCR, UART_LCR_DLAB);
> +	serial_out(up, UART_DLL, 0);
> +	serial_out(up, UART_DLM, 0);
> +	serial_out(up, UART_LCR, 0);
> +
> +	serial_out(up, UART_LCR, 0xbf);
> +
> +	up->efr = serial_in(up, UART_EFR);
> +	serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
> +	serial_out(up, UART_LCR, 0x0);			/* Access FCR */
> +
> +	up->mcr = serial_in(up, UART_MCR);
> +	serial_out(up, UART_MCR, up->mcr | 0x40);        /* Access TLR*/
> +	/* FIFO ENABLE, DMA MODE */
> +	serial_out(up, UART_FCR, up->fcr);
> +	serial_out(up, UART_LCR, 0xbf);			/* Access EFR */
> +
> +	if (up->use_dma) {
> +		serial_out(up, UART_TI752_TLR, 0x00);
> +		serial_out(up, UART_OMAP_SCR, ((1 << 6) | (1 << 7)));
> +	}
> +
> +	serial_out(up, UART_EFR, up->efr);
> +	serial_out(up, UART_LCR, 0x80);
> +	serial_out(up, UART_MCR, up->mcr);        /* Restore TLR */
> +
> +	/*-----Protocol, Baud Rate, and Interrupt Settings -- */
> +
> +	serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_DISABLE);
> +
> +	serial_out(up, UART_LCR, 0xbf); /* Access EFR */
> +
> +	up->efr = serial_in(up, UART_EFR);
> +	serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
> +
> +	serial_out(up, UART_LCR, 0);
> +	serial_out(up, UART_IER, 0);
> +	serial_out(up, UART_LCR, 0xbf);
> +
> +	serial_out(up, UART_DLL, quot & 0xff);          /* LS of divisor */
> +	serial_out(up, UART_DLM, quot >> 8);            /* MS of divisor */
> +
> +	serial_out(up, UART_LCR, 0);
> +	serial_out(up, UART_IER, up->ier);
> +	serial_out(up, UART_LCR, 0xbf); /* Access EFR */
> +
> +	serial_out(up, UART_EFR, up->efr);
> +	serial_out(up, UART_LCR, cval);
> +
> +	if (baud > 230400 && baud != 3000000)
> +		serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE13X);
> +	else
> +		serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE16X);
> +
> +	/* Hardware Flow Control Configuration */
> +
> +	if (termios->c_cflag & CRTSCTS) {
> +		efr |= (UART_EFR_CTS | UART_EFR_RTS);
> +		serial_out(up, UART_LCR, 0x80);
> +
> +		up->mcr = serial_in(up, UART_MCR);
> +		serial_out(up, UART_MCR, up->mcr | 0x40);
> +
> +		serial_out(up, UART_LCR, 0xbf); /* Access EFR */
> +
> +		up->efr = serial_in(up, UART_EFR);
> +		serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
> +
> +		serial_out(up, UART_TI752_TCR, 0x0f);
> +		serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */
> +		serial_out(up, UART_LCR, 0x80);
> +		serial_out(up, UART_MCR, up->mcr | 0x02);
> +		serial_out(up, UART_LCR, cval);
> +	}
> +
> +	serial_omap_set_mctrl(&up->port, up->port.mctrl);
> +	/* ----Software Flow Control Configuration----- */
> +	if (termios->c_iflag & (IXON | IXOFF))
> +		serial_omap_configure_xonxoff(up, termios);
> +
> +	spin_unlock_irqrestore(&up->port.lock, flags);
> +	dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->pdev->id);
> +
> +#ifdef DEBUG
> +	serial_omap_display_reg(port);
> +#endif
> +}
> +
> +static void
> +serial_omap_pm(struct uart_port *port, unsigned int state,
> +	       unsigned int oldstate)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +	unsigned char efr;
> +	dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
> +	efr = serial_in(up, UART_EFR);
> +	serial_out(up, UART_LCR, 0xBF);
> +	serial_out(up, UART_EFR, efr | UART_EFR_ECB);
> +	serial_out(up, UART_LCR, 0);
> +
> +	serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
> +	serial_out(up, UART_LCR, 0xBF);
> +	serial_out(up, UART_EFR, efr);
> +	serial_out(up, UART_LCR, 0);
> +}
> +
> +static void serial_omap_release_port(struct uart_port *port)
> +{
> +	dev_dbg(port->dev, "serial_omap_release_port+\n");
> +}
> +
> +static int serial_omap_request_port(struct uart_port *port)
> +{
> +	dev_dbg(port->dev, "serial_omap_request_port+\n");
> +	return 0;
> +}
> +
> +static void serial_omap_config_port(struct uart_port *port, int flags)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +
> +	dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
> +							up->pdev->id);
> +	up->port.type = PORT_OMAP;
> +}
> +
> +static int
> +serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser)
> +{
> +	/* we don't want the core code to modify any port params */
> +	dev_dbg(port->dev, "serial_omap_verify_port+\n");
> +	return -EINVAL;
> +}
> +
> +static const char *
> +serial_omap_type(struct uart_port *port)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +
> +	dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->pdev->id);
> +	return up->name;
> +}
> +
> +#ifdef CONFIG_SERIAL_OMAP_CONSOLE
> +
> +static struct uart_omap_port *serial_omap_console_ports[4];
> +
> +static struct uart_driver serial_omap_reg;
> +
> +#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
> +
> +/*
> + *	Wait for transmitter & holding register to empty
> + */
> +static inline void wait_for_xmitr(struct uart_omap_port *up)
> +{
> +	unsigned int status, tmout = 10000;
> +
> +	/* Wait up to 10ms for the character(s) to be sent. */
> +	do {
> +		status = serial_in(up, UART_LSR);
> +
> +		if (status & UART_LSR_BI)
> +			up->lsr_break_flag = UART_LSR_BI;
> +
> +		if (--tmout == 0)
> +			break;
> +		udelay(1);
> +	} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
> +
> +	/* Wait up to 1s for flow control if necessary */
> +	if (up->port.flags & UPF_CONS_FLOW) {
> +		tmout = 1000000;
> +		for (tmout = 1000000; tmout; tmout--) {
> +			unsigned int msr = serial_in(up, UART_MSR);
> +			up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
> +			if (msr & UART_MSR_CTS)
> +				break;
> +			udelay(1);
> +		}
> +	}
> +}
> +
> +static void serial_omap_console_putchar(struct uart_port *port, int ch)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +
> +	wait_for_xmitr(up);
> +	serial_out(up, UART_TX, ch);
> +}
> +
> +/*
> + * Print a string to the serial port trying not to disturb
> + * any possible real use of the port...
> + *
> + *	The console_lock must be held when we get here.
> + */
> +static void
> +serial_omap_console_write(struct console *co, const char *s,
> +		unsigned int count)
> +{
> +	struct uart_omap_port *up = serial_omap_console_ports[co->index];
> +	unsigned int ier;
> +
> +	/*
> +	 *	First save the IER then disable the interrupts
> +	 */
> +	ier = serial_in(up, UART_IER);
> +	serial_out(up, UART_IER, 0);
> +
> +	uart_console_write(&up->port, s, count, serial_omap_console_putchar);
> +
> +	/*
> +	 *	Finally, wait for transmitter to become empty
> +	 *	and restore the IER
> +	 */
> +	wait_for_xmitr(up);
> +	serial_out(up, UART_IER, ier);
> +	/*
> +	 *	The receive handling will happen properly because the
> +	 *	receive ready bit will still be set; it is not cleared
> +	 *	on read.  However, modem control will not, we must
> +	 *	call it if we have saved something in the saved flags
> +	 *	while processing with interrupts off.
> +	 */
> +	if (up->msr_saved_flags)
> +		check_modem_status(up);
> +}
> +
> +static int __init
> +serial_omap_console_setup(struct console *co, char *options)
> +{
> +	struct uart_omap_port *up;
> +	int baud = 9600;
> +	int bits = 8;
> +	int parity = 'n';
> +	int flow = 'n';
> +	int r;
> +
> +	if (serial_omap_console_ports[co->index] == NULL)
> +		return -ENODEV;
> +	up = serial_omap_console_ports[co->index];
> +
> +	if (options)
> +		uart_parse_options(options, &baud, &parity, &bits, &flow);
> +
> +	r = uart_set_options(&up->port, co, baud, parity, bits, flow);
> +
> +	return r;
> +}
> +
> +static struct console serial_omap_console = {
> +	.name		= DEVICE_NAME,
> +	.write		= serial_omap_console_write,
> +	.device		= uart_console_device,
> +	.setup		= serial_omap_console_setup,
> +	.flags		= CON_PRINTBUFFER,
> +	.index		= -1,
> +	.data		= &serial_omap_reg,
> +};
> +
> +static void serial_omap_add_console_port(struct uart_omap_port *up)
> +{
> +	serial_omap_console_ports[up->pdev->id - 1] = up;
> +}
> +
> +#define OMAP_CONSOLE	(&serial_omap_console)
> +
> +#else
> +
> +#define OMAP_CONSOLE	NULL
> +
> +static inline void serial_omap_add_console_port(struct uart_omap_port *up) {}
> +
> +#endif
> +
> +struct uart_ops serial_omap_pops = {
> +	.tx_empty	= serial_omap_tx_empty,
> +	.set_mctrl	= serial_omap_set_mctrl,
> +	.get_mctrl	= serial_omap_get_mctrl,
> +	.stop_tx	= serial_omap_stop_tx,
> +	.start_tx	= serial_omap_start_tx,
> +	.stop_rx	= serial_omap_stop_rx,
> +	.enable_ms	= serial_omap_enable_ms,
> +	.break_ctl	= serial_omap_break_ctl,
> +	.startup	= serial_omap_startup,
> +	.shutdown	= serial_omap_shutdown,
> +	.set_termios	= serial_omap_set_termios,
> +	.pm		= serial_omap_pm,
> +	.type		= serial_omap_type,
> +	.release_port	= serial_omap_release_port,
> +	.request_port	= serial_omap_request_port,
> +	.config_port	= serial_omap_config_port,
> +	.verify_port	= serial_omap_verify_port,
> +};
> +
> +static struct uart_driver serial_omap_reg = {
> +	.owner		= THIS_MODULE,
> +	.driver_name	= "OMAP-SERIAL",
> +	.dev_name	= DEVICE_NAME,
> +	.major		= TTY_MAJOR,
> +	.minor		= 64,
> +	.nr		= OMAP_MAX_NR_PORTS,
> +	.cons		= OMAP_CONSOLE,
> +};
> +
> +static
> +int serial_omap_suspend(struct platform_device *pdev, pm_message_t state)
> +{
> +	struct uart_omap_port *up = platform_get_drvdata(pdev);
> +
> +	if (up)
> +		uart_suspend_port(&serial_omap_reg, &up->port);
> +	return 0;
> +}
> +
> +static int serial_omap_resume(struct platform_device *dev)
> +{
> +	struct uart_omap_port *up = platform_get_drvdata(dev);
> +	if (up)
> +		uart_resume_port(&serial_omap_reg, &up->port);
> +	return 0;
> +}
> +
> +static void serial_omap_rx_timeout(unsigned long uart_no)
> +{
> +	struct uart_omap_port *up = ui[uart_no - 1];
> +	unsigned int curr_dma_pos;
> +	curr_dma_pos = omap_readl(OMAP34XX_DMA4_BASE +
> +				  OMAP_DMA4_CDAC(up->uart_dma.rx_dma_channel));
> +	if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
> +			     (curr_dma_pos == 0)) {
> +		if (jiffies_to_msecs(jiffies - up->port_activity) <
> +								RX_TIMEOUT) {
> +			mod_timer(&up->uart_dma.rx_timer, jiffies +
> +				usecs_to_jiffies(up->uart_dma.rx_timeout));
> +		} else {
> +			serial_omap_stop_rxdma(up);
> +			up->ier |= UART_IER_RDI;
> +			serial_out(up, UART_IER, up->ier);
> +		}
> +		return;
> +	} else {
> +		unsigned int curr_transmitted_size = curr_dma_pos -
> +						up->uart_dma.prev_rx_dma_pos;
> +		up->port.icount.rx += curr_transmitted_size;
> +		tty_insert_flip_string(up->port.info->port.tty,
> +				up->uart_dma.rx_buf +
> +				(up->uart_dma.prev_rx_dma_pos -
> +				up->uart_dma.rx_buf_dma_phys),
> +				curr_transmitted_size);
> +		tty_flip_buffer_push(up->port.info->port.tty);
> +		up->uart_dma.prev_rx_dma_pos = curr_dma_pos;
> +		if (up->uart_dma.rx_buf_size +
> +				up->uart_dma.rx_buf_dma_phys == curr_dma_pos)
> +			serial_omap_start_rxdma(up);
> +		else
> +			mod_timer(&up->uart_dma.rx_timer, jiffies +
> +				usecs_to_jiffies(up->uart_dma.rx_timeout));
> +		up->port_activity = jiffies;
> +	}
> +}
> +
> +static void uart_rx_dma_callback(int lch, u16 ch_status, void *data)
> +{
> +	return;
> +}
> +
> +static void serial_omap_start_rxdma(struct uart_omap_port *up)
> +{
> +	if (up->uart_dma.rx_dma_channel == 0xFF) {
> +		omap_request_dma(up->uart_dma.uart_dma_rx, "UART Rx DMA",
> +			(void *)uart_rx_dma_callback, up,
> +				&(up->uart_dma.rx_dma_channel));
> +
> +		omap_set_dma_src_params(up->uart_dma.rx_dma_channel, 0,
> +				OMAP_DMA_AMODE_CONSTANT,
> +				up->uart_dma.uart_base, 0, 0);
> +		omap_set_dma_dest_params(up->uart_dma.rx_dma_channel, 0,
> +				OMAP_DMA_AMODE_POST_INC,
> +				up->uart_dma.rx_buf_dma_phys, 0, 0);
> +		omap_set_dma_transfer_params(up->uart_dma.rx_dma_channel,
> +				OMAP_DMA_DATA_TYPE_S8,
> +				up->uart_dma.rx_buf_size, 1,
> +				OMAP_DMA_SYNC_ELEMENT,
> +				up->uart_dma.uart_dma_rx, 0);
> +	}
> +	up->uart_dma.prev_rx_dma_pos = up->uart_dma.rx_buf_dma_phys;
> +	omap_writel(0, OMAP34XX_DMA4_BASE
> +			+ OMAP_DMA4_CDAC(up->uart_dma.rx_dma_channel));
> +	omap_start_dma(up->uart_dma.rx_dma_channel);
> +	mod_timer(&up->uart_dma.rx_timer, jiffies +
> +				usecs_to_jiffies(up->uart_dma.rx_timeout));
> +	up->uart_dma.rx_dma_state = 1;
> +}
> +
> +static void serial_omap_continue_tx(struct uart_omap_port *up)
> +{
> +	struct circ_buf *xmit = &up->port.info->xmit;
> +	int start = up->uart_dma.tx_buf_dma_phys
> +			+ (xmit->tail & (UART_XMIT_SIZE - 1));
> +	if (uart_circ_empty(xmit))
> +		return;
> +
> +	up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
> +	/* It is a circular buffer. See if the buffer has wounded back.
> +	 * If yes it will have to be transferred in two separate dma
> +	 * transfers
> +	 */
> +	if (start + up->uart_dma.tx_buf_size >=
> +			up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
> +		up->uart_dma.tx_buf_size =
> +			(up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE) - start;
> +	omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
> +				 OMAP_DMA_AMODE_CONSTANT,
> +				 up->uart_dma.uart_base, 0, 0);
> +	omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
> +		OMAP_DMA_AMODE_POST_INC, start, 0, 0);
> +
> +	omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
> +				     OMAP_DMA_DATA_TYPE_S8,
> +				     up->uart_dma.tx_buf_size, 1,
> +				     OMAP_DMA_SYNC_ELEMENT,
> +				     up->uart_dma.uart_dma_tx, 0);
> +
> +	omap_start_dma(up->uart_dma.tx_dma_channel);
> +}
> +
> +static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)data;
> +	struct circ_buf *xmit = &up->port.info->xmit;
> +	xmit->tail = (xmit->tail + up->uart_dma.tx_buf_size) & \
> +			(UART_XMIT_SIZE - 1);
> +	up->port.icount.tx += up->uart_dma.tx_buf_size;
> +
> +	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
> +		uart_write_wakeup(&up->port);
> +
> +	if (uart_circ_empty(xmit)) {
> +		spin_lock(&(up->uart_dma.tx_lock));
> +		serial_omap_stop_tx(&up->port);
> +		up->uart_dma.tx_dma_state = 0;
> +		spin_unlock(&(up->uart_dma.tx_lock));
> +	} else {
> +		omap_stop_dma(up->uart_dma.tx_dma_channel);
> +		serial_omap_continue_tx(up);
> +	}
> +	up->port_activity = jiffies;
> +	return;
> +}
> +
> +static int serial_omap_probe(struct platform_device *pdev)
> +{
> +	struct uart_omap_port	*up;
> +	struct resource		*mem, *irq, *dma_tx, *dma_rx;
> +	struct uart_dma_info *up_dma = pdev->dev.platform_data;
> +	int ret = -ENOSPC;
> +	char str[7];
> +
> +	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	if (!mem) {
> +		dev_err(&pdev->dev, "no mem resource?\n");
> +		return -ENODEV;
> +	}
> +	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> +	if (!irq) {
> +		dev_err(&pdev->dev, "no irq resource?\n");
> +		return -ENODEV;
> +	}
> +
> +	ret = (int) request_mem_region(mem->start, (mem->end - mem->start) + 1,
> +				     pdev->dev.driver->name);
> +	if (!ret) {
> +		dev_err(&pdev->dev, "memory region already claimed\n");
> +		return -EBUSY;
> +	}
> +
> +	dma_tx = platform_get_resource(pdev, IORESOURCE_DMA, 0);
> +	if (!dma_tx) {
> +		ret = -EINVAL;
> +		goto err;
> +	}
> +
> +	dma_rx = platform_get_resource(pdev, IORESOURCE_DMA, 1);
> +	if (!dma_rx) {
> +		ret = -EINVAL;
> +		goto err;
> +	}
> +
> +	up = kzalloc(sizeof(*up), GFP_KERNEL);
> +	if (up == NULL) {
> +		ret = -ENOMEM;
> +		goto do_release_region;
> +	}
> +	sprintf(up->name, "OMAP UART%d", pdev->id);
> +	up->pdev = pdev;
> +	up->port.dev = &pdev->dev;
> +	up->port.type = PORT_OMAP;
> +	up->port.iotype = UPIO_MEM;
> +	up->port.mapbase = mem->start;
> +	up->port.irq = irq->start;
> +
> +	up->uart_dma.uart_dma_tx = dma_tx->start;
> +	up->uart_dma.uart_dma_rx = dma_rx->start;
> +	up->uart_dma.uart_base = mem->start;
> +
> +	up->port.fifosize = 64;
> +	up->port.ops = &serial_omap_pops;
> +	up->port.line = pdev->id - 1;
> +	if ((pdev->id - 1) == QUART) {
> +		up->port.membase = ioremap_nocache(mem->start, 0x16 << 1);
> +		up->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
> +		up->port.uartclk = QUART_CLK;
> +		up->port.regshift = 1;
> +	} else {
> +		up->port.membase = (void *) OMAP2_IO_ADDRESS(mem->start);
> +		up->port.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
> +		up->port.uartclk = UART_CLK;
> +		up->port.regshift = 2;
> +	}
> +
> +	if (up_dma->dma_enabled) {
> +		up->use_dma = 1;
> +		up->uart_dma.rx_buf_size = up_dma->rx_dma_bufsize;
> +		up->uart_dma.rx_timeout = up_dma->rx_timeout;
> +	}
> +
> +	if (up->use_dma) {
> +		spin_lock_init(&(up->uart_dma.tx_lock));
> +		spin_lock_init(&(up->uart_dma.rx_lock));
> +		up->uart_dma.tx_dma_channel = 0xFF;
> +		up->uart_dma.rx_dma_channel = 0xFF;
> +	}
> +	if (console_detect(str)) {
> +		pr_err("\n %s: Invalid console paramter...\n", __func__);
> +		pr_err("\n %s: UART Driver Init Failed!\n", __func__);
> +		return -EPERM;
> +	}
> +	ui[pdev->id - 1] = up;
> +	serial_omap_add_console_port(up);
> +
> +	ret = uart_add_one_port(&serial_omap_reg, &up->port);
> +	if (ret != 0)
> +		goto do_release_region;
> +
> +	platform_set_drvdata(pdev, up);
> +	return 0;
> +err:
> +	dev_err(&pdev->dev, "[UART%d]: failure [%s]\n",
> +					pdev->id, __func__);
> +do_release_region:
> +	release_mem_region(mem->start, (mem->end - mem->start) + 1);
> +	return ret;
> +}
> +
> +static int serial_omap_remove(struct platform_device *dev)
> +{
> +	struct uart_omap_port *up = platform_get_drvdata(dev);
> +	platform_set_drvdata(dev, NULL);
> +	if (up) {
> +		uart_remove_one_port(&serial_omap_reg, &up->port);
> +		kfree(up);
> +	}
> +	return 0;
> +}
> +
> +static struct platform_driver serial_omap_driver = {
> +	.probe          = serial_omap_probe,
> +	.remove         = serial_omap_remove,
> +
> +	.suspend	= serial_omap_suspend,
> +	.resume		= serial_omap_resume,
> +	.driver		= {
> +		.name	= "omap-uart",
> +	},
> +};
> +
> +int __init serial_omap_init(void)
> +{
> +	int ret;
> +
> +	ret = uart_register_driver(&serial_omap_reg);
> +	if (ret != 0)
> +		return ret;
> +	ret = platform_driver_register(&serial_omap_driver);
> +	if (ret != 0)
> +		uart_unregister_driver(&serial_omap_reg);
> +	return ret;
> +}
> +
> +void __exit serial_omap_exit(void)
> +{
> +	platform_driver_unregister(&serial_omap_driver);
> +	uart_unregister_driver(&serial_omap_reg);
> +}
> +
> +#ifdef CONFIG_PM
> +static void omap_uart_save_context(int num)
> +{
> +	struct omap_uart_state *uart = &omap_uart[num];
> +	struct uart_omap_port *up = ui[num];
> +
> +	u16 lcr = 0;
> +	lcr = serial_in(up, UART_LCR);
> +	serial_out(up, UART_LCR, 0xBF);
> +	uart->dll = serial_in(up, UART_DLL);
> +	uart->dlh = serial_in(up, UART_DLM);
> +	serial_out(up, UART_LCR, lcr);
> +	uart->ier = serial_in(up, UART_IER);
> +	uart->sysc = serial_in(up, UART_OMAP_SYSC);
> +	uart->scr = serial_in(up, UART_OMAP_SCR);
> +	uart->wer = serial_in(up, UART_OMAP_WER);
> +
> +	uart->context_valid = 1;
> +}
> +
> +static void omap_uart_restore_context(int num)
> +{
> +	struct omap_uart_state *uart = &omap_uart[num];
> +	struct uart_omap_port *up = ui[num];
> +	u16 efr = 0;
> +
> +	if (!uart->context_valid)
> +		 return;
> +
> +	uart->context_valid = 0;
> +
> +	serial_out(up, UART_OMAP_MDR1, 0x7);
> +	serial_out(up, UART_LCR, 0xBF); /* Config B mode */
> +	efr = serial_in(up, UART_EFR);
> +	serial_out(up, UART_EFR, UART_EFR_ECB);
> +	serial_out(up, UART_LCR, 0x0); /* Operational mode */
> +	serial_out(up, UART_IER, 0x0);
> +	serial_out(up, UART_LCR, 0xBF); /* Config B mode */
> +	serial_out(up, UART_DLL, uart->dll);
> +	serial_out(up, UART_DLM, uart->dlh);
> +	serial_out(up, UART_LCR, 0x0); /* Operational mode */
> +	serial_out(up, UART_IER, uart->ier);
> +	serial_out(up, UART_FCR, up->fcr);
> +	serial_out(up, UART_LCR, 0xBF); /* Config B mode */
> +	serial_out(up, UART_EFR, efr);
> +	serial_out(up, UART_LCR, UART_LCR_WLEN8);
> +	serial_out(up, UART_OMAP_SCR, uart->scr);
> +	serial_out(up, UART_OMAP_WER, uart->wer);
> +	serial_out(up, UART_OMAP_SYSC, uart->sysc | (0x2 << 3));
> +	serial_out(up, UART_OMAP_MDR1, 0x00); /* UART 16x mode */
> +}
> +
> +/* Remove this during /mach-omap2/serial.c cleanup for 8250 support */
> +void omap_uart_enable_irqs(int enable) {}
> +
> +static inline void omap_uart_disable_clocks(int num)
> +{
> +	struct omap_uart_state *uart = &omap_uart[num];
> +	if (!uart->clocked)
> +		return;
> +
> +	omap_uart_save_context(num);
> +	uart->clocked = 0;
> +	clk_disable(uart->ick);
> +	clk_disable(uart->fck);
> +}
> +
> +void omap_uart_enable_wakeup(int num)
> +{
> +	struct omap_uart_state *uart = &omap_uart[num];
> +	/* Set wake-enable bit */
> +	if (uart->wk_en && uart->wk_mask) {
> +		u32 v = __raw_readl(uart->wk_en);
> +		v |= uart->wk_mask;
> +		__raw_writel(v, uart->wk_en);
> +	}
> +
> +	/* Ensure IOPAD wake-enables are set */
> +	if (cpu_is_omap34xx() && uart->padconf) {
> +		u16 v = omap_ctrl_readw(uart->padconf);
> +		v |= OMAP3_PADCONF_WAKEUPENABLE0;
> +		omap_ctrl_writew(v, uart->padconf);
> +	}
> +}
> +
> +static void omap_uart_smart_idle_enable(int num, int enable)
> +{
> +	struct uart_omap_port *up = ui[num];
> +	u16 sysc;
> +
> +	sysc = serial_in(up, UART_OMAP_SYSC) & 0x7;
> +
> +	if (enable)
> +		/* Errata 2.15: Force idle if in DMA mode */
> +		sysc |= up->use_dma ? 0x0 : (0x2 << 3);
> +	else
> +		sysc |= 0x1 << 3;
> +
> +	serial_out(up, UART_OMAP_SYSC, sysc);
> +}
> +
> +static void omap_uart_block_sleep(int num)
> +{
> +	struct omap_uart_state *uart = &omap_uart[num];
> +
> +	omap_uart_enable_clocks(num);
> +
> +	omap_uart_smart_idle_enable(num, 0);
> +	uart->can_sleep = 0;
> +	if (uart->timeout)
> +		mod_timer(&uart->timer, jiffies + uart->timeout);
> +}
> +
> +static void omap_uart_allow_sleep(int num)
> +{
> +	struct omap_uart_state *uart = &omap_uart[num];
> +	if (!uart->clocked)
> +		return;
> +
> +	if (uart->padconf)
> +		omap_uart_enable_wakeup(num);
> +
> +	omap_uart_smart_idle_enable(num, 1);
> +	uart->can_sleep = 1;
> +
> +	if (uart->timeout)
> +		del_timer_sync(&uart->timer);
> +}
> +
> +void omap_uart_prepare_idle(int num)
> +{
> +	omap_uart_disable_clocks(num);
> +}
> +
> +void omap_uart_resume_idle(int num)
> +{
> +	struct omap_uart_state *uart = &omap_uart[num];
> +
> +	omap_uart_enable_clocks(num);
> +
> +	/* Check for IO pad wakeup */
> +	if (cpu_is_omap34xx() && uart->padconf) {
> +		u16 p = omap_ctrl_readw(uart->padconf);
> +
> +	if (p & OMAP3_PADCONF_WAKEUPEVENT0)
> +		omap_uart_block_sleep(num);
> +	}
> +
> +	/* Check for normal UART wakeup */
> +	if (__raw_readl(uart->wk_st) & uart->wk_mask)
> +		omap_uart_block_sleep(num);
> +}
> +
> +void omap_uart_prepare_suspend(void)
> +{
> +	int j;
> +	for (j = 0; j < OMAP_MAX_NR_PORTS; j++)
> +		omap_uart_allow_sleep(j);
> +}
> +
> +int omap_uart_can_sleep(void)
> +{
> +	int can_sleep = 1;
> +	int j;
> +
> +	for (j = 0; j < OMAP_MAX_NR_PORTS; j++) {
> +		struct omap_uart_state *uart = &omap_uart[j];
> +
> +		if (!uart->clocked)
> +			continue;
> +
> +		if (!uart->can_sleep) {
> +			can_sleep = 0;
> +			continue;
> +		}
> +
> +		omap_uart_allow_sleep(j);
> +	}
> +	return can_sleep;
> +}
> +
> +static void omap_uart_init_wakeup_source(int num)
> +{
> +	struct omap_uart_state *uart = &omap_uart[num];
> +
> +	if (cpu_is_omap34xx()) {
> +		u32 mod = (uart->num == 2) ? OMAP3430_PER_MOD : CORE_MOD;
> +		u32 wk_mask = 0;
> +		u32 padconf = 0;
> +
> +		uart->wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1);
> +		uart->wk_st = OMAP34XX_PRM_REGADDR(mod, PM_WKST1);
> +		switch (uart->num) {
> +		case 0:
> +			wk_mask = OMAP3430_ST_UART1_MASK;
> +			padconf = 0x182;
> +			break;
> +		case 1:
> +			wk_mask = OMAP3430_ST_UART2_MASK;
> +			padconf = 0x17a;
> +			break;
> +		case 2:
> +			wk_mask = OMAP3430_ST_UART3_MASK;
> +			padconf = 0x19e;
> +			break;
> +		}
> +		uart->wk_mask = wk_mask;
> +		uart->padconf = padconf;
> +	} else if (cpu_is_omap24xx()) {
> +		u32 wk_mask = 0;
> +
> +		if (cpu_is_omap2430()) {
> +			uart->wk_en = OMAP2430_PRM_REGADDR(CORE_MOD, PM_WKEN1);
> +			uart->wk_st = OMAP2430_PRM_REGADDR(CORE_MOD, PM_WKST1);
> +		} else if (cpu_is_omap2420()) {
> +			uart->wk_en = OMAP2420_PRM_REGADDR(CORE_MOD, PM_WKEN1);
> +			uart->wk_st = OMAP2420_PRM_REGADDR(CORE_MOD, PM_WKST1);
> +		}
> +		switch (uart->num) {
> +		case 0:
> +			wk_mask = OMAP24XX_ST_UART1_MASK;
> +			break;
> +		case 1:
> +			wk_mask = OMAP24XX_ST_UART2_MASK;
> +			break;
> +		case 2:
> +			wk_mask = OMAP24XX_ST_UART3_MASK;
> +			break;
> +		}
> +		uart->wk_mask = wk_mask;
> +	} else {
> +		uart->wk_en = 0;
> +		uart->wk_st = 0;
> +		uart->wk_mask = 0;
> +		uart->padconf = 0;
> +	}
> +}
> +
> +static void omap_uart_idle_timer(unsigned long data)
> +{
> +
> +	struct omap_uart_state *uart = (struct omap_uart_state *)data;
> +	struct uart_omap_port *up = ui[uart->num];
> +
> +	if (up->use_dma && (up->uart_dma.tx_dma_channel != 0xFF
> +			|| up->uart_dma.rx_dma_channel != 0xFF)) {
> +		omap_uart_block_sleep(uart->num);
> +		return;
> +	}
> +
> +	omap_uart_allow_sleep(uart->num);
> +}
> +
> +void omap_uart_idle_init(int num)
> +{
> +	struct omap_uart_state *uart = &omap_uart[num];
> +
> +	uart->can_sleep = 0;
> +	uart->timeout = SLEEP_TIMEOUT;
> +	setup_timer(&uart->timer, omap_uart_idle_timer,
> +				(unsigned long) uart);
> +
> +	mod_timer(&uart->timer, jiffies + uart->timeout);
> +
> +	omap_uart_init_wakeup_source(num);
> +}
> +
> +#else
> +static inline void omap_uart_restore_context(int num) {}
> +static inline void omap_uart_block_sleep(int num) {}
> +static void omap_uart_smart_idle_enable(int num, int enable) {}
> +#endif /* CONFIG_PM */
> +
> +static inline void omap_uart_enable_clocks(int num)
> +{
> +	struct omap_uart_state *uart = &omap_uart[num];
> +	if (uart->clocked)
> +		return;
> +
> +	clk_enable(uart->ick);
> +	clk_enable(uart->fck);
> +	uart->clocked = 1;
> +	omap_uart_restore_context(num);
> +}
> +
> +void __init omap_serial_early_init()
> +{
> +	int i;
> +	char name[16];
> +
> +	for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
> +		struct omap_uart_state *uart = &omap_uart[i];
> +		sprintf(name, "uart%d_ick", i+1);
> +		uart->ick = clk_get(NULL, name);
> +
> +		if (IS_ERR(uart->ick)) {
> +			printk(KERN_ERR "Could not get uart%d_ick\n", i+1);
> +			uart->ick = NULL;
> +		}
> +
> +		sprintf(name, "uart%d_fck", i+1);
> +		uart->fck = clk_get(NULL, name);
> +
> +		if (IS_ERR(uart->fck)) {
> +			printk(KERN_ERR "Could not get uart%d_fck\n", i+1);
> +			uart->fck = NULL;
> +		}
> +
> +		uart->num = i;
> +		omap_uart_enable_clocks(i);
> +	}
> +}
> +
> +#ifdef DEBUG
> +#define UART_OMAP_SPR           0x07    /* Scratchpad register */
> +static void serial_omap_display_reg(struct uart_port *port)
> +{
> +	struct uart_omap_port *up = (struct uart_omap_port *)port;
> +	unsigned int lcr, efr, mcr, dll, dlh, xon1, xon2, xoff1, xoff2;
> +	unsigned int tcr, tlr, uasr;
> +	pr_debug("Register dump for UART%d\n", up->pdev->id);
> +	pr_debug("IER_REG = 0x%x\n", serial_in(up, UART_IER));
> +	pr_debug("IIR_REG = 0x%x\n", serial_in(up, UART_IIR));
> +	lcr = serial_in(up, UART_LCR);
> +	pr_debug("LCR_REG = 0x%x\n", lcr);
> +	mcr = serial_in(up, UART_MCR);
> +	pr_debug("MCR_REG = 0x%x\n", mcr);
> +	pr_debug("LSR_REG = 0x%x\n", serial_in(up, UART_LSR));
> +	pr_debug("MSR_REG = 0x%x\n", serial_in(up, UART_MSR));
> +	pr_debug("SPR_REG = 0x%x\n", serial_in(up, UART_OMAP_SPR));
> +	pr_debug("MDR1_REG = 0x%x\n", serial_in(up, UART_OMAP_MDR1));
> +	pr_debug("MDR2_REG = 0x%x\n", serial_in(up, UART_OMAP_MDR2));
> +	pr_debug("SCR_REG = 0x%x\n", serial_in(up, UART_OMAP_SCR));
> +	pr_debug("SSR_REG = 0x%x\n", serial_in(up, UART_OMAP_SSR));
> +	pr_debug("MVR_REG = 0x%x\n", serial_in(up, UART_OMAP_MVER));
> +	pr_debug("SYSC_REG = 0x%x\n", serial_in(up, UART_OMAP_SYSC));
> +	pr_debug("SYSS_REG = 0x%x\n", serial_in(up, UART_OMAP_SYSS));
> +	pr_debug("WER_REG = 0x%x\n", serial_in(up, UART_OMAP_WER));
> +
> +	serial_out(up, UART_LCR, 0xBF);
> +	dll = serial_in(up, UART_DLL);
> +	dlh = serial_in(up, UART_DLM);
> +	efr = serial_in(up, UART_EFR);
> +	xon1 = serial_in(up, UART_XON1);
> +	xon2 = serial_in(up, UART_XON2);
> +
> +	serial_out(up, UART_EFR, efr | UART_EFR_ECB);
> +	serial_out(up, UART_LCR, lcr);
> +	serial_out(up, UART_MCR, mcr | UART_MCR_TCRTLR);
> +	serial_out(up, UART_LCR, 0xBF);
> +
> +	tcr = serial_in(up, UART_TI752_TCR);
> +	tlr = serial_in(up, UART_TI752_TLR);
> +
> +	serial_out(up, UART_LCR, lcr);
> +	serial_out(up, UART_MCR, mcr);
> +	serial_out(up, UART_LCR, 0xBF);
> +
> +	xoff1 = serial_in(up, UART_XOFF1);
> +	xoff2 = serial_in(up, UART_XOFF2);
> +	uasr = serial_in(up, UART_OMAP_UASR);
> +
> +	serial_out(up, UART_EFR, efr);
> +	serial_out(up, UART_LCR, lcr);
> +
> +	pr_debug("DLL_REG = 0x%x\n", dll);
> +	pr_debug("DLH_REG = 0x%x\n", dlh);
> +	pr_debug("EFR_REG = 0x%x\n", efr);
> +
> +	pr_debug("XON1_ADDR_REG = 0x%x\n", xon1);
> +	pr_debug("XON2_ADDR_REG = 0x%x\n", xon2);
> +	pr_debug("TCR_REG = 0x%x\n", tcr);
> +	pr_debug("TLR_REG = 0x%x\n", tlr);
> +
> +	pr_debug("XOFF1_REG = 0x%x\n", xoff1);
> +	pr_debug("XOFF2_REG = 0x%x\n", xoff2);
> +	pr_debug("UASR_REG = 0x%x\n", uasr);
> +}
> +#endif /* DEBUG */
> +
> +subsys_initcall(serial_omap_init);
> +module_exit(serial_omap_exit);
> +
> +MODULE_DESCRIPTION("OMAP High Speed UART driver");
> +MODULE_LICENSE("GPL");
> +MODULE_ALIAS("platform:" DRIVER_NAME);
> +MODULE_AUTHOR("Texas Instruments Inc");
>
> --
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Linux omap blocked on boot

[Alberto J. Perez]

[-- Attachment #1: Type: text/plain, Size: 366 bytes --]

Hi all!

I'm recompiling the linux-omap-2.6/origin/pm branch and every time I get 
the boot process stalled after kernel image decompression.

- With the linux-omap-2.6/origin/2.6.30 branch I have no problems.
- I've tried with 2008q3-72 & 2009q1-203 arm compilers.

I attach the .config I used.

Some one have or had the same problem?

Thanks in advance,

Alberto.

[-- Attachment #2: .config --]
[-- Type: text/plain, Size: 48012 bytes --]

#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.31-rc7-omap1
# Tue Oct  6 17:42:09 2009
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_MMU=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_OPROFILE_ARMV7=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y

#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set
# CONFIG_AUDIT is not set

#
# RCU Subsystem
#
CONFIG_CLASSIC_RCU=y
# CONFIG_TREE_RCU is not set
# CONFIG_PREEMPT_RCU is not set
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_PREEMPT_RCU_TRACE is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_GROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
# CONFIG_RT_GROUP_SCHED is not set
CONFIG_USER_SCHED=y
# CONFIG_CGROUP_SCHED is not set
# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
# CONFIG_RD_BZIP2 is not set
# CONFIG_RD_LZMA is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_EMBEDDED=y
CONFIG_UID16=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
# CONFIG_ELF_CORE is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y

#
# Performance Counters
#
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLUB_DEBUG=y
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_COMPAT_BRK is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_SLOB is not set
CONFIG_PROFILING=y
CONFIG_TRACEPOINTS=y
CONFIG_MARKERS=y
CONFIG_OPROFILE=y
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_CLK=y

#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
# CONFIG_SLOW_WORK is not set
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_BLOCK=y
CONFIG_LBDAF=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set

#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
# CONFIG_FREEZER is not set

#
# System Type
#
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_AT91 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_GEMINI is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_MXC is not set
# CONFIG_ARCH_STMP3XXX is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_KIRKWOOD is not set
# CONFIG_ARCH_LOKI is not set
# CONFIG_ARCH_MV78XX0 is not set
# CONFIG_ARCH_ORION5X is not set
# CONFIG_ARCH_MMP is not set
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_NS9XXX is not set
# CONFIG_ARCH_W90X900 is not set
# CONFIG_ARCH_PNX4008 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_MSM is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_S3C64XX is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_U300 is not set
# CONFIG_ARCH_DAVINCI is not set
CONFIG_ARCH_OMAP=y

#
# TI OMAP Implementations
#
CONFIG_ARCH_OMAP_OTG=y
# CONFIG_ARCH_OMAP1 is not set
# CONFIG_ARCH_OMAP2 is not set
CONFIG_ARCH_OMAP3=y
# CONFIG_ARCH_OMAP4 is not set

#
# OMAP Feature Selections
#
# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
# CONFIG_OMAP_RESET_CLOCKS is not set
# CONFIG_OMAP_MUX is not set
CONFIG_OMAP_MCBSP=y
# CONFIG_OMAP_MBOX_FWK is not set
# CONFIG_OMAP_MPU_TIMER is not set
CONFIG_OMAP_32K_TIMER=y
# CONFIG_OMAP3_DEBOBS is not set
CONFIG_OMAP_32K_TIMER_HZ=128
CONFIG_OMAP_DM_TIMER=y
# CONFIG_OMAP_LL_DEBUG_UART1 is not set
# CONFIG_OMAP_LL_DEBUG_UART2 is not set
CONFIG_OMAP_LL_DEBUG_UART3=y
# CONFIG_OMAP_PM_NONE is not set
CONFIG_OMAP_PM_NOOP=y
# CONFIG_OMAP_PM_SRF is not set
CONFIG_ARCH_OMAP34XX=y
CONFIG_ARCH_OMAP3430=y

#
# OMAP Board Type
#
# CONFIG_MACH_OMAP3_BEAGLE is not set
# CONFIG_MACH_OMAP_LDP is not set
CONFIG_MACH_OVERO=y
# CONFIG_MACH_OMAP3EVM is not set
# CONFIG_MACH_OMAP3_PANDORA is not set
# CONFIG_MACH_OMAP_3430SDP is not set
# CONFIG_MACH_NOKIA_RX51 is not set
# CONFIG_MACH_OMAP_ZOOM2 is not set

#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV7=y
CONFIG_CPU_PABRT_IFAR=y
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y

#
# Processor Features
#
CONFIG_ARM_THUMB=y
CONFIG_ARM_THUMBEE=y
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_HAS_TLS_REG=y
# CONFIG_ARM_ERRATA_430973 is not set
# CONFIG_ARM_ERRATA_458693 is not set
# CONFIG_ARM_ERRATA_460075 is not set
CONFIG_COMMON_CLKDEV=y

#
# Bus support
#
# CONFIG_PCI_SYSCALL is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set

#
# Kernel Features
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_VMSPLIT_3G=y
# CONFIG_VMSPLIT_2G is not set
# CONFIG_VMSPLIT_1G is not set
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PREEMPT is not set
CONFIG_HZ=128
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_HIGHMEM is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_LEDS=y
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_UACCESS_WITH_MEMCPY is not set

#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE=" debug "
# CONFIG_XIP_KERNEL is not set
CONFIG_KEXEC=y
CONFIG_ATAGS_PROC=y

#
# CPU Power Management
#
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_TABLE=y
# CONFIG_CPU_FREQ_DEBUG is not set
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
# CONFIG_CPU_IDLE is not set

#
# Floating point emulation
#

#
# At least one emulation must be selected
#
CONFIG_VFP=y
CONFIG_VFPv3=y
CONFIG_NEON=y

#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
CONFIG_HAVE_AOUT=y
CONFIG_BINFMT_AOUT=m
CONFIG_BINFMT_MISC=y

#
# Power management options
#
# CONFIG_PM is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_XFRM_STATISTICS is not set
CONFIG_NET_KEY=y
# CONFIG_NET_KEY_MIGRATE is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
CONFIG_INET_TUNNEL=m
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
CONFIG_IPV6=m
# CONFIG_IPV6_PRIVACY is not set
# CONFIG_IPV6_ROUTER_PREF is not set
# CONFIG_IPV6_OPTIMISTIC_DAD is not set
# CONFIG_INET6_AH is not set
# CONFIG_INET6_ESP is not set
# CONFIG_INET6_IPCOMP is not set
# CONFIG_IPV6_MIP6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
CONFIG_INET6_XFRM_MODE_TRANSPORT=m
CONFIG_INET6_XFRM_MODE_TUNNEL=m
CONFIG_INET6_XFRM_MODE_BEET=m
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
CONFIG_IPV6_SIT=m
CONFIG_IPV6_NDISC_NODETYPE=y
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_IPV6_MULTIPLE_TABLES is not set
# CONFIG_IPV6_MROUTE is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_PHONET is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set

#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_NET_DROP_MONITOR is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
CONFIG_WIRELESS=y
CONFIG_CFG80211=y
# CONFIG_CFG80211_REG_DEBUG is not set
# CONFIG_CFG80211_DEBUGFS is not set
# CONFIG_WIRELESS_OLD_REGULATORY is not set
CONFIG_WIRELESS_EXT=y
CONFIG_WIRELESS_EXT_SYSFS=y
CONFIG_LIB80211=y
CONFIG_LIB80211_CRYPT_WEP=m
CONFIG_LIB80211_CRYPT_CCMP=m
CONFIG_LIB80211_CRYPT_TKIP=m
# CONFIG_LIB80211_DEBUG is not set
CONFIG_MAC80211=y
CONFIG_MAC80211_DEFAULT_PS=y
CONFIG_MAC80211_DEFAULT_PS_VALUE=1

#
# Rate control algorithm selection
#
CONFIG_MAC80211_RC_PID=y
CONFIG_MAC80211_RC_MINSTREL=y
CONFIG_MAC80211_RC_DEFAULT_PID=y
# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set
CONFIG_MAC80211_RC_DEFAULT="pid"
CONFIG_MAC80211_LEDS=y
# CONFIG_MAC80211_DEBUGFS is not set
# CONFIG_MAC80211_DEBUG_MENU is not set
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set

#
# Device Drivers
#

#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
CONFIG_MTD_CONCAT=y
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_AFS_PARTS is not set
# CONFIG_MTD_AR7_PARTS is not set

#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
# CONFIG_SSFDC is not set
# CONFIG_MTD_OOPS is not set

#
# RAM/ROM/Flash chip drivers
#
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set

#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PLATRAM is not set

#
# Self-contained MTD device drivers
#
# CONFIG_MTD_DATAFLASH is not set
# CONFIG_MTD_M25P80 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set

#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_NAND=y
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
# CONFIG_MTD_NAND_ECC_SMC is not set
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
# CONFIG_MTD_NAND_GPIO is not set
# CONFIG_MTD_NAND_OMAP2 is not set
CONFIG_MTD_NAND_IDS=y
# CONFIG_MTD_NAND_DISKONCHIP is not set
# CONFIG_MTD_NAND_NANDSIM is not set
# CONFIG_MTD_NAND_PLATFORM is not set
# CONFIG_MTD_ALAUDA is not set
# CONFIG_MTD_ONENAND is not set

#
# LPDDR flash memory drivers
#
# CONFIG_MTD_LPDDR is not set

#
# UBI - Unsorted block images
#
# CONFIG_MTD_UBI is not set
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_CRYPTOLOOP=m
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_UB is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=16384
# CONFIG_BLK_DEV_XIP is not set
CONFIG_CDROM_PKTCDVD=m
CONFIG_CDROM_PKTCDVD_BUFFERS=8
# CONFIG_CDROM_PKTCDVD_WCACHE is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_MG_DISK is not set
CONFIG_MISC_DEVICES=y
# CONFIG_ICS932S401 is not set
# CONFIG_OMAP_STI is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_ISL29003 is not set
# CONFIG_C2PORT is not set

#
# EEPROM support
#
# CONFIG_EEPROM_AT24 is not set
# CONFIG_EEPROM_AT25 is not set
CONFIG_EEPROM_LEGACY=y
# CONFIG_EEPROM_MAX6875 is not set
CONFIG_EEPROM_93CX6=m
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set

#
# SCSI device support
#
CONFIG_RAID_ATTRS=m
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
CONFIG_CHR_DEV_SG=m
# CONFIG_CHR_DEV_SCH is not set
CONFIG_SCSI_MULTI_LUN=y
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
CONFIG_SCSI_WAIT_SCAN=m

#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
# CONFIG_LIBFC is not set
# CONFIG_LIBFCOE is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_DH is not set
# CONFIG_SCSI_OSD_INITIATOR is not set
# CONFIG_ATA is not set
CONFIG_MD=y
CONFIG_BLK_DEV_MD=m
CONFIG_MD_LINEAR=m
CONFIG_MD_RAID0=m
CONFIG_MD_RAID1=m
CONFIG_MD_RAID10=m
CONFIG_MD_RAID456=m
CONFIG_MD_RAID6_PQ=m
CONFIG_MD_MULTIPATH=m
CONFIG_MD_FAULTY=m
CONFIG_BLK_DEV_DM=m
# CONFIG_DM_DEBUG is not set
CONFIG_DM_CRYPT=m
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
# CONFIG_DM_LOG_USERSPACE is not set
CONFIG_DM_ZERO=m
CONFIG_DM_MULTIPATH=m
# CONFIG_DM_MULTIPATH_QL is not set
# CONFIG_DM_MULTIPATH_ST is not set
CONFIG_DM_DELAY=m
# CONFIG_DM_UEVENT is not set
CONFIG_NETDEVICES=y
CONFIG_DUMMY=m
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
CONFIG_TUN=m
# CONFIG_VETH is not set
# CONFIG_NET_ETHERNET is not set
CONFIG_MII=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set

#
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
CONFIG_WLAN_80211=y
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_USB=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_LIBERTAS_SPI=m
CONFIG_LIBERTAS_DEBUG=y
# CONFIG_LIBERTAS_THINFIRM is not set
# CONFIG_AT76C50X_USB is not set
CONFIG_USB_ZD1201=m
# CONFIG_USB_NET_RNDIS_WLAN is not set
CONFIG_RTL8187=m
CONFIG_RTL8187_LEDS=y
# CONFIG_MAC80211_HWSIM is not set
CONFIG_P54_COMMON=m
CONFIG_P54_USB=m
# CONFIG_P54_SPI is not set
CONFIG_P54_LEDS=y
# CONFIG_AR9170_USB is not set
CONFIG_HOSTAP=m
CONFIG_HOSTAP_FIRMWARE=y
CONFIG_HOSTAP_FIRMWARE_NVRAM=y
# CONFIG_B43 is not set
# CONFIG_B43LEGACY is not set
# CONFIG_ZD1211RW is not set
# CONFIG_RT2X00 is not set
# CONFIG_WL12XX is not set
# CONFIG_IWM is not set

#
# Enable WiMAX (Networking options) to see the WiMAX drivers
#

#
# USB Network Adapters
#
CONFIG_USB_CATC=m
CONFIG_USB_KAWETH=m
CONFIG_USB_PEGASUS=m
CONFIG_USB_RTL8150=m
CONFIG_USB_USBNET=y
CONFIG_USB_NET_AX8817X=y
CONFIG_USB_NET_CDCETHER=y
# CONFIG_USB_NET_CDC_EEM is not set
CONFIG_USB_NET_DM9601=m
# CONFIG_USB_NET_SMSC95XX is not set
CONFIG_USB_NET_GL620A=m
CONFIG_USB_NET_NET1080=m
CONFIG_USB_NET_PLUSB=m
CONFIG_USB_NET_MCS7830=m
CONFIG_USB_NET_RNDIS_HOST=m
CONFIG_USB_NET_CDC_SUBSET=m
CONFIG_USB_ALI_M5632=y
CONFIG_USB_AN2720=y
CONFIG_USB_BELKIN=y
CONFIG_USB_ARMLINUX=y
CONFIG_USB_EPSON2888=y
CONFIG_USB_KC2190=y
CONFIG_USB_NET_ZAURUS=m
# CONFIG_USB_NET_INT51X1 is not set
# CONFIG_WAN is not set
CONFIG_PPP=m
# CONFIG_PPP_MULTILINK is not set
# CONFIG_PPP_FILTER is not set
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_MPPE=m
CONFIG_PPPOE=m
# CONFIG_PPPOL2TP is not set
# CONFIG_SLIP is not set
CONFIG_SLHC=m
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set

#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set

#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set

#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_GPIO is not set
# CONFIG_KEYBOARD_MATRIX is not set
# CONFIG_KEYBOARD_LM8323 is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
CONFIG_INPUT_MOUSE=y
CONFIG_MOUSE_PS2=y
CONFIG_MOUSE_PS2_ALPS=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
CONFIG_MOUSE_PS2_TRACKPOINT=y
# CONFIG_MOUSE_PS2_ELANTECH is not set
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_APPLETOUCH is not set
# CONFIG_MOUSE_BCM5974 is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_MOUSE_GPIO is not set
# CONFIG_MOUSE_SYNAPTICS_I2C is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set

#
# Hardware I/O ports
#
CONFIG_SERIO=y
CONFIG_SERIO_SERPORT=y
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set

#
# Character devices
#
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set

#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y

#
# Non-8250 serial port support
#
# CONFIG_SERIAL_MAX3100 is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y
# CONFIG_HW_RANDOM_TIMERIOMEM is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_HELPER_AUTO=y

#
# I2C Hardware Bus support
#

#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_DESIGNWARE is not set
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
CONFIG_I2C_OMAP=y
# CONFIG_I2C_SIMTEC is not set

#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set
# CONFIG_I2C_TINY_USB is not set

#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_STUB is not set

#
# Miscellaneous I2C Chip support
#
# CONFIG_DS1682 is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_PCF8575 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y

#
# SPI Master Controller Drivers
#
# CONFIG_SPI_BITBANG is not set
# CONFIG_SPI_GPIO is not set
CONFIG_SPI_OMAP24XX=y

#
# SPI Protocol Masters
#
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_GPIOLIB=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y

#
# Memory mapped GPIO expanders:
#

#
# I2C GPIO expanders:
#
# CONFIG_GPIO_MAX732X is not set
# CONFIG_GPIO_PCA953X is not set
# CONFIG_GPIO_PCF857X is not set

#
# PCI GPIO expanders:
#

#
# SPI GPIO expanders:
#
# CONFIG_GPIO_MAX7301 is not set
# CONFIG_GPIO_MCP23S08 is not set
# CONFIG_W1 is not set
CONFIG_POWER_SUPPLY=m
# CONFIG_POWER_SUPPLY_DEBUG is not set
# CONFIG_PDA_POWER is not set
# CONFIG_BATTERY_DS2760 is not set
# CONFIG_BATTERY_DS2782 is not set
# CONFIG_BATTERY_BQ27x00 is not set
# CONFIG_BATTERY_MAX17040 is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_AD7414 is not set
# CONFIG_SENSORS_AD7418 is not set
# CONFIG_SENSORS_ADCXX is not set
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ADT7462 is not set
# CONFIG_SENSORS_ADT7470 is not set
# CONFIG_SENSORS_ADT7473 is not set
# CONFIG_SENSORS_ADT7475 is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_F71882FG is not set
# CONFIG_SENSORS_F75375S is not set
# CONFIG_SENSORS_G760A is not set
# CONFIG_SENSORS_GL518SM is not set
# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_LM63 is not set
# CONFIG_SENSORS_LM70 is not set
# CONFIG_SENSORS_LM75 is not set
# CONFIG_SENSORS_LM77 is not set
# CONFIG_SENSORS_LM78 is not set
# CONFIG_SENSORS_LM80 is not set
# CONFIG_SENSORS_LM83 is not set
# CONFIG_SENSORS_LM85 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_LM93 is not set
# CONFIG_SENSORS_LTC4215 is not set
# CONFIG_SENSORS_LTC4245 is not set
# CONFIG_SENSORS_LM95241 is not set
# CONFIG_SENSORS_MAX1111 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_MAX6650 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_SHT15 is not set
# CONFIG_SENSORS_DME1737 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_SMSC47M192 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_ADS7828 is not set
# CONFIG_SENSORS_THMC50 is not set
# CONFIG_SENSORS_TMP401 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_SENSORS_W83781D is not set
# CONFIG_SENSORS_W83791D is not set
# CONFIG_SENSORS_W83792D is not set
# CONFIG_SENSORS_W83793 is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83L786NG is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_SENSORS_LIS3_SPI is not set
# CONFIG_SENSORS_TSC210X is not set
# CONFIG_SENSORS_OMAP34XX is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y

#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_OMAP_WATCHDOG is not set

#
# USB-based Watchdog Cards
#
# CONFIG_USBPCWATCHDOG is not set
CONFIG_SSB_POSSIBLE=y

#
# Sonics Silicon Backplane
#
# CONFIG_SSB is not set

#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_HTC_EGPIO is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_TPS65010 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_T7L66XB is not set
# CONFIG_MFD_TC6387XB is not set
# CONFIG_MFD_TC6393XB is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_AB3100_CORE is not set
# CONFIG_EZX_PCAP is not set
CONFIG_MEDIA_SUPPORT=m

#
# Multimedia core support
#
CONFIG_VIDEO_DEV=m
CONFIG_VIDEO_V4L2_COMMON=m
# CONFIG_VIDEO_ALLOW_V4L1 is not set
CONFIG_VIDEO_V4L1_COMPAT=y
# CONFIG_DVB_CORE is not set
CONFIG_VIDEO_MEDIA=m

#
# Multimedia drivers
#
# CONFIG_MEDIA_ATTACH is not set
CONFIG_MEDIA_TUNER=m
# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
CONFIG_MEDIA_TUNER_SIMPLE=m
CONFIG_MEDIA_TUNER_TDA8290=m
CONFIG_MEDIA_TUNER_TDA9887=m
CONFIG_MEDIA_TUNER_TEA5761=m
CONFIG_MEDIA_TUNER_TEA5767=m
CONFIG_MEDIA_TUNER_MT20XX=m
CONFIG_MEDIA_TUNER_XC2028=m
CONFIG_MEDIA_TUNER_XC5000=m
CONFIG_MEDIA_TUNER_MC44S803=m
CONFIG_VIDEO_V4L2=m
CONFIG_VIDEO_CAPTURE_DRIVERS=y
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
# CONFIG_VIDEO_VIVI is not set
# CONFIG_VIDEO_SAA5246A is not set
# CONFIG_VIDEO_SAA5249 is not set
# CONFIG_SOC_CAMERA is not set
CONFIG_V4L_USB_DRIVERS=y
CONFIG_USB_VIDEO_CLASS=m
CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
CONFIG_USB_GSPCA=m
# CONFIG_USB_M5602 is not set
# CONFIG_USB_STV06XX is not set
# CONFIG_USB_GSPCA_CONEX is not set
# CONFIG_USB_GSPCA_ETOMS is not set
# CONFIG_USB_GSPCA_FINEPIX is not set
# CONFIG_USB_GSPCA_MARS is not set
# CONFIG_USB_GSPCA_MR97310A is not set
# CONFIG_USB_GSPCA_OV519 is not set
# CONFIG_USB_GSPCA_OV534 is not set
# CONFIG_USB_GSPCA_PAC207 is not set
# CONFIG_USB_GSPCA_PAC7311 is not set
# CONFIG_USB_GSPCA_SN9C20X is not set
# CONFIG_USB_GSPCA_SONIXB is not set
# CONFIG_USB_GSPCA_SONIXJ is not set
# CONFIG_USB_GSPCA_SPCA500 is not set
# CONFIG_USB_GSPCA_SPCA501 is not set
# CONFIG_USB_GSPCA_SPCA505 is not set
# CONFIG_USB_GSPCA_SPCA506 is not set
# CONFIG_USB_GSPCA_SPCA508 is not set
# CONFIG_USB_GSPCA_SPCA561 is not set
# CONFIG_USB_GSPCA_SQ905 is not set
# CONFIG_USB_GSPCA_SQ905C is not set
# CONFIG_USB_GSPCA_STK014 is not set
# CONFIG_USB_GSPCA_SUNPLUS is not set
# CONFIG_USB_GSPCA_T613 is not set
# CONFIG_USB_GSPCA_TV8532 is not set
# CONFIG_USB_GSPCA_VC032X is not set
# CONFIG_USB_GSPCA_ZC3XX is not set
# CONFIG_VIDEO_PVRUSB2 is not set
# CONFIG_VIDEO_HDPVR is not set
# CONFIG_VIDEO_EM28XX is not set
# CONFIG_VIDEO_CX231XX is not set
# CONFIG_VIDEO_USBVISION is not set
# CONFIG_USB_ET61X251 is not set
# CONFIG_USB_SN9C102 is not set
# CONFIG_USB_ZC0301 is not set
CONFIG_USB_PWC_INPUT_EVDEV=y
# CONFIG_USB_ZR364XX is not set
# CONFIG_USB_STKWEBCAM is not set
# CONFIG_USB_S2255 is not set
CONFIG_RADIO_ADAPTERS=y
# CONFIG_USB_DSBR is not set
# CONFIG_USB_SI470X is not set
# CONFIG_USB_MR800 is not set
# CONFIG_RADIO_TEA5764 is not set
# CONFIG_DAB is not set

#
# Graphics support
#
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set

#
# Display device support
#
CONFIG_DISPLAY_SUPPORT=y

#
# Display hardware drivers
#

#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_SOUND=y
CONFIG_SOUND_OSS_CORE=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SND_HWDEP=y
CONFIG_SND_RAWMIDI=y
CONFIG_SND_JACK=y
CONFIG_SND_SEQUENCER=m
# CONFIG_SND_SEQ_DUMMY is not set
CONFIG_SND_OSSEMUL=y
CONFIG_SND_MIXER_OSS=y
CONFIG_SND_PCM_OSS=y
CONFIG_SND_PCM_OSS_PLUGINS=y
CONFIG_SND_SEQUENCER_OSS=y
# CONFIG_SND_HRTIMER is not set
# CONFIG_SND_DYNAMIC_MINORS is not set
CONFIG_SND_SUPPORT_OLD_API=y
CONFIG_SND_VERBOSE_PROCFS=y
CONFIG_SND_VERBOSE_PRINTK=y
CONFIG_SND_DEBUG=y
# CONFIG_SND_DEBUG_VERBOSE is not set
# CONFIG_SND_PCM_XRUN_DEBUG is not set
CONFIG_SND_RAWMIDI_SEQ=m
# CONFIG_SND_OPL3_LIB_SEQ is not set
# CONFIG_SND_OPL4_LIB_SEQ is not set
# CONFIG_SND_SBAWE_SEQ is not set
# CONFIG_SND_EMU10K1_SEQ is not set
CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_VIRMIDI is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
CONFIG_SND_ARM=y
CONFIG_SND_SPI=y
CONFIG_SND_USB=y
CONFIG_SND_USB_AUDIO=y
CONFIG_SND_USB_CAIAQ=m
CONFIG_SND_USB_CAIAQ_INPUT=y
CONFIG_SND_SOC=y
CONFIG_SND_OMAP_SOC=y
CONFIG_SND_SOC_I2C_AND_SPI=y
# CONFIG_SND_SOC_ALL_CODECS is not set
# CONFIG_SOUND_PRIME is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
CONFIG_HID_DEBUG=y
# CONFIG_HIDRAW is not set

#
# USB Input Devices
#
CONFIG_USB_HID=y
# CONFIG_HID_PID is not set
# CONFIG_USB_HIDDEV is not set

#
# Special HID drivers
#
# CONFIG_HID_A4TECH is not set
# CONFIG_HID_APPLE is not set
# CONFIG_HID_BELKIN is not set
# CONFIG_HID_CHERRY is not set
# CONFIG_HID_CHICONY is not set
# CONFIG_HID_CYPRESS is not set
# CONFIG_HID_DRAGONRISE is not set
# CONFIG_HID_EZKEY is not set
# CONFIG_HID_KYE is not set
# CONFIG_HID_GYRATION is not set
# CONFIG_HID_KENSINGTON is not set
# CONFIG_HID_LOGITECH is not set
# CONFIG_HID_MICROSOFT is not set
# CONFIG_HID_MONTEREY is not set
# CONFIG_HID_NTRIG is not set
# CONFIG_HID_PANTHERLORD is not set
# CONFIG_HID_PETALYNX is not set
# CONFIG_HID_SAMSUNG is not set
# CONFIG_HID_SONY is not set
# CONFIG_HID_SUNPLUS is not set
# CONFIG_HID_GREENASIA is not set
# CONFIG_HID_SMARTJOYPLUS is not set
# CONFIG_HID_TOPSEED is not set
# CONFIG_HID_THRUSTMASTER is not set
# CONFIG_HID_ZEROPLUS is not set
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
CONFIG_USB=y
CONFIG_USB_DEBUG=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y

#
# Miscellaneous USB options
#
CONFIG_USB_DEVICEFS=y
CONFIG_USB_DEVICE_CLASS=y
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
# CONFIG_USB_OTG_WHITELIST is not set
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
CONFIG_USB_MON=y
# CONFIG_USB_WUSB is not set
# CONFIG_USB_WUSB_CBAF is not set

#
# USB Host Controller Drivers
#
# CONFIG_USB_C67X00_HCD is not set
# CONFIG_USB_EHCI_HCD is not set
# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_ISP1760_HCD is not set
# CONFIG_USB_OHCI_HCD is not set
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
# CONFIG_USB_HWA_HCD is not set
CONFIG_USB_MUSB_HDRC=y
CONFIG_USB_MUSB_SOC=y

#
# OMAP 343x high speed USB support
#
CONFIG_USB_MUSB_HOST=y
# CONFIG_USB_MUSB_PERIPHERAL is not set
# CONFIG_USB_MUSB_OTG is not set
CONFIG_USB_MUSB_HDRC_HCD=y
CONFIG_MUSB_PIO_ONLY=y
# CONFIG_USB_MUSB_DEBUG is not set

#
# USB Device Class drivers
#
CONFIG_USB_ACM=m
CONFIG_USB_PRINTER=m
CONFIG_USB_WDM=y
# CONFIG_USB_TMC is not set

#
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
#

#
# also be needed; see USB_STORAGE Help for more info
#
CONFIG_USB_STORAGE=y
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_LIBUSUAL is not set

#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set

#
# USB port drivers
#
CONFIG_USB_SERIAL=m
# CONFIG_USB_EZUSB is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_AIRCABLE is not set
# CONFIG_USB_SERIAL_ARK3116 is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_CH341 is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_CP210X is not set
# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
# CONFIG_USB_SERIAL_EMPEG is not set
CONFIG_USB_SERIAL_FTDI_SIO=m
# CONFIG_USB_SERIAL_FUNSOFT is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IPAQ is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
# CONFIG_USB_SERIAL_GARMIN is not set
# CONFIG_USB_SERIAL_IPW is not set
# CONFIG_USB_SERIAL_IUU is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KLSI is not set
# CONFIG_USB_SERIAL_KOBIL_SCT is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_MOS7720 is not set
# CONFIG_USB_SERIAL_MOS7840 is not set
# CONFIG_USB_SERIAL_MOTOROLA is not set
# CONFIG_USB_SERIAL_NAVMAN is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_OTI6858 is not set
# CONFIG_USB_SERIAL_QUALCOMM is not set
# CONFIG_USB_SERIAL_SPCP8X5 is not set
# CONFIG_USB_SERIAL_HP4X is not set
# CONFIG_USB_SERIAL_SAFE is not set
# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
# CONFIG_USB_SERIAL_SYMBOL is not set
# CONFIG_USB_SERIAL_TI is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OPTION is not set
# CONFIG_USB_SERIAL_OMNINET is not set
# CONFIG_USB_SERIAL_OPTICON is not set
# CONFIG_USB_SERIAL_DEBUG is not set

#
# USB Miscellaneous drivers
#
CONFIG_USB_EMI62=m
CONFIG_USB_EMI26=m
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
CONFIG_USB_LEGOTOWER=m
CONFIG_USB_LCD=m
# CONFIG_USB_BERRY_CHARGE is not set
CONFIG_USB_LED=m
# CONFIG_USB_CYPRESS_CY7C63 is not set
# CONFIG_USB_CYTHERM is not set
# CONFIG_USB_IDMOUSE is not set
# CONFIG_USB_FTDI_ELAN is not set
# CONFIG_USB_APPLEDISPLAY is not set
# CONFIG_USB_SISUSBVGA is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
# CONFIG_USB_ISIGHTFW is not set
# CONFIG_USB_VST is not set
# CONFIG_USB_GADGET is not set

#
# OTG and related infrastructure
#
CONFIG_USB_OTG_UTILS=y
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_ISP1301_OMAP is not set
# CONFIG_NOP_USB_XCEIV is not set
CONFIG_MMC=y
# CONFIG_MMC_DEBUG is not set
CONFIG_MMC_UNSAFE_RESUME=y

#
# MMC/SD/SDIO Card Drivers
#
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_BOUNCE=y
CONFIG_SDIO_UART=y
# CONFIG_MMC_TEST is not set

#
# MMC/SD/SDIO Host Controller Drivers
#
# CONFIG_MMC_SDHCI is not set
# CONFIG_MMC_OMAP_HS is not set
# CONFIG_MMC_SPI is not set
# CONFIG_MEMSTICK is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y

#
# LED drivers
#
# CONFIG_LEDS_OMAP_DEBUG is not set
# CONFIG_LEDS_OMAP is not set
# CONFIG_LEDS_OMAP_PWM is not set
# CONFIG_LEDS_PCA9532 is not set
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_GPIO_PLATFORM=y
# CONFIG_LEDS_LP3944 is not set
# CONFIG_LEDS_PCA955X is not set
# CONFIG_LEDS_DAC124S085 is not set
# CONFIG_LEDS_BD2802 is not set

#
# LED Triggers
#
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
# CONFIG_LEDS_TRIGGER_GPIO is not set
# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set

#
# iptables trigger is under Netfilter config (LED target)
#
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set

#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set

#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_DS1307 is not set
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# CONFIG_RTC_DRV_RX8025 is not set

#
# SPI RTC drivers
#
# CONFIG_RTC_DRV_M41T94 is not set
# CONFIG_RTC_DRV_DS1305 is not set
# CONFIG_RTC_DRV_DS1390 is not set
# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_R9701 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_DS3234 is not set

#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_V3020 is not set

#
# on-CPU RTC drivers
#
# CONFIG_DMADEVICES is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_REGULATOR is not set
# CONFIG_UIO is not set
# CONFIG_STAGING is not set

#
# CBUS support
#
# CONFIG_CBUS is not set

#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
# CONFIG_EXT3_FS_XATTR is not set
# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_XFS_FS=m
# CONFIG_XFS_QUOTA is not set
# CONFIG_XFS_POSIX_ACL is not set
# CONFIG_XFS_RT is not set
# CONFIG_XFS_DEBUG is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
CONFIG_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_QUOTA=y
# CONFIG_QUOTA_NETLINK_INTERFACE is not set
CONFIG_PRINT_QUOTA_WARNING=y
CONFIG_QUOTA_TREE=y
# CONFIG_QFMT_V1 is not set
CONFIG_QFMT_V2=y
CONFIG_QUOTACTL=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
CONFIG_FUSE_FS=m
# CONFIG_CUSE is not set

#
# Caches
#
# CONFIG_FSCACHE is not set

#
# CD-ROM/DVD Filesystems
#
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_UDF_FS=m
CONFIG_UDF_NLS=y

#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set

#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
# CONFIG_CONFIGFS_FS is not set
CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
CONFIG_JFFS2_SUMMARY=y
CONFIG_JFFS2_FS_XATTR=y
CONFIG_JFFS2_FS_POSIX_ACL=y
CONFIG_JFFS2_FS_SECURITY=y
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_LZO=y
CONFIG_JFFS2_RTIME=y
CONFIG_JFFS2_RUBIN=y
# CONFIG_JFFS2_CMODE_NONE is not set
CONFIG_JFFS2_CMODE_PRIORITY=y
# CONFIG_JFFS2_CMODE_SIZE is not set
# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_NILFS2_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
CONFIG_NFS_V4=y
# CONFIG_NFS_V4_1 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=m
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
# CONFIG_SYSV68_PARTITION is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set

#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_DETECT_HUNG_TASK=y
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
# CONFIG_DEBUG_KMEMLEAK is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
CONFIG_DEBUG_MUTEXES=y
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
CONFIG_STACKTRACE=y
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
# CONFIG_PAGE_POISONING is not set
CONFIG_NOP_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_RING_BUFFER=y
CONFIG_EVENT_TRACING=y
CONFIG_CONTEXT_SWITCH_TRACER=y
CONFIG_TRACING=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set
# CONFIG_DYNAMIC_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
CONFIG_ARM_UNWIND=y
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_ERRORS is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_LL is not set

#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_XOR_BLOCKS=m
CONFIG_ASYNC_CORE=m
CONFIG_ASYNC_MEMCPY=m
CONFIG_ASYNC_XOR=m
CONFIG_CRYPTO=y

#
# Crypto core or helper
#
# CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_PCOMP=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_GF128MUL=m
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CRYPTO_CRYPTD=m
# CONFIG_CRYPTO_AUTHENC is not set
CONFIG_CRYPTO_TEST=m

#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_SEQIV is not set

#
# Block modes
#
CONFIG_CRYPTO_CBC=y
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_XTS is not set

#
# Hash modes
#
CONFIG_CRYPTO_HMAC=m
CONFIG_CRYPTO_XCBC=m

#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_MICHAEL_MIC=y
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m

#
# Ciphers
#
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_FCRYPT=m
CONFIG_CRYPTO_KHAZAD=m
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_TWOFISH_COMMON=m

#
# Compression
#
CONFIG_CRYPTO_DEFLATE=m
# CONFIG_CRYPTO_ZLIB is not set
# CONFIG_CRYPTO_LZO is not set

#
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_HW=y
CONFIG_BINARY_PRINTF=y

#
# Library routines
#
CONFIG_BITREVERSE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_CRC_CCITT=y
CONFIG_CRC16=m
CONFIG_CRC_T10DIF=y
CONFIG_CRC_ITU_T=y
CONFIG_CRC32=y
CONFIG_CRC7=y
CONFIG_LIBCRC32C=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
CONFIG_NLATTR=y

Re: Linux omap blocked on boot

[Kevin Hilman]

"Alberto J. Perez" <aperez@disca.upv.es> writes:

> Hi all!
>
> I'm recompiling the linux-omap-2.6/origin/pm branch and every time I
> get the boot process stalled after kernel image decompression.
>
> - With the linux-omap-2.6/origin/2.6.30 branch I have no problems.
> - I've tried with 2008q3-72 & 2009q1-203 arm compilers.
>
> I attach the .config I used.
>

It looks like you are trying this for Overo, right.  

So we're on the same page, please pull the current PM branch as I
pushed a new one yesterday.  Then, use omap3_pm_defconfig with the
only change being to change the debug UART from UART1 to UART3.  This
is how I test on Overo and booting works fine.

Kevin

> Some one have or had the same problem?
>
> Thanks in advance,
>
> Alberto.
> #
> # Automatically generated make config: don't edit
> # Linux kernel version: 2.6.31-rc7-omap1
> # Tue Oct  6 17:42:09 2009
> #
> CONFIG_ARM=y
> CONFIG_SYS_SUPPORTS_APM_EMULATION=y
> CONFIG_GENERIC_GPIO=y
> CONFIG_GENERIC_TIME=y
> CONFIG_GENERIC_CLOCKEVENTS=y
> CONFIG_MMU=y
> CONFIG_GENERIC_HARDIRQS=y
> CONFIG_STACKTRACE_SUPPORT=y
> CONFIG_HAVE_LATENCYTOP_SUPPORT=y
> CONFIG_LOCKDEP_SUPPORT=y
> CONFIG_TRACE_IRQFLAGS_SUPPORT=y
> CONFIG_HARDIRQS_SW_RESEND=y
> CONFIG_GENERIC_IRQ_PROBE=y
> CONFIG_RWSEM_GENERIC_SPINLOCK=y
> CONFIG_GENERIC_HWEIGHT=y
> CONFIG_GENERIC_CALIBRATE_DELAY=y
> CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
> CONFIG_OPROFILE_ARMV7=y
> CONFIG_VECTORS_BASE=0xffff0000
> CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
> CONFIG_CONSTRUCTORS=y
>
> #
> # General setup
> #
> CONFIG_EXPERIMENTAL=y
> CONFIG_BROKEN_ON_SMP=y
> CONFIG_INIT_ENV_ARG_LIMIT=32
> CONFIG_LOCALVERSION=""
> CONFIG_LOCALVERSION_AUTO=y
> CONFIG_SWAP=y
> CONFIG_SYSVIPC=y
> CONFIG_SYSVIPC_SYSCTL=y
> # CONFIG_POSIX_MQUEUE is not set
> CONFIG_BSD_PROCESS_ACCT=y
> # CONFIG_BSD_PROCESS_ACCT_V3 is not set
> # CONFIG_TASKSTATS is not set
> # CONFIG_AUDIT is not set
>
> #
> # RCU Subsystem
> #
> CONFIG_CLASSIC_RCU=y
> # CONFIG_TREE_RCU is not set
> # CONFIG_PREEMPT_RCU is not set
> # CONFIG_TREE_RCU_TRACE is not set
> # CONFIG_PREEMPT_RCU_TRACE is not set
> CONFIG_IKCONFIG=y
> CONFIG_IKCONFIG_PROC=y
> CONFIG_LOG_BUF_SHIFT=14
> CONFIG_GROUP_SCHED=y
> CONFIG_FAIR_GROUP_SCHED=y
> # CONFIG_RT_GROUP_SCHED is not set
> CONFIG_USER_SCHED=y
> # CONFIG_CGROUP_SCHED is not set
> # CONFIG_CGROUPS is not set
> CONFIG_SYSFS_DEPRECATED=y
> CONFIG_SYSFS_DEPRECATED_V2=y
> # CONFIG_RELAY is not set
> # CONFIG_NAMESPACES is not set
> CONFIG_BLK_DEV_INITRD=y
> CONFIG_INITRAMFS_SOURCE=""
> CONFIG_RD_GZIP=y
> # CONFIG_RD_BZIP2 is not set
> # CONFIG_RD_LZMA is not set
> CONFIG_CC_OPTIMIZE_FOR_SIZE=y
> CONFIG_SYSCTL=y
> CONFIG_ANON_INODES=y
> CONFIG_EMBEDDED=y
> CONFIG_UID16=y
> # CONFIG_SYSCTL_SYSCALL is not set
> CONFIG_KALLSYMS=y
> # CONFIG_KALLSYMS_ALL is not set
> # CONFIG_KALLSYMS_EXTRA_PASS is not set
> CONFIG_HOTPLUG=y
> CONFIG_PRINTK=y
> CONFIG_BUG=y
> # CONFIG_ELF_CORE is not set
> CONFIG_BASE_FULL=y
> CONFIG_FUTEX=y
> CONFIG_EPOLL=y
> CONFIG_SIGNALFD=y
> CONFIG_TIMERFD=y
> CONFIG_EVENTFD=y
> CONFIG_SHMEM=y
> CONFIG_AIO=y
>
> #
> # Performance Counters
> #
> CONFIG_VM_EVENT_COUNTERS=y
> CONFIG_SLUB_DEBUG=y
> # CONFIG_STRIP_ASM_SYMS is not set
> # CONFIG_COMPAT_BRK is not set
> # CONFIG_SLAB is not set
> CONFIG_SLUB=y
> # CONFIG_SLOB is not set
> CONFIG_PROFILING=y
> CONFIG_TRACEPOINTS=y
> CONFIG_MARKERS=y
> CONFIG_OPROFILE=y
> CONFIG_HAVE_OPROFILE=y
> # CONFIG_KPROBES is not set
> CONFIG_HAVE_KPROBES=y
> CONFIG_HAVE_KRETPROBES=y
> CONFIG_HAVE_CLK=y
>
> #
> # GCOV-based kernel profiling
> #
> # CONFIG_GCOV_KERNEL is not set
> # CONFIG_SLOW_WORK is not set
> CONFIG_HAVE_GENERIC_DMA_COHERENT=y
> CONFIG_SLABINFO=y
> CONFIG_RT_MUTEXES=y
> CONFIG_BASE_SMALL=0
> CONFIG_MODULES=y
> # CONFIG_MODULE_FORCE_LOAD is not set
> CONFIG_MODULE_UNLOAD=y
> CONFIG_MODULE_FORCE_UNLOAD=y
> CONFIG_MODVERSIONS=y
> CONFIG_MODULE_SRCVERSION_ALL=y
> CONFIG_BLOCK=y
> CONFIG_LBDAF=y
> # CONFIG_BLK_DEV_BSG is not set
> # CONFIG_BLK_DEV_INTEGRITY is not set
>
> #
> # IO Schedulers
> #
> CONFIG_IOSCHED_NOOP=y
> CONFIG_IOSCHED_AS=y
> CONFIG_IOSCHED_DEADLINE=y
> CONFIG_IOSCHED_CFQ=y
> # CONFIG_DEFAULT_AS is not set
> # CONFIG_DEFAULT_DEADLINE is not set
> CONFIG_DEFAULT_CFQ=y
> # CONFIG_DEFAULT_NOOP is not set
> CONFIG_DEFAULT_IOSCHED="cfq"
> # CONFIG_FREEZER is not set
>
> #
> # System Type
> #
> # CONFIG_ARCH_AAEC2000 is not set
> # CONFIG_ARCH_INTEGRATOR is not set
> # CONFIG_ARCH_REALVIEW is not set
> # CONFIG_ARCH_VERSATILE is not set
> # CONFIG_ARCH_AT91 is not set
> # CONFIG_ARCH_CLPS711X is not set
> # CONFIG_ARCH_GEMINI is not set
> # CONFIG_ARCH_EBSA110 is not set
> # CONFIG_ARCH_EP93XX is not set
> # CONFIG_ARCH_FOOTBRIDGE is not set
> # CONFIG_ARCH_MXC is not set
> # CONFIG_ARCH_STMP3XXX is not set
> # CONFIG_ARCH_NETX is not set
> # CONFIG_ARCH_H720X is not set
> # CONFIG_ARCH_IOP13XX is not set
> # CONFIG_ARCH_IOP32X is not set
> # CONFIG_ARCH_IOP33X is not set
> # CONFIG_ARCH_IXP23XX is not set
> # CONFIG_ARCH_IXP2000 is not set
> # CONFIG_ARCH_IXP4XX is not set
> # CONFIG_ARCH_L7200 is not set
> # CONFIG_ARCH_KIRKWOOD is not set
> # CONFIG_ARCH_LOKI is not set
> # CONFIG_ARCH_MV78XX0 is not set
> # CONFIG_ARCH_ORION5X is not set
> # CONFIG_ARCH_MMP is not set
> # CONFIG_ARCH_KS8695 is not set
> # CONFIG_ARCH_NS9XXX is not set
> # CONFIG_ARCH_W90X900 is not set
> # CONFIG_ARCH_PNX4008 is not set
> # CONFIG_ARCH_PXA is not set
> # CONFIG_ARCH_MSM is not set
> # CONFIG_ARCH_RPC is not set
> # CONFIG_ARCH_SA1100 is not set
> # CONFIG_ARCH_S3C2410 is not set
> # CONFIG_ARCH_S3C64XX is not set
> # CONFIG_ARCH_SHARK is not set
> # CONFIG_ARCH_LH7A40X is not set
> # CONFIG_ARCH_U300 is not set
> # CONFIG_ARCH_DAVINCI is not set
> CONFIG_ARCH_OMAP=y
>
> #
> # TI OMAP Implementations
> #
> CONFIG_ARCH_OMAP_OTG=y
> # CONFIG_ARCH_OMAP1 is not set
> # CONFIG_ARCH_OMAP2 is not set
> CONFIG_ARCH_OMAP3=y
> # CONFIG_ARCH_OMAP4 is not set
>
> #
> # OMAP Feature Selections
> #
> # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
> # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
> # CONFIG_OMAP_RESET_CLOCKS is not set
> # CONFIG_OMAP_MUX is not set
> CONFIG_OMAP_MCBSP=y
> # CONFIG_OMAP_MBOX_FWK is not set
> # CONFIG_OMAP_MPU_TIMER is not set
> CONFIG_OMAP_32K_TIMER=y
> # CONFIG_OMAP3_DEBOBS is not set
> CONFIG_OMAP_32K_TIMER_HZ=128
> CONFIG_OMAP_DM_TIMER=y
> # CONFIG_OMAP_LL_DEBUG_UART1 is not set
> # CONFIG_OMAP_LL_DEBUG_UART2 is not set
> CONFIG_OMAP_LL_DEBUG_UART3=y
> # CONFIG_OMAP_PM_NONE is not set
> CONFIG_OMAP_PM_NOOP=y
> # CONFIG_OMAP_PM_SRF is not set
> CONFIG_ARCH_OMAP34XX=y
> CONFIG_ARCH_OMAP3430=y
>
> #
> # OMAP Board Type
> #
> # CONFIG_MACH_OMAP3_BEAGLE is not set
> # CONFIG_MACH_OMAP_LDP is not set
> CONFIG_MACH_OVERO=y
> # CONFIG_MACH_OMAP3EVM is not set
> # CONFIG_MACH_OMAP3_PANDORA is not set
> # CONFIG_MACH_OMAP_3430SDP is not set
> # CONFIG_MACH_NOKIA_RX51 is not set
> # CONFIG_MACH_OMAP_ZOOM2 is not set
>
> #
> # Processor Type
> #
> CONFIG_CPU_32=y
> CONFIG_CPU_32v6K=y
> CONFIG_CPU_V7=y
> CONFIG_CPU_32v7=y
> CONFIG_CPU_ABRT_EV7=y
> CONFIG_CPU_PABRT_IFAR=y
> CONFIG_CPU_CACHE_V7=y
> CONFIG_CPU_CACHE_VIPT=y
> CONFIG_CPU_COPY_V6=y
> CONFIG_CPU_TLB_V7=y
> CONFIG_CPU_HAS_ASID=y
> CONFIG_CPU_CP15=y
> CONFIG_CPU_CP15_MMU=y
>
> #
> # Processor Features
> #
> CONFIG_ARM_THUMB=y
> CONFIG_ARM_THUMBEE=y
> # CONFIG_CPU_ICACHE_DISABLE is not set
> # CONFIG_CPU_DCACHE_DISABLE is not set
> # CONFIG_CPU_BPREDICT_DISABLE is not set
> CONFIG_HAS_TLS_REG=y
> # CONFIG_ARM_ERRATA_430973 is not set
> # CONFIG_ARM_ERRATA_458693 is not set
> # CONFIG_ARM_ERRATA_460075 is not set
> CONFIG_COMMON_CLKDEV=y
>
> #
> # Bus support
> #
> # CONFIG_PCI_SYSCALL is not set
> # CONFIG_ARCH_SUPPORTS_MSI is not set
> # CONFIG_PCCARD is not set
>
> #
> # Kernel Features
> #
> CONFIG_TICK_ONESHOT=y
> CONFIG_NO_HZ=y
> CONFIG_HIGH_RES_TIMERS=y
> CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
> CONFIG_VMSPLIT_3G=y
> # CONFIG_VMSPLIT_2G is not set
> # CONFIG_VMSPLIT_1G is not set
> CONFIG_PAGE_OFFSET=0xC0000000
> # CONFIG_PREEMPT is not set
> CONFIG_HZ=128
> CONFIG_AEABI=y
> # CONFIG_OABI_COMPAT is not set
> # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
> # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
> # CONFIG_HIGHMEM is not set
> CONFIG_SELECT_MEMORY_MODEL=y
> CONFIG_FLATMEM_MANUAL=y
> # CONFIG_DISCONTIGMEM_MANUAL is not set
> # CONFIG_SPARSEMEM_MANUAL is not set
> CONFIG_FLATMEM=y
> CONFIG_FLAT_NODE_MEM_MAP=y
> CONFIG_PAGEFLAGS_EXTENDED=y
> CONFIG_SPLIT_PTLOCK_CPUS=4
> # CONFIG_PHYS_ADDR_T_64BIT is not set
> CONFIG_ZONE_DMA_FLAG=0
> CONFIG_VIRT_TO_BUS=y
> CONFIG_HAVE_MLOCK=y
> CONFIG_HAVE_MLOCKED_PAGE_BIT=y
> CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
> CONFIG_LEDS=y
> CONFIG_ALIGNMENT_TRAP=y
> # CONFIG_UACCESS_WITH_MEMCPY is not set
>
> #
> # Boot options
> #
> CONFIG_ZBOOT_ROM_TEXT=0x0
> CONFIG_ZBOOT_ROM_BSS=0x0
> CONFIG_CMDLINE=" debug "
> # CONFIG_XIP_KERNEL is not set
> CONFIG_KEXEC=y
> CONFIG_ATAGS_PROC=y
>
> #
> # CPU Power Management
> #
> CONFIG_CPU_FREQ=y
> CONFIG_CPU_FREQ_TABLE=y
> # CONFIG_CPU_FREQ_DEBUG is not set
> CONFIG_CPU_FREQ_STAT=y
> CONFIG_CPU_FREQ_STAT_DETAILS=y
> CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
> # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
> # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
> # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
> # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
> CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
> # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
> CONFIG_CPU_FREQ_GOV_USERSPACE=y
> CONFIG_CPU_FREQ_GOV_ONDEMAND=y
> # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
> # CONFIG_CPU_IDLE is not set
>
> #
> # Floating point emulation
> #
>
> #
> # At least one emulation must be selected
> #
> CONFIG_VFP=y
> CONFIG_VFPv3=y
> CONFIG_NEON=y
>
> #
> # Userspace binary formats
> #
> CONFIG_BINFMT_ELF=y
> CONFIG_HAVE_AOUT=y
> CONFIG_BINFMT_AOUT=m
> CONFIG_BINFMT_MISC=y
>
> #
> # Power management options
> #
> # CONFIG_PM is not set
> CONFIG_ARCH_SUSPEND_POSSIBLE=y
> CONFIG_NET=y
>
> #
> # Networking options
> #
> CONFIG_PACKET=y
> CONFIG_PACKET_MMAP=y
> CONFIG_UNIX=y
> CONFIG_XFRM=y
> # CONFIG_XFRM_USER is not set
> # CONFIG_XFRM_SUB_POLICY is not set
> # CONFIG_XFRM_MIGRATE is not set
> # CONFIG_XFRM_STATISTICS is not set
> CONFIG_NET_KEY=y
> # CONFIG_NET_KEY_MIGRATE is not set
> CONFIG_INET=y
> # CONFIG_IP_MULTICAST is not set
> # CONFIG_IP_ADVANCED_ROUTER is not set
> CONFIG_IP_FIB_HASH=y
> CONFIG_IP_PNP=y
> CONFIG_IP_PNP_DHCP=y
> CONFIG_IP_PNP_BOOTP=y
> CONFIG_IP_PNP_RARP=y
> # CONFIG_NET_IPIP is not set
> # CONFIG_NET_IPGRE is not set
> # CONFIG_ARPD is not set
> # CONFIG_SYN_COOKIES is not set
> # CONFIG_INET_AH is not set
> # CONFIG_INET_ESP is not set
> # CONFIG_INET_IPCOMP is not set
> # CONFIG_INET_XFRM_TUNNEL is not set
> CONFIG_INET_TUNNEL=m
> CONFIG_INET_XFRM_MODE_TRANSPORT=y
> CONFIG_INET_XFRM_MODE_TUNNEL=y
> CONFIG_INET_XFRM_MODE_BEET=y
> # CONFIG_INET_LRO is not set
> CONFIG_INET_DIAG=y
> CONFIG_INET_TCP_DIAG=y
> # CONFIG_TCP_CONG_ADVANCED is not set
> CONFIG_TCP_CONG_CUBIC=y
> CONFIG_DEFAULT_TCP_CONG="cubic"
> # CONFIG_TCP_MD5SIG is not set
> CONFIG_IPV6=m
> # CONFIG_IPV6_PRIVACY is not set
> # CONFIG_IPV6_ROUTER_PREF is not set
> # CONFIG_IPV6_OPTIMISTIC_DAD is not set
> # CONFIG_INET6_AH is not set
> # CONFIG_INET6_ESP is not set
> # CONFIG_INET6_IPCOMP is not set
> # CONFIG_IPV6_MIP6 is not set
> # CONFIG_INET6_XFRM_TUNNEL is not set
> # CONFIG_INET6_TUNNEL is not set
> CONFIG_INET6_XFRM_MODE_TRANSPORT=m
> CONFIG_INET6_XFRM_MODE_TUNNEL=m
> CONFIG_INET6_XFRM_MODE_BEET=m
> # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
> CONFIG_IPV6_SIT=m
> CONFIG_IPV6_NDISC_NODETYPE=y
> # CONFIG_IPV6_TUNNEL is not set
> # CONFIG_IPV6_MULTIPLE_TABLES is not set
> # CONFIG_IPV6_MROUTE is not set
> # CONFIG_NETWORK_SECMARK is not set
> # CONFIG_NETFILTER is not set
> # CONFIG_IP_DCCP is not set
> # CONFIG_IP_SCTP is not set
> # CONFIG_TIPC is not set
> # CONFIG_ATM is not set
> # CONFIG_BRIDGE is not set
> # CONFIG_NET_DSA is not set
> # CONFIG_VLAN_8021Q is not set
> # CONFIG_DECNET is not set
> # CONFIG_LLC2 is not set
> # CONFIG_IPX is not set
> # CONFIG_ATALK is not set
> # CONFIG_X25 is not set
> # CONFIG_LAPB is not set
> # CONFIG_ECONET is not set
> # CONFIG_WAN_ROUTER is not set
> # CONFIG_PHONET is not set
> # CONFIG_IEEE802154 is not set
> # CONFIG_NET_SCHED is not set
> # CONFIG_DCB is not set
>
> #
> # Network testing
> #
> # CONFIG_NET_PKTGEN is not set
> # CONFIG_NET_DROP_MONITOR is not set
> # CONFIG_HAMRADIO is not set
> # CONFIG_CAN is not set
> # CONFIG_IRDA is not set
> # CONFIG_BT is not set
> # CONFIG_AF_RXRPC is not set
> CONFIG_WIRELESS=y
> CONFIG_CFG80211=y
> # CONFIG_CFG80211_REG_DEBUG is not set
> # CONFIG_CFG80211_DEBUGFS is not set
> # CONFIG_WIRELESS_OLD_REGULATORY is not set
> CONFIG_WIRELESS_EXT=y
> CONFIG_WIRELESS_EXT_SYSFS=y
> CONFIG_LIB80211=y
> CONFIG_LIB80211_CRYPT_WEP=m
> CONFIG_LIB80211_CRYPT_CCMP=m
> CONFIG_LIB80211_CRYPT_TKIP=m
> # CONFIG_LIB80211_DEBUG is not set
> CONFIG_MAC80211=y
> CONFIG_MAC80211_DEFAULT_PS=y
> CONFIG_MAC80211_DEFAULT_PS_VALUE=1
>
> #
> # Rate control algorithm selection
> #
> CONFIG_MAC80211_RC_PID=y
> CONFIG_MAC80211_RC_MINSTREL=y
> CONFIG_MAC80211_RC_DEFAULT_PID=y
> # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set
> CONFIG_MAC80211_RC_DEFAULT="pid"
> CONFIG_MAC80211_LEDS=y
> # CONFIG_MAC80211_DEBUGFS is not set
> # CONFIG_MAC80211_DEBUG_MENU is not set
> # CONFIG_WIMAX is not set
> # CONFIG_RFKILL is not set
> # CONFIG_NET_9P is not set
>
> #
> # Device Drivers
> #
>
> #
> # Generic Driver Options
> #
> CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
> CONFIG_STANDALONE=y
> CONFIG_PREVENT_FIRMWARE_BUILD=y
> CONFIG_FW_LOADER=y
> CONFIG_FIRMWARE_IN_KERNEL=y
> CONFIG_EXTRA_FIRMWARE=""
> # CONFIG_DEBUG_DRIVER is not set
> # CONFIG_DEBUG_DEVRES is not set
> # CONFIG_SYS_HYPERVISOR is not set
> # CONFIG_CONNECTOR is not set
> CONFIG_MTD=y
> # CONFIG_MTD_DEBUG is not set
> CONFIG_MTD_CONCAT=y
> CONFIG_MTD_PARTITIONS=y
> # CONFIG_MTD_TESTS is not set
> # CONFIG_MTD_REDBOOT_PARTS is not set
> # CONFIG_MTD_CMDLINE_PARTS is not set
> # CONFIG_MTD_AFS_PARTS is not set
> # CONFIG_MTD_AR7_PARTS is not set
>
> #
> # User Modules And Translation Layers
> #
> CONFIG_MTD_CHAR=y
> CONFIG_MTD_BLKDEVS=y
> CONFIG_MTD_BLOCK=y
> # CONFIG_FTL is not set
> # CONFIG_NFTL is not set
> # CONFIG_INFTL is not set
> # CONFIG_RFD_FTL is not set
> # CONFIG_SSFDC is not set
> # CONFIG_MTD_OOPS is not set
>
> #
> # RAM/ROM/Flash chip drivers
> #
> # CONFIG_MTD_CFI is not set
> # CONFIG_MTD_JEDECPROBE is not set
> CONFIG_MTD_MAP_BANK_WIDTH_1=y
> CONFIG_MTD_MAP_BANK_WIDTH_2=y
> CONFIG_MTD_MAP_BANK_WIDTH_4=y
> # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
> # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
> # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
> CONFIG_MTD_CFI_I1=y
> CONFIG_MTD_CFI_I2=y
> # CONFIG_MTD_CFI_I4 is not set
> # CONFIG_MTD_CFI_I8 is not set
> # CONFIG_MTD_RAM is not set
> # CONFIG_MTD_ROM is not set
> # CONFIG_MTD_ABSENT is not set
>
> #
> # Mapping drivers for chip access
> #
> # CONFIG_MTD_COMPLEX_MAPPINGS is not set
> # CONFIG_MTD_PLATRAM is not set
>
> #
> # Self-contained MTD device drivers
> #
> # CONFIG_MTD_DATAFLASH is not set
> # CONFIG_MTD_M25P80 is not set
> # CONFIG_MTD_SLRAM is not set
> # CONFIG_MTD_PHRAM is not set
> # CONFIG_MTD_MTDRAM is not set
> # CONFIG_MTD_BLOCK2MTD is not set
>
> #
> # Disk-On-Chip Device Drivers
> #
> # CONFIG_MTD_DOC2000 is not set
> # CONFIG_MTD_DOC2001 is not set
> # CONFIG_MTD_DOC2001PLUS is not set
> CONFIG_MTD_NAND=y
> # CONFIG_MTD_NAND_VERIFY_WRITE is not set
> # CONFIG_MTD_NAND_ECC_SMC is not set
> # CONFIG_MTD_NAND_MUSEUM_IDS is not set
> # CONFIG_MTD_NAND_GPIO is not set
> # CONFIG_MTD_NAND_OMAP2 is not set
> CONFIG_MTD_NAND_IDS=y
> # CONFIG_MTD_NAND_DISKONCHIP is not set
> # CONFIG_MTD_NAND_NANDSIM is not set
> # CONFIG_MTD_NAND_PLATFORM is not set
> # CONFIG_MTD_ALAUDA is not set
> # CONFIG_MTD_ONENAND is not set
>
> #
> # LPDDR flash memory drivers
> #
> # CONFIG_MTD_LPDDR is not set
>
> #
> # UBI - Unsorted block images
> #
> # CONFIG_MTD_UBI is not set
> # CONFIG_PARPORT is not set
> CONFIG_BLK_DEV=y
> # CONFIG_BLK_DEV_COW_COMMON is not set
> CONFIG_BLK_DEV_LOOP=y
> CONFIG_BLK_DEV_CRYPTOLOOP=m
> # CONFIG_BLK_DEV_NBD is not set
> # CONFIG_BLK_DEV_UB is not set
> CONFIG_BLK_DEV_RAM=y
> CONFIG_BLK_DEV_RAM_COUNT=16
> CONFIG_BLK_DEV_RAM_SIZE=16384
> # CONFIG_BLK_DEV_XIP is not set
> CONFIG_CDROM_PKTCDVD=m
> CONFIG_CDROM_PKTCDVD_BUFFERS=8
> # CONFIG_CDROM_PKTCDVD_WCACHE is not set
> # CONFIG_ATA_OVER_ETH is not set
> # CONFIG_MG_DISK is not set
> CONFIG_MISC_DEVICES=y
> # CONFIG_ICS932S401 is not set
> # CONFIG_OMAP_STI is not set
> # CONFIG_ENCLOSURE_SERVICES is not set
> # CONFIG_ISL29003 is not set
> # CONFIG_C2PORT is not set
>
> #
> # EEPROM support
> #
> # CONFIG_EEPROM_AT24 is not set
> # CONFIG_EEPROM_AT25 is not set
> CONFIG_EEPROM_LEGACY=y
> # CONFIG_EEPROM_MAX6875 is not set
> CONFIG_EEPROM_93CX6=m
> CONFIG_HAVE_IDE=y
> # CONFIG_IDE is not set
>
> #
> # SCSI device support
> #
> CONFIG_RAID_ATTRS=m
> CONFIG_SCSI=y
> CONFIG_SCSI_DMA=y
> # CONFIG_SCSI_TGT is not set
> # CONFIG_SCSI_NETLINK is not set
> CONFIG_SCSI_PROC_FS=y
>
> #
> # SCSI support type (disk, tape, CD-ROM)
> #
> CONFIG_BLK_DEV_SD=y
> # CONFIG_CHR_DEV_ST is not set
> # CONFIG_CHR_DEV_OSST is not set
> # CONFIG_BLK_DEV_SR is not set
> CONFIG_CHR_DEV_SG=m
> # CONFIG_CHR_DEV_SCH is not set
> CONFIG_SCSI_MULTI_LUN=y
> # CONFIG_SCSI_CONSTANTS is not set
> # CONFIG_SCSI_LOGGING is not set
> # CONFIG_SCSI_SCAN_ASYNC is not set
> CONFIG_SCSI_WAIT_SCAN=m
>
> #
> # SCSI Transports
> #
> # CONFIG_SCSI_SPI_ATTRS is not set
> # CONFIG_SCSI_FC_ATTRS is not set
> # CONFIG_SCSI_ISCSI_ATTRS is not set
> # CONFIG_SCSI_SAS_LIBSAS is not set
> # CONFIG_SCSI_SRP_ATTRS is not set
> CONFIG_SCSI_LOWLEVEL=y
> # CONFIG_ISCSI_TCP is not set
> # CONFIG_LIBFC is not set
> # CONFIG_LIBFCOE is not set
> # CONFIG_SCSI_DEBUG is not set
> # CONFIG_SCSI_DH is not set
> # CONFIG_SCSI_OSD_INITIATOR is not set
> # CONFIG_ATA is not set
> CONFIG_MD=y
> CONFIG_BLK_DEV_MD=m
> CONFIG_MD_LINEAR=m
> CONFIG_MD_RAID0=m
> CONFIG_MD_RAID1=m
> CONFIG_MD_RAID10=m
> CONFIG_MD_RAID456=m
> CONFIG_MD_RAID6_PQ=m
> CONFIG_MD_MULTIPATH=m
> CONFIG_MD_FAULTY=m
> CONFIG_BLK_DEV_DM=m
> # CONFIG_DM_DEBUG is not set
> CONFIG_DM_CRYPT=m
> CONFIG_DM_SNAPSHOT=m
> CONFIG_DM_MIRROR=m
> # CONFIG_DM_LOG_USERSPACE is not set
> CONFIG_DM_ZERO=m
> CONFIG_DM_MULTIPATH=m
> # CONFIG_DM_MULTIPATH_QL is not set
> # CONFIG_DM_MULTIPATH_ST is not set
> CONFIG_DM_DELAY=m
> # CONFIG_DM_UEVENT is not set
> CONFIG_NETDEVICES=y
> CONFIG_DUMMY=m
> # CONFIG_BONDING is not set
> # CONFIG_MACVLAN is not set
> # CONFIG_EQUALIZER is not set
> CONFIG_TUN=m
> # CONFIG_VETH is not set
> # CONFIG_NET_ETHERNET is not set
> CONFIG_MII=y
> # CONFIG_NETDEV_1000 is not set
> # CONFIG_NETDEV_10000 is not set
>
> #
> # Wireless LAN
> #
> # CONFIG_WLAN_PRE80211 is not set
> CONFIG_WLAN_80211=y
> CONFIG_LIBERTAS=m
> CONFIG_LIBERTAS_USB=m
> CONFIG_LIBERTAS_SDIO=m
> CONFIG_LIBERTAS_SPI=m
> CONFIG_LIBERTAS_DEBUG=y
> # CONFIG_LIBERTAS_THINFIRM is not set
> # CONFIG_AT76C50X_USB is not set
> CONFIG_USB_ZD1201=m
> # CONFIG_USB_NET_RNDIS_WLAN is not set
> CONFIG_RTL8187=m
> CONFIG_RTL8187_LEDS=y
> # CONFIG_MAC80211_HWSIM is not set
> CONFIG_P54_COMMON=m
> CONFIG_P54_USB=m
> # CONFIG_P54_SPI is not set
> CONFIG_P54_LEDS=y
> # CONFIG_AR9170_USB is not set
> CONFIG_HOSTAP=m
> CONFIG_HOSTAP_FIRMWARE=y
> CONFIG_HOSTAP_FIRMWARE_NVRAM=y
> # CONFIG_B43 is not set
> # CONFIG_B43LEGACY is not set
> # CONFIG_ZD1211RW is not set
> # CONFIG_RT2X00 is not set
> # CONFIG_WL12XX is not set
> # CONFIG_IWM is not set
>
> #
> # Enable WiMAX (Networking options) to see the WiMAX drivers
> #
>
> #
> # USB Network Adapters
> #
> CONFIG_USB_CATC=m
> CONFIG_USB_KAWETH=m
> CONFIG_USB_PEGASUS=m
> CONFIG_USB_RTL8150=m
> CONFIG_USB_USBNET=y
> CONFIG_USB_NET_AX8817X=y
> CONFIG_USB_NET_CDCETHER=y
> # CONFIG_USB_NET_CDC_EEM is not set
> CONFIG_USB_NET_DM9601=m
> # CONFIG_USB_NET_SMSC95XX is not set
> CONFIG_USB_NET_GL620A=m
> CONFIG_USB_NET_NET1080=m
> CONFIG_USB_NET_PLUSB=m
> CONFIG_USB_NET_MCS7830=m
> CONFIG_USB_NET_RNDIS_HOST=m
> CONFIG_USB_NET_CDC_SUBSET=m
> CONFIG_USB_ALI_M5632=y
> CONFIG_USB_AN2720=y
> CONFIG_USB_BELKIN=y
> CONFIG_USB_ARMLINUX=y
> CONFIG_USB_EPSON2888=y
> CONFIG_USB_KC2190=y
> CONFIG_USB_NET_ZAURUS=m
> # CONFIG_USB_NET_INT51X1 is not set
> # CONFIG_WAN is not set
> CONFIG_PPP=m
> # CONFIG_PPP_MULTILINK is not set
> # CONFIG_PPP_FILTER is not set
> CONFIG_PPP_ASYNC=m
> CONFIG_PPP_SYNC_TTY=m
> CONFIG_PPP_DEFLATE=m
> CONFIG_PPP_BSDCOMP=m
> CONFIG_PPP_MPPE=m
> CONFIG_PPPOE=m
> # CONFIG_PPPOL2TP is not set
> # CONFIG_SLIP is not set
> CONFIG_SLHC=m
> # CONFIG_NETCONSOLE is not set
> # CONFIG_NETPOLL is not set
> # CONFIG_NET_POLL_CONTROLLER is not set
> # CONFIG_ISDN is not set
>
> #
> # Input device support
> #
> CONFIG_INPUT=y
> # CONFIG_INPUT_FF_MEMLESS is not set
> # CONFIG_INPUT_POLLDEV is not set
>
> #
> # Userland interfaces
> #
> CONFIG_INPUT_MOUSEDEV=y
> CONFIG_INPUT_MOUSEDEV_PSAUX=y
> CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
> CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
> # CONFIG_INPUT_JOYDEV is not set
> CONFIG_INPUT_EVDEV=y
> # CONFIG_INPUT_EVBUG is not set
>
> #
> # Input Device Drivers
> #
> CONFIG_INPUT_KEYBOARD=y
> # CONFIG_KEYBOARD_ATKBD is not set
> # CONFIG_KEYBOARD_LKKBD is not set
> # CONFIG_KEYBOARD_GPIO is not set
> # CONFIG_KEYBOARD_MATRIX is not set
> # CONFIG_KEYBOARD_LM8323 is not set
> # CONFIG_KEYBOARD_NEWTON is not set
> # CONFIG_KEYBOARD_STOWAWAY is not set
> # CONFIG_KEYBOARD_SUNKBD is not set
> # CONFIG_KEYBOARD_XTKBD is not set
> CONFIG_INPUT_MOUSE=y
> CONFIG_MOUSE_PS2=y
> CONFIG_MOUSE_PS2_ALPS=y
> CONFIG_MOUSE_PS2_LOGIPS2PP=y
> CONFIG_MOUSE_PS2_SYNAPTICS=y
> CONFIG_MOUSE_PS2_TRACKPOINT=y
> # CONFIG_MOUSE_PS2_ELANTECH is not set
> # CONFIG_MOUSE_PS2_TOUCHKIT is not set
> # CONFIG_MOUSE_SERIAL is not set
> # CONFIG_MOUSE_APPLETOUCH is not set
> # CONFIG_MOUSE_BCM5974 is not set
> # CONFIG_MOUSE_VSXXXAA is not set
> # CONFIG_MOUSE_GPIO is not set
> # CONFIG_MOUSE_SYNAPTICS_I2C is not set
> # CONFIG_INPUT_JOYSTICK is not set
> # CONFIG_INPUT_TABLET is not set
> # CONFIG_INPUT_TOUCHSCREEN is not set
> # CONFIG_INPUT_MISC is not set
>
> #
> # Hardware I/O ports
> #
> CONFIG_SERIO=y
> CONFIG_SERIO_SERPORT=y
> CONFIG_SERIO_LIBPS2=y
> # CONFIG_SERIO_RAW is not set
> # CONFIG_GAMEPORT is not set
>
> #
> # Character devices
> #
> CONFIG_VT=y
> CONFIG_CONSOLE_TRANSLATIONS=y
> CONFIG_VT_CONSOLE=y
> CONFIG_HW_CONSOLE=y
> CONFIG_VT_HW_CONSOLE_BINDING=y
> CONFIG_DEVKMEM=y
> # CONFIG_SERIAL_NONSTANDARD is not set
>
> #
> # Serial drivers
> #
> CONFIG_SERIAL_8250=y
> CONFIG_SERIAL_8250_CONSOLE=y
> CONFIG_SERIAL_8250_NR_UARTS=32
> CONFIG_SERIAL_8250_RUNTIME_UARTS=4
> CONFIG_SERIAL_8250_EXTENDED=y
> CONFIG_SERIAL_8250_MANY_PORTS=y
> CONFIG_SERIAL_8250_SHARE_IRQ=y
> CONFIG_SERIAL_8250_DETECT_IRQ=y
> CONFIG_SERIAL_8250_RSA=y
>
> #
> # Non-8250 serial port support
> #
> # CONFIG_SERIAL_MAX3100 is not set
> CONFIG_SERIAL_CORE=y
> CONFIG_SERIAL_CORE_CONSOLE=y
> CONFIG_UNIX98_PTYS=y
> # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
> # CONFIG_LEGACY_PTYS is not set
> # CONFIG_IPMI_HANDLER is not set
> CONFIG_HW_RANDOM=y
> # CONFIG_HW_RANDOM_TIMERIOMEM is not set
> # CONFIG_R3964 is not set
> # CONFIG_RAW_DRIVER is not set
> # CONFIG_TCG_TPM is not set
> CONFIG_I2C=y
> CONFIG_I2C_BOARDINFO=y
> CONFIG_I2C_CHARDEV=y
> CONFIG_I2C_HELPER_AUTO=y
>
> #
> # I2C Hardware Bus support
> #
>
> #
> # I2C system bus drivers (mostly embedded / system-on-chip)
> #
> # CONFIG_I2C_DESIGNWARE is not set
> # CONFIG_I2C_GPIO is not set
> # CONFIG_I2C_OCORES is not set
> CONFIG_I2C_OMAP=y
> # CONFIG_I2C_SIMTEC is not set
>
> #
> # External I2C/SMBus adapter drivers
> #
> # CONFIG_I2C_PARPORT_LIGHT is not set
> # CONFIG_I2C_TAOS_EVM is not set
> # CONFIG_I2C_TINY_USB is not set
>
> #
> # Other I2C/SMBus bus drivers
> #
> # CONFIG_I2C_PCA_PLATFORM is not set
> # CONFIG_I2C_STUB is not set
>
> #
> # Miscellaneous I2C Chip support
> #
> # CONFIG_DS1682 is not set
> # CONFIG_SENSORS_PCF8574 is not set
> # CONFIG_PCF8575 is not set
> # CONFIG_SENSORS_PCA9539 is not set
> # CONFIG_SENSORS_TSL2550 is not set
> # CONFIG_I2C_DEBUG_CORE is not set
> # CONFIG_I2C_DEBUG_ALGO is not set
> # CONFIG_I2C_DEBUG_BUS is not set
> # CONFIG_I2C_DEBUG_CHIP is not set
> CONFIG_SPI=y
> # CONFIG_SPI_DEBUG is not set
> CONFIG_SPI_MASTER=y
>
> #
> # SPI Master Controller Drivers
> #
> # CONFIG_SPI_BITBANG is not set
> # CONFIG_SPI_GPIO is not set
> CONFIG_SPI_OMAP24XX=y
>
> #
> # SPI Protocol Masters
> #
> # CONFIG_SPI_SPIDEV is not set
> # CONFIG_SPI_TLE62X0 is not set
> CONFIG_ARCH_REQUIRE_GPIOLIB=y
> CONFIG_GPIOLIB=y
> CONFIG_DEBUG_GPIO=y
> CONFIG_GPIO_SYSFS=y
>
> #
> # Memory mapped GPIO expanders:
> #
>
> #
> # I2C GPIO expanders:
> #
> # CONFIG_GPIO_MAX732X is not set
> # CONFIG_GPIO_PCA953X is not set
> # CONFIG_GPIO_PCF857X is not set
>
> #
> # PCI GPIO expanders:
> #
>
> #
> # SPI GPIO expanders:
> #
> # CONFIG_GPIO_MAX7301 is not set
> # CONFIG_GPIO_MCP23S08 is not set
> # CONFIG_W1 is not set
> CONFIG_POWER_SUPPLY=m
> # CONFIG_POWER_SUPPLY_DEBUG is not set
> # CONFIG_PDA_POWER is not set
> # CONFIG_BATTERY_DS2760 is not set
> # CONFIG_BATTERY_DS2782 is not set
> # CONFIG_BATTERY_BQ27x00 is not set
> # CONFIG_BATTERY_MAX17040 is not set
> CONFIG_HWMON=y
> # CONFIG_HWMON_VID is not set
> # CONFIG_SENSORS_AD7414 is not set
> # CONFIG_SENSORS_AD7418 is not set
> # CONFIG_SENSORS_ADCXX is not set
> # CONFIG_SENSORS_ADM1021 is not set
> # CONFIG_SENSORS_ADM1025 is not set
> # CONFIG_SENSORS_ADM1026 is not set
> # CONFIG_SENSORS_ADM1029 is not set
> # CONFIG_SENSORS_ADM1031 is not set
> # CONFIG_SENSORS_ADM9240 is not set
> # CONFIG_SENSORS_ADT7462 is not set
> # CONFIG_SENSORS_ADT7470 is not set
> # CONFIG_SENSORS_ADT7473 is not set
> # CONFIG_SENSORS_ADT7475 is not set
> # CONFIG_SENSORS_ATXP1 is not set
> # CONFIG_SENSORS_DS1621 is not set
> # CONFIG_SENSORS_F71805F is not set
> # CONFIG_SENSORS_F71882FG is not set
> # CONFIG_SENSORS_F75375S is not set
> # CONFIG_SENSORS_G760A is not set
> # CONFIG_SENSORS_GL518SM is not set
> # CONFIG_SENSORS_GL520SM is not set
> # CONFIG_SENSORS_IT87 is not set
> # CONFIG_SENSORS_LM63 is not set
> # CONFIG_SENSORS_LM70 is not set
> # CONFIG_SENSORS_LM75 is not set
> # CONFIG_SENSORS_LM77 is not set
> # CONFIG_SENSORS_LM78 is not set
> # CONFIG_SENSORS_LM80 is not set
> # CONFIG_SENSORS_LM83 is not set
> # CONFIG_SENSORS_LM85 is not set
> # CONFIG_SENSORS_LM87 is not set
> # CONFIG_SENSORS_LM90 is not set
> # CONFIG_SENSORS_LM92 is not set
> # CONFIG_SENSORS_LM93 is not set
> # CONFIG_SENSORS_LTC4215 is not set
> # CONFIG_SENSORS_LTC4245 is not set
> # CONFIG_SENSORS_LM95241 is not set
> # CONFIG_SENSORS_MAX1111 is not set
> # CONFIG_SENSORS_MAX1619 is not set
> # CONFIG_SENSORS_MAX6650 is not set
> # CONFIG_SENSORS_PC87360 is not set
> # CONFIG_SENSORS_PC87427 is not set
> # CONFIG_SENSORS_PCF8591 is not set
> # CONFIG_SENSORS_SHT15 is not set
> # CONFIG_SENSORS_DME1737 is not set
> # CONFIG_SENSORS_SMSC47M1 is not set
> # CONFIG_SENSORS_SMSC47M192 is not set
> # CONFIG_SENSORS_SMSC47B397 is not set
> # CONFIG_SENSORS_ADS7828 is not set
> # CONFIG_SENSORS_THMC50 is not set
> # CONFIG_SENSORS_TMP401 is not set
> # CONFIG_SENSORS_VT1211 is not set
> # CONFIG_SENSORS_W83781D is not set
> # CONFIG_SENSORS_W83791D is not set
> # CONFIG_SENSORS_W83792D is not set
> # CONFIG_SENSORS_W83793 is not set
> # CONFIG_SENSORS_W83L785TS is not set
> # CONFIG_SENSORS_W83L786NG is not set
> # CONFIG_SENSORS_W83627HF is not set
> # CONFIG_SENSORS_W83627EHF is not set
> # CONFIG_SENSORS_LIS3_SPI is not set
> # CONFIG_SENSORS_TSC210X is not set
> # CONFIG_SENSORS_OMAP34XX is not set
> # CONFIG_HWMON_DEBUG_CHIP is not set
> # CONFIG_THERMAL is not set
> # CONFIG_THERMAL_HWMON is not set
> CONFIG_WATCHDOG=y
> CONFIG_WATCHDOG_NOWAYOUT=y
>
> #
> # Watchdog Device Drivers
> #
> # CONFIG_SOFT_WATCHDOG is not set
> # CONFIG_OMAP_WATCHDOG is not set
>
> #
> # USB-based Watchdog Cards
> #
> # CONFIG_USBPCWATCHDOG is not set
> CONFIG_SSB_POSSIBLE=y
>
> #
> # Sonics Silicon Backplane
> #
> # CONFIG_SSB is not set
>
> #
> # Multifunction device drivers
> #
> # CONFIG_MFD_CORE is not set
> # CONFIG_MFD_SM501 is not set
> # CONFIG_MFD_ASIC3 is not set
> # CONFIG_HTC_EGPIO is not set
> # CONFIG_HTC_PASIC3 is not set
> # CONFIG_TPS65010 is not set
> # CONFIG_TWL4030_CORE is not set
> # CONFIG_MFD_TMIO is not set
> # CONFIG_MFD_T7L66XB is not set
> # CONFIG_MFD_TC6387XB is not set
> # CONFIG_MFD_TC6393XB is not set
> # CONFIG_PMIC_DA903X is not set
> # CONFIG_MFD_WM8400 is not set
> # CONFIG_MFD_WM8350_I2C is not set
> # CONFIG_MFD_PCF50633 is not set
> # CONFIG_AB3100_CORE is not set
> # CONFIG_EZX_PCAP is not set
> CONFIG_MEDIA_SUPPORT=m
>
> #
> # Multimedia core support
> #
> CONFIG_VIDEO_DEV=m
> CONFIG_VIDEO_V4L2_COMMON=m
> # CONFIG_VIDEO_ALLOW_V4L1 is not set
> CONFIG_VIDEO_V4L1_COMPAT=y
> # CONFIG_DVB_CORE is not set
> CONFIG_VIDEO_MEDIA=m
>
> #
> # Multimedia drivers
> #
> # CONFIG_MEDIA_ATTACH is not set
> CONFIG_MEDIA_TUNER=m
> # CONFIG_MEDIA_TUNER_CUSTOMISE is not set
> CONFIG_MEDIA_TUNER_SIMPLE=m
> CONFIG_MEDIA_TUNER_TDA8290=m
> CONFIG_MEDIA_TUNER_TDA9887=m
> CONFIG_MEDIA_TUNER_TEA5761=m
> CONFIG_MEDIA_TUNER_TEA5767=m
> CONFIG_MEDIA_TUNER_MT20XX=m
> CONFIG_MEDIA_TUNER_XC2028=m
> CONFIG_MEDIA_TUNER_XC5000=m
> CONFIG_MEDIA_TUNER_MC44S803=m
> CONFIG_VIDEO_V4L2=m
> CONFIG_VIDEO_CAPTURE_DRIVERS=y
> # CONFIG_VIDEO_ADV_DEBUG is not set
> # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
> CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
> # CONFIG_VIDEO_VIVI is not set
> # CONFIG_VIDEO_SAA5246A is not set
> # CONFIG_VIDEO_SAA5249 is not set
> # CONFIG_SOC_CAMERA is not set
> CONFIG_V4L_USB_DRIVERS=y
> CONFIG_USB_VIDEO_CLASS=m
> CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
> CONFIG_USB_GSPCA=m
> # CONFIG_USB_M5602 is not set
> # CONFIG_USB_STV06XX is not set
> # CONFIG_USB_GSPCA_CONEX is not set
> # CONFIG_USB_GSPCA_ETOMS is not set
> # CONFIG_USB_GSPCA_FINEPIX is not set
> # CONFIG_USB_GSPCA_MARS is not set
> # CONFIG_USB_GSPCA_MR97310A is not set
> # CONFIG_USB_GSPCA_OV519 is not set
> # CONFIG_USB_GSPCA_OV534 is not set
> # CONFIG_USB_GSPCA_PAC207 is not set
> # CONFIG_USB_GSPCA_PAC7311 is not set
> # CONFIG_USB_GSPCA_SN9C20X is not set
> # CONFIG_USB_GSPCA_SONIXB is not set
> # CONFIG_USB_GSPCA_SONIXJ is not set
> # CONFIG_USB_GSPCA_SPCA500 is not set
> # CONFIG_USB_GSPCA_SPCA501 is not set
> # CONFIG_USB_GSPCA_SPCA505 is not set
> # CONFIG_USB_GSPCA_SPCA506 is not set
> # CONFIG_USB_GSPCA_SPCA508 is not set
> # CONFIG_USB_GSPCA_SPCA561 is not set
> # CONFIG_USB_GSPCA_SQ905 is not set
> # CONFIG_USB_GSPCA_SQ905C is not set
> # CONFIG_USB_GSPCA_STK014 is not set
> # CONFIG_USB_GSPCA_SUNPLUS is not set
> # CONFIG_USB_GSPCA_T613 is not set
> # CONFIG_USB_GSPCA_TV8532 is not set
> # CONFIG_USB_GSPCA_VC032X is not set
> # CONFIG_USB_GSPCA_ZC3XX is not set
> # CONFIG_VIDEO_PVRUSB2 is not set
> # CONFIG_VIDEO_HDPVR is not set
> # CONFIG_VIDEO_EM28XX is not set
> # CONFIG_VIDEO_CX231XX is not set
> # CONFIG_VIDEO_USBVISION is not set
> # CONFIG_USB_ET61X251 is not set
> # CONFIG_USB_SN9C102 is not set
> # CONFIG_USB_ZC0301 is not set
> CONFIG_USB_PWC_INPUT_EVDEV=y
> # CONFIG_USB_ZR364XX is not set
> # CONFIG_USB_STKWEBCAM is not set
> # CONFIG_USB_S2255 is not set
> CONFIG_RADIO_ADAPTERS=y
> # CONFIG_USB_DSBR is not set
> # CONFIG_USB_SI470X is not set
> # CONFIG_USB_MR800 is not set
> # CONFIG_RADIO_TEA5764 is not set
> # CONFIG_DAB is not set
>
> #
> # Graphics support
> #
> # CONFIG_VGASTATE is not set
> # CONFIG_VIDEO_OUTPUT_CONTROL is not set
> # CONFIG_FB is not set
> # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
>
> #
> # Display device support
> #
> CONFIG_DISPLAY_SUPPORT=y
>
> #
> # Display hardware drivers
> #
>
> #
> # Console display driver support
> #
> # CONFIG_VGA_CONSOLE is not set
> CONFIG_DUMMY_CONSOLE=y
> CONFIG_SOUND=y
> CONFIG_SOUND_OSS_CORE=y
> CONFIG_SND=y
> CONFIG_SND_TIMER=y
> CONFIG_SND_PCM=y
> CONFIG_SND_HWDEP=y
> CONFIG_SND_RAWMIDI=y
> CONFIG_SND_JACK=y
> CONFIG_SND_SEQUENCER=m
> # CONFIG_SND_SEQ_DUMMY is not set
> CONFIG_SND_OSSEMUL=y
> CONFIG_SND_MIXER_OSS=y
> CONFIG_SND_PCM_OSS=y
> CONFIG_SND_PCM_OSS_PLUGINS=y
> CONFIG_SND_SEQUENCER_OSS=y
> # CONFIG_SND_HRTIMER is not set
> # CONFIG_SND_DYNAMIC_MINORS is not set
> CONFIG_SND_SUPPORT_OLD_API=y
> CONFIG_SND_VERBOSE_PROCFS=y
> CONFIG_SND_VERBOSE_PRINTK=y
> CONFIG_SND_DEBUG=y
> # CONFIG_SND_DEBUG_VERBOSE is not set
> # CONFIG_SND_PCM_XRUN_DEBUG is not set
> CONFIG_SND_RAWMIDI_SEQ=m
> # CONFIG_SND_OPL3_LIB_SEQ is not set
> # CONFIG_SND_OPL4_LIB_SEQ is not set
> # CONFIG_SND_SBAWE_SEQ is not set
> # CONFIG_SND_EMU10K1_SEQ is not set
> CONFIG_SND_DRIVERS=y
> # CONFIG_SND_DUMMY is not set
> # CONFIG_SND_VIRMIDI is not set
> # CONFIG_SND_MTPAV is not set
> # CONFIG_SND_SERIAL_U16550 is not set
> # CONFIG_SND_MPU401 is not set
> CONFIG_SND_ARM=y
> CONFIG_SND_SPI=y
> CONFIG_SND_USB=y
> CONFIG_SND_USB_AUDIO=y
> CONFIG_SND_USB_CAIAQ=m
> CONFIG_SND_USB_CAIAQ_INPUT=y
> CONFIG_SND_SOC=y
> CONFIG_SND_OMAP_SOC=y
> CONFIG_SND_SOC_I2C_AND_SPI=y
> # CONFIG_SND_SOC_ALL_CODECS is not set
> # CONFIG_SOUND_PRIME is not set
> CONFIG_HID_SUPPORT=y
> CONFIG_HID=y
> CONFIG_HID_DEBUG=y
> # CONFIG_HIDRAW is not set
>
> #
> # USB Input Devices
> #
> CONFIG_USB_HID=y
> # CONFIG_HID_PID is not set
> # CONFIG_USB_HIDDEV is not set
>
> #
> # Special HID drivers
> #
> # CONFIG_HID_A4TECH is not set
> # CONFIG_HID_APPLE is not set
> # CONFIG_HID_BELKIN is not set
> # CONFIG_HID_CHERRY is not set
> # CONFIG_HID_CHICONY is not set
> # CONFIG_HID_CYPRESS is not set
> # CONFIG_HID_DRAGONRISE is not set
> # CONFIG_HID_EZKEY is not set
> # CONFIG_HID_KYE is not set
> # CONFIG_HID_GYRATION is not set
> # CONFIG_HID_KENSINGTON is not set
> # CONFIG_HID_LOGITECH is not set
> # CONFIG_HID_MICROSOFT is not set
> # CONFIG_HID_MONTEREY is not set
> # CONFIG_HID_NTRIG is not set
> # CONFIG_HID_PANTHERLORD is not set
> # CONFIG_HID_PETALYNX is not set
> # CONFIG_HID_SAMSUNG is not set
> # CONFIG_HID_SONY is not set
> # CONFIG_HID_SUNPLUS is not set
> # CONFIG_HID_GREENASIA is not set
> # CONFIG_HID_SMARTJOYPLUS is not set
> # CONFIG_HID_TOPSEED is not set
> # CONFIG_HID_THRUSTMASTER is not set
> # CONFIG_HID_ZEROPLUS is not set
> CONFIG_USB_SUPPORT=y
> CONFIG_USB_ARCH_HAS_HCD=y
> CONFIG_USB_ARCH_HAS_OHCI=y
> CONFIG_USB_ARCH_HAS_EHCI=y
> CONFIG_USB=y
> CONFIG_USB_DEBUG=y
> CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
>
> #
> # Miscellaneous USB options
> #
> CONFIG_USB_DEVICEFS=y
> CONFIG_USB_DEVICE_CLASS=y
> # CONFIG_USB_DYNAMIC_MINORS is not set
> # CONFIG_USB_OTG is not set
> # CONFIG_USB_OTG_WHITELIST is not set
> # CONFIG_USB_OTG_BLACKLIST_HUB is not set
> CONFIG_USB_MON=y
> # CONFIG_USB_WUSB is not set
> # CONFIG_USB_WUSB_CBAF is not set
>
> #
> # USB Host Controller Drivers
> #
> # CONFIG_USB_C67X00_HCD is not set
> # CONFIG_USB_EHCI_HCD is not set
> # CONFIG_USB_OXU210HP_HCD is not set
> # CONFIG_USB_ISP116X_HCD is not set
> # CONFIG_USB_ISP1760_HCD is not set
> # CONFIG_USB_OHCI_HCD is not set
> # CONFIG_USB_SL811_HCD is not set
> # CONFIG_USB_R8A66597_HCD is not set
> # CONFIG_USB_HWA_HCD is not set
> CONFIG_USB_MUSB_HDRC=y
> CONFIG_USB_MUSB_SOC=y
>
> #
> # OMAP 343x high speed USB support
> #
> CONFIG_USB_MUSB_HOST=y
> # CONFIG_USB_MUSB_PERIPHERAL is not set
> # CONFIG_USB_MUSB_OTG is not set
> CONFIG_USB_MUSB_HDRC_HCD=y
> CONFIG_MUSB_PIO_ONLY=y
> # CONFIG_USB_MUSB_DEBUG is not set
>
> #
> # USB Device Class drivers
> #
> CONFIG_USB_ACM=m
> CONFIG_USB_PRINTER=m
> CONFIG_USB_WDM=y
> # CONFIG_USB_TMC is not set
>
> #
> # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
> #
>
> #
> # also be needed; see USB_STORAGE Help for more info
> #
> CONFIG_USB_STORAGE=y
> # CONFIG_USB_STORAGE_DEBUG is not set
> # CONFIG_USB_STORAGE_DATAFAB is not set
> # CONFIG_USB_STORAGE_FREECOM is not set
> # CONFIG_USB_STORAGE_ISD200 is not set
> # CONFIG_USB_STORAGE_USBAT is not set
> # CONFIG_USB_STORAGE_SDDR09 is not set
> # CONFIG_USB_STORAGE_SDDR55 is not set
> # CONFIG_USB_STORAGE_JUMPSHOT is not set
> # CONFIG_USB_STORAGE_ALAUDA is not set
> # CONFIG_USB_STORAGE_ONETOUCH is not set
> # CONFIG_USB_STORAGE_KARMA is not set
> # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
> # CONFIG_USB_LIBUSUAL is not set
>
> #
> # USB Imaging devices
> #
> # CONFIG_USB_MDC800 is not set
> # CONFIG_USB_MICROTEK is not set
>
> #
> # USB port drivers
> #
> CONFIG_USB_SERIAL=m
> # CONFIG_USB_EZUSB is not set
> # CONFIG_USB_SERIAL_GENERIC is not set
> # CONFIG_USB_SERIAL_AIRCABLE is not set
> # CONFIG_USB_SERIAL_ARK3116 is not set
> # CONFIG_USB_SERIAL_BELKIN is not set
> # CONFIG_USB_SERIAL_CH341 is not set
> # CONFIG_USB_SERIAL_WHITEHEAT is not set
> # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
> # CONFIG_USB_SERIAL_CP210X is not set
> # CONFIG_USB_SERIAL_CYPRESS_M8 is not set
> # CONFIG_USB_SERIAL_EMPEG is not set
> CONFIG_USB_SERIAL_FTDI_SIO=m
> # CONFIG_USB_SERIAL_FUNSOFT is not set
> # CONFIG_USB_SERIAL_VISOR is not set
> # CONFIG_USB_SERIAL_IPAQ is not set
> # CONFIG_USB_SERIAL_IR is not set
> # CONFIG_USB_SERIAL_EDGEPORT is not set
> # CONFIG_USB_SERIAL_EDGEPORT_TI is not set
> # CONFIG_USB_SERIAL_GARMIN is not set
> # CONFIG_USB_SERIAL_IPW is not set
> # CONFIG_USB_SERIAL_IUU is not set
> # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
> # CONFIG_USB_SERIAL_KEYSPAN is not set
> # CONFIG_USB_SERIAL_KLSI is not set
> # CONFIG_USB_SERIAL_KOBIL_SCT is not set
> # CONFIG_USB_SERIAL_MCT_U232 is not set
> # CONFIG_USB_SERIAL_MOS7720 is not set
> # CONFIG_USB_SERIAL_MOS7840 is not set
> # CONFIG_USB_SERIAL_MOTOROLA is not set
> # CONFIG_USB_SERIAL_NAVMAN is not set
> # CONFIG_USB_SERIAL_PL2303 is not set
> # CONFIG_USB_SERIAL_OTI6858 is not set
> # CONFIG_USB_SERIAL_QUALCOMM is not set
> # CONFIG_USB_SERIAL_SPCP8X5 is not set
> # CONFIG_USB_SERIAL_HP4X is not set
> # CONFIG_USB_SERIAL_SAFE is not set
> # CONFIG_USB_SERIAL_SIEMENS_MPI is not set
> # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
> # CONFIG_USB_SERIAL_SYMBOL is not set
> # CONFIG_USB_SERIAL_TI is not set
> # CONFIG_USB_SERIAL_CYBERJACK is not set
> # CONFIG_USB_SERIAL_XIRCOM is not set
> # CONFIG_USB_SERIAL_OPTION is not set
> # CONFIG_USB_SERIAL_OMNINET is not set
> # CONFIG_USB_SERIAL_OPTICON is not set
> # CONFIG_USB_SERIAL_DEBUG is not set
>
> #
> # USB Miscellaneous drivers
> #
> CONFIG_USB_EMI62=m
> CONFIG_USB_EMI26=m
> # CONFIG_USB_ADUTUX is not set
> # CONFIG_USB_SEVSEG is not set
> # CONFIG_USB_RIO500 is not set
> CONFIG_USB_LEGOTOWER=m
> CONFIG_USB_LCD=m
> # CONFIG_USB_BERRY_CHARGE is not set
> CONFIG_USB_LED=m
> # CONFIG_USB_CYPRESS_CY7C63 is not set
> # CONFIG_USB_CYTHERM is not set
> # CONFIG_USB_IDMOUSE is not set
> # CONFIG_USB_FTDI_ELAN is not set
> # CONFIG_USB_APPLEDISPLAY is not set
> # CONFIG_USB_SISUSBVGA is not set
> # CONFIG_USB_LD is not set
> # CONFIG_USB_TRANCEVIBRATOR is not set
> # CONFIG_USB_IOWARRIOR is not set
> # CONFIG_USB_TEST is not set
> # CONFIG_USB_ISIGHTFW is not set
> # CONFIG_USB_VST is not set
> # CONFIG_USB_GADGET is not set
>
> #
> # OTG and related infrastructure
> #
> CONFIG_USB_OTG_UTILS=y
> # CONFIG_USB_GPIO_VBUS is not set
> # CONFIG_ISP1301_OMAP is not set
> # CONFIG_NOP_USB_XCEIV is not set
> CONFIG_MMC=y
> # CONFIG_MMC_DEBUG is not set
> CONFIG_MMC_UNSAFE_RESUME=y
>
> #
> # MMC/SD/SDIO Card Drivers
> #
> CONFIG_MMC_BLOCK=y
> CONFIG_MMC_BLOCK_BOUNCE=y
> CONFIG_SDIO_UART=y
> # CONFIG_MMC_TEST is not set
>
> #
> # MMC/SD/SDIO Host Controller Drivers
> #
> # CONFIG_MMC_SDHCI is not set
> # CONFIG_MMC_OMAP_HS is not set
> # CONFIG_MMC_SPI is not set
> # CONFIG_MEMSTICK is not set
> # CONFIG_ACCESSIBILITY is not set
> CONFIG_NEW_LEDS=y
> CONFIG_LEDS_CLASS=y
>
> #
> # LED drivers
> #
> # CONFIG_LEDS_OMAP_DEBUG is not set
> # CONFIG_LEDS_OMAP is not set
> # CONFIG_LEDS_OMAP_PWM is not set
> # CONFIG_LEDS_PCA9532 is not set
> CONFIG_LEDS_GPIO=y
> CONFIG_LEDS_GPIO_PLATFORM=y
> # CONFIG_LEDS_LP3944 is not set
> # CONFIG_LEDS_PCA955X is not set
> # CONFIG_LEDS_DAC124S085 is not set
> # CONFIG_LEDS_BD2802 is not set
>
> #
> # LED Triggers
> #
> CONFIG_LEDS_TRIGGERS=y
> CONFIG_LEDS_TRIGGER_TIMER=y
> CONFIG_LEDS_TRIGGER_HEARTBEAT=y
> # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
> # CONFIG_LEDS_TRIGGER_GPIO is not set
> # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
>
> #
> # iptables trigger is under Netfilter config (LED target)
> #
> CONFIG_RTC_LIB=y
> CONFIG_RTC_CLASS=y
> CONFIG_RTC_HCTOSYS=y
> CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
> # CONFIG_RTC_DEBUG is not set
>
> #
> # RTC interfaces
> #
> CONFIG_RTC_INTF_SYSFS=y
> CONFIG_RTC_INTF_PROC=y
> CONFIG_RTC_INTF_DEV=y
> # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
> # CONFIG_RTC_DRV_TEST is not set
>
> #
> # I2C RTC drivers
> #
> # CONFIG_RTC_DRV_DS1307 is not set
> # CONFIG_RTC_DRV_DS1374 is not set
> # CONFIG_RTC_DRV_DS1672 is not set
> # CONFIG_RTC_DRV_MAX6900 is not set
> # CONFIG_RTC_DRV_RS5C372 is not set
> # CONFIG_RTC_DRV_ISL1208 is not set
> # CONFIG_RTC_DRV_X1205 is not set
> # CONFIG_RTC_DRV_PCF8563 is not set
> # CONFIG_RTC_DRV_PCF8583 is not set
> # CONFIG_RTC_DRV_M41T80 is not set
> # CONFIG_RTC_DRV_S35390A is not set
> # CONFIG_RTC_DRV_FM3130 is not set
> # CONFIG_RTC_DRV_RX8581 is not set
> # CONFIG_RTC_DRV_RX8025 is not set
>
> #
> # SPI RTC drivers
> #
> # CONFIG_RTC_DRV_M41T94 is not set
> # CONFIG_RTC_DRV_DS1305 is not set
> # CONFIG_RTC_DRV_DS1390 is not set
> # CONFIG_RTC_DRV_MAX6902 is not set
> # CONFIG_RTC_DRV_R9701 is not set
> # CONFIG_RTC_DRV_RS5C348 is not set
> # CONFIG_RTC_DRV_DS3234 is not set
>
> #
> # Platform RTC drivers
> #
> # CONFIG_RTC_DRV_CMOS is not set
> # CONFIG_RTC_DRV_DS1286 is not set
> # CONFIG_RTC_DRV_DS1511 is not set
> # CONFIG_RTC_DRV_DS1553 is not set
> # CONFIG_RTC_DRV_DS1742 is not set
> # CONFIG_RTC_DRV_STK17TA8 is not set
> # CONFIG_RTC_DRV_M48T86 is not set
> # CONFIG_RTC_DRV_M48T35 is not set
> # CONFIG_RTC_DRV_M48T59 is not set
> # CONFIG_RTC_DRV_BQ4802 is not set
> # CONFIG_RTC_DRV_V3020 is not set
>
> #
> # on-CPU RTC drivers
> #
> # CONFIG_DMADEVICES is not set
> # CONFIG_AUXDISPLAY is not set
> # CONFIG_REGULATOR is not set
> # CONFIG_UIO is not set
> # CONFIG_STAGING is not set
>
> #
> # CBUS support
> #
> # CONFIG_CBUS is not set
>
> #
> # File systems
> #
> CONFIG_EXT2_FS=y
> # CONFIG_EXT2_FS_XATTR is not set
> # CONFIG_EXT2_FS_XIP is not set
> CONFIG_EXT3_FS=y
> # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
> # CONFIG_EXT3_FS_XATTR is not set
> # CONFIG_EXT4_FS is not set
> CONFIG_JBD=y
> # CONFIG_JBD_DEBUG is not set
> # CONFIG_REISERFS_FS is not set
> # CONFIG_JFS_FS is not set
> CONFIG_FS_POSIX_ACL=y
> CONFIG_XFS_FS=m
> # CONFIG_XFS_QUOTA is not set
> # CONFIG_XFS_POSIX_ACL is not set
> # CONFIG_XFS_RT is not set
> # CONFIG_XFS_DEBUG is not set
> # CONFIG_GFS2_FS is not set
> # CONFIG_OCFS2_FS is not set
> # CONFIG_BTRFS_FS is not set
> CONFIG_FILE_LOCKING=y
> CONFIG_FSNOTIFY=y
> CONFIG_DNOTIFY=y
> CONFIG_INOTIFY=y
> CONFIG_INOTIFY_USER=y
> CONFIG_QUOTA=y
> # CONFIG_QUOTA_NETLINK_INTERFACE is not set
> CONFIG_PRINT_QUOTA_WARNING=y
> CONFIG_QUOTA_TREE=y
> # CONFIG_QFMT_V1 is not set
> CONFIG_QFMT_V2=y
> CONFIG_QUOTACTL=y
> # CONFIG_AUTOFS_FS is not set
> # CONFIG_AUTOFS4_FS is not set
> CONFIG_FUSE_FS=m
> # CONFIG_CUSE is not set
>
> #
> # Caches
> #
> # CONFIG_FSCACHE is not set
>
> #
> # CD-ROM/DVD Filesystems
> #
> CONFIG_ISO9660_FS=m
> CONFIG_JOLIET=y
> CONFIG_ZISOFS=y
> CONFIG_UDF_FS=m
> CONFIG_UDF_NLS=y
>
> #
> # DOS/FAT/NT Filesystems
> #
> CONFIG_FAT_FS=y
> CONFIG_MSDOS_FS=y
> CONFIG_VFAT_FS=y
> CONFIG_FAT_DEFAULT_CODEPAGE=437
> CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
> # CONFIG_NTFS_FS is not set
>
> #
> # Pseudo filesystems
> #
> CONFIG_PROC_FS=y
> CONFIG_PROC_SYSCTL=y
> CONFIG_PROC_PAGE_MONITOR=y
> CONFIG_SYSFS=y
> CONFIG_TMPFS=y
> # CONFIG_TMPFS_POSIX_ACL is not set
> # CONFIG_HUGETLB_PAGE is not set
> # CONFIG_CONFIGFS_FS is not set
> CONFIG_MISC_FILESYSTEMS=y
> # CONFIG_ADFS_FS is not set
> # CONFIG_AFFS_FS is not set
> # CONFIG_HFS_FS is not set
> # CONFIG_HFSPLUS_FS is not set
> # CONFIG_BEFS_FS is not set
> # CONFIG_BFS_FS is not set
> # CONFIG_EFS_FS is not set
> CONFIG_JFFS2_FS=y
> CONFIG_JFFS2_FS_DEBUG=0
> CONFIG_JFFS2_FS_WRITEBUFFER=y
> # CONFIG_JFFS2_FS_WBUF_VERIFY is not set
> CONFIG_JFFS2_SUMMARY=y
> CONFIG_JFFS2_FS_XATTR=y
> CONFIG_JFFS2_FS_POSIX_ACL=y
> CONFIG_JFFS2_FS_SECURITY=y
> CONFIG_JFFS2_COMPRESSION_OPTIONS=y
> CONFIG_JFFS2_ZLIB=y
> CONFIG_JFFS2_LZO=y
> CONFIG_JFFS2_RTIME=y
> CONFIG_JFFS2_RUBIN=y
> # CONFIG_JFFS2_CMODE_NONE is not set
> CONFIG_JFFS2_CMODE_PRIORITY=y
> # CONFIG_JFFS2_CMODE_SIZE is not set
> # CONFIG_JFFS2_CMODE_FAVOURLZO is not set
> # CONFIG_CRAMFS is not set
> # CONFIG_SQUASHFS is not set
> # CONFIG_VXFS_FS is not set
> # CONFIG_MINIX_FS is not set
> # CONFIG_OMFS_FS is not set
> # CONFIG_HPFS_FS is not set
> # CONFIG_QNX4FS_FS is not set
> # CONFIG_ROMFS_FS is not set
> # CONFIG_SYSV_FS is not set
> # CONFIG_UFS_FS is not set
> # CONFIG_NILFS2_FS is not set
> CONFIG_NETWORK_FILESYSTEMS=y
> CONFIG_NFS_FS=y
> CONFIG_NFS_V3=y
> # CONFIG_NFS_V3_ACL is not set
> CONFIG_NFS_V4=y
> # CONFIG_NFS_V4_1 is not set
> CONFIG_ROOT_NFS=y
> # CONFIG_NFSD is not set
> CONFIG_LOCKD=y
> CONFIG_LOCKD_V4=y
> CONFIG_EXPORTFS=m
> CONFIG_NFS_COMMON=y
> CONFIG_SUNRPC=y
> CONFIG_SUNRPC_GSS=y
> CONFIG_RPCSEC_GSS_KRB5=y
> # CONFIG_RPCSEC_GSS_SPKM3 is not set
> # CONFIG_SMB_FS is not set
> # CONFIG_CIFS is not set
> # CONFIG_NCP_FS is not set
> # CONFIG_CODA_FS is not set
> # CONFIG_AFS_FS is not set
>
> #
> # Partition Types
> #
> CONFIG_PARTITION_ADVANCED=y
> # CONFIG_ACORN_PARTITION is not set
> # CONFIG_OSF_PARTITION is not set
> # CONFIG_AMIGA_PARTITION is not set
> # CONFIG_ATARI_PARTITION is not set
> # CONFIG_MAC_PARTITION is not set
> CONFIG_MSDOS_PARTITION=y
> # CONFIG_BSD_DISKLABEL is not set
> # CONFIG_MINIX_SUBPARTITION is not set
> # CONFIG_SOLARIS_X86_PARTITION is not set
> # CONFIG_UNIXWARE_DISKLABEL is not set
> # CONFIG_LDM_PARTITION is not set
> # CONFIG_SGI_PARTITION is not set
> # CONFIG_ULTRIX_PARTITION is not set
> # CONFIG_SUN_PARTITION is not set
> # CONFIG_KARMA_PARTITION is not set
> # CONFIG_EFI_PARTITION is not set
> # CONFIG_SYSV68_PARTITION is not set
> CONFIG_NLS=y
> CONFIG_NLS_DEFAULT="iso8859-1"
> CONFIG_NLS_CODEPAGE_437=y
> # CONFIG_NLS_CODEPAGE_737 is not set
> # CONFIG_NLS_CODEPAGE_775 is not set
> # CONFIG_NLS_CODEPAGE_850 is not set
> # CONFIG_NLS_CODEPAGE_852 is not set
> # CONFIG_NLS_CODEPAGE_855 is not set
> # CONFIG_NLS_CODEPAGE_857 is not set
> # CONFIG_NLS_CODEPAGE_860 is not set
> # CONFIG_NLS_CODEPAGE_861 is not set
> # CONFIG_NLS_CODEPAGE_862 is not set
> # CONFIG_NLS_CODEPAGE_863 is not set
> # CONFIG_NLS_CODEPAGE_864 is not set
> # CONFIG_NLS_CODEPAGE_865 is not set
> # CONFIG_NLS_CODEPAGE_866 is not set
> # CONFIG_NLS_CODEPAGE_869 is not set
> # CONFIG_NLS_CODEPAGE_936 is not set
> # CONFIG_NLS_CODEPAGE_950 is not set
> # CONFIG_NLS_CODEPAGE_932 is not set
> # CONFIG_NLS_CODEPAGE_949 is not set
> # CONFIG_NLS_CODEPAGE_874 is not set
> # CONFIG_NLS_ISO8859_8 is not set
> # CONFIG_NLS_CODEPAGE_1250 is not set
> # CONFIG_NLS_CODEPAGE_1251 is not set
> # CONFIG_NLS_ASCII is not set
> CONFIG_NLS_ISO8859_1=y
> # CONFIG_NLS_ISO8859_2 is not set
> # CONFIG_NLS_ISO8859_3 is not set
> # CONFIG_NLS_ISO8859_4 is not set
> # CONFIG_NLS_ISO8859_5 is not set
> # CONFIG_NLS_ISO8859_6 is not set
> # CONFIG_NLS_ISO8859_7 is not set
> # CONFIG_NLS_ISO8859_9 is not set
> # CONFIG_NLS_ISO8859_13 is not set
> # CONFIG_NLS_ISO8859_14 is not set
> # CONFIG_NLS_ISO8859_15 is not set
> # CONFIG_NLS_KOI8_R is not set
> # CONFIG_NLS_KOI8_U is not set
> # CONFIG_NLS_UTF8 is not set
> # CONFIG_DLM is not set
>
> #
> # Kernel hacking
> #
> # CONFIG_PRINTK_TIME is not set
> CONFIG_ENABLE_WARN_DEPRECATED=y
> CONFIG_ENABLE_MUST_CHECK=y
> CONFIG_FRAME_WARN=1024
> CONFIG_MAGIC_SYSRQ=y
> # CONFIG_UNUSED_SYMBOLS is not set
> CONFIG_DEBUG_FS=y
> # CONFIG_HEADERS_CHECK is not set
> CONFIG_DEBUG_KERNEL=y
> # CONFIG_DEBUG_SHIRQ is not set
> CONFIG_DETECT_SOFTLOCKUP=y
> # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
> CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
> CONFIG_DETECT_HUNG_TASK=y
> # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
> CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
> CONFIG_SCHED_DEBUG=y
> CONFIG_SCHEDSTATS=y
> CONFIG_TIMER_STATS=y
> # CONFIG_DEBUG_OBJECTS is not set
> # CONFIG_SLUB_DEBUG_ON is not set
> # CONFIG_SLUB_STATS is not set
> # CONFIG_DEBUG_KMEMLEAK is not set
> # CONFIG_DEBUG_RT_MUTEXES is not set
> # CONFIG_RT_MUTEX_TESTER is not set
> # CONFIG_DEBUG_SPINLOCK is not set
> CONFIG_DEBUG_MUTEXES=y
> # CONFIG_DEBUG_LOCK_ALLOC is not set
> # CONFIG_PROVE_LOCKING is not set
> # CONFIG_LOCK_STAT is not set
> # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
> # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
> CONFIG_STACKTRACE=y
> # CONFIG_DEBUG_KOBJECT is not set
> # CONFIG_DEBUG_BUGVERBOSE is not set
> # CONFIG_DEBUG_INFO is not set
> # CONFIG_DEBUG_VM is not set
> # CONFIG_DEBUG_WRITECOUNT is not set
> # CONFIG_DEBUG_MEMORY_INIT is not set
> # CONFIG_DEBUG_LIST is not set
> # CONFIG_DEBUG_SG is not set
> # CONFIG_DEBUG_NOTIFIERS is not set
> # CONFIG_BOOT_PRINTK_DELAY is not set
> # CONFIG_RCU_TORTURE_TEST is not set
> # CONFIG_RCU_CPU_STALL_DETECTOR is not set
> # CONFIG_BACKTRACE_SELF_TEST is not set
> # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
> # CONFIG_FAULT_INJECTION is not set
> # CONFIG_LATENCYTOP is not set
> # CONFIG_PAGE_POISONING is not set
> CONFIG_NOP_TRACER=y
> CONFIG_HAVE_FUNCTION_TRACER=y
> CONFIG_RING_BUFFER=y
> CONFIG_EVENT_TRACING=y
> CONFIG_CONTEXT_SWITCH_TRACER=y
> CONFIG_TRACING=y
> CONFIG_TRACING_SUPPORT=y
> # CONFIG_FTRACE is not set
> # CONFIG_DYNAMIC_DEBUG is not set
> # CONFIG_SAMPLES is not set
> CONFIG_HAVE_ARCH_KGDB=y
> # CONFIG_KGDB is not set
> CONFIG_ARM_UNWIND=y
> # CONFIG_DEBUG_USER is not set
> # CONFIG_DEBUG_ERRORS is not set
> # CONFIG_DEBUG_STACK_USAGE is not set
> # CONFIG_DEBUG_LL is not set
>
> #
> # Security options
> #
> # CONFIG_KEYS is not set
> # CONFIG_SECURITY is not set
> # CONFIG_SECURITYFS is not set
> # CONFIG_SECURITY_FILE_CAPABILITIES is not set
> CONFIG_XOR_BLOCKS=m
> CONFIG_ASYNC_CORE=m
> CONFIG_ASYNC_MEMCPY=m
> CONFIG_ASYNC_XOR=m
> CONFIG_CRYPTO=y
>
> #
> # Crypto core or helper
> #
> # CONFIG_CRYPTO_FIPS is not set
> CONFIG_CRYPTO_ALGAPI=y
> CONFIG_CRYPTO_ALGAPI2=y
> CONFIG_CRYPTO_AEAD2=y
> CONFIG_CRYPTO_BLKCIPHER=y
> CONFIG_CRYPTO_BLKCIPHER2=y
> CONFIG_CRYPTO_HASH=y
> CONFIG_CRYPTO_HASH2=y
> CONFIG_CRYPTO_RNG2=y
> CONFIG_CRYPTO_PCOMP=y
> CONFIG_CRYPTO_MANAGER=y
> CONFIG_CRYPTO_MANAGER2=y
> CONFIG_CRYPTO_GF128MUL=m
> CONFIG_CRYPTO_NULL=m
> CONFIG_CRYPTO_WORKQUEUE=y
> CONFIG_CRYPTO_CRYPTD=m
> # CONFIG_CRYPTO_AUTHENC is not set
> CONFIG_CRYPTO_TEST=m
>
> #
> # Authenticated Encryption with Associated Data
> #
> # CONFIG_CRYPTO_CCM is not set
> # CONFIG_CRYPTO_GCM is not set
> # CONFIG_CRYPTO_SEQIV is not set
>
> #
> # Block modes
> #
> CONFIG_CRYPTO_CBC=y
> # CONFIG_CRYPTO_CTR is not set
> # CONFIG_CRYPTO_CTS is not set
> CONFIG_CRYPTO_ECB=y
> CONFIG_CRYPTO_LRW=m
> CONFIG_CRYPTO_PCBC=m
> # CONFIG_CRYPTO_XTS is not set
>
> #
> # Hash modes
> #
> CONFIG_CRYPTO_HMAC=m
> CONFIG_CRYPTO_XCBC=m
>
> #
> # Digest
> #
> CONFIG_CRYPTO_CRC32C=y
> CONFIG_CRYPTO_MD4=m
> CONFIG_CRYPTO_MD5=y
> CONFIG_CRYPTO_MICHAEL_MIC=y
> # CONFIG_CRYPTO_RMD128 is not set
> # CONFIG_CRYPTO_RMD160 is not set
> # CONFIG_CRYPTO_RMD256 is not set
> # CONFIG_CRYPTO_RMD320 is not set
> CONFIG_CRYPTO_SHA1=m
> CONFIG_CRYPTO_SHA256=m
> CONFIG_CRYPTO_SHA512=m
> CONFIG_CRYPTO_TGR192=m
> CONFIG_CRYPTO_WP512=m
>
> #
> # Ciphers
> #
> CONFIG_CRYPTO_AES=y
> CONFIG_CRYPTO_ANUBIS=m
> CONFIG_CRYPTO_ARC4=y
> CONFIG_CRYPTO_BLOWFISH=m
> CONFIG_CRYPTO_CAMELLIA=m
> CONFIG_CRYPTO_CAST5=m
> CONFIG_CRYPTO_CAST6=m
> CONFIG_CRYPTO_DES=y
> CONFIG_CRYPTO_FCRYPT=m
> CONFIG_CRYPTO_KHAZAD=m
> # CONFIG_CRYPTO_SALSA20 is not set
> # CONFIG_CRYPTO_SEED is not set
> CONFIG_CRYPTO_SERPENT=m
> CONFIG_CRYPTO_TEA=m
> CONFIG_CRYPTO_TWOFISH=m
> CONFIG_CRYPTO_TWOFISH_COMMON=m
>
> #
> # Compression
> #
> CONFIG_CRYPTO_DEFLATE=m
> # CONFIG_CRYPTO_ZLIB is not set
> # CONFIG_CRYPTO_LZO is not set
>
> #
> # Random Number Generation
> #
> # CONFIG_CRYPTO_ANSI_CPRNG is not set
> CONFIG_CRYPTO_HW=y
> CONFIG_BINARY_PRINTF=y
>
> #
> # Library routines
> #
> CONFIG_BITREVERSE=y
> CONFIG_GENERIC_FIND_LAST_BIT=y
> CONFIG_CRC_CCITT=y
> CONFIG_CRC16=m
> CONFIG_CRC_T10DIF=y
> CONFIG_CRC_ITU_T=y
> CONFIG_CRC32=y
> CONFIG_CRC7=y
> CONFIG_LIBCRC32C=y
> CONFIG_ZLIB_INFLATE=y
> CONFIG_ZLIB_DEFLATE=y
> CONFIG_LZO_COMPRESS=y
> CONFIG_LZO_DECOMPRESS=y
> CONFIG_DECOMPRESS_GZIP=y
> CONFIG_HAS_IOMEM=y
> CONFIG_HAS_IOPORT=y
> CONFIG_HAS_DMA=y
> CONFIG_NLATTR=y

RE: Linux omap blocked on boot

[Gadiyar, Anand]

 

> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org 
> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of 
> Alberto J. Perez
> Sent: Wednesday, October 07, 2009 11:34 PM
> Cc: linux-omap@vger.kernel.org
> Subject: Linux omap blocked on boot
> 
> Hi all!
> 
> I'm recompiling the linux-omap-2.6/origin/pm branch and every 
> time I get 
> the boot process stalled after kernel image decompression.
> 
> - With the linux-omap-2.6/origin/2.6.30 branch I have no problems.
> - I've tried with 2008q3-72 & 2009q1-203 arm compilers.
> 
> I attach the .config I used.
> 
> Some one have or had the same problem?
> 
> Thanks in advance,


Which board is this?

RE: Linux omap blocked on boot

[Gadiyar, Anand]

(Hit send too soon)

> Hi all!
> 
> I'm recompiling the linux-omap-2.6/origin/pm branch and every time I get 
> the boot process stalled after kernel image decompression.
> 
> - With the linux-omap-2.6/origin/2.6.30 branch I have no problems.
> - I've tried with 2008q3-72 & 2009q1-203 arm compilers.
> 
> I attach the .config I used.
> 
> Some one have or had the same problem?
> 
> Thanks in advance,
> 
> Alberto.
> 

Alberto,

>From the .config you attached, it looks like this is the Gumstix
Overo, right?

Could you try enabling CONFIG_DEBUG_LL and patch kernel/printk.c
and see if there is a crash at bootup? You can find the patch in the
omap-debug branch (See [1] for the notification)

Regards,
Anand

[1] http://marc.info/?l=linux-omap&m=125416465315169&w=2

Re: Linux omap blocked on boot

[Alberto J. Perez]

Following your instructions I get the pm kernel working!

Thanks a lot Kevin & Anand.

Alberto.

Kevin Hilman wrote:
> "Alberto J. Perez" <aperez@disca.upv.es> writes:
>
>   
>> Hi all!
>>
>> I'm recompiling the linux-omap-2.6/origin/pm branch and every time I
>> get the boot process stalled after kernel image decompression.
>>
>> - With the linux-omap-2.6/origin/2.6.30 branch I have no problems.
>> - I've tried with 2008q3-72 & 2009q1-203 arm compilers.
>>
>> I attach the .config I used.
>>
>>     
>
> It looks like you are trying this for Overo, right.  
>
> So we're on the same page, please pull the current PM branch as I
> pushed a new one yesterday.  Then, use omap3_pm_defconfig with the
> only change being to change the debug UART from UART1 to UART3.  This
> is how I test on Overo and booting works fine.
>
> Kevin
>
>   

Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[Tony Lindgren]

* Govindraj.R <govindraj.raja@ti.com> [090924 03:29]:
> From: Govindraj R <govindraj.raja@ti.com>
> 
> This patch adds support for OMAP3430-HIGH SPEED UART Controller.
> 
> Signed-off-by:	Govindraj R <govindraj.raja@ti.com>
> Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
> Reviewed-by: Tony Lindgren <tony@atomide.com>

You should only add Reviewed-by if Alan or me have replied with it.

So far I've only replied with some comments that have not yet
been fixed, so we're few more steps from being Reviewd-by.

<snip>

> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 6553833..67a7129 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM
>  	  Currently, only 8250 compatible ports are supported, but
>  	  others can easily be added.
> 
> +config SERIAL_OMAP
> +	bool "OMAP serial port support"
> +	depends on ARM && ARCH_OMAP
> +	select SERIAL_CORE
> +	help
> +	If you have a machine based on an Texas Instruments OMAP CPU you
> +	can enable its onboard serial ports by enabling this option.
> +
> +config SERIAL_OMAP_CONSOLE
> +	bool "Console on OMAP serial port"
> +	depends on SERIAL_OMAP
> +	select SERIAL_CORE_CONSOLE
> +	help
> +	If you have enabled the serial port on the Texas Instruments OMAP
> +	CPU you can make it the console by answering Y to this option.
> +
> +	Even if you say Y here, the currently visible virtual console
> +	(/dev/tty0) will still be used as the system console by default, but
> +	you can alter that using a kernel command line option such as
> +	"console=ttyS0". (Try "man bootparam" or see the documentation of
> +	your boot loader (lilo or loadlin) about how to pass options to the
> +	kernel at boot time.)
> +
> +config SERIAL_OMAP_DMA_UART1
> +	bool "UART1 DMA support"
> +	depends on SERIAL_OMAP
> +	help
> +	If you have enabled the serial port on the Texas Instruments OMAP
> +	CPU you can enable the DMA transfer on UART 1 by answering
> +	to this option.
> +
> +config SERIAL_OMAP_DMA_UART2
> +	bool "UART2 DMA support"
> +	depends on SERIAL_OMAP
> +	help
> +	If you have enabled the serial port on the Texas Instruments OMAP
> +	CPU you can enable the DMA transfer on UART 2 by answering
> +	to this option.
> +
> +config SERIAL_OMAP_DMA_UART3
> +	bool "UART3 DMA support"
> +	depends on SERIAL_OMAP
> +	help
> +	If you have enabled the serial port on the Texas Instruments OMAP
> +	CPU you can enable the DMA transfer on UART 3 by answering
> +	to this option.
> +
>  config SERIAL_OF_PLATFORM_NWPSERIAL
>  	tristate "NWP serial port driver"
>  	depends on PPC_OF && PPC_DCR

There's absolutely no need for having Kconfig options for the DMA
support. Please pass that in platform_data from the board-*.c files.

This is the third time I'm commenting on the same issue!

What's the point of posting these patches for review if the issues
don't get solved?

Regards,

Tony

Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[Govindraj]

On Thu, Oct 8, 2009 at 3:21 AM, Tony Lindgren <tony@atomide.com> wrote:
> * Govindraj.R <govindraj.raja@ti.com> [090924 03:29]:
>> From: Govindraj R <govindraj.raja@ti.com>
>>
>> This patch adds support for OMAP3430-HIGH SPEED UART Controller.
>>
>> Signed-off-by:        Govindraj R <govindraj.raja@ti.com>
>> Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
>> Reviewed-by: Tony Lindgren <tony@atomide.com>
>
> You should only add Reviewed-by if Alan or me have replied with it.
>
> So far I've only replied with some comments that have not yet
> been fixed, so we're few more steps from being Reviewd-by.
>
> <snip>
>
>> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
>> index 6553833..67a7129 100644
>> --- a/drivers/serial/Kconfig
>> +++ b/drivers/serial/Kconfig
>> @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM
>>         Currently, only 8250 compatible ports are supported, but
>>         others can easily be added.
>>
>> +config SERIAL_OMAP
>> +     bool "OMAP serial port support"
>> +     depends on ARM && ARCH_OMAP
>> +     select SERIAL_CORE
>> +     help
>> +     If you have a machine based on an Texas Instruments OMAP CPU you
>> +     can enable its onboard serial ports by enabling this option.
>> +
>> +config SERIAL_OMAP_CONSOLE
>> +     bool "Console on OMAP serial port"
>> +     depends on SERIAL_OMAP
>> +     select SERIAL_CORE_CONSOLE
>> +     help
>> +     If you have enabled the serial port on the Texas Instruments OMAP
>> +     CPU you can make it the console by answering Y to this option.
>> +
>> +     Even if you say Y here, the currently visible virtual console
>> +     (/dev/tty0) will still be used as the system console by default, but
>> +     you can alter that using a kernel command line option such as
>> +     "console=ttyS0". (Try "man bootparam" or see the documentation of
>> +     your boot loader (lilo or loadlin) about how to pass options to the
>> +     kernel at boot time.)
>> +
>> +config SERIAL_OMAP_DMA_UART1
>> +     bool "UART1 DMA support"
>> +     depends on SERIAL_OMAP
>> +     help
>> +     If you have enabled the serial port on the Texas Instruments OMAP
>> +     CPU you can enable the DMA transfer on UART 1 by answering
>> +     to this option.
>> +
>> +config SERIAL_OMAP_DMA_UART2
>> +     bool "UART2 DMA support"
>> +     depends on SERIAL_OMAP
>> +     help
>> +     If you have enabled the serial port on the Texas Instruments OMAP
>> +     CPU you can enable the DMA transfer on UART 2 by answering
>> +     to this option.
>> +
>> +config SERIAL_OMAP_DMA_UART3
>> +     bool "UART3 DMA support"
>> +     depends on SERIAL_OMAP
>> +     help
>> +     If you have enabled the serial port on the Texas Instruments OMAP
>> +     CPU you can enable the DMA transfer on UART 3 by answering
>> +     to this option.
>> +
>>  config SERIAL_OF_PLATFORM_NWPSERIAL
>>       tristate "NWP serial port driver"
>>       depends on PPC_OF && PPC_DCR
>
> There's absolutely no need for having Kconfig options for the DMA
> support. Please pass that in platform_data from the board-*.c files.
>
> This is the third time I'm commenting on the same issue!
>
> What's the point of posting these patches for review if the issues
> don't get solved?


The omap-serial uart driver is designed to work either in interrupt
mode or in DMA mode,
We have provided this option so that one can select interrupt mode or
DMA mode based on the uart usage, if somebody is using uart as console
then interrupt mode will do, else if used with bluetooth which does
huge data transfer then DMA mode can be selected.

Don't you think this should be a configurable option using kconfig
rather than passing as platform data?

if used as platform data then one has to modify platform data to
switch between the interrupt and DMA mode.

Regards,
Govindraj.R


>
> Regards,
>
> Tony
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Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[Govindraj]

On Sat, Oct 3, 2009 at 4:11 AM, Jonathan McDowell <noodles@earth.li> wrote:
> On Thu, Sep 24, 2009 at 03:57:13PM +0530, Govindraj.R wrote:
>> From: Govindraj R <govindraj.raja@ti.com>
>>
>> This patch adds support for OMAP3430-HIGH SPEED UART Controller.
>>
>> Signed-off-by:        Govindraj R <govindraj.raja@ti.com>
>> Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
>> Reviewed-by: Tony Lindgren <tony@atomide.com>
>> ---
>
>> +config SERIAL_OMAP
>> +     bool "OMAP serial port support"
>> +     depends on ARM && ARCH_OMAP
>> +     select SERIAL_CORE
>> +     help
>> +     If you have a machine based on an Texas Instruments OMAP CPU you
>> +     can enable its onboard serial ports by enabling this option.
>
> If it's OMAP3 hardware then should the "depends on" be ARCH_OMAP3 ||
> ARCH_OMAP4, rather than allowing it for OMAP1 + 2 as well?
>
> J.
>

Agree. Will do the changes.


> --
> Revd. Jonathan McDowell, ULC | If they can't take a joke....fuck 'em.
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-- 
---
Regards,
Govindraj.R
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RE: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[G, Manjunath Kondaiah]

Govind,
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org 
> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Govindraj
> Sent: Thursday, October 08, 2009 11:44 AM
> To: Tony Lindgren
> Cc: Raja, Govindraj; linux-omap@vger.kernel.org; 
> linux-kernel@vger.kernel.org; linux-serial@vger.kernel.org
> Subject: Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.
> 
> On Thu, Oct 8, 2009 at 3:21 AM, Tony Lindgren 
> <tony@atomide.com> wrote:
> > * Govindraj.R <govindraj.raja@ti.com> [090924 03:29]:
> >> From: Govindraj R <govindraj.raja@ti.com>
> >>
> >> This patch adds support for OMAP3430-HIGH SPEED UART Controller.
> >>
> >> Signed-off-by:        Govindraj R <govindraj.raja@ti.com>
> >> Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
> >> Reviewed-by: Tony Lindgren <tony@atomide.com>
> >
> > You should only add Reviewed-by if Alan or me have replied with it.
> >
> > So far I've only replied with some comments that have not yet
> > been fixed, so we're few more steps from being Reviewd-by.
> >
> > <snip>
> >
> >> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> >> index 6553833..67a7129 100644
> >> --- a/drivers/serial/Kconfig
> >> +++ b/drivers/serial/Kconfig
> >> @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM
> >>         Currently, only 8250 compatible ports are supported, but
> >>         others can easily be added.
> >>
> >> +config SERIAL_OMAP
> >> +     bool "OMAP serial port support"
> >> +     depends on ARM && ARCH_OMAP
> >> +     select SERIAL_CORE
> >> +     help
> >> +     If you have a machine based on an Texas Instruments 
> OMAP CPU you
> >> +     can enable its onboard serial ports by enabling this option.
> >> +
> >> +config SERIAL_OMAP_CONSOLE
> >> +     bool "Console on OMAP serial port"
> >> +     depends on SERIAL_OMAP
> >> +     select SERIAL_CORE_CONSOLE
> >> +     help
> >> +     If you have enabled the serial port on the Texas 
> Instruments OMAP
> >> +     CPU you can make it the console by answering Y to 
> this option.
> >> +
> >> +     Even if you say Y here, the currently visible virtual console
> >> +     (/dev/tty0) will still be used as the system console 
> by default, but
> >> +     you can alter that using a kernel command line option such as
> >> +     "console=ttyS0". (Try "man bootparam" or see the 
> documentation of
> >> +     your boot loader (lilo or loadlin) about how to pass 
> options to the
> >> +     kernel at boot time.)
> >> +
> >> +config SERIAL_OMAP_DMA_UART1
> >> +     bool "UART1 DMA support"
> >> +     depends on SERIAL_OMAP
> >> +     help
> >> +     If you have enabled the serial port on the Texas 
> Instruments OMAP
> >> +     CPU you can enable the DMA transfer on UART 1 by answering
> >> +     to this option.
> >> +
> >> +config SERIAL_OMAP_DMA_UART2
> >> +     bool "UART2 DMA support"
> >> +     depends on SERIAL_OMAP
> >> +     help
> >> +     If you have enabled the serial port on the Texas 
> Instruments OMAP
> >> +     CPU you can enable the DMA transfer on UART 2 by answering
> >> +     to this option.
> >> +
> >> +config SERIAL_OMAP_DMA_UART3
> >> +     bool "UART3 DMA support"
> >> +     depends on SERIAL_OMAP
> >> +     help
> >> +     If you have enabled the serial port on the Texas 
> Instruments OMAP
> >> +     CPU you can enable the DMA transfer on UART 3 by answering
> >> +     to this option.
> >> +
> >>  config SERIAL_OF_PLATFORM_NWPSERIAL
> >>       tristate "NWP serial port driver"
> >>       depends on PPC_OF && PPC_DCR
> >
> > There's absolutely no need for having Kconfig options for the DMA
> > support. Please pass that in platform_data from the board-*.c files.
> >
> > This is the third time I'm commenting on the same issue!
> >
> > What's the point of posting these patches for review if the issues
> > don't get solved?
> 
> 
> The omap-serial uart driver is designed to work either in interrupt
> mode or in DMA mode,
> We have provided this option so that one can select interrupt mode or
> DMA mode based on the uart usage, if somebody is using uart as console
> then interrupt mode will do, else if used with bluetooth which does
> huge data transfer then DMA mode can be selected.
> 
> Don't you think this should be a configurable option using kconfig
> rather than passing as platform data?
> 
> if used as platform data then one has to modify platform data to
> switch between the interrupt and DMA mode.
> 
> Regards,
> Govindraj.R
> 
> 

Usage of UART is board dependent. It's usage will not change dynamically for
a given board. This can be removed from Kconfig and move it to respective 
board file-> board-*.c

> >
> > Regards,
> >
> > Tony
> > --
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> linux-serial" in
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Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[Tony Lindgren]

* G, Manjunath Kondaiah <manjugk@ti.com> [091008 00:41]:
> 
> Govind,
> > -----Original Message-----
> > From: linux-omap-owner@vger.kernel.org 
> > [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Govindraj
> > Sent: Thursday, October 08, 2009 11:44 AM
> > To: Tony Lindgren
> > Cc: Raja, Govindraj; linux-omap@vger.kernel.org; 
> > linux-kernel@vger.kernel.org; linux-serial@vger.kernel.org
> > Subject: Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.
> > 
> > On Thu, Oct 8, 2009 at 3:21 AM, Tony Lindgren 
> > <tony@atomide.com> wrote:
> > > * Govindraj.R <govindraj.raja@ti.com> [090924 03:29]:
> > >> From: Govindraj R <govindraj.raja@ti.com>
> > >>
> > >> This patch adds support for OMAP3430-HIGH SPEED UART Controller.
> > >>
> > >> Signed-off-by:        Govindraj R <govindraj.raja@ti.com>
> > >> Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
> > >> Reviewed-by: Tony Lindgren <tony@atomide.com>
> > >
> > > You should only add Reviewed-by if Alan or me have replied with it.
> > >
> > > So far I've only replied with some comments that have not yet
> > > been fixed, so we're few more steps from being Reviewd-by.
> > >
> > > <snip>
> > >
> > >> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> > >> index 6553833..67a7129 100644
> > >> --- a/drivers/serial/Kconfig
> > >> +++ b/drivers/serial/Kconfig
> > >> @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM
> > >>         Currently, only 8250 compatible ports are supported, but
> > >>         others can easily be added.
> > >>
> > >> +config SERIAL_OMAP
> > >> +     bool "OMAP serial port support"
> > >> +     depends on ARM && ARCH_OMAP
> > >> +     select SERIAL_CORE
> > >> +     help
> > >> +     If you have a machine based on an Texas Instruments 
> > OMAP CPU you
> > >> +     can enable its onboard serial ports by enabling this option.
> > >> +
> > >> +config SERIAL_OMAP_CONSOLE
> > >> +     bool "Console on OMAP serial port"
> > >> +     depends on SERIAL_OMAP
> > >> +     select SERIAL_CORE_CONSOLE
> > >> +     help
> > >> +     If you have enabled the serial port on the Texas 
> > Instruments OMAP
> > >> +     CPU you can make it the console by answering Y to 
> > this option.
> > >> +
> > >> +     Even if you say Y here, the currently visible virtual console
> > >> +     (/dev/tty0) will still be used as the system console 
> > by default, but
> > >> +     you can alter that using a kernel command line option such as
> > >> +     "console=ttyS0". (Try "man bootparam" or see the 
> > documentation of
> > >> +     your boot loader (lilo or loadlin) about how to pass 
> > options to the
> > >> +     kernel at boot time.)
> > >> +
> > >> +config SERIAL_OMAP_DMA_UART1
> > >> +     bool "UART1 DMA support"
> > >> +     depends on SERIAL_OMAP
> > >> +     help
> > >> +     If you have enabled the serial port on the Texas 
> > Instruments OMAP
> > >> +     CPU you can enable the DMA transfer on UART 1 by answering
> > >> +     to this option.
> > >> +
> > >> +config SERIAL_OMAP_DMA_UART2
> > >> +     bool "UART2 DMA support"
> > >> +     depends on SERIAL_OMAP
> > >> +     help
> > >> +     If you have enabled the serial port on the Texas 
> > Instruments OMAP
> > >> +     CPU you can enable the DMA transfer on UART 2 by answering
> > >> +     to this option.
> > >> +
> > >> +config SERIAL_OMAP_DMA_UART3
> > >> +     bool "UART3 DMA support"
> > >> +     depends on SERIAL_OMAP
> > >> +     help
> > >> +     If you have enabled the serial port on the Texas 
> > Instruments OMAP
> > >> +     CPU you can enable the DMA transfer on UART 3 by answering
> > >> +     to this option.
> > >> +
> > >>  config SERIAL_OF_PLATFORM_NWPSERIAL
> > >>       tristate "NWP serial port driver"
> > >>       depends on PPC_OF && PPC_DCR
> > >
> > > There's absolutely no need for having Kconfig options for the DMA
> > > support. Please pass that in platform_data from the board-*.c files.
> > >
> > > This is the third time I'm commenting on the same issue!
> > >
> > > What's the point of posting these patches for review if the issues
> > > don't get solved?
> > 
> > 
> > The omap-serial uart driver is designed to work either in interrupt
> > mode or in DMA mode,
> > We have provided this option so that one can select interrupt mode or
> > DMA mode based on the uart usage, if somebody is using uart as console
> > then interrupt mode will do, else if used with bluetooth which does
> > huge data transfer then DMA mode can be selected.
> > 
> > Don't you think this should be a configurable option using kconfig
> > rather than passing as platform data?

Nope. I think it should be platform_data and should be possible to override
vith a kernel cmdline option. That's because we support compiling in and
booting many boards the same kernel binary.

> > if used as platform data then one has to modify platform data to
> > switch between the interrupt and DMA mode.

How about set some kernel cmdline options if you want to override the
default settings?

> Usage of UART is board dependent. It's usage will not change dynamically for
> a given board. This can be removed from Kconfig and move it to respective 
> board file-> board-*.c

Or can be changed from kernel cmdline if necessary.

Regards,

Tony
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RE: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[G, Manjunath Kondaiah]

> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org
> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Kevin Hilman
> Sent: Wednesday, October 07, 2009 7:37 PM
> To: Raja, Govindraj
> Cc: linux-omap@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-serial@vger.kernel.org
> Subject: Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.
>
> "Govindraj.R" <govindraj.raja@ti.com> writes:
>
> > From: Govindraj R <govindraj.raja@ti.com>
> >
> > This patch adds support for OMAP3430-HIGH SPEED UART Controller.
> >
> > Signed-off-by:      Govindraj R <govindraj.raja@ti.com>
> > Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
> > Reviewed-by: Tony Lindgren <tony@atomide.com>
>
> Hi Govindraj,
>
> Sorry for the delay in reviewing this.  Some comments below...
>
> > ---
> >  arch/arm/plat-omap/include/mach/omap-serial.h |  156 ++
> >  drivers/serial/Kconfig                        |   47
> >  drivers/serial/Makefile                       |    1
> >  drivers/serial/omap-serial.c                  | 1745
> ++++++++++++++++++++++++++
> >  4 files changed, 1949 insertions(+)
> >
> > diff --git a/arch/arm/plat-omap/include/mach/omap-serial.h
> > b/arch/arm/plat-omap/include/mach/omap-serial.h
> > new file mode 100644
> > index 0000000..17b6d17
> > --- /dev/null
> > +++ b/arch/arm/plat-omap/include/mach/omap-serial.h
> > @@ -0,0 +1,156 @@
> > +/*
> > + * arch/arm/plat-omap/include/mach/omap-serial.h
> > + *
> > + * Driver for OMAP3430 UART controller.
> > + *
> > + * Copyright (C) 2009 Texas Instruments.
> > + *
> > + * Authors:
> > + * Govindraj R     <govindraj.raja@ti.com>
> > + * Thara Gopinath  <thara@ti.com>
>
> And all the serial PM stuff was done by me, based on intial work by
> Tero Kristo.
>
> It should also acknowledge the work based on the 8250 driver.
>
> > + * This file is licensed under the terms of the GNU
> General Public License
> > + * version 2. This program is licensed "as is" without any
> warranty of any
> > + * kind, whether express or implied.
> > + */
> > +
> > +#ifndef __OMAP_SERIAL_H__
> > +#define __OMAP_SERIAL_H__
> > +
> > +#include <linux/serial_core.h>
> > +#include <linux/platform_device.h>
> > +
> > +#ifdef CONFIG_PM
> > +#include <../arch/arm/mach-omap2/prm.h>
> > +#include <../arch/arm/mach-omap2/pm.h>
> > +#include <../arch/arm/mach-omap2/prm-regbits-34xx.h>
>
> Hmm, I don't like this.  I know I initially suggested that most of the
> PM stuff could live directly in the driver, but based on this, I think
> we still need some separation between the driver and platform
> specifics.  I now think we should keep most of the separation that was
> done for the 8250 driver.
>
> This will allow us to get the core of the driver upstream while still
> being able to work on the PM aspects.  Now that omap_device/omap_hwmod
> and the new runtime PM framework are in mainline, I think this driver
> should be adapted to those for PM.  Keeping the separation will also
> make it clearer what exactly is change wrt current code in PM branch.
>
> > +#include <mach/control.h>
> > +#endif
> > +
> > +/* TI OMAP CONSOLE */
> > +#define PORT_OMAP       86
>
> It's not terribly clear where this number comes from and how it
> will remain portable.
>
> > +#define DRIVER_NAME        "omap-hsuart"
> > +
> > +/* tty device name used by omap-serial driver,
> > + * in bootargs we specify as console=ttyO0 if uart1
> > + * is used as console uart.
> > + */
> > +#define DEVICE_NAME        "ttyO"
> > +
>
> Hmm, this will break a lot of existing environments.  Any reason
> ttyS cannot be used?
>
The tty name is 'ttyO' (Letter O for OMAP) - as it's a omap serial driver. Tony had commented that we should use a different name from ttyS so as not to have conflicts with the 8250 drivers that use the ttyS name. Refer: http://linux.omap.com/pipermail/linux-omap-open-source/2008-January/012597.html

>
> > +/*
> > + * We default to IRQ0 for the "no irq" hack.   Some
> > + * machine types want others as well - they're free
> > + * to redefine this in their header file.
> > + */
> > +#define is_real_interrupt(irq)  ((irq) != 0)
> > +
> > +#if defined(CONFIG_SERIAL_OMAP_CONSOLE) &&
> defined(CONFIG_MAGIC_SYSRQ)
> > +#define SUPPORT_SYSRQ
> > +#endif
> > +
> > +#ifdef CONFIG_ARCH_OMAP34XX
> > +#define OMAP_MDR1_DISABLE  0x07
> > +#define OMAP_MDR1_MODE13X  0x03
> > +#define OMAP_MDR1_MODE16X  0x00
> > +#define OMAP_MODE13X_SPEED 230400
> > +#endif
>
> Drop these ifdefs, they're not necessary and with them it
> wont compile for !34xx.
>
> > +#define CONSOLE_NAME       "console="
> > +
> > +#define UART_CLK   (48000000)
> > +#define QUART_CLK  (1843200)
>
> Why is this driver handling the QUART on Z2.  That is not an OMAP UART
> and should be handled by the 8250 driver.

Yes. QUART should be handled using 8250 driver.

>
> Also UART clock rates are something that should be passed in
> platform_data from platform specific code.
>
> > +#define QUART              (0x3)
> > +
> > +#define SLEEP_TIMEOUT      (5 * HZ)
> > +#define RX_TIMEOUT         (3 * HZ)
> > +
> > +struct uart_dma_info {
> > +   int dma_enabled;
> > +   int rx_dma_bufsize;
> > +   int rx_timeout;
> > +   };
> > +
> > +struct omap_uart_state {
> > +   int clocked;
> > +   struct clk *ick;
> > +   struct clk *fck;
> > +   int num;
> > +   int can_sleep;
> > +
> > +   void __iomem *wk_st;
> > +   void __iomem *wk_en;
> > +   u32 wk_mask;
> > +   u32 padconf;
> > +
> > +#ifdef CONFIG_PM
> > +   struct timer_list timer;
> > +   u32 timeout;
> > +   int context_valid;
> > +   /* Registers to be saved/restored for OFF-mode */
> > +   u16 dll;
> > +   u16 dlh;
> > +   u16 ier;
> > +   u16 sysc;
> > +   u16 scr;
> > +   u16 wer;
> > +#endif
> > +};
> > +
> > +struct uart_omap_dma {
> > +   u8                      uart_dma_tx;
> > +   u8                      uart_dma_rx;
> > +   int                     rx_dma_channel;
> > +   int                     tx_dma_channel;
> > +   /* Physical adress of RX DMA buffer */
> > +   dma_addr_t              rx_buf_dma_phys;
> > +   /* Physical adress of TX DMA buffer */
> > +   dma_addr_t              tx_buf_dma_phys;
> > +   /*
> > +    * Buffer for rx dma.It is not required for tx because
> the buffer
> > +    * comes from port structure
> > +    */
> > +   unsigned int            uart_base;
> > +   unsigned char           *rx_buf;
> > +   unsigned int            prev_rx_dma_pos;
> > +   int                     tx_buf_size;
> > +   int                     tx_dma_state;
> > +   int                     rx_dma_state;
> > +   spinlock_t              tx_lock;
> > +   spinlock_t              rx_lock;
> > +   /* timer to poll activity on rx dma */
> > +   struct timer_list       rx_timer;
> > +   int                     rx_buf_size;
> > +   int                     rx_timeout;
> > +};
> > +
> > +struct uart_omap_port {
> > +   struct uart_port        port;
> > +   struct uart_omap_dma    uart_dma;
> > +   struct platform_device  *pdev;
> > +
> > +   unsigned char           ier;
> > +   unsigned char           lcr;
> > +   unsigned char           mcr;
> > +   unsigned char           fcr;
> > +   unsigned char           efr;
> > +
> > +   int                     use_dma;
> > +   int                     is_buf_dma_alloced;
> > +   /*
> > +    * Some bits in registers are cleared on a read, so they must
> > +    * be saved whenever the register is read but the bits will not
> > +    * be immediately processed.
> > +    */
> > +   unsigned int            lsr_break_flag;
> > +#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
> > +   unsigned char           msr_saved_flags;
> > +   char                    name[20];
> > +   spinlock_t              uart_lock;
> > +   unsigned long           port_activity;
> > +};
> > +
> > +extern void omap_uart_idle_init(int num);
> > +extern char *saved_command_line;
> > +
> > +#endif /* __OMAP_SERIAL_H__ */
> > diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> > index 6553833..67a7129 100644
> > --- a/drivers/serial/Kconfig
> > +++ b/drivers/serial/Kconfig
> > @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM
> >       Currently, only 8250 compatible ports are supported, but
> >       others can easily be added.
> >
> > +config SERIAL_OMAP
> > +   bool "OMAP serial port support"
> > +   depends on ARM && ARCH_OMAP
> > +   select SERIAL_CORE
> > +   help
> > +   If you have a machine based on an Texas Instruments OMAP CPU you
> > +   can enable its onboard serial ports by enabling this option.
> > +
> > +config SERIAL_OMAP_CONSOLE
> > +   bool "Console on OMAP serial port"
> > +   depends on SERIAL_OMAP
> > +   select SERIAL_CORE_CONSOLE
> > +   help
> > +   If you have enabled the serial port on the Texas
> Instruments OMAP
> > +   CPU you can make it the console by answering Y to this option.
> > +
> > +   Even if you say Y here, the currently visible virtual console
> > +   (/dev/tty0) will still be used as the system console by
> default, but
> > +   you can alter that using a kernel command line option such as
> > +   "console=ttyS0". (Try "man bootparam" or see the
> documentation of
> > +   your boot loader (lilo or loadlin) about how to pass
> options to the
> > +   kernel at boot time.)
> > +
> > +config SERIAL_OMAP_DMA_UART1
> > +   bool "UART1 DMA support"
> > +   depends on SERIAL_OMAP
> > +   help
> > +   If you have enabled the serial port on the Texas
> Instruments OMAP
> > +   CPU you can enable the DMA transfer on UART 1 by answering
> > +   to this option.
> > +
> > +config SERIAL_OMAP_DMA_UART2
> > +   bool "UART2 DMA support"
> > +   depends on SERIAL_OMAP
> > +   help
> > +   If you have enabled the serial port on the Texas
> Instruments OMAP
> > +   CPU you can enable the DMA transfer on UART 2 by answering
> > +   to this option.
> > +
> > +config SERIAL_OMAP_DMA_UART3
> > +   bool "UART3 DMA support"
> > +   depends on SERIAL_OMAP
> > +   help
> > +   If you have enabled the serial port on the Texas
> Instruments OMAP
> > +   CPU you can enable the DMA transfer on UART 3 by answering
> > +   to this option.
> > +
> >  config SERIAL_OF_PLATFORM_NWPSERIAL
> >     tristate "NWP serial port driver"
> >     depends on PPC_OF && PPC_DCR
> > diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> > index d5a2998..db38f2c 100644
> > --- a/drivers/serial/Makefile
> > +++ b/drivers/serial/Makefile
> > @@ -79,3 +79,4 @@ obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
> >  obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o
> >  obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
> >  obj-$(CONFIG_SERIAL_TIMBERDALE)    += timbuart.o
> > +obj-$(CONFIG_SERIAL_OMAP) += omap-serial.o
> > diff --git a/drivers/serial/omap-serial.c
> b/drivers/serial/omap-serial.c
> > new file mode 100644
> > index 0000000..527642f
> > --- /dev/null
> > +++ b/drivers/serial/omap-serial.c
> > @@ -0,0 +1,1745 @@
> > +/*
> > + * drivers/serial/omap-serial.c
> > + *
> > + * Driver for OMAP3430 UART controller.
> > + *
> > + * Copyright (C) 2009 Texas Instruments.
> > + *
> > + * Authors:
> > + * Govindraj R     <govindraj.raja@ti.com>
> > + * Thara Gopinath  <thara@ti.com>
> > + *
> > + * PM Framework based on arch/arm/mach-omap2/serial.c
> > + * by Kevin Hilman.
> > + *
> > + * This file is licensed under the terms of the GNU
> General Public License
> > + * version 2. This program is licensed "as is" without any
> warranty of any
> > + * kind, whether express or implied.
> > + */
> > +
> > +#include <linux/module.h>
> > +#include <linux/init.h>
> > +#include <linux/console.h>
> > +#include <linux/serial_reg.h>
> > +#include <linux/delay.h>
> > +#include <linux/tty.h>
> > +#include <linux/tty_flip.h>
> > +#include <linux/io.h>
> > +#include <linux/dma-mapping.h>
> > +#include <linux/clk.h>
> > +
> > +#include <asm/irq.h>
> > +#include <mach/dma.h>
> > +#include <mach/dmtimer.h>
> > +#include <mach/omap-serial.h>
> > +
> > +static struct uart_omap_port *ui[OMAP_MAX_NR_PORTS];
> > +static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS];
> > +
> > +/* Forward declaration of functions */
> > +static void uart_tx_dma_callback(int lch, u16 ch_status,
> void *data);
> > +static void serial_omap_rx_timeout(unsigned long uart_no);
> > +static void serial_omap_start_rxdma(struct uart_omap_port *up);
> > +static int serial_omap_remove(struct platform_device *dev);
> > +
> > +static inline void omap_uart_block_sleep(int num);
> > +static void omap_uart_smart_idle_enable(int num, int enable);
> > +static inline void omap_uart_enable_clocks(int num);
> > +
> > +#ifdef DEBUG
> > +static void serial_omap_display_reg(struct uart_port *port);
> > +#endif
> > +
> > +int console_detect(char *str)
> > +{
> > +   char *next, *start = NULL;
> > +   int i;
> > +
> > +   i = strlen(CONSOLE_NAME);
> > +   next = saved_command_line;
> > +
> > +   while ((next = strchr(next, 'c')) != NULL) {
> > +           if (!strncmp(next, CONSOLE_NAME, i)) {
> > +                   start = next;
> > +                   break;
> > +           } else {
> > +                   next++;
> > +           }
> > +   }
> > +   if (!start)
> > +           return -EPERM;
> > +   i = 0;
> > +   start = strchr(start, '=') + 1;
> > +   while (*start != ',') {
> > +           str[i++] = *start++;
> > +           if (i > 6) {
> > +                   pr_err("%s : Invalid Console Name\n", __func__);
> > +                   return -EPERM;
> > +           }
> > +   }
> > +   str[i] = '\0';
> > +   return 0;
> > +}
> > +
> > +static inline unsigned int serial_in(struct uart_omap_port
> *up, int offset)
> > +{
> > +   offset <<= up->port.regshift;
> > +   if (up->pdev->id != 4)
> > +           return readb(up->port.membase + offset);
> > +   else
> > +           return readw(up->port.membase + offset);
> > +}
> > +
> > +static inline void serial_out(struct uart_omap_port *up,
> int offset, int value)
> > +{
> > +   offset <<= up->port.regshift;
> > +   if (up->pdev->id != 4)
> > +           writeb(value, up->port.membase + offset);
> > +   else
> > +           writew(value, up->port.membase + offset);
> > +}
> > +
> > +static inline void serial_omap_clear_fifos(struct
> uart_omap_port *port)
> > +{
> > +           struct uart_omap_port *up = (struct
> uart_omap_port *)port;
> > +           serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
> > +           serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
> > +                          UART_FCR_CLEAR_RCVR |
> UART_FCR_CLEAR_XMIT);
> > +           serial_out(up, UART_FCR, 0);
> > +}
> > +
> > +/*
> > + * We have written our own function to get the divisor so
> as to support
> > + * 13x mode.
> > + */
> > +static unsigned int
> > +serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
> > +{
> > +   unsigned int divisor;
> > +   if (baud > OMAP_MODE13X_SPEED && baud != 3000000)
> > +           divisor = 13;
> > +   else
> > +           divisor = 16;
> > +   return port->uartclk/(baud * divisor);
> > +}
> > +
> > +static void serial_omap_stop_rxdma(struct uart_omap_port *up)
> > +{
> > +   if (up->uart_dma.rx_dma_state) {
> > +           del_timer_sync(&up->uart_dma.rx_timer);
> > +           omap_stop_dma(up->uart_dma.rx_dma_channel);
> > +           omap_free_dma(up->uart_dma.rx_dma_channel);
> > +           up->uart_dma.rx_dma_channel = 0xFF;
> > +           up->uart_dma.rx_dma_state = 0x0;
> > +   }
> > +}
> > +
> > +static void serial_omap_enable_ms(struct uart_port *port)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +
> > +   dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n",
> up->pdev->id);
> > +   up->ier |= UART_IER_MSI;
> > +   serial_out(up, UART_IER, up->ier);
> > +}
> > +
> > +static void serial_omap_stop_tx(struct uart_port *port)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +   if (up->use_dma) {
> > +           if (up->uart_dma.tx_dma_channel != 0xFF) {
> > +                   /*
> > +                    * Check if dma is still active . If
> yes do nothing,
> > +                    * return. Else stop dma
> > +                    */
> > +                   int status = omap_readl(OMAP34XX_DMA4_BASE +
> > +
> OMAP_DMA4_CCR(up->uart_dma.tx_dma_channel));
> > +                   if (status & (1 << 7))
> > +                           return;
> > +                   omap_stop_dma(up->uart_dma.tx_dma_channel);
> > +                   omap_free_dma(up->uart_dma.tx_dma_channel);
> > +                   up->uart_dma.tx_dma_channel = 0xFF;
> > +           }
> > +   }
> > +
> > +   if (up->ier & UART_IER_THRI) {
> > +           up->ier &= ~UART_IER_THRI;
> > +           serial_out(up, UART_IER, up->ier);
> > +   }
> > +}
> > +
> > +static void serial_omap_stop_rx(struct uart_port *port)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +   serial_omap_stop_rxdma(up);
> > +   up->ier &= ~UART_IER_RLSI;
> > +   up->port.read_status_mask &= ~UART_LSR_DR;
> > +   serial_out(up, UART_IER, up->ier);
> > +
> > +}
> > +
> > +static inline void receive_chars(struct uart_omap_port
> *up, int *status)
> > +{
> > +   struct tty_struct *tty = up->port.info->port.tty;
> > +   unsigned int ch, flag;
> > +   int max_count = 256;
> > +
> > +   do {
> > +           ch = serial_in(up, UART_RX);
> > +           flag = TTY_NORMAL;
> > +           up->port.icount.rx++;
> > +
> > +           if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
> > +                                  UART_LSR_FE | UART_LSR_OE))) {
> > +                   /*
> > +                    * For statistics only
> > +                    */
> > +                   if (*status & UART_LSR_BI) {
> > +                           *status &= ~(UART_LSR_FE | UART_LSR_PE);
> > +                           up->port.icount.brk++;
> > +                           /*
> > +                            * We do the SysRQ and SAK checking
> > +                            * here because otherwise the break
> > +                            * may get masked by ignore_status_mask
> > +                            * or read_status_mask.
> > +                            */
> > +                           if (uart_handle_break(&up->port))
> > +                                   goto ignore_char;
> > +                   } else if (*status & UART_LSR_PE)
> > +                           up->port.icount.parity++;
> > +                   else if (*status & UART_LSR_FE)
> > +                           up->port.icount.frame++;
> > +                   if (*status & UART_LSR_OE)
> > +                           up->port.icount.overrun++;
> > +
> > +                   /*
> > +                    * Mask off conditions which should be ignored.
> > +                    */
> > +                   *status &= up->port.read_status_mask;
> > +
> > +#ifdef CONFIG_SERIAL_OMAP_CONSOLE
> > +                   if (up->port.line == up->port.cons->index) {
> > +                           /* Recover the break flag from
> console xmit */
> > +                           *status |= up->lsr_break_flag;
> > +                           up->lsr_break_flag = 0;
> > +                   }
> > +#endif
> > +                   if (*status & UART_LSR_BI)
> > +                           flag = TTY_BREAK;
> > +                   else if (*status & UART_LSR_PE)
> > +                           flag = TTY_PARITY;
> > +                   else if (*status & UART_LSR_FE)
> > +                           flag = TTY_FRAME;
> > +           }
> > +
> > +           if (uart_handle_sysrq_char(&up->port, ch))
> > +                   goto ignore_char;
> > +           uart_insert_char(&up->port, *status,
> UART_LSR_OE, ch, flag);
> > +ignore_char:
> > +           *status = serial_in(up, UART_LSR);
> > +   } while ((*status & UART_LSR_DR) && (max_count-- > 0));
> > +   tty_flip_buffer_push(tty);
> > +}
> > +
> > +static void transmit_chars(struct uart_omap_port *up)
> > +{
> > +   struct circ_buf *xmit = &up->port.info->xmit;
> > +   int count;
> > +
> > +   if (up->port.x_char) {
> > +           serial_out(up, UART_TX, up->port.x_char);
> > +           up->port.icount.tx++;
> > +           up->port.x_char = 0;
> > +           return;
> > +   }
> > +   if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
> > +           serial_omap_stop_tx(&up->port);
> > +           return;
> > +   }
> > +
> > +   count = up->port.fifosize / 4;
> > +   do {
> > +           serial_out(up, UART_TX, xmit->buf[xmit->tail]);
> > +           xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
> > +           up->port.icount.tx++;
> > +           if (uart_circ_empty(xmit))
> > +                   break;
> > +   } while (--count > 0);
> > +
> > +   if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
> > +           uart_write_wakeup(&up->port);
> > +
> > +   if (uart_circ_empty(xmit))
> > +           serial_omap_stop_tx(&up->port);
> > +}
> > +
> > +static void serial_omap_start_tx(struct uart_port *port)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +
> > +   if (up->use_dma && !(up->port.x_char)) {
> > +
> > +           struct circ_buf *xmit = &up->port.info->xmit;
> > +           unsigned int start = up->uart_dma.tx_buf_dma_phys +
> > +                                (xmit->tail &
> (UART_XMIT_SIZE - 1));
> > +           if (uart_circ_empty(xmit) || up->uart_dma.tx_dma_state)
> > +                   return;
> > +           spin_lock(&(up->uart_dma.tx_lock));
> > +           up->uart_dma.tx_dma_state = 1;
> > +           spin_unlock(&(up->uart_dma.tx_lock));
> > +
> > +           up->uart_dma.tx_buf_size =
> uart_circ_chars_pending(xmit);
> > +           /* It is a circular buffer. See if the buffer
> has wounded back.
> > +            * If yes it will have to be transferred in two
> separate dma
> > +            * transfers */
> > +           if (start + up->uart_dma.tx_buf_size >=
> > +                           up->uart_dma.tx_buf_dma_phys +
> UART_XMIT_SIZE)
> > +                   up->uart_dma.tx_buf_size =
> > +                           (up->uart_dma.tx_buf_dma_phys +
> > +                           UART_XMIT_SIZE) - start;
> > +
> > +           if (up->uart_dma.tx_dma_channel == 0xFF)
> > +                   omap_request_dma(up->uart_dma.uart_dma_tx,
> > +                                   "UART Tx DMA",
> > +                                   (void
> *)uart_tx_dma_callback, up,
> > +                                   &(up->uart_dma.tx_dma_channel));
> > +           omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
> > +                                    OMAP_DMA_AMODE_CONSTANT,
> > +                                    up->uart_dma.uart_base, 0, 0);
> > +           omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
> > +
> OMAP_DMA_AMODE_POST_INC, start, 0, 0);
> > +
> > +
> omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
> > +                                        OMAP_DMA_DATA_TYPE_S8,
> > +
> up->uart_dma.tx_buf_size, 1,
> > +                                        OMAP_DMA_SYNC_ELEMENT,
> > +
> up->uart_dma.uart_dma_tx, 0);
> > +
> > +           omap_start_dma(up->uart_dma.tx_dma_channel);
> > +
> > +   } else if (!(up->ier & UART_IER_THRI)) {
> > +           up->ier |= UART_IER_THRI;
> > +           serial_out(up, UART_IER, up->ier);
> > +   }
> > +}
> > +
> > +static unsigned int check_modem_status(struct uart_omap_port *up)
> > +{
> > +   int status;
> > +   status = serial_in(up, UART_MSR);
> > +
> > +   status |= up->msr_saved_flags;
> > +   up->msr_saved_flags = 0;
> > +
> > +   if ((status & UART_MSR_ANY_DELTA) == 0)
> > +           return status;
> > +   if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
> > +       up->port.info != NULL) {
> > +           if (status & UART_MSR_TERI)
> > +                   up->port.icount.rng++;
> > +           if (status & UART_MSR_DDSR)
> > +                   up->port.icount.dsr++;
> > +           if (status & UART_MSR_DDCD)
> > +                   uart_handle_dcd_change
> > +                           (&up->port, status & UART_MSR_DCD);
> > +           if (status & UART_MSR_DCTS)
> > +                   uart_handle_cts_change
> > +                           (&up->port, status & UART_MSR_CTS);
> > +           wake_up_interruptible(&up->port.info->delta_msr_wait);
> > +   }
> > +
> > +   return status;
> > +}
> > +
> > +/*
> > + * This handles the interrupt from one port.
> > + */
> > +static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
> > +{
> > +   struct uart_omap_port *up = dev_id;
> > +   unsigned int iir, lsr;
> > +
> > +   omap_uart_block_sleep(up->pdev->id - 1);
> > +
> > +   iir = serial_in(up, UART_IIR);
> > +   if (iir & UART_IIR_NO_INT)
> > +           return IRQ_NONE;
> > +
> > +   lsr = serial_in(up, UART_LSR);
> > +   if ((iir & 0x4) && up->use_dma) {
> > +           up->ier &= ~UART_IER_RDI;
> > +           serial_out(up, UART_IER, up->ier);
> > +           serial_omap_start_rxdma(up);
> > +   } else if (lsr & UART_LSR_DR) {
> > +           receive_chars(up, &lsr);
> > +   }
> > +   check_modem_status(up);
> > +   if ((lsr & UART_LSR_THRE) && (iir & 0x2))
> > +           transmit_chars(up);
> > +
> > +   up->port_activity = jiffies;
> > +   return IRQ_HANDLED;
> > +}
> > +
> > +static unsigned int serial_omap_tx_empty(struct uart_port *port)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +   unsigned long flags;
> > +   unsigned int ret;
> > +
> > +   dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n",
> up->pdev->id);
> > +   spin_lock_irqsave(&up->port.lock, flags);
> > +   ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ?
> TIOCSER_TEMT : 0;
> > +   spin_unlock_irqrestore(&up->port.lock, flags);
> > +
> > +   return ret;
> > +}
> > +
> > +static unsigned int serial_omap_get_mctrl(struct uart_port *port)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +   unsigned char status;
> > +   unsigned int ret;
> > +
> > +   status = check_modem_status(up);
> > +   dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n",
> up->pdev->id);
> > +
> > +   ret = 0;
> > +   if (status & UART_MSR_DCD)
> > +           ret |= TIOCM_CAR;
> > +   if (status & UART_MSR_RI)
> > +           ret |= TIOCM_RNG;
> > +   if (status & UART_MSR_DSR)
> > +           ret |= TIOCM_DSR;
> > +   if (status & UART_MSR_CTS)
> > +           ret |= TIOCM_CTS;
> > +   return ret;
> > +}
> > +
> > +static void serial_omap_set_mctrl(struct uart_port *port,
> unsigned int mctrl)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +   unsigned char mcr = 0;
> > +
> > +   dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n",
> up->pdev->id);
> > +   if (mctrl & TIOCM_RTS)
> > +           mcr |= UART_MCR_RTS;
> > +   if (mctrl & TIOCM_DTR)
> > +           mcr |= UART_MCR_DTR;
> > +   if (mctrl & TIOCM_OUT1)
> > +           mcr |= UART_MCR_OUT1;
> > +   if (mctrl & TIOCM_OUT2)
> > +           mcr |= UART_MCR_OUT2;
> > +   if (mctrl & TIOCM_LOOP)
> > +           mcr |= UART_MCR_LOOP;
> > +
> > +   mcr |= up->mcr;
> > +   serial_out(up, UART_MCR, mcr);
> > +}
> > +
> > +static void serial_omap_break_ctl(struct uart_port *port,
> int break_state)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +   unsigned long flags;
> > +
> > +   dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n",
> up->pdev->id);
> > +   spin_lock_irqsave(&up->port.lock, flags);
> > +   if (break_state == -1)
> > +           up->lcr |= UART_LCR_SBC;
> > +   else
> > +           up->lcr &= ~UART_LCR_SBC;
> > +   serial_out(up, UART_LCR, up->lcr);
> > +   spin_unlock_irqrestore(&up->port.lock, flags);
> > +}
> > +
> > +static int serial_omap_startup(struct uart_port *port)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +   unsigned long flags;
> > +   int irq_flags = 0;
> > +   int retval;
> > +
> > +   omap_uart_smart_idle_enable(up->pdev->id - 1, 0);
> > +
> > +   if (up->port.flags & UPF_SHARE_IRQ)
> > +           irq_flags |= IRQF_SHARED;
> > +
> > +   /*
> > +    * Allocate the IRQ
> > +    */
> > +   retval = request_irq(up->port.irq, serial_omap_irq, irq_flags,
> > +                           up->name, up);
> > +   if (retval)
> > +           return retval;
> > +
> > +   dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->pdev->id);
> > +
> > +   /*
> > +    * Clear the FIFO buffers and disable them.
> > +    * (they will be reenabled in set_termios())
> > +    */
> > +   serial_omap_clear_fifos(up);
> > +   /* For Hardware flow control */
> > +   serial_out(up, UART_MCR, 0x2);
> > +
> > +   /*
> > +    * Clear the interrupt registers.
> > +    */
> > +   (void) serial_in(up, UART_LSR);
> > +   (void) serial_in(up, UART_RX);
> > +   (void) serial_in(up, UART_IIR);
> > +   (void) serial_in(up, UART_MSR);
> > +
> > +   /*
> > +    * Now, initialize the UART
> > +    */
> > +   serial_out(up, UART_LCR, UART_LCR_WLEN8);
> > +   spin_lock_irqsave(&up->port.lock, flags);
> > +   if (up->port.flags & UPF_FOURPORT) {
> > +           if (!is_real_interrupt(up->port.irq))
> > +                   up->port.mctrl |= TIOCM_OUT1;
> > +   } else {
> > +           /*
> > +            * Most PC uarts need OUT2 raised to enable interrupts.
> > +            */
> > +           if (is_real_interrupt(up->port.irq))
> > +                   up->port.mctrl |= TIOCM_OUT2;
> > +   }
> > +   serial_omap_set_mctrl(&up->port, up->port.mctrl);
> > +   spin_unlock_irqrestore(&up->port.lock, flags);
> > +
> > +   up->msr_saved_flags = 0;
> > +
> > +   if (up->port.flags & UPF_FOURPORT) {
> > +           unsigned int icp;
> > +           /*
> > +            * Enable interrupts on the AST Fourport board
> > +            */
> > +           icp = (up->port.iobase & 0xfe0) | 0x01f;
> > +           outb_p(0x80, icp);
> > +           (void) inb_p(icp);
> > +   }
> > +
> > +   if (up->use_dma) {
> > +           if (!up->is_buf_dma_alloced) {
> > +                   free_page((unsigned
> long)up->port.info->xmit.buf);
> > +                   up->port.info->xmit.buf = NULL;
> > +                   up->port.info->xmit.buf =
> dma_alloc_coherent(NULL,
> > +                           UART_XMIT_SIZE,
> > +                           (dma_addr_t
> *)&(up->uart_dma.tx_buf_dma_phys),
> > +                           0);
> > +                   up->is_buf_dma_alloced = 1;
> > +           }
> > +           init_timer(&(up->uart_dma.rx_timer));
> > +           up->uart_dma.rx_timer.function = serial_omap_rx_timeout;
> > +           up->uart_dma.rx_timer.data = up->pdev->id;
> > +           /* Currently the buffer size is 4KB. Can increase it */
> > +           up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
> > +                   up->uart_dma.rx_buf_size,
> > +                   (dma_addr_t
> *)&(up->uart_dma.rx_buf_dma_phys), 0);
> > +   }
> > +
> > +   /*
> > +   * Finally, enable interrupts.  Note: Modem status interrupts
> > +   * are set via set_termios(), which will be occurring imminently
> > +   * anyway, so we don't enable them here.
> > +   */
> > +   up->ier = UART_IER_RLSI | UART_IER_RDI;
> > +   serial_out(up, UART_IER, up->ier);
> > +
> > +   up->port_activity = jiffies;
> > +   return 0;
> > +}
> > +
> > +static void serial_omap_shutdown(struct uart_port *port)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +   unsigned long flags;
> > +
> > +   dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n",
> up->pdev->id);
> > +   /*
> > +    * Disable interrupts from this port
> > +    */
> > +   up->ier = 0;
> > +   serial_out(up, UART_IER, 0);
> > +
> > +   spin_lock_irqsave(&up->port.lock, flags);
> > +   if (up->port.flags & UPF_FOURPORT) {
> > +           /* reset interrupts on the AST Fourport board */
> > +           inb((up->port.iobase & 0xfe0) | 0x1f);
> > +           up->port.mctrl |= TIOCM_OUT1;
> > +   } else
> > +           up->port.mctrl &= ~TIOCM_OUT2;
> > +   serial_omap_set_mctrl(&up->port, up->port.mctrl);
> > +   spin_unlock_irqrestore(&up->port.lock, flags);
> > +
> > +   /*
> > +    * Disable break condition and FIFOs
> > +    */
> > +   serial_out(up, UART_LCR, serial_in(up, UART_LCR) &
> ~UART_LCR_SBC);
> > +   serial_omap_clear_fifos(up);
> > +
> > +   /*
> > +    * Read data port to reset things, and then free the irq
> > +    */
> > +   (void) serial_in(up, UART_RX);
> > +   if (up->use_dma) {
> > +           int tmp;
> > +           if (up->is_buf_dma_alloced) {
> > +                   dma_free_coherent(up->port.dev,
> > +                             UART_XMIT_SIZE,
> > +                             up->port.info->xmit.buf,
> > +                             up->uart_dma.tx_buf_dma_phys);
> > +                   up->port.info->xmit.buf = NULL;
> > +                   up->is_buf_dma_alloced = 0;
> > +           }
> > +           serial_omap_stop_rx(port);
> > +           dma_free_coherent(up->port.dev,
> > +                             up->uart_dma.rx_buf_size,
> > +                             up->uart_dma.rx_buf,
> > +                             up->uart_dma.rx_buf_dma_phys);
> > +           up->uart_dma.rx_buf = NULL;
> > +           tmp = serial_in(up, UART_OMAP_SYSC) & 0x7;
> > +           serial_out(up, UART_OMAP_SYSC, tmp); /* force-idle */
> > +   }
> > +
> > +   free_irq(up->port.irq, up);
> > +}
> > +
> > +static inline void
> > +serial_omap_configure_xonxoff
> > +           (struct uart_omap_port *up, struct ktermios *termios)
> > +{
> > +   unsigned char efr = 0;
> > +
> > +   up->lcr = serial_in(up, UART_LCR);
> > +   serial_out(up, UART_LCR, 0xbf);
> > +   up->efr = serial_in(up, UART_EFR);
> > +   serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB);
> > +
> > +   serial_out(up, UART_XON1, termios->c_cc[VSTART]);
> > +   serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
> > +
> > +   /* IXON Flag:
> > +    * Enable XON/XOFF flow control on output.
> > +    * Transmit XON1, XOFF1
> > +    */
> > +   if (termios->c_iflag & IXON)
> > +           efr |= 0x01 << 3;
> > +
> > +   /* IXOFF Flag:
> > +    * Enable XON/XOFF flow control on input.
> > +    * Receiver compares XON1, XOFF1.
> > +    */
> > +   if (termios->c_iflag & IXOFF)
> > +           efr |= 0x01 << 1;
> > +
> > +   serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
> > +   serial_out(up, UART_LCR, 0x80);
> > +
> > +   up->mcr = serial_in(up, UART_MCR);
> > +
> > +   /* IXANY Flag:
> > +    * Enable any character to restart output.
> > +    * Operation resumes after receiving any
> > +    * character after recognition of the XOFF character
> > +    */
> > +   if (termios->c_iflag & IXANY)
> > +           up->mcr |= 1<<5;
> > +
> > +   serial_out(up, UART_MCR, up->mcr | 1<<6);
> > +
> > +   serial_out(up, UART_LCR, 0xbf);
> > +   serial_out(up, UART_TI752_TCR, 0x0f);
> > +   /* Enable special char function UARTi.EFR_REG[5] and
> > +    * load the new software flow control mode IXON or IXOFF
> > +    * and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
> > +    */
> > +   serial_out(up, UART_EFR, up->efr | efr | 1<<5);
> > +   serial_out(up, UART_LCR, 0x80);
> > +
> > +   serial_out(up, UART_MCR, up->mcr & ~(1<<6));
> > +   serial_out(up, UART_LCR, up->lcr);
> > +}
> > +
> > +static void
> > +serial_omap_set_termios(struct uart_port *port, struct
> ktermios *termios,
> > +                   struct ktermios *old)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +   unsigned char cval;
> > +   unsigned char efr = 0;
> > +   unsigned long flags;
> > +   unsigned int baud, quot;
> > +
> > +   switch (termios->c_cflag & CSIZE) {
> > +   case CS5:
> > +           cval = UART_LCR_WLEN5;
> > +           break;
> > +   case CS6:
> > +           cval = UART_LCR_WLEN6;
> > +           break;
> > +   case CS7:
> > +           cval = UART_LCR_WLEN7;
> > +           break;
> > +   default:
> > +   case CS8:
> > +           cval = UART_LCR_WLEN8;
> > +           break;
> > +   }
> > +
> > +   if (termios->c_cflag & CSTOPB)
> > +           cval |= UART_LCR_STOP;
> > +   if (termios->c_cflag & PARENB)
> > +           cval |= UART_LCR_PARITY;
> > +   if (!(termios->c_cflag & PARODD))
> > +           cval |= UART_LCR_EPAR;
> > +
> > +   /*
> > +    * Ask the core to calculate the divisor for us.
> > +    */
> > +
> > +   baud = uart_get_baud_rate(port, termios, old, 0,
> port->uartclk/13);
> > +   quot = serial_omap_get_divisor(port, baud);
> > +
> > +   if (up->use_dma)
> > +           up->fcr = UART_FCR_ENABLE_FIFO
> > +                                   | 0x1 << 6 | 0x1 << 4
> > +                                   | UART_FCR_DMA_SELECT;
> > +   else
> > +           up->fcr = UART_FCR_ENABLE_FIFO
> > +                                   | 0x1 << 6 | 0x1 << 4;
> > +
> > +   /*
> > +    * Ok, we're now changing the port state.  Do it with
> > +    * interrupts disabled.
> > +    */
> > +   spin_lock_irqsave(&up->port.lock, flags);
> > +
> > +   /*
> > +    * Update the per-port timeout.
> > +    */
> > +   uart_update_timeout(port, termios->c_cflag, baud);
> > +
> > +   up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE
> | UART_LSR_DR;
> > +   if (termios->c_iflag & INPCK)
> > +           up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
> > +   if (termios->c_iflag & (BRKINT | PARMRK))
> > +           up->port.read_status_mask |= UART_LSR_BI;
> > +
> > +   /*
> > +    * Characters to ignore
> > +    */
> > +   up->port.ignore_status_mask = 0;
> > +   if (termios->c_iflag & IGNPAR)
> > +           up->port.ignore_status_mask |= UART_LSR_PE |
> UART_LSR_FE;
> > +   if (termios->c_iflag & IGNBRK) {
> > +           up->port.ignore_status_mask |= UART_LSR_BI;
> > +           /*
> > +            * If we're ignoring parity and break indicators,
> > +            * ignore overruns too (for real raw support).
> > +            */
> > +           if (termios->c_iflag & IGNPAR)
> > +                   up->port.ignore_status_mask |= UART_LSR_OE;
> > +   }
> > +
> > +   /*
> > +    * ignore all characters if CREAD is not set
> > +    */
> > +   if ((termios->c_cflag & CREAD) == 0)
> > +           up->port.ignore_status_mask |= UART_LSR_DR;
> > +
> > +   /*
> > +    * Modem status interrupts
> > +    */
> > +   up->ier &= ~UART_IER_MSI;
> > +   if (UART_ENABLE_MS(&up->port, termios->c_cflag))
> > +           up->ier |= UART_IER_MSI;
> > +   serial_out(up, UART_IER, up->ier);
> > +   serial_out(up, UART_LCR, cval);         /* reset DLAB */
> > +
> > +   /*-----------FIFOs and DMA Settings -----------*/
> > +   serial_out(up, UART_LCR, UART_LCR_DLAB);
> > +   serial_out(up, UART_DLL, 0);
> > +   serial_out(up, UART_DLM, 0);
> > +   serial_out(up, UART_LCR, 0);
> > +
> > +   serial_out(up, UART_LCR, 0xbf);
> > +
> > +   up->efr = serial_in(up, UART_EFR);
> > +   serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
> > +   serial_out(up, UART_LCR, 0x0);                  /* Access FCR */
> > +
> > +   up->mcr = serial_in(up, UART_MCR);
> > +   serial_out(up, UART_MCR, up->mcr | 0x40);        /* Access TLR*/
> > +   /* FIFO ENABLE, DMA MODE */
> > +   serial_out(up, UART_FCR, up->fcr);
> > +   serial_out(up, UART_LCR, 0xbf);                 /* Access EFR */
> > +
> > +   if (up->use_dma) {
> > +           serial_out(up, UART_TI752_TLR, 0x00);
> > +           serial_out(up, UART_OMAP_SCR, ((1 << 6) | (1 << 7)));
> > +   }
> > +
> > +   serial_out(up, UART_EFR, up->efr);
> > +   serial_out(up, UART_LCR, 0x80);
> > +   serial_out(up, UART_MCR, up->mcr);        /* Restore TLR */
> > +
> > +   /*-----Protocol, Baud Rate, and Interrupt Settings -- */
> > +
> > +   serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_DISABLE);
> > +
> > +   serial_out(up, UART_LCR, 0xbf); /* Access EFR */
> > +
> > +   up->efr = serial_in(up, UART_EFR);
> > +   serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
> > +
> > +   serial_out(up, UART_LCR, 0);
> > +   serial_out(up, UART_IER, 0);
> > +   serial_out(up, UART_LCR, 0xbf);
> > +
> > +   serial_out(up, UART_DLL, quot & 0xff);          /* LS
> of divisor */
> > +   serial_out(up, UART_DLM, quot >> 8);            /* MS
> of divisor */
> > +
> > +   serial_out(up, UART_LCR, 0);
> > +   serial_out(up, UART_IER, up->ier);
> > +   serial_out(up, UART_LCR, 0xbf); /* Access EFR */
> > +
> > +   serial_out(up, UART_EFR, up->efr);
> > +   serial_out(up, UART_LCR, cval);
> > +
> > +   if (baud > 230400 && baud != 3000000)
> > +           serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE13X);
> > +   else
> > +           serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE16X);
> > +
> > +   /* Hardware Flow Control Configuration */
> > +
> > +   if (termios->c_cflag & CRTSCTS) {
> > +           efr |= (UART_EFR_CTS | UART_EFR_RTS);
> > +           serial_out(up, UART_LCR, 0x80);
> > +
> > +           up->mcr = serial_in(up, UART_MCR);
> > +           serial_out(up, UART_MCR, up->mcr | 0x40);
> > +
> > +           serial_out(up, UART_LCR, 0xbf); /* Access EFR */
> > +
> > +           up->efr = serial_in(up, UART_EFR);
> > +           serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
> > +
> > +           serial_out(up, UART_TI752_TCR, 0x0f);
> > +           serial_out(up, UART_EFR, efr); /* Enable
> AUTORTS and AUTOCTS */
> > +           serial_out(up, UART_LCR, 0x80);
> > +           serial_out(up, UART_MCR, up->mcr | 0x02);
> > +           serial_out(up, UART_LCR, cval);
> > +   }
> > +
> > +   serial_omap_set_mctrl(&up->port, up->port.mctrl);
> > +   /* ----Software Flow Control Configuration----- */
> > +   if (termios->c_iflag & (IXON | IXOFF))
> > +           serial_omap_configure_xonxoff(up, termios);
> > +
> > +   spin_unlock_irqrestore(&up->port.lock, flags);
> > +   dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n",
> up->pdev->id);
> > +
> > +#ifdef DEBUG
> > +   serial_omap_display_reg(port);
> > +#endif
> > +}
> > +
> > +static void
> > +serial_omap_pm(struct uart_port *port, unsigned int state,
> > +          unsigned int oldstate)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +   unsigned char efr;
> > +   dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
> > +   efr = serial_in(up, UART_EFR);
> > +   serial_out(up, UART_LCR, 0xBF);
> > +   serial_out(up, UART_EFR, efr | UART_EFR_ECB);
> > +   serial_out(up, UART_LCR, 0);
> > +
> > +   serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
> > +   serial_out(up, UART_LCR, 0xBF);
> > +   serial_out(up, UART_EFR, efr);
> > +   serial_out(up, UART_LCR, 0);
> > +}
> > +
> > +static void serial_omap_release_port(struct uart_port *port)
> > +{
> > +   dev_dbg(port->dev, "serial_omap_release_port+\n");
> > +}
> > +
> > +static int serial_omap_request_port(struct uart_port *port)
> > +{
> > +   dev_dbg(port->dev, "serial_omap_request_port+\n");
> > +   return 0;
> > +}
> > +
> > +static void serial_omap_config_port(struct uart_port
> *port, int flags)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +
> > +   dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
> > +                                                   up->pdev->id);
> > +   up->port.type = PORT_OMAP;
> > +}
> > +
> > +static int
> > +serial_omap_verify_port(struct uart_port *port, struct
> serial_struct *ser)
> > +{
> > +   /* we don't want the core code to modify any port params */
> > +   dev_dbg(port->dev, "serial_omap_verify_port+\n");
> > +   return -EINVAL;
> > +}
> > +
> > +static const char *
> > +serial_omap_type(struct uart_port *port)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +
> > +   dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->pdev->id);
> > +   return up->name;
> > +}
> > +
> > +#ifdef CONFIG_SERIAL_OMAP_CONSOLE
> > +
> > +static struct uart_omap_port *serial_omap_console_ports[4];
> > +
> > +static struct uart_driver serial_omap_reg;
> > +
> > +#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
> > +
> > +/*
> > + * Wait for transmitter & holding register to empty
> > + */
> > +static inline void wait_for_xmitr(struct uart_omap_port *up)
> > +{
> > +   unsigned int status, tmout = 10000;
> > +
> > +   /* Wait up to 10ms for the character(s) to be sent. */
> > +   do {
> > +           status = serial_in(up, UART_LSR);
> > +
> > +           if (status & UART_LSR_BI)
> > +                   up->lsr_break_flag = UART_LSR_BI;
> > +
> > +           if (--tmout == 0)
> > +                   break;
> > +           udelay(1);
> > +   } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
> > +
> > +   /* Wait up to 1s for flow control if necessary */
> > +   if (up->port.flags & UPF_CONS_FLOW) {
> > +           tmout = 1000000;
> > +           for (tmout = 1000000; tmout; tmout--) {
> > +                   unsigned int msr = serial_in(up, UART_MSR);
> > +                   up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
> > +                   if (msr & UART_MSR_CTS)
> > +                           break;
> > +                   udelay(1);
> > +           }
> > +   }
> > +}
> > +
> > +static void serial_omap_console_putchar(struct uart_port
> *port, int ch)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +
> > +   wait_for_xmitr(up);
> > +   serial_out(up, UART_TX, ch);
> > +}
> > +
> > +/*
> > + * Print a string to the serial port trying not to disturb
> > + * any possible real use of the port...
> > + *
> > + * The console_lock must be held when we get here.
> > + */
> > +static void
> > +serial_omap_console_write(struct console *co, const char *s,
> > +           unsigned int count)
> > +{
> > +   struct uart_omap_port *up =
> serial_omap_console_ports[co->index];
> > +   unsigned int ier;
> > +
> > +   /*
> > +    *      First save the IER then disable the interrupts
> > +    */
> > +   ier = serial_in(up, UART_IER);
> > +   serial_out(up, UART_IER, 0);
> > +
> > +   uart_console_write(&up->port, s, count,
> serial_omap_console_putchar);
> > +
> > +   /*
> > +    *      Finally, wait for transmitter to become empty
> > +    *      and restore the IER
> > +    */
> > +   wait_for_xmitr(up);
> > +   serial_out(up, UART_IER, ier);
> > +   /*
> > +    *      The receive handling will happen properly because the
> > +    *      receive ready bit will still be set; it is not cleared
> > +    *      on read.  However, modem control will not, we must
> > +    *      call it if we have saved something in the saved flags
> > +    *      while processing with interrupts off.
> > +    */
> > +   if (up->msr_saved_flags)
> > +           check_modem_status(up);
> > +}
> > +
> > +static int __init
> > +serial_omap_console_setup(struct console *co, char *options)
> > +{
> > +   struct uart_omap_port *up;
> > +   int baud = 9600;
> > +   int bits = 8;
> > +   int parity = 'n';
> > +   int flow = 'n';
> > +   int r;
> > +
> > +   if (serial_omap_console_ports[co->index] == NULL)
> > +           return -ENODEV;
> > +   up = serial_omap_console_ports[co->index];
> > +
> > +   if (options)
> > +           uart_parse_options(options, &baud, &parity,
> &bits, &flow);
> > +
> > +   r = uart_set_options(&up->port, co, baud, parity, bits, flow);
> > +
> > +   return r;
> > +}
> > +
> > +static struct console serial_omap_console = {
> > +   .name           = DEVICE_NAME,
> > +   .write          = serial_omap_console_write,
> > +   .device         = uart_console_device,
> > +   .setup          = serial_omap_console_setup,
> > +   .flags          = CON_PRINTBUFFER,
> > +   .index          = -1,
> > +   .data           = &serial_omap_reg,
> > +};
> > +
> > +static void serial_omap_add_console_port(struct uart_omap_port *up)
> > +{
> > +   serial_omap_console_ports[up->pdev->id - 1] = up;
> > +}
> > +
> > +#define OMAP_CONSOLE       (&serial_omap_console)
> > +
> > +#else
> > +
> > +#define OMAP_CONSOLE       NULL
> > +
> > +static inline void serial_omap_add_console_port(struct
> uart_omap_port *up) {}
> > +
> > +#endif
> > +
> > +struct uart_ops serial_omap_pops = {
> > +   .tx_empty       = serial_omap_tx_empty,
> > +   .set_mctrl      = serial_omap_set_mctrl,
> > +   .get_mctrl      = serial_omap_get_mctrl,
> > +   .stop_tx        = serial_omap_stop_tx,
> > +   .start_tx       = serial_omap_start_tx,
> > +   .stop_rx        = serial_omap_stop_rx,
> > +   .enable_ms      = serial_omap_enable_ms,
> > +   .break_ctl      = serial_omap_break_ctl,
> > +   .startup        = serial_omap_startup,
> > +   .shutdown       = serial_omap_shutdown,
> > +   .set_termios    = serial_omap_set_termios,
> > +   .pm             = serial_omap_pm,
> > +   .type           = serial_omap_type,
> > +   .release_port   = serial_omap_release_port,
> > +   .request_port   = serial_omap_request_port,
> > +   .config_port    = serial_omap_config_port,
> > +   .verify_port    = serial_omap_verify_port,
> > +};
> > +
> > +static struct uart_driver serial_omap_reg = {
> > +   .owner          = THIS_MODULE,
> > +   .driver_name    = "OMAP-SERIAL",
> > +   .dev_name       = DEVICE_NAME,
> > +   .major          = TTY_MAJOR,
> > +   .minor          = 64,
> > +   .nr             = OMAP_MAX_NR_PORTS,
> > +   .cons           = OMAP_CONSOLE,
> > +};
> > +
> > +static
> > +int serial_omap_suspend(struct platform_device *pdev,
> pm_message_t state)
> > +{
> > +   struct uart_omap_port *up = platform_get_drvdata(pdev);
> > +
> > +   if (up)
> > +           uart_suspend_port(&serial_omap_reg, &up->port);
> > +   return 0;
> > +}
> > +
> > +static int serial_omap_resume(struct platform_device *dev)
> > +{
> > +   struct uart_omap_port *up = platform_get_drvdata(dev);
> > +   if (up)
> > +           uart_resume_port(&serial_omap_reg, &up->port);
> > +   return 0;
> > +}
> > +
> > +static void serial_omap_rx_timeout(unsigned long uart_no)
> > +{
> > +   struct uart_omap_port *up = ui[uart_no - 1];
> > +   unsigned int curr_dma_pos;
> > +   curr_dma_pos = omap_readl(OMAP34XX_DMA4_BASE +
> > +
> OMAP_DMA4_CDAC(up->uart_dma.rx_dma_channel));
> > +   if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
> > +                        (curr_dma_pos == 0)) {
> > +           if (jiffies_to_msecs(jiffies - up->port_activity) <
> > +
> RX_TIMEOUT) {
> > +                   mod_timer(&up->uart_dma.rx_timer, jiffies +
> > +
> usecs_to_jiffies(up->uart_dma.rx_timeout));
> > +           } else {
> > +                   serial_omap_stop_rxdma(up);
> > +                   up->ier |= UART_IER_RDI;
> > +                   serial_out(up, UART_IER, up->ier);
> > +           }
> > +           return;
> > +   } else {
> > +           unsigned int curr_transmitted_size = curr_dma_pos -
> > +
> up->uart_dma.prev_rx_dma_pos;
> > +           up->port.icount.rx += curr_transmitted_size;
> > +           tty_insert_flip_string(up->port.info->port.tty,
> > +                           up->uart_dma.rx_buf +
> > +                           (up->uart_dma.prev_rx_dma_pos -
> > +                           up->uart_dma.rx_buf_dma_phys),
> > +                           curr_transmitted_size);
> > +           tty_flip_buffer_push(up->port.info->port.tty);
> > +           up->uart_dma.prev_rx_dma_pos = curr_dma_pos;
> > +           if (up->uart_dma.rx_buf_size +
> > +                           up->uart_dma.rx_buf_dma_phys ==
> curr_dma_pos)
> > +                   serial_omap_start_rxdma(up);
> > +           else
> > +                   mod_timer(&up->uart_dma.rx_timer, jiffies +
> > +
> usecs_to_jiffies(up->uart_dma.rx_timeout));
> > +           up->port_activity = jiffies;
> > +   }
> > +}
> > +
> > +static void uart_rx_dma_callback(int lch, u16 ch_status,
> void *data)
> > +{
> > +   return;
> > +}
> > +
> > +static void serial_omap_start_rxdma(struct uart_omap_port *up)
> > +{
> > +   if (up->uart_dma.rx_dma_channel == 0xFF) {
> > +           omap_request_dma(up->uart_dma.uart_dma_rx,
> "UART Rx DMA",
> > +                   (void *)uart_rx_dma_callback, up,
> > +                           &(up->uart_dma.rx_dma_channel));
> > +
> > +           omap_set_dma_src_params(up->uart_dma.rx_dma_channel, 0,
> > +                           OMAP_DMA_AMODE_CONSTANT,
> > +                           up->uart_dma.uart_base, 0, 0);
> > +           omap_set_dma_dest_params(up->uart_dma.rx_dma_channel, 0,
> > +                           OMAP_DMA_AMODE_POST_INC,
> > +                           up->uart_dma.rx_buf_dma_phys, 0, 0);
> > +
> omap_set_dma_transfer_params(up->uart_dma.rx_dma_channel,
> > +                           OMAP_DMA_DATA_TYPE_S8,
> > +                           up->uart_dma.rx_buf_size, 1,
> > +                           OMAP_DMA_SYNC_ELEMENT,
> > +                           up->uart_dma.uart_dma_rx, 0);
> > +   }
> > +   up->uart_dma.prev_rx_dma_pos = up->uart_dma.rx_buf_dma_phys;
> > +   omap_writel(0, OMAP34XX_DMA4_BASE
> > +                   + OMAP_DMA4_CDAC(up->uart_dma.rx_dma_channel));
> > +   omap_start_dma(up->uart_dma.rx_dma_channel);
> > +   mod_timer(&up->uart_dma.rx_timer, jiffies +
> > +
> usecs_to_jiffies(up->uart_dma.rx_timeout));
> > +   up->uart_dma.rx_dma_state = 1;
> > +}
> > +
> > +static void serial_omap_continue_tx(struct uart_omap_port *up)
> > +{
> > +   struct circ_buf *xmit = &up->port.info->xmit;
> > +   int start = up->uart_dma.tx_buf_dma_phys
> > +                   + (xmit->tail & (UART_XMIT_SIZE - 1));
> > +   if (uart_circ_empty(xmit))
> > +           return;
> > +
> > +   up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
> > +   /* It is a circular buffer. See if the buffer has wounded back.
> > +    * If yes it will have to be transferred in two separate dma
> > +    * transfers
> > +    */
> > +   if (start + up->uart_dma.tx_buf_size >=
> > +                   up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
> > +           up->uart_dma.tx_buf_size =
> > +                   (up->uart_dma.tx_buf_dma_phys +
> UART_XMIT_SIZE) - start;
> > +   omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
> > +                            OMAP_DMA_AMODE_CONSTANT,
> > +                            up->uart_dma.uart_base, 0, 0);
> > +   omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
> > +           OMAP_DMA_AMODE_POST_INC, start, 0, 0);
> > +
> > +   omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
> > +                                OMAP_DMA_DATA_TYPE_S8,
> > +                                up->uart_dma.tx_buf_size, 1,
> > +                                OMAP_DMA_SYNC_ELEMENT,
> > +                                up->uart_dma.uart_dma_tx, 0);
> > +
> > +   omap_start_dma(up->uart_dma.tx_dma_channel);
> > +}
> > +
> > +static void uart_tx_dma_callback(int lch, u16 ch_status,
> void *data)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)data;
> > +   struct circ_buf *xmit = &up->port.info->xmit;
> > +   xmit->tail = (xmit->tail + up->uart_dma.tx_buf_size) & \
> > +                   (UART_XMIT_SIZE - 1);
> > +   up->port.icount.tx += up->uart_dma.tx_buf_size;
> > +
> > +   if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
> > +           uart_write_wakeup(&up->port);
> > +
> > +   if (uart_circ_empty(xmit)) {
> > +           spin_lock(&(up->uart_dma.tx_lock));
> > +           serial_omap_stop_tx(&up->port);
> > +           up->uart_dma.tx_dma_state = 0;
> > +           spin_unlock(&(up->uart_dma.tx_lock));
> > +   } else {
> > +           omap_stop_dma(up->uart_dma.tx_dma_channel);
> > +           serial_omap_continue_tx(up);
> > +   }
> > +   up->port_activity = jiffies;
> > +   return;
> > +}
> > +
> > +static int serial_omap_probe(struct platform_device *pdev)
> > +{
> > +   struct uart_omap_port   *up;
> > +   struct resource         *mem, *irq, *dma_tx, *dma_rx;
> > +   struct uart_dma_info *up_dma = pdev->dev.platform_data;
> > +   int ret = -ENOSPC;
> > +   char str[7];
> > +
> > +   mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +   if (!mem) {
> > +           dev_err(&pdev->dev, "no mem resource?\n");
> > +           return -ENODEV;
> > +   }
> > +   irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> > +   if (!irq) {
> > +           dev_err(&pdev->dev, "no irq resource?\n");
> > +           return -ENODEV;
> > +   }
> > +
> > +   ret = (int) request_mem_region(mem->start, (mem->end -
> mem->start) + 1,
> > +                                pdev->dev.driver->name);
> > +   if (!ret) {
> > +           dev_err(&pdev->dev, "memory region already claimed\n");
> > +           return -EBUSY;
> > +   }
> > +
> > +   dma_tx = platform_get_resource(pdev, IORESOURCE_DMA, 0);
> > +   if (!dma_tx) {
> > +           ret = -EINVAL;
> > +           goto err;
> > +   }
> > +
> > +   dma_rx = platform_get_resource(pdev, IORESOURCE_DMA, 1);
> > +   if (!dma_rx) {
> > +           ret = -EINVAL;
> > +           goto err;
> > +   }
> > +
> > +   up = kzalloc(sizeof(*up), GFP_KERNEL);
> > +   if (up == NULL) {
> > +           ret = -ENOMEM;
> > +           goto do_release_region;
> > +   }
> > +   sprintf(up->name, "OMAP UART%d", pdev->id);
> > +   up->pdev = pdev;
> > +   up->port.dev = &pdev->dev;
> > +   up->port.type = PORT_OMAP;
> > +   up->port.iotype = UPIO_MEM;
> > +   up->port.mapbase = mem->start;
> > +   up->port.irq = irq->start;
> > +
> > +   up->uart_dma.uart_dma_tx = dma_tx->start;
> > +   up->uart_dma.uart_dma_rx = dma_rx->start;
> > +   up->uart_dma.uart_base = mem->start;
> > +
> > +   up->port.fifosize = 64;
> > +   up->port.ops = &serial_omap_pops;
> > +   up->port.line = pdev->id - 1;
> > +   if ((pdev->id - 1) == QUART) {
> > +           up->port.membase = ioremap_nocache(mem->start,
> 0x16 << 1);
> > +           up->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
> > +           up->port.uartclk = QUART_CLK;
> > +           up->port.regshift = 1;
> > +   } else {
> > +           up->port.membase = (void *)
> OMAP2_IO_ADDRESS(mem->start);
> > +           up->port.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
> > +           up->port.uartclk = UART_CLK;
> > +           up->port.regshift = 2;
> > +   }
> > +
> > +   if (up_dma->dma_enabled) {
> > +           up->use_dma = 1;
> > +           up->uart_dma.rx_buf_size = up_dma->rx_dma_bufsize;
> > +           up->uart_dma.rx_timeout = up_dma->rx_timeout;
> > +   }
> > +
> > +   if (up->use_dma) {
> > +           spin_lock_init(&(up->uart_dma.tx_lock));
> > +           spin_lock_init(&(up->uart_dma.rx_lock));
> > +           up->uart_dma.tx_dma_channel = 0xFF;
> > +           up->uart_dma.rx_dma_channel = 0xFF;
> > +   }
> > +   if (console_detect(str)) {
> > +           pr_err("\n %s: Invalid console paramter...\n",
> __func__);
> > +           pr_err("\n %s: UART Driver Init Failed!\n", __func__);
> > +           return -EPERM;
> > +   }
> > +   ui[pdev->id - 1] = up;
> > +   serial_omap_add_console_port(up);
> > +
> > +   ret = uart_add_one_port(&serial_omap_reg, &up->port);
> > +   if (ret != 0)
> > +           goto do_release_region;
> > +
> > +   platform_set_drvdata(pdev, up);
> > +   return 0;
> > +err:
> > +   dev_err(&pdev->dev, "[UART%d]: failure [%s]\n",
> > +                                   pdev->id, __func__);
> > +do_release_region:
> > +   release_mem_region(mem->start, (mem->end - mem->start) + 1);
> > +   return ret;
> > +}
> > +
> > +static int serial_omap_remove(struct platform_device *dev)
> > +{
> > +   struct uart_omap_port *up = platform_get_drvdata(dev);
> > +   platform_set_drvdata(dev, NULL);
> > +   if (up) {
> > +           uart_remove_one_port(&serial_omap_reg, &up->port);
> > +           kfree(up);
> > +   }
> > +   return 0;
> > +}
> > +
> > +static struct platform_driver serial_omap_driver = {
> > +   .probe          = serial_omap_probe,
> > +   .remove         = serial_omap_remove,
> > +
> > +   .suspend        = serial_omap_suspend,
> > +   .resume         = serial_omap_resume,
> > +   .driver         = {
> > +           .name   = "omap-uart",
> > +   },
> > +};
> > +
> > +int __init serial_omap_init(void)
> > +{
> > +   int ret;
> > +
> > +   ret = uart_register_driver(&serial_omap_reg);
> > +   if (ret != 0)
> > +           return ret;
> > +   ret = platform_driver_register(&serial_omap_driver);
> > +   if (ret != 0)
> > +           uart_unregister_driver(&serial_omap_reg);
> > +   return ret;
> > +}
> > +
> > +void __exit serial_omap_exit(void)
> > +{
> > +   platform_driver_unregister(&serial_omap_driver);
> > +   uart_unregister_driver(&serial_omap_reg);
> > +}
> > +
> > +#ifdef CONFIG_PM
> > +static void omap_uart_save_context(int num)
> > +{
> > +   struct omap_uart_state *uart = &omap_uart[num];
> > +   struct uart_omap_port *up = ui[num];
> > +
> > +   u16 lcr = 0;
> > +   lcr = serial_in(up, UART_LCR);
> > +   serial_out(up, UART_LCR, 0xBF);
> > +   uart->dll = serial_in(up, UART_DLL);
> > +   uart->dlh = serial_in(up, UART_DLM);
> > +   serial_out(up, UART_LCR, lcr);
> > +   uart->ier = serial_in(up, UART_IER);
> > +   uart->sysc = serial_in(up, UART_OMAP_SYSC);
> > +   uart->scr = serial_in(up, UART_OMAP_SCR);
> > +   uart->wer = serial_in(up, UART_OMAP_WER);
> > +
> > +   uart->context_valid = 1;
> > +}
> > +
> > +static void omap_uart_restore_context(int num)
> > +{
> > +   struct omap_uart_state *uart = &omap_uart[num];
> > +   struct uart_omap_port *up = ui[num];
> > +   u16 efr = 0;
> > +
> > +   if (!uart->context_valid)
> > +            return;
> > +
> > +   uart->context_valid = 0;
> > +
> > +   serial_out(up, UART_OMAP_MDR1, 0x7);
> > +   serial_out(up, UART_LCR, 0xBF); /* Config B mode */
> > +   efr = serial_in(up, UART_EFR);
> > +   serial_out(up, UART_EFR, UART_EFR_ECB);
> > +   serial_out(up, UART_LCR, 0x0); /* Operational mode */
> > +   serial_out(up, UART_IER, 0x0);
> > +   serial_out(up, UART_LCR, 0xBF); /* Config B mode */
> > +   serial_out(up, UART_DLL, uart->dll);
> > +   serial_out(up, UART_DLM, uart->dlh);
> > +   serial_out(up, UART_LCR, 0x0); /* Operational mode */
> > +   serial_out(up, UART_IER, uart->ier);
> > +   serial_out(up, UART_FCR, up->fcr);
> > +   serial_out(up, UART_LCR, 0xBF); /* Config B mode */
> > +   serial_out(up, UART_EFR, efr);
> > +   serial_out(up, UART_LCR, UART_LCR_WLEN8);
> > +   serial_out(up, UART_OMAP_SCR, uart->scr);
> > +   serial_out(up, UART_OMAP_WER, uart->wer);
> > +   serial_out(up, UART_OMAP_SYSC, uart->sysc | (0x2 << 3));
> > +   serial_out(up, UART_OMAP_MDR1, 0x00); /* UART 16x mode */
> > +}
> > +
> > +/* Remove this during /mach-omap2/serial.c cleanup for
> 8250 support */
> > +void omap_uart_enable_irqs(int enable) {}
> > +
> > +static inline void omap_uart_disable_clocks(int num)
> > +{
> > +   struct omap_uart_state *uart = &omap_uart[num];
> > +   if (!uart->clocked)
> > +           return;
> > +
> > +   omap_uart_save_context(num);
> > +   uart->clocked = 0;
> > +   clk_disable(uart->ick);
> > +   clk_disable(uart->fck);
> > +}
> > +
> > +void omap_uart_enable_wakeup(int num)
> > +{
> > +   struct omap_uart_state *uart = &omap_uart[num];
> > +   /* Set wake-enable bit */
> > +   if (uart->wk_en && uart->wk_mask) {
> > +           u32 v = __raw_readl(uart->wk_en);
> > +           v |= uart->wk_mask;
> > +           __raw_writel(v, uart->wk_en);
> > +   }
> > +
> > +   /* Ensure IOPAD wake-enables are set */
> > +   if (cpu_is_omap34xx() && uart->padconf) {
> > +           u16 v = omap_ctrl_readw(uart->padconf);
> > +           v |= OMAP3_PADCONF_WAKEUPENABLE0;
> > +           omap_ctrl_writew(v, uart->padconf);
> > +   }
> > +}
> > +
> > +static void omap_uart_smart_idle_enable(int num, int enable)
> > +{
> > +   struct uart_omap_port *up = ui[num];
> > +   u16 sysc;
> > +
> > +   sysc = serial_in(up, UART_OMAP_SYSC) & 0x7;
> > +
> > +   if (enable)
> > +           /* Errata 2.15: Force idle if in DMA mode */
> > +           sysc |= up->use_dma ? 0x0 : (0x2 << 3);
> > +   else
> > +           sysc |= 0x1 << 3;
> > +
> > +   serial_out(up, UART_OMAP_SYSC, sysc);
> > +}
> > +
> > +static void omap_uart_block_sleep(int num)
> > +{
> > +   struct omap_uart_state *uart = &omap_uart[num];
> > +
> > +   omap_uart_enable_clocks(num);
> > +
> > +   omap_uart_smart_idle_enable(num, 0);
> > +   uart->can_sleep = 0;
> > +   if (uart->timeout)
> > +           mod_timer(&uart->timer, jiffies + uart->timeout);
> > +}
> > +
> > +static void omap_uart_allow_sleep(int num)
> > +{
> > +   struct omap_uart_state *uart = &omap_uart[num];
> > +   if (!uart->clocked)
> > +           return;
> > +
> > +   if (uart->padconf)
> > +           omap_uart_enable_wakeup(num);
> > +
> > +   omap_uart_smart_idle_enable(num, 1);
> > +   uart->can_sleep = 1;
> > +
> > +   if (uart->timeout)
> > +           del_timer_sync(&uart->timer);
> > +}
> > +
> > +void omap_uart_prepare_idle(int num)
> > +{
> > +   omap_uart_disable_clocks(num);
> > +}
> > +
> > +void omap_uart_resume_idle(int num)
> > +{
> > +   struct omap_uart_state *uart = &omap_uart[num];
> > +
> > +   omap_uart_enable_clocks(num);
> > +
> > +   /* Check for IO pad wakeup */
> > +   if (cpu_is_omap34xx() && uart->padconf) {
> > +           u16 p = omap_ctrl_readw(uart->padconf);
> > +
> > +   if (p & OMAP3_PADCONF_WAKEUPEVENT0)
> > +           omap_uart_block_sleep(num);
> > +   }
> > +
> > +   /* Check for normal UART wakeup */
> > +   if (__raw_readl(uart->wk_st) & uart->wk_mask)
> > +           omap_uart_block_sleep(num);
> > +}
> > +
> > +void omap_uart_prepare_suspend(void)
> > +{
> > +   int j;
> > +   for (j = 0; j < OMAP_MAX_NR_PORTS; j++)
> > +           omap_uart_allow_sleep(j);
> > +}
> > +
> > +int omap_uart_can_sleep(void)
> > +{
> > +   int can_sleep = 1;
> > +   int j;
> > +
> > +   for (j = 0; j < OMAP_MAX_NR_PORTS; j++) {
> > +           struct omap_uart_state *uart = &omap_uart[j];
> > +
> > +           if (!uart->clocked)
> > +                   continue;
> > +
> > +           if (!uart->can_sleep) {
> > +                   can_sleep = 0;
> > +                   continue;
> > +           }
> > +
> > +           omap_uart_allow_sleep(j);
> > +   }
> > +   return can_sleep;
> > +}
> > +
> > +static void omap_uart_init_wakeup_source(int num)
> > +{
> > +   struct omap_uart_state *uart = &omap_uart[num];
> > +
> > +   if (cpu_is_omap34xx()) {
> > +           u32 mod = (uart->num == 2) ? OMAP3430_PER_MOD :
> CORE_MOD;
> > +           u32 wk_mask = 0;
> > +           u32 padconf = 0;
> > +
> > +           uart->wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1);
> > +           uart->wk_st = OMAP34XX_PRM_REGADDR(mod, PM_WKST1);
> > +           switch (uart->num) {
> > +           case 0:
> > +                   wk_mask = OMAP3430_ST_UART1_MASK;
> > +                   padconf = 0x182;
> > +                   break;
> > +           case 1:
> > +                   wk_mask = OMAP3430_ST_UART2_MASK;
> > +                   padconf = 0x17a;
> > +                   break;
> > +           case 2:
> > +                   wk_mask = OMAP3430_ST_UART3_MASK;
> > +                   padconf = 0x19e;
> > +                   break;
> > +           }
> > +           uart->wk_mask = wk_mask;
> > +           uart->padconf = padconf;
> > +   } else if (cpu_is_omap24xx()) {
> > +           u32 wk_mask = 0;
> > +
> > +           if (cpu_is_omap2430()) {
> > +                   uart->wk_en =
> OMAP2430_PRM_REGADDR(CORE_MOD, PM_WKEN1);
> > +                   uart->wk_st =
> OMAP2430_PRM_REGADDR(CORE_MOD, PM_WKST1);
> > +           } else if (cpu_is_omap2420()) {
> > +                   uart->wk_en =
> OMAP2420_PRM_REGADDR(CORE_MOD, PM_WKEN1);
> > +                   uart->wk_st =
> OMAP2420_PRM_REGADDR(CORE_MOD, PM_WKST1);
> > +           }
> > +           switch (uart->num) {
> > +           case 0:
> > +                   wk_mask = OMAP24XX_ST_UART1_MASK;
> > +                   break;
> > +           case 1:
> > +                   wk_mask = OMAP24XX_ST_UART2_MASK;
> > +                   break;
> > +           case 2:
> > +                   wk_mask = OMAP24XX_ST_UART3_MASK;
> > +                   break;
> > +           }
> > +           uart->wk_mask = wk_mask;
> > +   } else {
> > +           uart->wk_en = 0;
> > +           uart->wk_st = 0;
> > +           uart->wk_mask = 0;
> > +           uart->padconf = 0;
> > +   }
> > +}
> > +
> > +static void omap_uart_idle_timer(unsigned long data)
> > +{
> > +
> > +   struct omap_uart_state *uart = (struct omap_uart_state *)data;
> > +   struct uart_omap_port *up = ui[uart->num];
> > +
> > +   if (up->use_dma && (up->uart_dma.tx_dma_channel != 0xFF
> > +                   || up->uart_dma.rx_dma_channel != 0xFF)) {
> > +           omap_uart_block_sleep(uart->num);
> > +           return;
> > +   }
> > +
> > +   omap_uart_allow_sleep(uart->num);
> > +}
> > +
> > +void omap_uart_idle_init(int num)
> > +{
> > +   struct omap_uart_state *uart = &omap_uart[num];
> > +
> > +   uart->can_sleep = 0;
> > +   uart->timeout = SLEEP_TIMEOUT;
> > +   setup_timer(&uart->timer, omap_uart_idle_timer,
> > +                           (unsigned long) uart);
> > +
> > +   mod_timer(&uart->timer, jiffies + uart->timeout);
> > +
> > +   omap_uart_init_wakeup_source(num);
> > +}
> > +
> > +#else
> > +static inline void omap_uart_restore_context(int num) {}
> > +static inline void omap_uart_block_sleep(int num) {}
> > +static void omap_uart_smart_idle_enable(int num, int enable) {}
> > +#endif /* CONFIG_PM */
> > +
> > +static inline void omap_uart_enable_clocks(int num)
> > +{
> > +   struct omap_uart_state *uart = &omap_uart[num];
> > +   if (uart->clocked)
> > +           return;
> > +
> > +   clk_enable(uart->ick);
> > +   clk_enable(uart->fck);
> > +   uart->clocked = 1;
> > +   omap_uart_restore_context(num);
> > +}
> > +
> > +void __init omap_serial_early_init()
> > +{
> > +   int i;
> > +   char name[16];
> > +
> > +   for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
> > +           struct omap_uart_state *uart = &omap_uart[i];
> > +           sprintf(name, "uart%d_ick", i+1);
> > +           uart->ick = clk_get(NULL, name);
> > +
> > +           if (IS_ERR(uart->ick)) {
> > +                   printk(KERN_ERR "Could not get
> uart%d_ick\n", i+1);
> > +                   uart->ick = NULL;
> > +           }
> > +
> > +           sprintf(name, "uart%d_fck", i+1);
> > +           uart->fck = clk_get(NULL, name);
> > +
> > +           if (IS_ERR(uart->fck)) {
> > +                   printk(KERN_ERR "Could not get
> uart%d_fck\n", i+1);
> > +                   uart->fck = NULL;
> > +           }
> > +
> > +           uart->num = i;
> > +           omap_uart_enable_clocks(i);
> > +   }
> > +}
> > +
> > +#ifdef DEBUG
> > +#define UART_OMAP_SPR           0x07    /* Scratchpad register */
> > +static void serial_omap_display_reg(struct uart_port *port)
> > +{
> > +   struct uart_omap_port *up = (struct uart_omap_port *)port;
> > +   unsigned int lcr, efr, mcr, dll, dlh, xon1, xon2, xoff1, xoff2;
> > +   unsigned int tcr, tlr, uasr;
> > +   pr_debug("Register dump for UART%d\n", up->pdev->id);
> > +   pr_debug("IER_REG = 0x%x\n", serial_in(up, UART_IER));
> > +   pr_debug("IIR_REG = 0x%x\n", serial_in(up, UART_IIR));
> > +   lcr = serial_in(up, UART_LCR);
> > +   pr_debug("LCR_REG = 0x%x\n", lcr);
> > +   mcr = serial_in(up, UART_MCR);
> > +   pr_debug("MCR_REG = 0x%x\n", mcr);
> > +   pr_debug("LSR_REG = 0x%x\n", serial_in(up, UART_LSR));
> > +   pr_debug("MSR_REG = 0x%x\n", serial_in(up, UART_MSR));
> > +   pr_debug("SPR_REG = 0x%x\n", serial_in(up, UART_OMAP_SPR));
> > +   pr_debug("MDR1_REG = 0x%x\n", serial_in(up, UART_OMAP_MDR1));
> > +   pr_debug("MDR2_REG = 0x%x\n", serial_in(up, UART_OMAP_MDR2));
> > +   pr_debug("SCR_REG = 0x%x\n", serial_in(up, UART_OMAP_SCR));
> > +   pr_debug("SSR_REG = 0x%x\n", serial_in(up, UART_OMAP_SSR));
> > +   pr_debug("MVR_REG = 0x%x\n", serial_in(up, UART_OMAP_MVER));
> > +   pr_debug("SYSC_REG = 0x%x\n", serial_in(up, UART_OMAP_SYSC));
> > +   pr_debug("SYSS_REG = 0x%x\n", serial_in(up, UART_OMAP_SYSS));
> > +   pr_debug("WER_REG = 0x%x\n", serial_in(up, UART_OMAP_WER));
> > +
> > +   serial_out(up, UART_LCR, 0xBF);
> > +   dll = serial_in(up, UART_DLL);
> > +   dlh = serial_in(up, UART_DLM);
> > +   efr = serial_in(up, UART_EFR);
> > +   xon1 = serial_in(up, UART_XON1);
> > +   xon2 = serial_in(up, UART_XON2);
> > +
> > +   serial_out(up, UART_EFR, efr | UART_EFR_ECB);
> > +   serial_out(up, UART_LCR, lcr);
> > +   serial_out(up, UART_MCR, mcr | UART_MCR_TCRTLR);
> > +   serial_out(up, UART_LCR, 0xBF);
> > +
> > +   tcr = serial_in(up, UART_TI752_TCR);
> > +   tlr = serial_in(up, UART_TI752_TLR);
> > +
> > +   serial_out(up, UART_LCR, lcr);
> > +   serial_out(up, UART_MCR, mcr);
> > +   serial_out(up, UART_LCR, 0xBF);
> > +
> > +   xoff1 = serial_in(up, UART_XOFF1);
> > +   xoff2 = serial_in(up, UART_XOFF2);
> > +   uasr = serial_in(up, UART_OMAP_UASR);
> > +
> > +   serial_out(up, UART_EFR, efr);
> > +   serial_out(up, UART_LCR, lcr);
> > +
> > +   pr_debug("DLL_REG = 0x%x\n", dll);
> > +   pr_debug("DLH_REG = 0x%x\n", dlh);
> > +   pr_debug("EFR_REG = 0x%x\n", efr);
> > +
> > +   pr_debug("XON1_ADDR_REG = 0x%x\n", xon1);
> > +   pr_debug("XON2_ADDR_REG = 0x%x\n", xon2);
> > +   pr_debug("TCR_REG = 0x%x\n", tcr);
> > +   pr_debug("TLR_REG = 0x%x\n", tlr);
> > +
> > +   pr_debug("XOFF1_REG = 0x%x\n", xoff1);
> > +   pr_debug("XOFF2_REG = 0x%x\n", xoff2);
> > +   pr_debug("UASR_REG = 0x%x\n", uasr);
> > +}
> > +#endif /* DEBUG */
> > +
> > +subsys_initcall(serial_omap_init);
> > +module_exit(serial_omap_exit);
> > +
> > +MODULE_DESCRIPTION("OMAP High Speed UART driver");
> > +MODULE_LICENSE("GPL");
> > +MODULE_ALIAS("platform:" DRIVER_NAME);
> > +MODULE_AUTHOR("Texas Instruments Inc");
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe
> linux-kernel" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> > Please read the FAQ at  http://www.tux.org/lkml/
> --
> To unsubscribe from this list: send the line "unsubscribe
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>
>

Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[kishore kadiyala]

Tony,

On Fri, Oct 9, 2009 at 11:16 PM, Tony Lindgren <tony@atomide.com> wrote:
> * G, Manjunath Kondaiah <manjugk@ti.com> [091008 00:41]:
>>
>> Govind,
>> > -----Original Message-----
>> > From: linux-omap-owner@vger.kernel.org
>> > [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Govindraj
>> > Sent: Thursday, October 08, 2009 11:44 AM
>> > To: Tony Lindgren
>> > Cc: Raja, Govindraj; linux-omap@vger.kernel.org;
>> > linux-kernel@vger.kernel.org; linux-serial@vger.kernel.org
>> > Subject: Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.
>> >
>> > On Thu, Oct 8, 2009 at 3:21 AM, Tony Lindgren
>> > <tony@atomide.com> wrote:
>> > > * Govindraj.R <govindraj.raja@ti.com> [090924 03:29]:
>> > >> From: Govindraj R <govindraj.raja@ti.com>
>> > >>
>> > >> This patch adds support for OMAP3430-HIGH SPEED UART Controller.
>> > >>
>> > >> Signed-off-by:        Govindraj R <govindraj.raja@ti.com>
>> > >> Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
>> > >> Reviewed-by: Tony Lindgren <tony@atomide.com>
>> > >
>> > > You should only add Reviewed-by if Alan or me have replied with it.
>> > >
>> > > So far I've only replied with some comments that have not yet
>> > > been fixed, so we're few more steps from being Reviewd-by.
>> > >
>> > > <snip>
>> > >
>> > >> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
>> > >> index 6553833..67a7129 100644
>> > >> --- a/drivers/serial/Kconfig
>> > >> +++ b/drivers/serial/Kconfig
>> > >> @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM
>> > >>         Currently, only 8250 compatible ports are supported, but
>> > >>         others can easily be added.
>> > >>
>> > >> +config SERIAL_OMAP
>> > >> +     bool "OMAP serial port support"
>> > >> +     depends on ARM && ARCH_OMAP
>> > >> +     select SERIAL_CORE
>> > >> +     help
>> > >> +     If you have a machine based on an Texas Instruments
>> > OMAP CPU you
>> > >> +     can enable its onboard serial ports by enabling this option.
>> > >> +
>> > >> +config SERIAL_OMAP_CONSOLE
>> > >> +     bool "Console on OMAP serial port"
>> > >> +     depends on SERIAL_OMAP
>> > >> +     select SERIAL_CORE_CONSOLE
>> > >> +     help
>> > >> +     If you have enabled the serial port on the Texas
>> > Instruments OMAP
>> > >> +     CPU you can make it the console by answering Y to
>> > this option.
>> > >> +
>> > >> +     Even if you say Y here, the currently visible virtual console
>> > >> +     (/dev/tty0) will still be used as the system console
>> > by default, but
>> > >> +     you can alter that using a kernel command line option such as
>> > >> +     "console=ttyS0". (Try "man bootparam" or see the
>> > documentation of
>> > >> +     your boot loader (lilo or loadlin) about how to pass
>> > options to the
>> > >> +     kernel at boot time.)
>> > >> +
>> > >> +config SERIAL_OMAP_DMA_UART1
>> > >> +     bool "UART1 DMA support"
>> > >> +     depends on SERIAL_OMAP
>> > >> +     help
>> > >> +     If you have enabled the serial port on the Texas
>> > Instruments OMAP
>> > >> +     CPU you can enable the DMA transfer on UART 1 by answering
>> > >> +     to this option.
>> > >> +
>> > >> +config SERIAL_OMAP_DMA_UART2
>> > >> +     bool "UART2 DMA support"
>> > >> +     depends on SERIAL_OMAP
>> > >> +     help
>> > >> +     If you have enabled the serial port on the Texas
>> > Instruments OMAP
>> > >> +     CPU you can enable the DMA transfer on UART 2 by answering
>> > >> +     to this option.
>> > >> +
>> > >> +config SERIAL_OMAP_DMA_UART3
>> > >> +     bool "UART3 DMA support"
>> > >> +     depends on SERIAL_OMAP
>> > >> +     help
>> > >> +     If you have enabled the serial port on the Texas
>> > Instruments OMAP
>> > >> +     CPU you can enable the DMA transfer on UART 3 by answering
>> > >> +     to this option.
>> > >> +
>> > >>  config SERIAL_OF_PLATFORM_NWPSERIAL
>> > >>       tristate "NWP serial port driver"
>> > >>       depends on PPC_OF && PPC_DCR
>> > >
>> > > There's absolutely no need for having Kconfig options for the DMA
>> > > support. Please pass that in platform_data from the board-*.c files.
>> > >
>> > > This is the third time I'm commenting on the same issue!
>> > >
>> > > What's the point of posting these patches for review if the issues
>> > > don't get solved?
>> >
>> >
>> > The omap-serial uart driver is designed to work either in interrupt
>> > mode or in DMA mode,
>> > We have provided this option so that one can select interrupt mode or
>> > DMA mode based on the uart usage, if somebody is using uart as console
>> > then interrupt mode will do, else if used with bluetooth which does
>> > huge data transfer then DMA mode can be selected.
>> >
>> > Don't you think this should be a configurable option using kconfig
>> > rather than passing as platform data?
>
> Nope. I think it should be platform_data and should be possible to override
> vith a kernel cmdline option. That's because we support compiling in and
> booting many boards the same kernel binary.
>
>> > if used as platform data then one has to modify platform data to
>> > switch between the interrupt and DMA mode.
>
> How about set some kernel cmdline options if you want to override the
> default settings?

   Using cmdline options, will make specific UART switch  dynamically
   between Non-DMA and DMA mode which is not handled in the driver.

   how abt using bootargs to share this Mode info ?

>
>> Usage of UART is board dependent. It's usage will not change dynamically for
>> a given board. This can be removed from Kconfig and move it to respective
>> board file-> board-*.c
>
> Or can be changed from kernel cmdline if necessary.
>
> Regards,
>
> Tony
> --
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Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[Tony Lindgren]

* kishore kadiyala <kishorek.kadiyala@gmail.com> [091012 23:54]:
> Tony,
> 
> On Fri, Oct 9, 2009 at 11:16 PM, Tony Lindgren <tony@atomide.com> wrote:
> > * G, Manjunath Kondaiah <manjugk@ti.com> [091008 00:41]:
> >>
> >> Govind,
> >> > -----Original Message-----
> >> > From: linux-omap-owner@vger.kernel.org
> >> > [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Govindraj
> >> > Sent: Thursday, October 08, 2009 11:44 AM
> >> > To: Tony Lindgren
> >> > Cc: Raja, Govindraj; linux-omap@vger.kernel.org;
> >> > linux-kernel@vger.kernel.org; linux-serial@vger.kernel.org
> >> > Subject: Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.
> >> >
> >> > On Thu, Oct 8, 2009 at 3:21 AM, Tony Lindgren
> >> > <tony@atomide.com> wrote:
> >> > > * Govindraj.R <govindraj.raja@ti.com> [090924 03:29]:
> >> > >> From: Govindraj R <govindraj.raja@ti.com>
> >> > >>
> >> > >> This patch adds support for OMAP3430-HIGH SPEED UART Controller.
> >> > >>
> >> > >> Signed-off-by:        Govindraj R <govindraj.raja@ti.com>
> >> > >> Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
> >> > >> Reviewed-by: Tony Lindgren <tony@atomide.com>
> >> > >
> >> > > You should only add Reviewed-by if Alan or me have replied with it.
> >> > >
> >> > > So far I've only replied with some comments that have not yet
> >> > > been fixed, so we're few more steps from being Reviewd-by.
> >> > >
> >> > > <snip>
> >> > >
> >> > >> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> >> > >> index 6553833..67a7129 100644
> >> > >> --- a/drivers/serial/Kconfig
> >> > >> +++ b/drivers/serial/Kconfig
> >> > >> @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM
> >> > >>         Currently, only 8250 compatible ports are supported, but
> >> > >>         others can easily be added.
> >> > >>
> >> > >> +config SERIAL_OMAP
> >> > >> +     bool "OMAP serial port support"
> >> > >> +     depends on ARM && ARCH_OMAP
> >> > >> +     select SERIAL_CORE
> >> > >> +     help
> >> > >> +     If you have a machine based on an Texas Instruments
> >> > OMAP CPU you
> >> > >> +     can enable its onboard serial ports by enabling this option.
> >> > >> +
> >> > >> +config SERIAL_OMAP_CONSOLE
> >> > >> +     bool "Console on OMAP serial port"
> >> > >> +     depends on SERIAL_OMAP
> >> > >> +     select SERIAL_CORE_CONSOLE
> >> > >> +     help
> >> > >> +     If you have enabled the serial port on the Texas
> >> > Instruments OMAP
> >> > >> +     CPU you can make it the console by answering Y to
> >> > this option.
> >> > >> +
> >> > >> +     Even if you say Y here, the currently visible virtual console
> >> > >> +     (/dev/tty0) will still be used as the system console
> >> > by default, but
> >> > >> +     you can alter that using a kernel command line option such as
> >> > >> +     "console=ttyS0". (Try "man bootparam" or see the
> >> > documentation of
> >> > >> +     your boot loader (lilo or loadlin) about how to pass
> >> > options to the
> >> > >> +     kernel at boot time.)
> >> > >> +
> >> > >> +config SERIAL_OMAP_DMA_UART1
> >> > >> +     bool "UART1 DMA support"
> >> > >> +     depends on SERIAL_OMAP
> >> > >> +     help
> >> > >> +     If you have enabled the serial port on the Texas
> >> > Instruments OMAP
> >> > >> +     CPU you can enable the DMA transfer on UART 1 by answering
> >> > >> +     to this option.
> >> > >> +
> >> > >> +config SERIAL_OMAP_DMA_UART2
> >> > >> +     bool "UART2 DMA support"
> >> > >> +     depends on SERIAL_OMAP
> >> > >> +     help
> >> > >> +     If you have enabled the serial port on the Texas
> >> > Instruments OMAP
> >> > >> +     CPU you can enable the DMA transfer on UART 2 by answering
> >> > >> +     to this option.
> >> > >> +
> >> > >> +config SERIAL_OMAP_DMA_UART3
> >> > >> +     bool "UART3 DMA support"
> >> > >> +     depends on SERIAL_OMAP
> >> > >> +     help
> >> > >> +     If you have enabled the serial port on the Texas
> >> > Instruments OMAP
> >> > >> +     CPU you can enable the DMA transfer on UART 3 by answering
> >> > >> +     to this option.
> >> > >> +
> >> > >>  config SERIAL_OF_PLATFORM_NWPSERIAL
> >> > >>       tristate "NWP serial port driver"
> >> > >>       depends on PPC_OF && PPC_DCR
> >> > >
> >> > > There's absolutely no need for having Kconfig options for the DMA
> >> > > support. Please pass that in platform_data from the board-*.c files.
> >> > >
> >> > > This is the third time I'm commenting on the same issue!
> >> > >
> >> > > What's the point of posting these patches for review if the issues
> >> > > don't get solved?
> >> >
> >> >
> >> > The omap-serial uart driver is designed to work either in interrupt
> >> > mode or in DMA mode,
> >> > We have provided this option so that one can select interrupt mode or
> >> > DMA mode based on the uart usage, if somebody is using uart as console
> >> > then interrupt mode will do, else if used with bluetooth which does
> >> > huge data transfer then DMA mode can be selected.
> >> >
> >> > Don't you think this should be a configurable option using kconfig
> >> > rather than passing as platform data?
> >
> > Nope. I think it should be platform_data and should be possible to override
> > vith a kernel cmdline option. That's because we support compiling in and
> > booting many boards the same kernel binary.
> >
> >> > if used as platform data then one has to modify platform data to
> >> > switch between the interrupt and DMA mode.
> >
> > How about set some kernel cmdline options if you want to override the
> > default settings?
> 
>    Using cmdline options, will make specific UART switch  dynamically
>    between Non-DMA and DMA mode which is not handled in the driver.

Switching between dma transfers and pio should be easy to do, we're
already doing that in various omap drivers like mmc, musb/tusb
and onenand.

So I would recommend making that change, it is quite trivial
to do and will make the code much cleaner. And also gets rid
of the issue with Kconfig settings breaking booting for other
boards.
 
>    how abt using bootargs to share this Mode info ?

The bootargs should override what is passed from platform_data.

Regards,

Tony

> 
> >
> >> Usage of UART is board dependent. It's usage will not change dynamically for
> >> a given board. This can be removed from Kconfig and move it to respective
> >> board file-> board-*.c
> >
> > Or can be changed from kernel cmdline if necessary.
> >
> > Regards,
> >
> > Tony
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> >
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Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[Govindraj]

On Wed, Oct 14, 2009 at 2:26 AM, Tony Lindgren <tony@atomide.com> wrote:
> * kishore kadiyala <kishorek.kadiyala@gmail.com> [091012 23:54]:
>> Tony,
>>
>> On Fri, Oct 9, 2009 at 11:16 PM, Tony Lindgren <tony@atomide.com> wrote:
>> > * G, Manjunath Kondaiah <manjugk@ti.com> [091008 00:41]:
>> >>
>> >> Govind,
>> >> > -----Original Message-----
>> >> > From: linux-omap-owner@vger.kernel.org
>> >> > [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Govindraj
>> >> > Sent: Thursday, October 08, 2009 11:44 AM
>> >> > To: Tony Lindgren
>> >> > Cc: Raja, Govindraj; linux-omap@vger.kernel.org;
>> >> > linux-kernel@vger.kernel.org; linux-serial@vger.kernel.org
>> >> > Subject: Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.
>> >> >
>> >> > On Thu, Oct 8, 2009 at 3:21 AM, Tony Lindgren
>> >> > <tony@atomide.com> wrote:
>> >> > > * Govindraj.R <govindraj.raja@ti.com> [090924 03:29]:
>> >> > >> From: Govindraj R <govindraj.raja@ti.com>
>> >> > >>
>> >> > >> This patch adds support for OMAP3430-HIGH SPEED UART Controller.
>> >> > >>
>> >> > >> Signed-off-by:        Govindraj R <govindraj.raja@ti.com>
>> >> > >> Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
>> >> > >> Reviewed-by: Tony Lindgren <tony@atomide.com>
>> >> > >
>> >> > > You should only add Reviewed-by if Alan or me have replied with it.
>> >> > >
>> >> > > So far I've only replied with some comments that have not yet
>> >> > > been fixed, so we're few more steps from being Reviewd-by.
>> >> > >
>> >> > > <snip>
>> >> > >
>> >> > >> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
>> >> > >> index 6553833..67a7129 100644
>> >> > >> --- a/drivers/serial/Kconfig
>> >> > >> +++ b/drivers/serial/Kconfig
>> >> > >> @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM
>> >> > >>         Currently, only 8250 compatible ports are supported, but
>> >> > >>         others can easily be added.
>> >> > >>
>> >> > >> +config SERIAL_OMAP
>> >> > >> +     bool "OMAP serial port support"
>> >> > >> +     depends on ARM && ARCH_OMAP
>> >> > >> +     select SERIAL_CORE
>> >> > >> +     help
>> >> > >> +     If you have a machine based on an Texas Instruments
>> >> > OMAP CPU you
>> >> > >> +     can enable its onboard serial ports by enabling this option.
>> >> > >> +
>> >> > >> +config SERIAL_OMAP_CONSOLE
>> >> > >> +     bool "Console on OMAP serial port"
>> >> > >> +     depends on SERIAL_OMAP
>> >> > >> +     select SERIAL_CORE_CONSOLE
>> >> > >> +     help
>> >> > >> +     If you have enabled the serial port on the Texas
>> >> > Instruments OMAP
>> >> > >> +     CPU you can make it the console by answering Y to
>> >> > this option.
>> >> > >> +
>> >> > >> +     Even if you say Y here, the currently visible virtual console
>> >> > >> +     (/dev/tty0) will still be used as the system console
>> >> > by default, but
>> >> > >> +     you can alter that using a kernel command line option such as
>> >> > >> +     "console=ttyS0". (Try "man bootparam" or see the
>> >> > documentation of
>> >> > >> +     your boot loader (lilo or loadlin) about how to pass
>> >> > options to the
>> >> > >> +     kernel at boot time.)
>> >> > >> +
>> >> > >> +config SERIAL_OMAP_DMA_UART1
>> >> > >> +     bool "UART1 DMA support"
>> >> > >> +     depends on SERIAL_OMAP
>> >> > >> +     help
>> >> > >> +     If you have enabled the serial port on the Texas
>> >> > Instruments OMAP
>> >> > >> +     CPU you can enable the DMA transfer on UART 1 by answering
>> >> > >> +     to this option.
>> >> > >> +
>> >> > >> +config SERIAL_OMAP_DMA_UART2
>> >> > >> +     bool "UART2 DMA support"
>> >> > >> +     depends on SERIAL_OMAP
>> >> > >> +     help
>> >> > >> +     If you have enabled the serial port on the Texas
>> >> > Instruments OMAP
>> >> > >> +     CPU you can enable the DMA transfer on UART 2 by answering
>> >> > >> +     to this option.
>> >> > >> +
>> >> > >> +config SERIAL_OMAP_DMA_UART3
>> >> > >> +     bool "UART3 DMA support"
>> >> > >> +     depends on SERIAL_OMAP
>> >> > >> +     help
>> >> > >> +     If you have enabled the serial port on the Texas
>> >> > Instruments OMAP
>> >> > >> +     CPU you can enable the DMA transfer on UART 3 by answering
>> >> > >> +     to this option.
>> >> > >> +
>> >> > >>  config SERIAL_OF_PLATFORM_NWPSERIAL
>> >> > >>       tristate "NWP serial port driver"
>> >> > >>       depends on PPC_OF && PPC_DCR
>> >> > >
>> >> > > There's absolutely no need for having Kconfig options for the DMA
>> >> > > support. Please pass that in platform_data from the board-*.c files.
>> >> > >
>> >> > > This is the third time I'm commenting on the same issue!
>> >> > >
>> >> > > What's the point of posting these patches for review if the issues
>> >> > > don't get solved?
>> >> >
>> >> >
>> >> > The omap-serial uart driver is designed to work either in interrupt
>> >> > mode or in DMA mode,
>> >> > We have provided this option so that one can select interrupt mode or
>> >> > DMA mode based on the uart usage, if somebody is using uart as console
>> >> > then interrupt mode will do, else if used with bluetooth which does
>> >> > huge data transfer then DMA mode can be selected.
>> >> >
>> >> > Don't you think this should be a configurable option using kconfig
>> >> > rather than passing as platform data?
>> >
>> > Nope. I think it should be platform_data and should be possible to override
>> > vith a kernel cmdline option. That's because we support compiling in and
>> > booting many boards the same kernel binary.
>> >
>> >> > if used as platform data then one has to modify platform data to
>> >> > switch between the interrupt and DMA mode.
>> >
>> > How about set some kernel cmdline options if you want to override the
>> > default settings?
>>
>>    Using cmdline options, will make specific UART switch  dynamically
>>    between Non-DMA and DMA mode which is not handled in the driver.
>
> Switching between dma transfers and pio should be easy to do, we're
> already doing that in various omap drivers like mmc, musb/tusb
> and onenand.

I am planning to remove kconfig options, and add static mode values in platform
data for uart port dma mode usage for an given uart port.

Any given uart port can be configured to work in DMA or non dma
mode based on the board configuration, and decision has to be made by
developer itself (based on performance etc..) and should not rely on user.

What do you say?


> So I would recommend making that change, it is quite trivial
> to do and will make the code much cleaner. And also gets rid
> of the issue with Kconfig settings breaking booting for other
> boards.
>
>>    how abt using bootargs to share this Mode info ?
>
> The bootargs should override what is passed from platform_data.

Providing bootarg option is easy, I'll add support if insisted.

IMHO static setting in platform data will do.

---
Regards,
Govindraj.R



> Regards,
>
> Tony
>
>>
>> >
>> >> Usage of UART is board dependent. It's usage will not change dynamically for
>> >> a given board. This can be removed from Kconfig and move it to respective
>> >> board file-> board-*.c
>> >
>> > Or can be changed from kernel cmdline if necessary.
>> >
>> > Regards,
>> >
>> > Tony
>> > --
>> > To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>> > the body of a message to majordomo@vger.kernel.org
>> > More majordomo info at  http://vger.kernel.org/majordomo-info.html
>> >
>

Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.

[Tony Lindgren]

* Govindraj <govindraj.ti@gmail.com> [091023 05:22]:
> On Wed, Oct 14, 2009 at 2:26 AM, Tony Lindgren <tony@atomide.com> wrote:
> > * kishore kadiyala <kishorek.kadiyala@gmail.com> [091012 23:54]:
> >> Tony,
> >>
> >> On Fri, Oct 9, 2009 at 11:16 PM, Tony Lindgren <tony@atomide.com> wrote:
> >> > * G, Manjunath Kondaiah <manjugk@ti.com> [091008 00:41]:
> >> >>
> >> >> Govind,
> >> >> > -----Original Message-----
> >> >> > From: linux-omap-owner@vger.kernel.org
> >> >> > [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Govindraj
> >> >> > Sent: Thursday, October 08, 2009 11:44 AM
> >> >> > To: Tony Lindgren
> >> >> > Cc: Raja, Govindraj; linux-omap@vger.kernel.org;
> >> >> > linux-kernel@vger.kernel.org; linux-serial@vger.kernel.org
> >> >> > Subject: Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.
> >> >> >
> >> >> > On Thu, Oct 8, 2009 at 3:21 AM, Tony Lindgren
> >> >> > <tony@atomide.com> wrote:
> >> >> > > * Govindraj.R <govindraj.raja@ti.com> [090924 03:29]:
> >> >> > >> From: Govindraj R <govindraj.raja@ti.com>
> >> >> > >>
> >> >> > >> This patch adds support for OMAP3430-HIGH SPEED UART Controller.
> >> >> > >>
> >> >> > >> Signed-off-by:        Govindraj R <govindraj.raja@ti.com>
> >> >> > >> Reviewed-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
> >> >> > >> Reviewed-by: Tony Lindgren <tony@atomide.com>
> >> >> > >
> >> >> > > You should only add Reviewed-by if Alan or me have replied with it.
> >> >> > >
> >> >> > > So far I've only replied with some comments that have not yet
> >> >> > > been fixed, so we're few more steps from being Reviewd-by.
> >> >> > >
> >> >> > > <snip>
> >> >> > >
> >> >> > >> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> >> >> > >> index 6553833..67a7129 100644
> >> >> > >> --- a/drivers/serial/Kconfig
> >> >> > >> +++ b/drivers/serial/Kconfig
> >> >> > >> @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM
> >> >> > >>         Currently, only 8250 compatible ports are supported, but
> >> >> > >>         others can easily be added.
> >> >> > >>
> >> >> > >> +config SERIAL_OMAP
> >> >> > >> +     bool "OMAP serial port support"
> >> >> > >> +     depends on ARM && ARCH_OMAP
> >> >> > >> +     select SERIAL_CORE
> >> >> > >> +     help
> >> >> > >> +     If you have a machine based on an Texas Instruments
> >> >> > OMAP CPU you
> >> >> > >> +     can enable its onboard serial ports by enabling this option.
> >> >> > >> +
> >> >> > >> +config SERIAL_OMAP_CONSOLE
> >> >> > >> +     bool "Console on OMAP serial port"
> >> >> > >> +     depends on SERIAL_OMAP
> >> >> > >> +     select SERIAL_CORE_CONSOLE
> >> >> > >> +     help
> >> >> > >> +     If you have enabled the serial port on the Texas
> >> >> > Instruments OMAP
> >> >> > >> +     CPU you can make it the console by answering Y to
> >> >> > this option.
> >> >> > >> +
> >> >> > >> +     Even if you say Y here, the currently visible virtual console
> >> >> > >> +     (/dev/tty0) will still be used as the system console
> >> >> > by default, but
> >> >> > >> +     you can alter that using a kernel command line option such as
> >> >> > >> +     "console=ttyS0". (Try "man bootparam" or see the
> >> >> > documentation of
> >> >> > >> +     your boot loader (lilo or loadlin) about how to pass
> >> >> > options to the
> >> >> > >> +     kernel at boot time.)
> >> >> > >> +
> >> >> > >> +config SERIAL_OMAP_DMA_UART1
> >> >> > >> +     bool "UART1 DMA support"
> >> >> > >> +     depends on SERIAL_OMAP
> >> >> > >> +     help
> >> >> > >> +     If you have enabled the serial port on the Texas
> >> >> > Instruments OMAP
> >> >> > >> +     CPU you can enable the DMA transfer on UART 1 by answering
> >> >> > >> +     to this option.
> >> >> > >> +
> >> >> > >> +config SERIAL_OMAP_DMA_UART2
> >> >> > >> +     bool "UART2 DMA support"
> >> >> > >> +     depends on SERIAL_OMAP
> >> >> > >> +     help
> >> >> > >> +     If you have enabled the serial port on the Texas
> >> >> > Instruments OMAP
> >> >> > >> +     CPU you can enable the DMA transfer on UART 2 by answering
> >> >> > >> +     to this option.
> >> >> > >> +
> >> >> > >> +config SERIAL_OMAP_DMA_UART3
> >> >> > >> +     bool "UART3 DMA support"
> >> >> > >> +     depends on SERIAL_OMAP
> >> >> > >> +     help
> >> >> > >> +     If you have enabled the serial port on the Texas
> >> >> > Instruments OMAP
> >> >> > >> +     CPU you can enable the DMA transfer on UART 3 by answering
> >> >> > >> +     to this option.
> >> >> > >> +
> >> >> > >>  config SERIAL_OF_PLATFORM_NWPSERIAL
> >> >> > >>       tristate "NWP serial port driver"
> >> >> > >>       depends on PPC_OF && PPC_DCR
> >> >> > >
> >> >> > > There's absolutely no need for having Kconfig options for the DMA
> >> >> > > support. Please pass that in platform_data from the board-*.c files.
> >> >> > >
> >> >> > > This is the third time I'm commenting on the same issue!
> >> >> > >
> >> >> > > What's the point of posting these patches for review if the issues
> >> >> > > don't get solved?
> >> >> >
> >> >> >
> >> >> > The omap-serial uart driver is designed to work either in interrupt
> >> >> > mode or in DMA mode,
> >> >> > We have provided this option so that one can select interrupt mode or
> >> >> > DMA mode based on the uart usage, if somebody is using uart as console
> >> >> > then interrupt mode will do, else if used with bluetooth which does
> >> >> > huge data transfer then DMA mode can be selected.
> >> >> >
> >> >> > Don't you think this should be a configurable option using kconfig
> >> >> > rather than passing as platform data?
> >> >
> >> > Nope. I think it should be platform_data and should be possible to override
> >> > vith a kernel cmdline option. That's because we support compiling in and
> >> > booting many boards the same kernel binary.
> >> >
> >> >> > if used as platform data then one has to modify platform data to
> >> >> > switch between the interrupt and DMA mode.
> >> >
> >> > How about set some kernel cmdline options if you want to override the
> >> > default settings?
> >>
> >>    Using cmdline options, will make specific UART switch  dynamically
> >>    between Non-DMA and DMA mode which is not handled in the driver.
> >
> > Switching between dma transfers and pio should be easy to do, we're
> > already doing that in various omap drivers like mmc, musb/tusb
> > and onenand.
> 
> I am planning to remove kconfig options, and add static mode values in platform
> data for uart port dma mode usage for an given uart port.
> 
> Any given uart port can be configured to work in DMA or non dma
> mode based on the board configuration, and decision has to be made by
> developer itself (based on performance etc..) and should not rely on user.
> 
> What do you say?

Sounds good to me. From PM point of view, you may want to be able
to switch between DMA and PIO during runtime. Also, there may not
be DMA channels always available.

> 
> 
> > So I would recommend making that change, it is quite trivial
> > to do and will make the code much cleaner. And also gets rid
> > of the issue with Kconfig settings breaking booting for other
> > boards.
> >
> >>    how abt using bootargs to share this Mode info ?
> >
> > The bootargs should override what is passed from platform_data.
> 
> Providing bootarg option is easy, I'll add support if insisted.
> 
> IMHO static setting in platform data will do.

Yeah setting it in the platform_data solves the issue of booting the
same kernel for multiple boards.

Regards,

Tony

> 
> ---
> Regards,
> Govindraj.R
> 
> 
> 
> > Regards,
> >
> > Tony
> >
> >>
> >> >
> >> >> Usage of UART is board dependent. It's usage will not change dynamically for
> >> >> a given board. This can be removed from Kconfig and move it to respective
> >> >> board file-> board-*.c
> >> >
> >> > Or can be changed from kernel cmdline if necessary.
> >> >
> >> > Regards,
> >> >
> >> > Tony
> >> > --
> >> > To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> >> > the body of a message to majordomo@vger.kernel.org
> >> > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> >> >
> >
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