DSS2 clocking

DSS2 clocking

[Gary Thomas]

I'm using DSS2, currently just with a frame buffer to a
[VGA/RGB] monitor.

I'm trying to understand how to set the timing parameters
for my device.  The simple 'omapfb.mode=1024x768-24@75'
doesn't quite cut it for some of the devices I need to
use.

Questions:
  * How can I get different pixel clocks?  I seem to always
    end up with 61714285:
      # cat /tmp/dbg/omapdss/clk
      - dss -
      internal clk count      2
      dss_ick         83000000        1
      dss1_alwon_fck  123428570       1
      dss2_alwon_fck  13000000        0
      dss_tv_fck      54000000        0
      dss_96m_fck     96000000        0
      - dispc -
      dispc fclk source = dss1_alwon_fclk
      pixel clk = 123428570 / 1 / 2 = 61714285
  * How can I control the waveform?  In particular, the
    size and shape of the "porches"?  My display seems to
    need these settings:
      61714,1024/26/162/136,768/3/29/6
    I'd like to get this behaviour, either from the boot line
    or ideally by default.
  * The display also seems to want the sync pulses to be
    asserted low (inverted?).  Currently, I have this "hard-wired"
    into my display device, but I'd also like this to be adjustable.

Thanks for any pointers, etc.

Note: I'm using Tomi's tree from roughly late July
   http://www.bat.org/~tomba/git/linux-omap-dss.git
   7ae220f46384b34e72b8c3b0c2075a674a3f74fe

Thanks for any pointers

-- 
------------------------------------------------------------
Gary Thomas                 |  Consulting for the
MLB Associates              |    Embedded world
------------------------------------------------------------

Re: DSS2 clocking

[Tomi Valkeinen]

Hi,

On Wed, 2009-10-21 at 14:42 +0200, ext Gary Thomas wrote:
> I'm using DSS2, currently just with a frame buffer to a
> [VGA/RGB] monitor.
> 
> I'm trying to understand how to set the timing parameters
> for my device.  The simple 'omapfb.mode=1024x768-24@75'
> doesn't quite cut it for some of the devices I need to
> use.
> 
> Questions:
>   * How can I get different pixel clocks?  I seem to always
>     end up with 61714285:

The pixel clock is calculated based on the given resolution and refresh
rate. You can adjust it via sysfs. But you don't have very fine graded
control when using the normal pixel clock source. When using DSI PLL to
generate the DISPC functional clock, you can get much more exact pixel
clock. But DSI PLL support is quite experimental.

>       # cat /tmp/dbg/omapdss/clk
>       - dss -
>       internal clk count      2
>       dss_ick         83000000        1
>       dss1_alwon_fck  123428570       1
>       dss2_alwon_fck  13000000        0
>       dss_tv_fck      54000000        0
>       dss_96m_fck     96000000        0
>       - dispc -
>       dispc fclk source = dss1_alwon_fclk
>       pixel clk = 123428570 / 1 / 2 = 61714285
>   * How can I control the waveform?  In particular, the
>     size and shape of the "porches"?  My display seems to
>     need these settings:
>       61714,1024/26/162/136,768/3/29/6
>     I'd like to get this behaviour, either from the boot line
>     or ideally by default.

Currently you cannot set these via kernel arguments, only via sysfs or
in the panel driver.

>   * The display also seems to want the sync pulses to be
>     asserted low (inverted?).  Currently, I have this "hard-wired"
>     into my display device, but I'd also like this to be adjustable.

These cannot currently be changed at all, they can only be defined in
the panel driver.

 Tomi