From mboxrd@z Thu Jan 1 00:00:00 1970 From: Omar Ramirez Luna Subject: Re: [RFC] tidspbridge: use a parameter to allocate shared memory Date: Fri, 8 Oct 2010 12:31:14 -0500 Message-ID: <4CAF5562.9060107@ti.com> References: <1286430336-20204-1-git-send-email-omar.ramirez@ti.com> <201010070940.14208.laurent.pinchart@ideasonboard.com> <4CADFCEB.4030008@ti.com> <4CAE1CA1.4050006@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit Return-path: Received: from devils.ext.ti.com ([198.47.26.153]:51367 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758939Ab0JHRba (ORCPT ); Fri, 8 Oct 2010 13:31:30 -0400 In-Reply-To: Sender: linux-omap-owner@vger.kernel.org List-Id: linux-omap@vger.kernel.org To: Felipe Contreras Cc: Laurent Pinchart , "linux-arm-kernel@lists.infradead.org" , Tony Lindgren , Ohad Ben-Cohen , Greg Kroah-Hartman , Russell King , "Gomez Castellanos, Ivan" , "Ramos Falcon, Ernesto" , "linux-omap@vger.kernel.org" On 10/8/2010 3:20 AM, Felipe Contreras wrote: > On Thu, Oct 7, 2010 at 10:16 PM, Omar Ramirez Luna wrote: >> On 10/7/2010 1:22 PM, Felipe Contreras wrote: >>> Anyway, we will not know for sure until we try... Right? >> >> yes we can try, at least we now for sure arm side can be done. > > The only thing that changes is the cacheability of the ARM side > memory, so of course only the ARM side matters. The DSP side will > continue to do what it's doing and would not notice any difference if > the memory is flushed, or is non-cacheable. > Please find my reply for the previous mail: http://marc.info/?l=linux-omap&m=128655845213913&w=2 Regards, Omar