* [PATCH v1 02/10] OMAP: McBSP: Convert McBSP to platform device model
2010-12-21 7:40 [PATCH v1 01/10] OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct Kishon Vijay Abraham I
@ 2010-12-21 7:40 ` Kishon Vijay Abraham I
2010-12-23 9:29 ` Varadarajan, Charulatha
2010-12-21 7:40 ` [PATCH v1 03/10] OMAP2420: hwmod data: Add McBSP Kishon Vijay Abraham I
` (8 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Kishon Vijay Abraham I @ 2010-12-21 7:40 UTC (permalink / raw)
To: linux-omap; +Cc: paul, khilman, p-basak2, b-cousson, kishon
Implement McBSP as platform device and add support for
registering through platform device layer using resource
structures.
Later in this patch series, OMAP2+ McBSP driver would be modified to
use hwmod framework after populating the omap2+ hwmod database.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm/mach-omap1/mcbsp.c | 383 ++++++++++++++---
arch/arm/mach-omap2/mcbsp.c | 708 +++++++++++++++++++++++++------
arch/arm/plat-omap/devices.c | 10 +-
arch/arm/plat-omap/include/plat/mcbsp.h | 14 +-
arch/arm/plat-omap/mcbsp.c | 60 +++-
5 files changed, 969 insertions(+), 206 deletions(-)
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 372ea71..4324ba4 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -10,6 +10,7 @@
*
* Multichannel mode not supported.
*/
+#include <linux/ioport.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/clk.h>
@@ -78,114 +79,354 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
};
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+struct resource omap7xx_mcbsp_res[][6] = {
+ {
+ {
+ .name = "mpu",
+ .start = OMAP7XX_MCBSP1_BASE,
+ .end = OMAP7XX_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP7XX_MCBSP1_BASE,
+ .end = OMAP7XX_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_7XX_McBSP1RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_7XX_McBSP1TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP_DMA_MCBSP1_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP_DMA_MCBSP1_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+ {
+ {
+ .name = "mpu",
+ .start = OMAP7XX_MCBSP2_BASE,
+ .end = OMAP7XX_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP7XX_MCBSP2_BASE,
+ .end = OMAP7XX_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_7XX_McBSP2RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_7XX_McBSP2TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP_DMA_MCBSP3_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP_DMA_MCBSP3_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+};
+
static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
{
- .phys_base = OMAP7XX_MCBSP1_BASE,
- .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
- .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
- .rx_irq = INT_7XX_McBSP1RX,
- .tx_irq = INT_7XX_McBSP1TX,
.ops = &omap1_mcbsp_ops,
},
{
- .phys_base = OMAP7XX_MCBSP2_BASE,
- .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
- .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
- .rx_irq = INT_7XX_McBSP2RX,
- .tx_irq = INT_7XX_McBSP2TX,
.ops = &omap1_mcbsp_ops,
},
};
-#define OMAP7XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap7xx_mcbsp_pdata)
-#define OMAP7XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
+#define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1])
+#define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res)
#else
+#define omap7xx_mcbsp_res NULL
#define omap7xx_mcbsp_pdata NULL
-#define OMAP7XX_MCBSP_PDATA_SZ 0
-#define OMAP7XX_MCBSP_REG_NUM 0
+#define OMAP7XX_MCBSP_RES_SZ 0
+#define OMAP7XX_MCBSP_COUNT 0
#endif
#ifdef CONFIG_ARCH_OMAP15XX
+struct resource omap15xx_mcbsp_res[][6] = {
+ {
+ {
+ .name = "mpu",
+ .start = OMAP1510_MCBSP1_BASE,
+ .end = OMAP1510_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP1510_MCBSP1_BASE,
+ .end = OMAP1510_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_McBSP1RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_McBSP1TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP_DMA_MCBSP1_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP_DMA_MCBSP1_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+ {
+ {
+ .name = "mpu",
+ .start = OMAP1510_MCBSP2_BASE,
+ .end = OMAP1510_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP1510_MCBSP2_BASE,
+ .end = OMAP1510_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_1510_SPI_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_1510_SPI_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP_DMA_MCBSP2_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP_DMA_MCBSP2_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+ {
+ {
+ .name = "mpu",
+ .start = OMAP1510_MCBSP3_BASE,
+ .end = OMAP1510_MCBSP3_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP1510_MCBSP3_BASE,
+ .end = OMAP1510_MCBSP3_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_McBSP3RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_McBSP3TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP_DMA_MCBSP3_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP_DMA_MCBSP3_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+};
+
static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
{
- .phys_base = OMAP1510_MCBSP1_BASE,
- .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
- .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
- .rx_irq = INT_McBSP1RX,
- .tx_irq = INT_McBSP1TX,
.ops = &omap1_mcbsp_ops,
},
{
- .phys_base = OMAP1510_MCBSP2_BASE,
- .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
- .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
- .rx_irq = INT_1510_SPI_RX,
- .tx_irq = INT_1510_SPI_TX,
.ops = &omap1_mcbsp_ops,
},
{
- .phys_base = OMAP1510_MCBSP3_BASE,
- .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
- .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
- .rx_irq = INT_McBSP3RX,
- .tx_irq = INT_McBSP3TX,
.ops = &omap1_mcbsp_ops,
},
};
-#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
-#define OMAP15XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
+#define OMAP15XX_MCBSP_RES_SZ ARRAY_SIZE(omap15xx_mcbsp_res[1])
+#define OMAP15XX_MCBSP_COUNT ARRAY_SIZE(omap15xx_mcbsp_res)
#else
+#define omap15xx_mcbsp_res NULL
#define omap15xx_mcbsp_pdata NULL
-#define OMAP15XX_MCBSP_PDATA_SZ 0
-#define OMAP15XX_MCBSP_REG_NUM 0
+#define OMAP15XX_MCBSP_RES_SZ 0
+#define OMAP15XX_MCBSP_COUNT 0
#endif
#ifdef CONFIG_ARCH_OMAP16XX
+struct resource omap16xx_mcbsp_res[][6] = {
+ {
+ {
+ .name = "mpu",
+ .start = OMAP1610_MCBSP1_BASE,
+ .end = OMAP1610_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP1610_MCBSP1_BASE,
+ .end = OMAP1610_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_McBSP1RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_McBSP1TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP_DMA_MCBSP1_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP_DMA_MCBSP1_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+ {
+ {
+ .name = "mpu",
+ .start = OMAP1610_MCBSP2_BASE,
+ .end = OMAP1610_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP1610_MCBSP2_BASE,
+ .end = OMAP1610_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_1610_McBSP2_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_1610_McBSP2_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP_DMA_MCBSP2_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP_DMA_MCBSP2_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+ {
+ {
+ .name = "mpu",
+ .start = OMAP1610_MCBSP3_BASE,
+ .end = OMAP1610_MCBSP3_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP1610_MCBSP3_BASE,
+ .end = OMAP1610_MCBSP3_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_McBSP3RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_McBSP3TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP_DMA_MCBSP3_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP_DMA_MCBSP3_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+};
+
static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
{
- .phys_base = OMAP1610_MCBSP1_BASE,
- .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
- .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
- .rx_irq = INT_McBSP1RX,
- .tx_irq = INT_McBSP1TX,
.ops = &omap1_mcbsp_ops,
},
{
- .phys_base = OMAP1610_MCBSP2_BASE,
- .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
- .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
- .rx_irq = INT_1610_McBSP2_RX,
- .tx_irq = INT_1610_McBSP2_TX,
.ops = &omap1_mcbsp_ops,
},
{
- .phys_base = OMAP1610_MCBSP3_BASE,
- .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
- .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
- .rx_irq = INT_McBSP3RX,
- .tx_irq = INT_McBSP3TX,
.ops = &omap1_mcbsp_ops,
},
};
-#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
-#define OMAP16XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
+#define OMAP16XX_MCBSP_RES_SZ ARRAY_SIZE(omap16xx_mcbsp_res[1])
+#define OMAP16XX_MCBSP_COUNT ARRAY_SIZE(omap16xx_mcbsp_res)
#else
+#define omap16xx_mcbsp_res NULL
#define omap16xx_mcbsp_pdata NULL
-#define OMAP16XX_MCBSP_PDATA_SZ 0
-#define OMAP16XX_MCBSP_REG_NUM 0
+#define OMAP16XX_MCBSP_RES_SZ 0
+#define OMAP16XX_MCBSP_COUNT 0
#endif
static int __init omap1_mcbsp_init(void)
{
- if (cpu_is_omap7xx()) {
- omap_mcbsp_count = OMAP7XX_MCBSP_PDATA_SZ;
- omap_mcbsp_cache_size = OMAP7XX_MCBSP_REG_NUM * sizeof(u16);
- } else if (cpu_is_omap15xx()) {
- omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ;
- omap_mcbsp_cache_size = OMAP15XX_MCBSP_REG_NUM * sizeof(u16);
- } else if (cpu_is_omap16xx()) {
- omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ;
- omap_mcbsp_cache_size = OMAP16XX_MCBSP_REG_NUM * sizeof(u16);
- }
+ if (cpu_is_omap7xx())
+ omap_mcbsp_count = OMAP7XX_MCBSP_COUNT;
+ else if (cpu_is_omap15xx())
+ omap_mcbsp_count = OMAP15XX_MCBSP_COUNT;
+ else if (cpu_is_omap16xx())
+ omap_mcbsp_count = OMAP16XX_MCBSP_COUNT;
mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
GFP_KERNEL);
@@ -193,16 +434,22 @@ static int __init omap1_mcbsp_init(void)
return -ENOMEM;
if (cpu_is_omap7xx())
- omap_mcbsp_register_board_cfg(omap7xx_mcbsp_pdata,
- OMAP7XX_MCBSP_PDATA_SZ);
+ omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res[0],
+ OMAP7XX_MCBSP_RES_SZ,
+ omap7xx_mcbsp_pdata,
+ OMAP7XX_MCBSP_COUNT);
if (cpu_is_omap15xx())
- omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata,
- OMAP15XX_MCBSP_PDATA_SZ);
+ omap_mcbsp_register_board_cfg(omap15xx_mcbsp_res[0],
+ OMAP15XX_MCBSP_RES_SZ,
+ omap15xx_mcbsp_pdata,
+ OMAP15XX_MCBSP_COUNT);
if (cpu_is_omap16xx())
- omap_mcbsp_register_board_cfg(omap16xx_mcbsp_pdata,
- OMAP16XX_MCBSP_PDATA_SZ);
+ omap_mcbsp_register_board_cfg(omap16xx_mcbsp_res[0],
+ OMAP16XX_MCBSP_RES_SZ,
+ omap16xx_mcbsp_pdata,
+ OMAP16XX_MCBSP_COUNT);
return omap_mcbsp_init();
}
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index f9c9df5..ebc0db1 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -101,177 +101,639 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
}
EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
-
/* Platform data */
#ifdef CONFIG_ARCH_OMAP2420
-static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
+struct resource omap2420_mcbsp_res[][6] = {
{
- .phys_base = OMAP24XX_MCBSP1_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
- .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
+ {
+ .name = "mpu",
+ .start = OMAP24XX_MCBSP1_BASE,
+ .end = OMAP24XX_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP24XX_MCBSP1_BASE,
+ .end = OMAP24XX_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP1_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP1_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP1_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP1_TX,
+ .flags = IORESOURCE_DMA,
+ },
},
{
- .phys_base = OMAP24XX_MCBSP2_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
- .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
+ {
+ .name = "mpu",
+ .start = OMAP24XX_MCBSP2_BASE,
+ .end = OMAP24XX_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP24XX_MCBSP2_BASE,
+ .end = OMAP24XX_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP2_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP2_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP2_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP2_TX,
+ .flags = IORESOURCE_DMA,
+ },
},
};
-#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
-#define OMAP2420_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
+
+#define OMAP2420_MCBSP_RES_SZ ARRAY_SIZE(omap2420_mcbsp_res[1])
+#define OMAP2420_MCBSP_COUNT ARRAY_SIZE(omap2420_mcbsp_res)
#else
-#define omap2420_mcbsp_pdata NULL
-#define OMAP2420_MCBSP_PDATA_SZ 0
-#define OMAP2420_MCBSP_REG_NUM 0
+#define omap2420_mcbsp_res NULL
+#define OMAP2420_MCBSP_RES_SZ 0
+#define OMAP2420_MCBSP_COUNT 0
#endif
+#define omap2420_mcbsp_pdata NULL
+
#ifdef CONFIG_ARCH_OMAP2430
-static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
+struct resource omap2430_mcbsp_res[][6] = {
{
- .phys_base = OMAP24XX_MCBSP1_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
- .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
+ {
+ .name = "mpu",
+ .start = OMAP24XX_MCBSP1_BASE,
+ .end = OMAP24XX_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP24XX_MCBSP1_BASE,
+ .end = OMAP24XX_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP1_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP1_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP1_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP1_TX,
+ .flags = IORESOURCE_DMA,
+ },
},
{
- .phys_base = OMAP24XX_MCBSP2_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
- .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
+ {
+ .name = "mpu",
+ .start = OMAP24XX_MCBSP2_BASE,
+ .end = OMAP24XX_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP24XX_MCBSP2_BASE,
+ .end = OMAP24XX_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP2_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP2_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP2_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP2_TX,
+ .flags = IORESOURCE_DMA,
+ },
},
{
- .phys_base = OMAP2430_MCBSP3_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
- .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
+ {
+ .name = "mpu",
+ .start = OMAP2430_MCBSP3_BASE,
+ .end = OMAP2430_MCBSP3_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP2430_MCBSP3_BASE,
+ .end = OMAP2430_MCBSP3_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP3_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP3_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP3_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP3_TX,
+ .flags = IORESOURCE_DMA,
+ },
},
{
- .phys_base = OMAP2430_MCBSP4_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
- .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
+ {
+ .name = "mpu",
+ .start = OMAP2430_MCBSP4_BASE,
+ .end = OMAP2430_MCBSP4_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP2430_MCBSP4_BASE,
+ .end = OMAP2430_MCBSP4_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP4_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP4_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP4_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP4_TX,
+ .flags = IORESOURCE_DMA,
+ },
},
{
- .phys_base = OMAP2430_MCBSP5_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
- .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
+ {
+ .name = "mpu",
+ .start = OMAP2430_MCBSP5_BASE,
+ .end = OMAP2430_MCBSP5_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP2430_MCBSP5_BASE,
+ .end = OMAP2430_MCBSP5_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP5_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP5_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP5_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP5_TX,
+ .flags = IORESOURCE_DMA,
+ },
},
};
-#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
-#define OMAP2430_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
+
+#define OMAP2430_MCBSP_RES_SZ ARRAY_SIZE(omap2430_mcbsp_res[1])
+#define OMAP2430_MCBSP_COUNT ARRAY_SIZE(omap2430_mcbsp_res)
#else
-#define omap2430_mcbsp_pdata NULL
-#define OMAP2430_MCBSP_PDATA_SZ 0
-#define OMAP2430_MCBSP_REG_NUM 0
+#define omap2430_mcbsp_res NULL
+#define OMAP2430_MCBSP_RES_SZ 0
+#define OMAP2430_MCBSP_COUNT 0
#endif
+#define omap2430_mcbsp_pdata NULL
+
#ifdef CONFIG_ARCH_OMAP3
+struct resource omap34xx_mcbsp_res[][7] = {
+ {
+ {
+ .name = "mpu",
+ .start = OMAP34XX_MCBSP1_BASE,
+ .end = OMAP34XX_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP34XX_MCBSP1_BASE,
+ .end = OMAP34XX_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP1_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP1_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP1_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP1_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+ {
+ {
+ .name = "mpu",
+ .start = OMAP34XX_MCBSP2_BASE,
+ .end = OMAP34XX_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP34XX_MCBSP2_BASE,
+ .end = OMAP34XX_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "sidetone",
+ .start = OMAP34XX_MCBSP2_ST_BASE,
+ .end = OMAP34XX_MCBSP2_ST_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP2_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP2_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP2_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP2_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+ {
+ {
+ .name = "mpu",
+ .start = OMAP34XX_MCBSP3_BASE,
+ .end = OMAP34XX_MCBSP3_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP34XX_MCBSP3_BASE,
+ .end = OMAP34XX_MCBSP3_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "sidetone",
+ .start = OMAP34XX_MCBSP3_ST_BASE,
+ .end = OMAP34XX_MCBSP3_ST_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP3_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP3_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP3_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP3_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+ {
+ {
+ .name = "mpu",
+ .start = OMAP34XX_MCBSP4_BASE,
+ .end = OMAP34XX_MCBSP4_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP34XX_MCBSP4_BASE,
+ .end = OMAP34XX_MCBSP4_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP4_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP4_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP4_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP4_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+ {
+ {
+ .name = "mpu",
+ .start = OMAP34XX_MCBSP5_BASE,
+ .end = OMAP34XX_MCBSP5_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP34XX_MCBSP5_BASE,
+ .end = OMAP34XX_MCBSP5_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = INT_24XX_MCBSP5_IRQ_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = INT_24XX_MCBSP5_IRQ_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP24XX_DMA_MCBSP5_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP24XX_DMA_MCBSP5_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ },
+};
+
static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
{
- .phys_base = OMAP34XX_MCBSP1_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
- .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
.buffer_size = 0x80, /* The FIFO has 128 locations */
},
{
- .phys_base = OMAP34XX_MCBSP2_BASE,
- .phys_base_st = OMAP34XX_MCBSP2_ST_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
- .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
.buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */
},
{
- .phys_base = OMAP34XX_MCBSP3_BASE,
- .phys_base_st = OMAP34XX_MCBSP3_ST_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
- .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
.buffer_size = 0x80, /* The FIFO has 128 locations */
},
{
- .phys_base = OMAP34XX_MCBSP4_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
- .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
.buffer_size = 0x80, /* The FIFO has 128 locations */
},
{
- .phys_base = OMAP34XX_MCBSP5_BASE,
- .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX,
- .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
- .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
.buffer_size = 0x80, /* The FIFO has 128 locations */
},
};
-#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
-#define OMAP34XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
+#define OMAP34XX_MCBSP_RES_SZ ARRAY_SIZE(omap34xx_mcbsp_res[1])
+#define OMAP34XX_MCBSP_COUNT ARRAY_SIZE(omap34xx_mcbsp_res)
#else
#define omap34xx_mcbsp_pdata NULL
-#define OMAP34XX_MCBSP_PDATA_SZ 0
-#define OMAP34XX_MCBSP_REG_NUM 0
+#define omap34XX_mcbsp_res NULL
+#define OMAP34XX_MCBSP_RES_SZ 0
+#define OMAP34XX_MCBSP_COUNT 0
#endif
-static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
+struct resource omap44xx_mcbsp_res[][6] = {
{
- .phys_base = OMAP44XX_MCBSP1_BASE,
- .dma_rx_sync = OMAP44XX_DMA_MCBSP1_RX,
- .dma_tx_sync = OMAP44XX_DMA_MCBSP1_TX,
- .tx_irq = OMAP44XX_IRQ_MCBSP1,
+ {
+ .name = "mpu",
+ .start = OMAP44XX_MCBSP1_BASE,
+ .end = OMAP44XX_MCBSP1_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP44XX_MCBSP1_DMA_BASE,
+ .end = OMAP44XX_MCBSP1_DMA_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = 0,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = OMAP44XX_IRQ_MCBSP1,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP44XX_DMA_MCBSP1_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP44XX_DMA_MCBSP1_TX,
+ .flags = IORESOURCE_DMA,
+ },
},
{
- .phys_base = OMAP44XX_MCBSP2_BASE,
- .dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX,
- .dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX,
- .tx_irq = OMAP44XX_IRQ_MCBSP2,
+ {
+ .name = "mpu",
+ .start = OMAP44XX_MCBSP2_BASE,
+ .end = OMAP44XX_MCBSP2_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP44XX_MCBSP2_DMA_BASE,
+ .end = OMAP44XX_MCBSP2_DMA_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = 0,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = OMAP44XX_IRQ_MCBSP2,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP44XX_DMA_MCBSP2_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP44XX_DMA_MCBSP2_TX,
+ .flags = IORESOURCE_DMA,
+ },
},
{
- .phys_base = OMAP44XX_MCBSP3_BASE,
- .dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX,
- .dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX,
- .tx_irq = OMAP44XX_IRQ_MCBSP3,
+ {
+ .name = "mpu",
+ .start = OMAP44XX_MCBSP3_BASE,
+ .end = OMAP44XX_MCBSP3_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP44XX_MCBSP3_DMA_BASE,
+ .end = OMAP44XX_MCBSP3_DMA_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = 0,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = OMAP44XX_IRQ_MCBSP3,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP44XX_DMA_MCBSP3_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP44XX_DMA_MCBSP3_TX,
+ .flags = IORESOURCE_DMA,
+ },
},
{
- .phys_base = OMAP44XX_MCBSP4_BASE,
- .dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX,
- .dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX,
- .tx_irq = OMAP44XX_IRQ_MCBSP4,
+ {
+ .name = "mpu",
+ .start = OMAP44XX_MCBSP4_BASE,
+ .end = OMAP44XX_MCBSP4_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "dma",
+ .start = OMAP44XX_MCBSP4_BASE,
+ .end = OMAP44XX_MCBSP4_BASE + SZ_256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "rx",
+ .start = 0,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "tx",
+ .start = OMAP44XX_IRQ_MCBSP4,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = OMAP44XX_DMA_MCBSP4_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ {
+ .name = "tx",
+ .start = OMAP44XX_DMA_MCBSP4_TX,
+ .flags = IORESOURCE_DMA,
+ },
},
};
-#define OMAP44XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap44xx_mcbsp_pdata)
-#define OMAP44XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
+
+#define omap44xx_mcbsp_pdata NULL
+#define OMAP44XX_MCBSP_RES_SZ ARRAY_SIZE(omap44xx_mcbsp_res[1])
+#define OMAP44XX_MCBSP_COUNT ARRAY_SIZE(omap44xx_mcbsp_res)
static int __init omap2_mcbsp_init(void)
{
- if (cpu_is_omap2420()) {
- omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
- omap_mcbsp_cache_size = OMAP2420_MCBSP_REG_NUM * sizeof(u16);
- } else if (cpu_is_omap2430()) {
- omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
- omap_mcbsp_cache_size = OMAP2430_MCBSP_REG_NUM * sizeof(u32);
- } else if (cpu_is_omap34xx()) {
- omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
- omap_mcbsp_cache_size = OMAP34XX_MCBSP_REG_NUM * sizeof(u32);
- } else if (cpu_is_omap44xx()) {
- omap_mcbsp_count = OMAP44XX_MCBSP_PDATA_SZ;
- omap_mcbsp_cache_size = OMAP44XX_MCBSP_REG_NUM * sizeof(u32);
- }
+ if (cpu_is_omap2420())
+ omap_mcbsp_count = OMAP2420_MCBSP_COUNT;
+ else if (cpu_is_omap2430())
+ omap_mcbsp_count = OMAP2430_MCBSP_COUNT;
+ else if (cpu_is_omap34xx())
+ omap_mcbsp_count = OMAP34XX_MCBSP_COUNT;
+ else if (cpu_is_omap44xx())
+ omap_mcbsp_count = OMAP44XX_MCBSP_COUNT;
mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
GFP_KERNEL);
@@ -279,17 +741,25 @@ static int __init omap2_mcbsp_init(void)
return -ENOMEM;
if (cpu_is_omap2420())
- omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata,
- OMAP2420_MCBSP_PDATA_SZ);
+ omap_mcbsp_register_board_cfg(omap2420_mcbsp_res[0],
+ OMAP2420_MCBSP_RES_SZ,
+ omap2420_mcbsp_pdata,
+ OMAP2420_MCBSP_COUNT);
if (cpu_is_omap2430())
- omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata,
- OMAP2430_MCBSP_PDATA_SZ);
+ omap_mcbsp_register_board_cfg(omap2430_mcbsp_res[0],
+ OMAP2420_MCBSP_RES_SZ,
+ omap2430_mcbsp_pdata,
+ OMAP2430_MCBSP_COUNT);
if (cpu_is_omap34xx())
- omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
- OMAP34XX_MCBSP_PDATA_SZ);
+ omap_mcbsp_register_board_cfg(omap34xx_mcbsp_res[0],
+ OMAP34XX_MCBSP_RES_SZ,
+ omap34xx_mcbsp_pdata,
+ OMAP34XX_MCBSP_COUNT);
if (cpu_is_omap44xx())
- omap_mcbsp_register_board_cfg(omap44xx_mcbsp_pdata,
- OMAP44XX_MCBSP_PDATA_SZ);
+ omap_mcbsp_register_board_cfg(omap44xx_mcbsp_res[0],
+ OMAP44XX_MCBSP_RES_SZ,
+ omap44xx_mcbsp_pdata,
+ OMAP44XX_MCBSP_COUNT);
return omap_mcbsp_init();
}
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index fc81912..30b2d0a 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -35,8 +35,8 @@
static struct platform_device **omap_mcbsp_devices;
-void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
- int size)
+void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
+ struct omap_mcbsp_platform_data *config, int size)
{
int i;
@@ -54,6 +54,8 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
if (!new_mcbsp)
continue;
+ platform_device_add_resources(new_mcbsp, &res[i * res_count],
+ res_count);
new_mcbsp->dev.platform_data = &config[i];
ret = platform_device_add(new_mcbsp);
if (ret) {
@@ -65,8 +67,8 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
}
#else
-void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
- int size)
+void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
+ struct omap_mcbsp_platform_data *config, int size)
{ }
#endif
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index b87d83c..e9bde6e 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -63,9 +63,12 @@ static struct platform_device omap_mcbsp##port_nr = { \
#define OMAP34XX_MCBSP4_BASE 0x49026000
#define OMAP34XX_MCBSP5_BASE 0x48096000
-#define OMAP44XX_MCBSP1_BASE 0x49022000
-#define OMAP44XX_MCBSP2_BASE 0x49024000
-#define OMAP44XX_MCBSP3_BASE 0x49026000
+#define OMAP44XX_MCBSP1_BASE 0x40122000
+#define OMAP44XX_MCBSP1_DMA_BASE 0x49022000
+#define OMAP44XX_MCBSP2_BASE 0x40124000
+#define OMAP44XX_MCBSP2_DMA_BASE 0x49024000
+#define OMAP44XX_MCBSP3_BASE 0x40126000
+#define OMAP44XX_MCBSP3_DMA_BASE 0x49026000
#define OMAP44XX_MCBSP4_BASE 0x48096000
#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
@@ -445,6 +448,7 @@ struct omap_mcbsp_st_data {
struct omap_mcbsp {
struct device *dev;
unsigned long phys_base;
+ unsigned long phys_dma_base;
void __iomem *io_base;
u8 id;
u8 free;
@@ -488,8 +492,8 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size;
#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
int omap_mcbsp_init(void);
-void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
- int size);
+void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
+ struct omap_mcbsp_platform_data *config, int size);
void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config);
#ifdef CONFIG_ARCH_OMAP3
void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 1fbfcf3..0adffea 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -1674,7 +1674,8 @@ static const struct attribute_group sidetone_attr_group = {
static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
{
- struct omap_mcbsp_platform_data *pdata = mcbsp->pdata;
+ struct platform_device *pdev;
+ struct resource *res;
struct omap_mcbsp_st_data *st_data;
int err;
@@ -1684,7 +1685,10 @@ static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
goto err1;
}
- st_data->io_base_st = ioremap(pdata->phys_base_st, SZ_4K);
+ pdev = container_of(mcbsp->dev, struct platform_device, dev);
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone");
+ st_data->io_base_st = ioremap(res->start, resource_size(res));
if (!st_data->io_base_st) {
err = -ENOMEM;
goto err2;
@@ -1773,6 +1777,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
struct omap_mcbsp *mcbsp;
int id = pdev->id - 1;
+ struct resource *res;
int ret = 0;
if (!pdata) {
@@ -1802,25 +1807,60 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
mcbsp->dma_tx_lch = -1;
mcbsp->dma_rx_lch = -1;
- mcbsp->phys_base = pdata->phys_base;
- mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
+ if (!res) {
+ dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory resource\n",
+ __func__, pdev->id);
+ ret = -ENOMEM;
+ goto exit;
+ }
+ mcbsp->phys_base = res->start;
+ mcbsp->io_base = ioremap(res->start, resource_size(res));
if (!mcbsp->io_base) {
ret = -ENOMEM;
goto err_ioremap;
}
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
+ if (!res) {
+ dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory resource\n",
+ __func__, pdev->id);
+ ret = -ENOMEM;
+ goto exit;
+ }
+ mcbsp->phys_dma_base = res->start;
+
+ omap_mcbsp_cache_size = resource_size(res);
+
/* Default I/O is IRQ based */
mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
- mcbsp->tx_irq = pdata->tx_irq;
- mcbsp->rx_irq = pdata->rx_irq;
- mcbsp->dma_rx_sync = pdata->dma_rx_sync;
- mcbsp->dma_tx_sync = pdata->dma_tx_sync;
+
+ mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
+ mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
+ if (!res) {
+ dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n",
+ __func__, pdev->id);
+ ret = -ENODEV;
+ goto err_res;
+ }
+ mcbsp->dma_rx_sync = res->start;
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
+ if (!res) {
+ dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n",
+ __func__, pdev->id);
+ ret = -ENODEV;
+ goto err_res;
+ }
+ mcbsp->dma_tx_sync = res->start;
mcbsp->iclk = clk_get(&pdev->dev, "ick");
if (IS_ERR(mcbsp->iclk)) {
ret = PTR_ERR(mcbsp->iclk);
dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
- goto err_iclk;
+ goto err_res;
}
mcbsp->fclk = clk_get(&pdev->dev, "fck");
@@ -1842,7 +1882,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
err_fclk:
clk_put(mcbsp->iclk);
-err_iclk:
+err_res:
iounmap(mcbsp->io_base);
err_ioremap:
kfree(mcbsp);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v1 02/10] OMAP: McBSP: Convert McBSP to platform device model
2010-12-21 7:40 ` [PATCH v1 02/10] OMAP: McBSP: Convert McBSP to platform device model Kishon Vijay Abraham I
@ 2010-12-23 9:29 ` Varadarajan, Charulatha
0 siblings, 0 replies; 17+ messages in thread
From: Varadarajan, Charulatha @ 2010-12-23 9:29 UTC (permalink / raw)
To: Kishon Vijay Abraham I; +Cc: linux-omap, paul, khilman, p-basak2, b-cousson
Kishon,
On Tue, Dec 21, 2010 at 13:10, Kishon Vijay Abraham I <kishon@ti.com> wrote:
> Implement McBSP as platform device and add support for
> registering through platform device layer using resource
> structures.
>
> Later in this patch series, OMAP2+ McBSP driver would be modified to
> use hwmod framework after populating the omap2+ hwmod database.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> arch/arm/mach-omap1/mcbsp.c | 383 ++++++++++++++---
> arch/arm/mach-omap2/mcbsp.c | 708 +++++++++++++++++++++++++------
> arch/arm/plat-omap/devices.c | 10 +-
> arch/arm/plat-omap/include/plat/mcbsp.h | 14 +-
> arch/arm/plat-omap/mcbsp.c | 60 +++-
> 5 files changed, 969 insertions(+), 206 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
> index 372ea71..4324ba4 100644
> --- a/arch/arm/mach-omap1/mcbsp.c
> +++ b/arch/arm/mach-omap1/mcbsp.c
> @@ -10,6 +10,7 @@
> *
> * Multichannel mode not supported.
> */
> +#include <linux/ioport.h>
> #include <linux/module.h>
> #include <linux/init.h>
> #include <linux/clk.h>
> @@ -78,114 +79,354 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
> };
>
> #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
> +struct resource omap7xx_mcbsp_res[][6] = {
> + {
> + {
> + .name = "mpu",
> + .start = OMAP7XX_MCBSP1_BASE,
> + .end = OMAP7XX_MCBSP1_BASE + SZ_256,
> + .flags = IORESOURCE_MEM,
> + },
> + {
> + .name = "dma",
> + .start = OMAP7XX_MCBSP1_BASE,
> + .end = OMAP7XX_MCBSP1_BASE + SZ_256,
> + .flags = IORESOURCE_MEM,
> + },
The above two resources looks similar except for the name. It would be
good to mention the reason for
providing two resource names for a single resource.
Same comment applicable to all McBSPs in other OMAPs too.
-V Charulatha
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v1 03/10] OMAP2420: hwmod data: Add McBSP
2010-12-21 7:40 [PATCH v1 01/10] OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct Kishon Vijay Abraham I
2010-12-21 7:40 ` [PATCH v1 02/10] OMAP: McBSP: Convert McBSP to platform device model Kishon Vijay Abraham I
@ 2010-12-21 7:40 ` Kishon Vijay Abraham I
2010-12-21 7:40 ` [PATCH v1 04/10] OMAP2430: " Kishon Vijay Abraham I
` (7 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Kishon Vijay Abraham I @ 2010-12-21 7:40 UTC (permalink / raw)
To: linux-omap
Cc: paul, khilman, p-basak2, b-cousson, kishon, Charulatha V,
Shubhrajyoti D
Add McBSP hwmod data for OMAP2420.
Also add macros in prcm-common.h for idlest bit of OMAP24XX McBSP devices
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 167 ++++++++++++++++++++++++++++
arch/arm/mach-omap2/prcm-common.h | 4 +
2 files changed, 171 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a1a3dd6..942e6f3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -81,6 +81,8 @@ static struct omap_hwmod omap2420_uart2_hwmod;
static struct omap_hwmod omap2420_uart3_hwmod;
static struct omap_hwmod omap2420_i2c1_hwmod;
static struct omap_hwmod omap2420_i2c2_hwmod;
+static struct omap_hwmod omap2420_mcbsp1_hwmod;
+static struct omap_hwmod omap2420_mcbsp2_hwmod;
/* L4_CORE -> L4_WKUP interface */
static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
@@ -557,6 +559,167 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
.flags = HWMOD_16BIT_REG,
};
+/*
+ * 'mcbsp' class
+ * multi channel buffered serial port controller
+ */
+
+static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {
+ .name = "mcbsp",
+};
+
+/* mcbsp1 */
+static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
+ { .name = "tx", .irq = 59 },
+ { .name = "rx", .irq = 60 },
+};
+
+static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = {
+ { .name = "rx", .dma_req = 31 },
+ { .name = "tx", .dma_req = 30 },
+};
+
+static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x48074000,
+ .pa_end = 0x480740ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_core -> mcbsp1 */
+static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = {
+ .master = &omap2420_l4_core_hwmod,
+ .slave = &omap2420_mcbsp1_hwmod,
+ .clk = "mcbsp1_ick",
+ .addr = omap2420_mcbsp1_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap2420_mcbsp1_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x48074000,
+ .pa_end = 0x480740ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1_dma = {
+ .master = &omap2420_l4_core_hwmod,
+ .slave = &omap2420_mcbsp1_hwmod,
+ .clk = "mcbsp1_ick",
+ .addr = omap2420_mcbsp1_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp1 slave ports */
+static struct omap_hwmod_ocp_if *omap2420_mcbsp1_slaves[] = {
+ &omap2420_l4_core__mcbsp1,
+ &omap2420_l4_core__mcbsp1_dma,
+};
+
+static struct omap_hwmod omap2420_mcbsp1_hwmod = {
+ .name = "mcbsp1",
+ .class = &omap2420_mcbsp_hwmod_class,
+ .mpu_irqs = omap2420_mcbsp1_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs),
+ .sdma_reqs = omap2420_mcbsp1_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs),
+ .main_clk = "mcbsp1_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP24XX_EN_MCBSP1_SHIFT,
+ .module_offs = CORE_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
+ },
+ },
+ .slaves = omap2420_mcbsp1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp1_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
+/* mcbsp2 */
+static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {
+ { .name = "tx", .irq = 62 },
+ { .name = "rx", .irq = 63 },
+};
+
+static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = {
+ { .name = "rx", .dma_req = 33 },
+ { .name = "tx", .dma_req = 32 },
+};
+
+static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x48076000,
+ .pa_end = 0x480760ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_core -> mcbsp2 */
+static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = {
+ .master = &omap2420_l4_core_hwmod,
+ .slave = &omap2420_mcbsp2_hwmod,
+ .clk = "mcbsp2_ick",
+ .addr = omap2420_mcbsp2_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap2420_mcbsp2_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x48076000,
+ .pa_end = 0x480760ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2_dma = {
+ .master = &omap2420_l4_core_hwmod,
+ .slave = &omap2420_mcbsp2_hwmod,
+ .clk = "mcbsp2_ick",
+ .addr = omap2420_mcbsp2_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp2 slave ports */
+static struct omap_hwmod_ocp_if *omap2420_mcbsp2_slaves[] = {
+ &omap2420_l4_core__mcbsp2,
+ &omap2420_l4_core__mcbsp2_dma,
+};
+
+static struct omap_hwmod omap2420_mcbsp2_hwmod = {
+ .name = "mcbsp2",
+ .class = &omap2420_mcbsp_hwmod_class,
+ .mpu_irqs = omap2420_mcbsp2_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs),
+ .sdma_reqs = omap2420_mcbsp2_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs),
+ .main_clk = "mcbsp2_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP24XX_EN_MCBSP2_SHIFT,
+ .module_offs = CORE_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
+ },
+ },
+ .slaves = omap2420_mcbsp2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp2_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
static __initdata struct omap_hwmod *omap2420_hwmods[] = {
&omap2420_l3_main_hwmod,
&omap2420_l4_core_hwmod,
@@ -569,6 +732,10 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
&omap2420_uart3_hwmod,
&omap2420_i2c1_hwmod,
&omap2420_i2c2_hwmod,
+
+ /* mcbsp class */
+ &omap2420_mcbsp1_hwmod,
+ &omap2420_mcbsp2_hwmod,
NULL,
};
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 298a22a..f9eaa82 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -193,6 +193,10 @@
#define OMAP24XX_ST_MCSPI2_MASK (1 << 18)
#define OMAP24XX_ST_MCSPI1_SHIFT 17
#define OMAP24XX_ST_MCSPI1_MASK (1 << 17)
+#define OMAP24XX_ST_MCBSP2_SHIFT 16
+#define OMAP24XX_ST_MCBSP2_MASK (1 << 16)
+#define OMAP24XX_ST_MCBSP1_SHIFT 15
+#define OMAP24XX_ST_MCBSP1_MASK (1 << 15)
#define OMAP24XX_ST_GPT12_SHIFT 14
#define OMAP24XX_ST_GPT12_MASK (1 << 14)
#define OMAP24XX_ST_GPT11_SHIFT 13
--
1.7.0.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 04/10] OMAP2430: hwmod data: Add McBSP
2010-12-21 7:40 [PATCH v1 01/10] OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct Kishon Vijay Abraham I
2010-12-21 7:40 ` [PATCH v1 02/10] OMAP: McBSP: Convert McBSP to platform device model Kishon Vijay Abraham I
2010-12-21 7:40 ` [PATCH v1 03/10] OMAP2420: hwmod data: Add McBSP Kishon Vijay Abraham I
@ 2010-12-21 7:40 ` Kishon Vijay Abraham I
2010-12-21 7:40 ` [PATCH v1 05/10] OMAP3: " Kishon Vijay Abraham I
` (6 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Kishon Vijay Abraham I @ 2010-12-21 7:40 UTC (permalink / raw)
To: linux-omap
Cc: paul, khilman, p-basak2, b-cousson, kishon, Charulatha V,
Shubhrajyoti D
From: Charulatha V <charu@ti.com>
Add McBSP hwmod data for OMAP2430.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 415 ++++++++++++++++++++++++++++
1 files changed, 415 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 7cf0d3a..ddca2b8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -81,6 +81,11 @@ static struct omap_hwmod omap2430_uart2_hwmod;
static struct omap_hwmod omap2430_uart3_hwmod;
static struct omap_hwmod omap2430_i2c1_hwmod;
static struct omap_hwmod omap2430_i2c2_hwmod;
+static struct omap_hwmod omap2430_mcbsp1_hwmod;
+static struct omap_hwmod omap2430_mcbsp2_hwmod;
+static struct omap_hwmod omap2430_mcbsp3_hwmod;
+static struct omap_hwmod omap2430_mcbsp4_hwmod;
+static struct omap_hwmod omap2430_mcbsp5_hwmod;
/* I2C IP block address space length (in bytes) */
#define OMAP2_I2C_AS_LEN 128
@@ -569,6 +574,409 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
};
+/*
+ * 'mcbsp' class
+ * multi channel buffered serial port controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap2430_mcbsp_sysc = {
+ .rev_offs = 0x007C,
+ .sysc_offs = 0x008C,
+ .sysc_flags = (SYSC_HAS_SOFTRESET),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = {
+ .name = "mcbsp",
+ .sysc = &omap2430_mcbsp_sysc,
+};
+
+/* mcbsp1 */
+static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
+ { .name = "tx", .irq = 59 },
+ { .name = "rx", .irq = 60 },
+ { .name = "ovr", .irq = 61 },
+ { .name = "common", .irq = 64 },
+};
+
+static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = {
+ { .name = "rx", .dma_req = 31 },
+ { .name = "tx", .dma_req = 30 },
+};
+
+static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x48074000,
+ .pa_end = 0x480740ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_core -> mcbsp1 */
+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mcbsp1_hwmod,
+ .clk = "mcbsp1_ick",
+ .addr = omap2430_mcbsp1_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_mcbsp1_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap2430_mcbsp1_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x48074000,
+ .pa_end = 0x480740ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1_dma = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mcbsp1_hwmod,
+ .clk = "mcbsp1_ick",
+ .addr = omap2430_mcbsp1_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_mcbsp1_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp1 slave ports */
+static struct omap_hwmod_ocp_if *omap2430_mcbsp1_slaves[] = {
+ &omap2430_l4_core__mcbsp1,
+ &omap2430_l4_core__mcbsp1_dma,
+};
+
+static struct omap_hwmod omap2430_mcbsp1_hwmod = {
+ .name = "mcbsp1",
+ .class = &omap2430_mcbsp_hwmod_class,
+ .mpu_irqs = omap2430_mcbsp1_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_irqs),
+ .sdma_reqs = omap2430_mcbsp1_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs),
+ .main_clk = "mcbsp1_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP24XX_EN_MCBSP1_SHIFT,
+ .module_offs = CORE_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
+ },
+ },
+ .slaves = omap2430_mcbsp1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp1_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
+/* mcbsp2 */
+static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {
+ { .name = "tx", .irq = 62 },
+ { .name = "rx", .irq = 63 },
+ { .name = "common", .irq = 16 },
+};
+
+static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = {
+ { .name = "rx", .dma_req = 33 },
+ { .name = "tx", .dma_req = 32 },
+};
+
+static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x48076000,
+ .pa_end = 0x480760ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_core -> mcbsp2 */
+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mcbsp2_hwmod,
+ .clk = "mcbsp2_ick",
+ .addr = omap2430_mcbsp2_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_mcbsp2_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap2430_mcbsp2_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x48076000,
+ .pa_end = 0x480760ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2_dma = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mcbsp2_hwmod,
+ .clk = "mcbsp2_ick",
+ .addr = omap2430_mcbsp2_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_mcbsp2_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp2 slave ports */
+static struct omap_hwmod_ocp_if *omap2430_mcbsp2_slaves[] = {
+ &omap2430_l4_core__mcbsp2,
+ &omap2430_l4_core__mcbsp2_dma,
+};
+
+static struct omap_hwmod omap2430_mcbsp2_hwmod = {
+ .name = "mcbsp2",
+ .class = &omap2430_mcbsp_hwmod_class,
+ .mpu_irqs = omap2430_mcbsp2_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_irqs),
+ .sdma_reqs = omap2430_mcbsp2_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs),
+ .main_clk = "mcbsp2_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP24XX_EN_MCBSP2_SHIFT,
+ .module_offs = CORE_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
+ },
+ },
+ .slaves = omap2430_mcbsp2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp2_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
+/* mcbsp3 */
+static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {
+ { .name = "tx", .irq = 89 },
+ { .name = "rx", .irq = 90 },
+ { .name = "common", .irq = 17 },
+};
+
+static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = {
+ { .name = "rx", .dma_req = 17 },
+ { .name = "tx", .dma_req = 16 },
+};
+
+static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x4808C000,
+ .pa_end = 0x4808C0ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_core -> mcbsp3 */
+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mcbsp3_hwmod,
+ .clk = "mcbsp3_ick",
+ .addr = omap2430_mcbsp3_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_mcbsp3_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap2430_mcbsp3_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x4808C000,
+ .pa_end = 0x4808C0ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3_dma = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mcbsp3_hwmod,
+ .clk = "mcbsp3_ick",
+ .addr = omap2430_mcbsp3_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_mcbsp3_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp3 slave ports */
+static struct omap_hwmod_ocp_if *omap2430_mcbsp3_slaves[] = {
+ &omap2430_l4_core__mcbsp3,
+ &omap2430_l4_core__mcbsp3_dma,
+};
+
+static struct omap_hwmod omap2430_mcbsp3_hwmod = {
+ .name = "mcbsp3",
+ .class = &omap2430_mcbsp_hwmod_class,
+ .mpu_irqs = omap2430_mcbsp3_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_irqs),
+ .sdma_reqs = omap2430_mcbsp3_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs),
+ .main_clk = "mcbsp3_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP2430_EN_MCBSP3_SHIFT,
+ .module_offs = CORE_MOD,
+ .idlest_reg_id = 2,
+ .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
+ },
+ },
+ .slaves = omap2430_mcbsp3_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp3_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
+/* mcbsp4 */
+static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = {
+ { .name = "tx", .irq = 54 },
+ { .name = "rx", .irq = 55 },
+ { .name = "common", .irq = 18 },
+};
+
+static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = {
+ { .name = "rx", .dma_req = 19 },
+ { .name = "tx", .dma_req = 18 },
+};
+
+static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x4808E000,
+ .pa_end = 0x4808E0ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_core -> mcbsp4 */
+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mcbsp4_hwmod,
+ .clk = "mcbsp4_ick",
+ .addr = omap2430_mcbsp4_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_mcbsp4_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap2430_mcbsp4_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x4808E000,
+ .pa_end = 0x4808E0ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4_dma = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mcbsp4_hwmod,
+ .clk = "mcbsp4_ick",
+ .addr = omap2430_mcbsp4_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_mcbsp4_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp4 slave ports */
+static struct omap_hwmod_ocp_if *omap2430_mcbsp4_slaves[] = {
+ &omap2430_l4_core__mcbsp4,
+ &omap2430_l4_core__mcbsp4_dma,
+};
+
+static struct omap_hwmod omap2430_mcbsp4_hwmod = {
+ .name = "mcbsp4",
+ .class = &omap2430_mcbsp_hwmod_class,
+ .mpu_irqs = omap2430_mcbsp4_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_irqs),
+ .sdma_reqs = omap2430_mcbsp4_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs),
+ .main_clk = "mcbsp4_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP2430_EN_MCBSP4_SHIFT,
+ .module_offs = CORE_MOD,
+ .idlest_reg_id = 2,
+ .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
+ },
+ },
+ .slaves = omap2430_mcbsp4_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp4_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
+/* mcbsp5 */
+static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = {
+ { .name = "tx", .irq = 81 },
+ { .name = "rx", .irq = 82 },
+ { .name = "common", .irq = 19 },
+};
+
+static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = {
+ { .name = "rx", .dma_req = 21 },
+ { .name = "tx", .dma_req = 20 },
+};
+
+static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x48096000,
+ .pa_end = 0x480960ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_core -> mcbsp5 */
+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mcbsp5_hwmod,
+ .clk = "mcbsp5_ick",
+ .addr = omap2430_mcbsp5_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_mcbsp5_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap2430_mcbsp5_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x48096000,
+ .pa_end = 0x480960ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5_dma = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mcbsp5_hwmod,
+ .clk = "mcbsp5_ick",
+ .addr = omap2430_mcbsp5_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_mcbsp5_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp5 slave ports */
+static struct omap_hwmod_ocp_if *omap2430_mcbsp5_slaves[] = {
+ &omap2430_l4_core__mcbsp5,
+ &omap2430_l4_core__mcbsp5_dma,
+};
+
+static struct omap_hwmod omap2430_mcbsp5_hwmod = {
+ .name = "mcbsp5",
+ .class = &omap2430_mcbsp_hwmod_class,
+ .mpu_irqs = omap2430_mcbsp5_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_irqs),
+ .sdma_reqs = omap2430_mcbsp5_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs),
+ .main_clk = "mcbsp5_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP2430_EN_MCBSP5_SHIFT,
+ .module_offs = CORE_MOD,
+ .idlest_reg_id = 2,
+ .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
+ },
+ },
+ .slaves = omap2430_mcbsp5_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp5_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
static __initdata struct omap_hwmod *omap2430_hwmods[] = {
&omap2430_l3_main_hwmod,
&omap2430_l4_core_hwmod,
@@ -581,6 +989,13 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
&omap2430_uart3_hwmod,
&omap2430_i2c1_hwmod,
&omap2430_i2c2_hwmod,
+
+ /*mcbsp class*/
+ &omap2430_mcbsp1_hwmod,
+ &omap2430_mcbsp2_hwmod,
+ &omap2430_mcbsp3_hwmod,
+ &omap2430_mcbsp4_hwmod,
+ &omap2430_mcbsp5_hwmod,
NULL,
};
--
1.7.0.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 05/10] OMAP3: hwmod data: Add McBSP
2010-12-21 7:40 [PATCH v1 01/10] OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct Kishon Vijay Abraham I
` (2 preceding siblings ...)
2010-12-21 7:40 ` [PATCH v1 04/10] OMAP2430: " Kishon Vijay Abraham I
@ 2010-12-21 7:40 ` Kishon Vijay Abraham I
2010-12-21 7:40 ` [PATCH v1 06/10] OMAP4: " Kishon Vijay Abraham I
` (5 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Kishon Vijay Abraham I @ 2010-12-21 7:40 UTC (permalink / raw)
To: linux-omap
Cc: paul, khilman, p-basak2, b-cousson, kishon, Charulatha V,
Shubhrajyoti D
From: Charulatha V <charu@ti.com>
Add McBSP hwmod data for OMAP3.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 530 ++++++++++++++++++++++++++++
1 files changed, 530 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index a8bed84..c9aa2c7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -45,6 +45,13 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod;
static struct omap_hwmod omap3xxx_i2c1_hwmod;
static struct omap_hwmod omap3xxx_i2c2_hwmod;
static struct omap_hwmod omap3xxx_i2c3_hwmod;
+static struct omap_hwmod omap3xxx_mcbsp1_hwmod;
+static struct omap_hwmod omap3xxx_mcbsp2_hwmod;
+static struct omap_hwmod omap3xxx_mcbsp3_hwmod;
+static struct omap_hwmod omap3xxx_mcbsp4_hwmod;
+static struct omap_hwmod omap3xxx_mcbsp5_hwmod;
+static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod;
+static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod;
/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
@@ -739,6 +746,520 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
};
+/*
+ * 'mcbsp' class
+ * multi channel buffered serial port controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap3xxx_mcbsp_sysc = {
+ .sysc_offs = 0x008c,
+ .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SOFTRESET),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+ .clockact = 0x2,
+};
+
+static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = {
+ .name = "mcbsp",
+ .sysc = &omap3xxx_mcbsp_sysc,
+};
+
+/* mcbsp1 */
+static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {
+ { .name = "irq", .irq = 16 },
+ { .name = "tx", .irq = 59 },
+ { .name = "rx", .irq = 60 },
+};
+
+static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = {
+ { .name = "rx", .dma_req = 32 },
+ { .name = "tx", .dma_req = 31 },
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x48074000,
+ .pa_end = 0x480740ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_core -> mcbsp1 */
+static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap3xxx_mcbsp1_hwmod,
+ .clk = "mcbsp1_ick",
+ .addr = omap3xxx_mcbsp1_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp1_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x48074000,
+ .pa_end = 0x480740ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1_dma = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap3xxx_mcbsp1_hwmod,
+ .clk = "mcbsp1_ick",
+ .addr = omap3xxx_mcbsp1_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp1 slave ports */
+static struct omap_hwmod_ocp_if *omap3xxx_mcbsp1_slaves[] = {
+ &omap3xxx_l4_core__mcbsp1,
+ &omap3xxx_l4_core__mcbsp1_dma,
+};
+
+static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
+ .name = "mcbsp1",
+ .class = &omap3xxx_mcbsp_hwmod_class,
+ .mpu_irqs = omap3xxx_mcbsp1_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_irqs),
+ .sdma_reqs = omap3xxx_mcbsp1_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs),
+ .main_clk = "mcbsp1_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_MCBSP1_SHIFT,
+ .module_offs = CORE_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT,
+ },
+ },
+ .slaves = omap3xxx_mcbsp1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/* mcbsp2 */
+static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = {
+ { .name = "irq", .irq = 17 },
+ { .name = "tx", .irq = 62 },
+ { .name = "rx", .irq = 63 },
+};
+
+static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = {
+ { .name = "rx", .dma_req = 34 },
+ { .name = "tx", .dma_req = 33 },
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x49022000,
+ .pa_end = 0x490220ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> mcbsp2 */
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = {
+ .master = &omap3xxx_l4_per_hwmod,
+ .slave = &omap3xxx_mcbsp2_hwmod,
+ .clk = "mcbsp2_ick",
+ .addr = omap3xxx_mcbsp2_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp2_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x49022000,
+ .pa_end = 0x490220ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_dma = {
+ .master = &omap3xxx_l4_per_hwmod,
+ .slave = &omap3xxx_mcbsp2_hwmod,
+ .clk = "mcbsp2_ick",
+ .addr = omap3xxx_mcbsp2_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp2 slave ports */
+static struct omap_hwmod_ocp_if *omap3xxx_mcbsp2_slaves[] = {
+ &omap3xxx_l4_per__mcbsp2,
+ &omap3xxx_l4_per__mcbsp2_dma,
+};
+
+static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
+ .name = "mcbsp2",
+ .class = &omap3xxx_mcbsp_hwmod_class,
+ .mpu_irqs = omap3xxx_mcbsp2_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_irqs),
+ .sdma_reqs = omap3xxx_mcbsp2_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs),
+ .main_clk = "mcbsp2_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_MCBSP2_SHIFT,
+ .module_offs = OMAP3430_PER_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
+ },
+ },
+ .slaves = omap3xxx_mcbsp2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/* mcbsp3 */
+static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = {
+ { .name = "irq", .irq = 22 },
+ { .name = "tx", .irq = 89 },
+ { .name = "rx", .irq = 90 },
+};
+
+static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = {
+ { .name = "rx", .dma_req = 18 },
+ { .name = "tx", .dma_req = 17 },
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x49024000,
+ .pa_end = 0x490240ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> mcbsp3 */
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = {
+ .master = &omap3xxx_l4_per_hwmod,
+ .slave = &omap3xxx_mcbsp3_hwmod,
+ .clk = "mcbsp3_ick",
+ .addr = omap3xxx_mcbsp3_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp3_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x49024000,
+ .pa_end = 0x490240ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_dma = {
+ .master = &omap3xxx_l4_per_hwmod,
+ .slave = &omap3xxx_mcbsp3_hwmod,
+ .clk = "mcbsp3_ick",
+ .addr = omap3xxx_mcbsp3_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp3 slave ports */
+static struct omap_hwmod_ocp_if *omap3xxx_mcbsp3_slaves[] = {
+ &omap3xxx_l4_per__mcbsp3,
+ &omap3xxx_l4_per__mcbsp3_dma,
+};
+
+static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
+ .name = "mcbsp3",
+ .class = &omap3xxx_mcbsp_hwmod_class,
+ .mpu_irqs = omap3xxx_mcbsp3_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_irqs),
+ .sdma_reqs = omap3xxx_mcbsp3_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs),
+ .main_clk = "mcbsp3_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_MCBSP3_SHIFT,
+ .module_offs = OMAP3430_PER_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,
+ },
+ },
+ .slaves = omap3xxx_mcbsp3_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/* mcbsp4 */
+static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = {
+ { .name = "irq", .irq = 23 },
+ { .name = "tx", .irq = 54 },
+ { .name = "rx", .irq = 55 },
+};
+
+static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = {
+ { .name = "rx", .dma_req = 20 },
+ { .name = "tx", .dma_req = 19 },
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x49026000,
+ .pa_end = 0x490260ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> mcbsp4 */
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = {
+ .master = &omap3xxx_l4_per_hwmod,
+ .slave = &omap3xxx_mcbsp4_hwmod,
+ .clk = "mcbsp4_ick",
+ .addr = omap3xxx_mcbsp4_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp4_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x49026000,
+ .pa_end = 0x490260ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4_dma = {
+ .master = &omap3xxx_l4_per_hwmod,
+ .slave = &omap3xxx_mcbsp4_hwmod,
+ .clk = "mcbsp4_ick",
+ .addr = omap3xxx_mcbsp4_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp4 slave ports */
+static struct omap_hwmod_ocp_if *omap3xxx_mcbsp4_slaves[] = {
+ &omap3xxx_l4_per__mcbsp4,
+ &omap3xxx_l4_per__mcbsp4_dma,
+};
+
+static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
+ .name = "mcbsp4",
+ .class = &omap3xxx_mcbsp_hwmod_class,
+ .mpu_irqs = omap3xxx_mcbsp4_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_irqs),
+ .sdma_reqs = omap3xxx_mcbsp4_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs),
+ .main_clk = "mcbsp4_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_MCBSP4_SHIFT,
+ .module_offs = OMAP3430_PER_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT,
+ },
+ },
+ .slaves = omap3xxx_mcbsp4_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/* mcbsp5 */
+static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = {
+ { .name = "irq", .irq = 27 },
+ { .name = "tx", .irq = 81 },
+ { .name = "rx", .irq = 82 },
+};
+
+static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = {
+ { .name = "rx", .dma_req = 22 },
+ { .name = "tx", .dma_req = 21 },
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x48096000,
+ .pa_end = 0x480960ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_core -> mcbsp5 */
+static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap3xxx_mcbsp5_hwmod,
+ .clk = "mcbsp5_ick",
+ .addr = omap3xxx_mcbsp5_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp5_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x48096000,
+ .pa_end = 0x480960ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5_dma = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap3xxx_mcbsp5_hwmod,
+ .clk = "mcbsp5_ick",
+ .addr = omap3xxx_mcbsp5_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp5 slave ports */
+static struct omap_hwmod_ocp_if *omap3xxx_mcbsp5_slaves[] = {
+ &omap3xxx_l4_core__mcbsp5,
+ &omap3xxx_l4_core__mcbsp5_dma,
+};
+
+static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
+ .name = "mcbsp5",
+ .class = &omap3xxx_mcbsp_hwmod_class,
+ .mpu_irqs = omap3xxx_mcbsp5_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_irqs),
+ .sdma_reqs = omap3xxx_mcbsp5_sdma_chs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs),
+ .main_clk = "mcbsp5_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_MCBSP5_SHIFT,
+ .module_offs = CORE_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT,
+ },
+ },
+ .slaves = omap3xxx_mcbsp5_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+/* 'mcbsp sidetone' class */
+
+static struct omap_hwmod_class_sysconfig omap3xxx_mcbsp_sidetone_sysc = {
+ .sysc_offs = 0x0010,
+ .sysc_flags = SYSC_HAS_AUTOIDLE,
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = {
+ .name = "mcbsp_sidetone",
+ .sysc = &omap3xxx_mcbsp_sidetone_sysc,
+};
+
+/* mcbsp2_sidetone */
+static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = {
+ { .name = "irq", .irq = 4 },
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = {
+ {
+ .name = "sidetone",
+ .pa_start = 0x49028000,
+ .pa_end = 0x490280ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> mcbsp2_sidetone */
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = {
+ .master = &omap3xxx_l4_per_hwmod,
+ .slave = &omap3xxx_mcbsp2_sidetone_hwmod,
+ .clk = "mcbsp2_ick",
+ .addr = omap3xxx_mcbsp2_sidetone_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_addrs),
+ .user = OCP_USER_MPU,
+};
+
+/* mcbsp2_sidetone slave ports */
+static struct omap_hwmod_ocp_if *omap3xxx_mcbsp2_sidetone_slaves[] = {
+ &omap3xxx_l4_per__mcbsp2_sidetone,
+};
+
+static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
+ .name = "mcbsp2_sidetone",
+ .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
+ .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_irqs),
+ .main_clk = "mcbsp2_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_MCBSP2_SHIFT,
+ .module_offs = OMAP3430_PER_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
+ },
+ },
+ .slaves = omap3xxx_mcbsp2_sidetone_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/* mcbsp3_sidetone */
+static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = {
+ { .name = "irq", .irq = 5 },
+};
+
+static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = {
+ {
+ .name = "sidetone",
+ .pa_start = 0x4902A000,
+ .pa_end = 0x4902A0ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> mcbsp3_sidetone */
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = {
+ .master = &omap3xxx_l4_per_hwmod,
+ .slave = &omap3xxx_mcbsp3_sidetone_hwmod,
+ .clk = "mcbsp3_ick",
+ .addr = omap3xxx_mcbsp3_sidetone_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_addrs),
+ .user = OCP_USER_MPU,
+};
+
+/* mcbsp3_sidetone slave ports */
+static struct omap_hwmod_ocp_if *omap3xxx_mcbsp3_sidetone_slaves[] = {
+ &omap3xxx_l4_per__mcbsp3_sidetone,
+};
+
+static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
+ .name = "mcbsp3_sidetone",
+ .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
+ .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_irqs),
+ .main_clk = "mcbsp3_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_MCBSP3_SHIFT,
+ .module_offs = OMAP3430_PER_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,
+ },
+ },
+ .slaves = omap3xxx_mcbsp3_sidetone_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
&omap3xxx_l3_main_hwmod,
&omap3xxx_l4_core_hwmod,
@@ -754,6 +1275,15 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
&omap3xxx_i2c1_hwmod,
&omap3xxx_i2c2_hwmod,
&omap3xxx_i2c3_hwmod,
+
+ /*mcbsp class*/
+ &omap3xxx_mcbsp1_hwmod,
+ &omap3xxx_mcbsp2_hwmod,
+ &omap3xxx_mcbsp3_hwmod,
+ &omap3xxx_mcbsp4_hwmod,
+ &omap3xxx_mcbsp5_hwmod,
+ &omap3xxx_mcbsp2_sidetone_hwmod,
+ &omap3xxx_mcbsp3_sidetone_hwmod,
NULL,
};
--
1.7.0.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 06/10] OMAP4: hwmod data: Add McBSP
2010-12-21 7:40 [PATCH v1 01/10] OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct Kishon Vijay Abraham I
` (3 preceding siblings ...)
2010-12-21 7:40 ` [PATCH v1 05/10] OMAP3: " Kishon Vijay Abraham I
@ 2010-12-21 7:40 ` Kishon Vijay Abraham I
2010-12-21 7:40 ` [PATCH v1 07/10] OMAP3: hwmod: add dev_attr for McBSP sidetone Kishon Vijay Abraham I
` (4 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Kishon Vijay Abraham I @ 2010-12-21 7:40 UTC (permalink / raw)
To: linux-omap; +Cc: paul, khilman, p-basak2, b-cousson, kishon
From: Benoit Cousson <b-cousson@ti.com>
Add McBSP hwmod data for OMAP4.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 320 ++++++++++++++++++++++++++++
1 files changed, 320 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 0d5c6eb..e8e9c4b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -1043,6 +1043,320 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
+/*
+ * 'mcbsp' class
+ * multi channel buffered serial port controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_mcbsp_sysc = {
+ .sysc_offs = 0x008c,
+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_ENAWAKEUP |
+ SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {
+ .name = "mcbsp",
+ .sysc = &omap44xx_mcbsp_sysc,
+};
+
+/* mcbsp1 */
+static struct omap_hwmod omap44xx_mcbsp1_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = {
+ { .name = "tx", .irq = 17 + OMAP44XX_IRQ_GIC_START },
+ { .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START },
+ { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x40122000,
+ .pa_end = 0x401220ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_abe -> mcbsp1 */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = {
+ .master = &omap44xx_l4_abe_hwmod,
+ .slave = &omap44xx_mcbsp1_hwmod,
+ .clk = "ocp_abe_iclk",
+ .addr = omap44xx_mcbsp1_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x49022000,
+ .pa_end = 0x490220ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_abe -> mcbsp1 (dma) */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = {
+ .master = &omap44xx_l4_abe_hwmod,
+ .slave = &omap44xx_mcbsp1_hwmod,
+ .clk = "ocp_abe_iclk",
+ .addr = omap44xx_mcbsp1_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp1 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {
+ &omap44xx_l4_abe__mcbsp1,
+ &omap44xx_l4_abe__mcbsp1_dma,
+};
+
+static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
+ .name = "mcbsp1",
+ .class = &omap44xx_mcbsp_hwmod_class,
+ .mpu_irqs = omap44xx_mcbsp1_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_irqs),
+ .sdma_reqs = omap44xx_mcbsp1_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs),
+ .main_clk = "mcbsp1_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP1_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_mcbsp1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mcbsp2 */
+static struct omap_hwmod omap44xx_mcbsp2_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = {
+ { .name = "tx", .irq = 22 + OMAP44XX_IRQ_GIC_START },
+ { .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START },
+ { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x40124000,
+ .pa_end = 0x401240ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_abe -> mcbsp2 */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = {
+ .master = &omap44xx_l4_abe_hwmod,
+ .slave = &omap44xx_mcbsp2_hwmod,
+ .clk = "ocp_abe_iclk",
+ .addr = omap44xx_mcbsp2_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x49024000,
+ .pa_end = 0x490240ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_abe -> mcbsp2 (dma) */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = {
+ .master = &omap44xx_l4_abe_hwmod,
+ .slave = &omap44xx_mcbsp2_hwmod,
+ .clk = "ocp_abe_iclk",
+ .addr = omap44xx_mcbsp2_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp2 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {
+ &omap44xx_l4_abe__mcbsp2,
+ &omap44xx_l4_abe__mcbsp2_dma,
+};
+
+static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
+ .name = "mcbsp2",
+ .class = &omap44xx_mcbsp_hwmod_class,
+ .mpu_irqs = omap44xx_mcbsp2_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_irqs),
+ .sdma_reqs = omap44xx_mcbsp2_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs),
+ .main_clk = "mcbsp2_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP2_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_mcbsp2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mcbsp3 */
+static struct omap_hwmod omap44xx_mcbsp3_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = {
+ { .name = "tx", .irq = 23 + OMAP44XX_IRQ_GIC_START },
+ { .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START },
+ { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x40126000,
+ .pa_end = 0x401260ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_abe -> mcbsp3 */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = {
+ .master = &omap44xx_l4_abe_hwmod,
+ .slave = &omap44xx_mcbsp3_hwmod,
+ .clk = "ocp_abe_iclk",
+ .addr = omap44xx_mcbsp3_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x49026000,
+ .pa_end = 0x490260ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_abe -> mcbsp3 (dma) */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = {
+ .master = &omap44xx_l4_abe_hwmod,
+ .slave = &omap44xx_mcbsp3_hwmod,
+ .clk = "ocp_abe_iclk",
+ .addr = omap44xx_mcbsp3_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp3 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {
+ &omap44xx_l4_abe__mcbsp3,
+ &omap44xx_l4_abe__mcbsp3_dma,
+};
+
+static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
+ .name = "mcbsp3",
+ .class = &omap44xx_mcbsp_hwmod_class,
+ .mpu_irqs = omap44xx_mcbsp3_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_irqs),
+ .sdma_reqs = omap44xx_mcbsp3_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs),
+ .main_clk = "mcbsp3_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP3_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_mcbsp3_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mcbsp4 */
+static struct omap_hwmod omap44xx_mcbsp4_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = {
+ { .name = "tx", .irq = 16 + OMAP44XX_IRQ_GIC_START },
+ { .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START },
+ { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = {
+ {
+ .name = "mpu",
+ .pa_start = 0x48096000,
+ .pa_end = 0x480960ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> mcbsp4 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_mcbsp4_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_mcbsp4_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp4_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp4_dma_addrs[] = {
+ {
+ .name = "dma",
+ .pa_start = 0x48096000,
+ .pa_end = 0x480960ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4_dma = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_mcbsp4_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_mcbsp4_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp4_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* mcbsp4 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {
+ &omap44xx_l4_per__mcbsp4,
+ &omap44xx_l4_per__mcbsp4_dma,
+};
+
+static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
+ .name = "mcbsp4",
+ .class = &omap44xx_mcbsp_hwmod_class,
+ .mpu_irqs = omap44xx_mcbsp4_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_irqs),
+ .sdma_reqs = omap44xx_mcbsp4_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs),
+ .main_clk = "mcbsp4_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_mcbsp4_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+
static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
/* dmm class */
&omap44xx_dmm_hwmod,
@@ -1077,6 +1391,12 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
&omap44xx_uart2_hwmod,
&omap44xx_uart3_hwmod,
&omap44xx_uart4_hwmod,
+
+ /* mcbsp class */
+ &omap44xx_mcbsp1_hwmod,
+ &omap44xx_mcbsp2_hwmod,
+ &omap44xx_mcbsp3_hwmod,
+ &omap44xx_mcbsp4_hwmod,
NULL,
};
--
1.7.0.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 07/10] OMAP3: hwmod: add dev_attr for McBSP sidetone
2010-12-21 7:40 [PATCH v1 01/10] OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct Kishon Vijay Abraham I
` (4 preceding siblings ...)
2010-12-21 7:40 ` [PATCH v1 06/10] OMAP4: " Kishon Vijay Abraham I
@ 2010-12-21 7:40 ` Kishon Vijay Abraham I
2010-12-21 7:40 ` [PATCH v1 08/10] OMAP2+: McBSP: hwmod adaptation for McBSP Kishon Vijay Abraham I
` (3 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Kishon Vijay Abraham I @ 2010-12-21 7:40 UTC (permalink / raw)
To: linux-omap; +Cc: paul, khilman, p-basak2, b-cousson, kishon
Add device attribute for OMAP3 McBSP sidetone hwmod data
Discussions related to this change can be found in the following url:
https://patchwork.kernel.org/patch/233221/
Also add a revision member inorder to facilitate the driver to
differentiate between different cpu's.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 12 ++++++++++++
arch/arm/plat-omap/include/plat/mcbsp.h | 11 +++++++++++
2 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index c9aa2c7..fed722f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -20,6 +20,7 @@
#include <plat/serial.h>
#include <plat/l4_3xxx.h>
#include <plat/i2c.h>
+#include <plat/mcbsp.h>
#include <plat/omap34xx.h>
#include "omap_hwmod_common_data.h"
@@ -763,6 +764,7 @@ static struct omap_hwmod_class_sysconfig omap3xxx_mcbsp_sysc = {
static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = {
.name = "mcbsp",
.sysc = &omap3xxx_mcbsp_sysc,
+ .rev = OMAP_MCBSP_CPU_3,
};
/* mcbsp1 */
@@ -897,6 +899,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_mcbsp2_slaves[] = {
&omap3xxx_l4_per__mcbsp2_dma,
};
+static struct omap_mcbsp_dev_attr omap34xx_mcbsp2_dev_attr = {
+ .sidetone = "mcbsp2_sidetone",
+};
+
static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
.name = "mcbsp2",
.class = &omap3xxx_mcbsp_hwmod_class,
@@ -916,6 +922,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
},
.slaves = omap3xxx_mcbsp2_slaves,
.slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_slaves),
+ .dev_attr = &omap34xx_mcbsp2_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
};
@@ -974,6 +981,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_mcbsp3_slaves[] = {
&omap3xxx_l4_per__mcbsp3_dma,
};
+static struct omap_mcbsp_dev_attr omap34xx_mcbsp3_dev_attr = {
+ .sidetone = "mcbsp3_sidetone",
+};
+
static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
.name = "mcbsp3",
.class = &omap3xxx_mcbsp_hwmod_class,
@@ -993,6 +1004,7 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
},
.slaves = omap3xxx_mcbsp3_slaves,
.slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_slaves),
+ .dev_attr = &omap34xx_mcbsp3_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
};
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index e9bde6e..d8275f7 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -37,6 +37,8 @@ static struct platform_device omap_mcbsp##port_nr = { \
.id = OMAP_MCBSP##port_nr, \
}
+#define OMAP_MCBSP_CPU_3 0x3
+
#define OMAP7XX_MCBSP1_BASE 0xfffb1000
#define OMAP7XX_MCBSP2_BASE 0xfffb1800
@@ -485,6 +487,15 @@ struct omap_mcbsp {
#endif
void *reg_cache;
};
+
+/**
+ * omap_mcbsp_dev_attr - OMAP MCBSP device attributes for omap_hwmod
+ * @sidetone: name of the sidetone device
+ */
+struct omap_mcbsp_dev_attr {
+ const char *sidetone;
+};
+
extern struct omap_mcbsp **mcbsp_ptr;
extern int omap_mcbsp_count, omap_mcbsp_cache_size;
--
1.7.0.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 08/10] OMAP2+: McBSP: hwmod adaptation for McBSP
2010-12-21 7:40 [PATCH v1 01/10] OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct Kishon Vijay Abraham I
` (5 preceding siblings ...)
2010-12-21 7:40 ` [PATCH v1 07/10] OMAP3: hwmod: add dev_attr for McBSP sidetone Kishon Vijay Abraham I
@ 2010-12-21 7:40 ` Kishon Vijay Abraham I
2010-12-21 7:40 ` [PATCH v1 09/10] OMAP: McBSP: use omap_device APIs to modify SYSCONFIG Kishon Vijay Abraham I
` (2 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Kishon Vijay Abraham I @ 2010-12-21 7:40 UTC (permalink / raw)
To: linux-omap
Cc: paul, khilman, p-basak2, b-cousson, kishon, Charulatha V,
Shubhrajyoti D
Modify OMAP2+ McBSP to use omap hwmod framework APIs
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
---
arch/arm/mach-omap2/mcbsp.c | 703 ++++---------------------------------------
1 files changed, 62 insertions(+), 641 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index ebc0db1..40d8f93 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -22,9 +22,12 @@
#include <plat/dma.h>
#include <plat/cpu.h>
#include <plat/mcbsp.h>
+#include <plat/omap_device.h>
#include "control.h"
+static struct omap_hwmod *oh_st_device[] = {NULL, NULL};
+static int no_of_st;
/* McBSP internal signal muxing functions */
@@ -101,666 +104,84 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
}
EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
-/* Platform data */
-
-#ifdef CONFIG_ARCH_OMAP2420
-struct resource omap2420_mcbsp_res[][6] = {
- {
- {
- .name = "mpu",
- .start = OMAP24XX_MCBSP1_BASE,
- .end = OMAP24XX_MCBSP1_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP24XX_MCBSP1_BASE,
- .end = OMAP24XX_MCBSP1_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP1_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP1_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP1_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP1_TX,
- .flags = IORESOURCE_DMA,
- },
- },
+struct omap_device_pm_latency omap2_mcbsp_latency[] = {
{
- {
- .name = "mpu",
- .start = OMAP24XX_MCBSP2_BASE,
- .end = OMAP24XX_MCBSP2_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP24XX_MCBSP2_BASE,
- .end = OMAP24XX_MCBSP2_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP2_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP2_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP2_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP2_TX,
- .flags = IORESOURCE_DMA,
- },
+ .deactivate_func = omap_device_idle_hwmods,
+ .activate_func = omap_device_enable_hwmods,
+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
},
};
-#define OMAP2420_MCBSP_RES_SZ ARRAY_SIZE(omap2420_mcbsp_res[1])
-#define OMAP2420_MCBSP_COUNT ARRAY_SIZE(omap2420_mcbsp_res)
-#else
-#define omap2420_mcbsp_res NULL
-#define OMAP2420_MCBSP_RES_SZ 0
-#define OMAP2420_MCBSP_COUNT 0
-#endif
-
-#define omap2420_mcbsp_pdata NULL
-
-#ifdef CONFIG_ARCH_OMAP2430
-struct resource omap2430_mcbsp_res[][6] = {
- {
- {
- .name = "mpu",
- .start = OMAP24XX_MCBSP1_BASE,
- .end = OMAP24XX_MCBSP1_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP24XX_MCBSP1_BASE,
- .end = OMAP24XX_MCBSP1_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP1_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP1_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP1_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP1_TX,
- .flags = IORESOURCE_DMA,
- },
- },
- {
- {
- .name = "mpu",
- .start = OMAP24XX_MCBSP2_BASE,
- .end = OMAP24XX_MCBSP2_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP24XX_MCBSP2_BASE,
- .end = OMAP24XX_MCBSP2_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP2_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP2_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP2_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP2_TX,
- .flags = IORESOURCE_DMA,
- },
- },
- {
- {
- .name = "mpu",
- .start = OMAP2430_MCBSP3_BASE,
- .end = OMAP2430_MCBSP3_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP2430_MCBSP3_BASE,
- .end = OMAP2430_MCBSP3_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP3_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP3_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP3_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP3_TX,
- .flags = IORESOURCE_DMA,
- },
- },
- {
- {
- .name = "mpu",
- .start = OMAP2430_MCBSP4_BASE,
- .end = OMAP2430_MCBSP4_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP2430_MCBSP4_BASE,
- .end = OMAP2430_MCBSP4_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP4_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP4_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP4_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP4_TX,
- .flags = IORESOURCE_DMA,
- },
- },
- {
- {
- .name = "mpu",
- .start = OMAP2430_MCBSP5_BASE,
- .end = OMAP2430_MCBSP5_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP2430_MCBSP5_BASE,
- .end = OMAP2430_MCBSP5_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP5_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP5_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP5_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP5_TX,
- .flags = IORESOURCE_DMA,
- },
- },
-};
+static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
+{
+ int id, count = 1, i;
+ char *name = "omap-mcbsp";
+ struct omap_hwmod *oh_device[2];
+ struct omap_mcbsp_platform_data *pdata = NULL;
+ struct omap_device *od;
-#define OMAP2430_MCBSP_RES_SZ ARRAY_SIZE(omap2430_mcbsp_res[1])
-#define OMAP2430_MCBSP_COUNT ARRAY_SIZE(omap2430_mcbsp_res)
-#else
-#define omap2430_mcbsp_res NULL
-#define OMAP2430_MCBSP_RES_SZ 0
-#define OMAP2430_MCBSP_COUNT 0
-#endif
+ sscanf(oh->name, "mcbsp%d", &id);
-#define omap2430_mcbsp_pdata NULL
+ pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL);
+ if (!pdata) {
+ pr_err("%s: No memory for mcbsp\n", __func__);
+ return -ENOMEM;
+ }
-#ifdef CONFIG_ARCH_OMAP3
-struct resource omap34xx_mcbsp_res[][7] = {
- {
- {
- .name = "mpu",
- .start = OMAP34XX_MCBSP1_BASE,
- .end = OMAP34XX_MCBSP1_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP34XX_MCBSP1_BASE,
- .end = OMAP34XX_MCBSP1_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP1_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP1_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP1_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP1_TX,
- .flags = IORESOURCE_DMA,
- },
- },
- {
- {
- .name = "mpu",
- .start = OMAP34XX_MCBSP2_BASE,
- .end = OMAP34XX_MCBSP2_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP34XX_MCBSP2_BASE,
- .end = OMAP34XX_MCBSP2_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "sidetone",
- .start = OMAP34XX_MCBSP2_ST_BASE,
- .end = OMAP34XX_MCBSP2_ST_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP2_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP2_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP2_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP2_TX,
- .flags = IORESOURCE_DMA,
- },
- },
- {
- {
- .name = "mpu",
- .start = OMAP34XX_MCBSP3_BASE,
- .end = OMAP34XX_MCBSP3_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP34XX_MCBSP3_BASE,
- .end = OMAP34XX_MCBSP3_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "sidetone",
- .start = OMAP34XX_MCBSP3_ST_BASE,
- .end = OMAP34XX_MCBSP3_ST_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP3_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP3_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP3_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP3_TX,
- .flags = IORESOURCE_DMA,
- },
- },
- {
- {
- .name = "mpu",
- .start = OMAP34XX_MCBSP4_BASE,
- .end = OMAP34XX_MCBSP4_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP34XX_MCBSP4_BASE,
- .end = OMAP34XX_MCBSP4_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP4_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP4_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP4_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP4_TX,
- .flags = IORESOURCE_DMA,
- },
- },
- {
- {
- .name = "mpu",
- .start = OMAP34XX_MCBSP5_BASE,
- .end = OMAP34XX_MCBSP5_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP34XX_MCBSP5_BASE,
- .end = OMAP34XX_MCBSP5_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = INT_24XX_MCBSP5_IRQ_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = INT_24XX_MCBSP5_IRQ_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP24XX_DMA_MCBSP5_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP24XX_DMA_MCBSP5_TX,
- .flags = IORESOURCE_DMA,
- },
- },
-};
+ if (oh->class->rev == OMAP_MCBSP_CPU_3) {
+ if (id == 2)
+ pdata->buffer_size = 0x500; /*FIFO size is 1024 + 256*/
+ else
+ pdata->buffer_size = 0x80; /*FIFO size is 128*/
+ }
-static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
- {
- .buffer_size = 0x80, /* The FIFO has 128 locations */
- },
- {
- .buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */
- },
- {
- .buffer_size = 0x80, /* The FIFO has 128 locations */
- },
- {
- .buffer_size = 0x80, /* The FIFO has 128 locations */
- },
- {
- .buffer_size = 0x80, /* The FIFO has 128 locations */
- },
-};
-#define OMAP34XX_MCBSP_RES_SZ ARRAY_SIZE(omap34xx_mcbsp_res[1])
-#define OMAP34XX_MCBSP_COUNT ARRAY_SIZE(omap34xx_mcbsp_res)
-#else
-#define omap34xx_mcbsp_pdata NULL
-#define omap34XX_mcbsp_res NULL
-#define OMAP34XX_MCBSP_RES_SZ 0
-#define OMAP34XX_MCBSP_COUNT 0
-#endif
+ oh_device[0] = oh;
+
+ if (oh->dev_attr) {
+ for (i = 0; i < no_of_st ; i++) {
+ if (!strcmp(((struct omap_mcbsp_dev_attr *)
+ (oh->dev_attr))->sidetone,
+ oh_st_device[i]->name)) {
+ oh_device[1] = oh_st_device[i];
+ count++;
+ }
+ }
+ }
-struct resource omap44xx_mcbsp_res[][6] = {
- {
- {
- .name = "mpu",
- .start = OMAP44XX_MCBSP1_BASE,
- .end = OMAP44XX_MCBSP1_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP44XX_MCBSP1_DMA_BASE,
- .end = OMAP44XX_MCBSP1_DMA_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = 0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = OMAP44XX_IRQ_MCBSP1,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP44XX_DMA_MCBSP1_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP44XX_DMA_MCBSP1_TX,
- .flags = IORESOURCE_DMA,
- },
- },
- {
- {
- .name = "mpu",
- .start = OMAP44XX_MCBSP2_BASE,
- .end = OMAP44XX_MCBSP2_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP44XX_MCBSP2_DMA_BASE,
- .end = OMAP44XX_MCBSP2_DMA_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = 0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = OMAP44XX_IRQ_MCBSP2,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP44XX_DMA_MCBSP2_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP44XX_DMA_MCBSP2_TX,
- .flags = IORESOURCE_DMA,
- },
- },
- {
- {
- .name = "mpu",
- .start = OMAP44XX_MCBSP3_BASE,
- .end = OMAP44XX_MCBSP3_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP44XX_MCBSP3_DMA_BASE,
- .end = OMAP44XX_MCBSP3_DMA_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = 0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = OMAP44XX_IRQ_MCBSP3,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP44XX_DMA_MCBSP3_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP44XX_DMA_MCBSP3_TX,
- .flags = IORESOURCE_DMA,
- },
- },
- {
- {
- .name = "mpu",
- .start = OMAP44XX_MCBSP4_BASE,
- .end = OMAP44XX_MCBSP4_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "dma",
- .start = OMAP44XX_MCBSP4_BASE,
- .end = OMAP44XX_MCBSP4_BASE + SZ_256,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "rx",
- .start = 0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "tx",
- .start = OMAP44XX_IRQ_MCBSP4,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = OMAP44XX_DMA_MCBSP4_RX,
- .flags = IORESOURCE_DMA,
- },
- {
- .name = "tx",
- .start = OMAP44XX_DMA_MCBSP4_TX,
- .flags = IORESOURCE_DMA,
- },
- },
-};
+ od = omap_device_build_ss(name, id, oh_device, count, pdata,
+ sizeof(*pdata), omap2_mcbsp_latency,
+ ARRAY_SIZE(omap2_mcbsp_latency), false);
+ kfree(pdata);
+ if (IS_ERR(od)) {
+ pr_err("%s: Cant build omap_device for %s:%s.\n", __func__,
+ name, oh->name);
+ return PTR_ERR(od);
+ }
+ omap_mcbsp_count++;
+ return 0;
+}
-#define omap44xx_mcbsp_pdata NULL
-#define OMAP44XX_MCBSP_RES_SZ ARRAY_SIZE(omap44xx_mcbsp_res[1])
-#define OMAP44XX_MCBSP_COUNT ARRAY_SIZE(omap44xx_mcbsp_res)
+static int omap_mcbsp_st(struct omap_hwmod *oh, void *user)
+{
+ if (!oh) {
+ pr_err("%s:NULL hwmod pointer (oh)\n", __func__);
+ return -EINVAL;
+ }
+ oh_st_device[no_of_st++] = oh;
+ return 0;
+}
static int __init omap2_mcbsp_init(void)
{
- if (cpu_is_omap2420())
- omap_mcbsp_count = OMAP2420_MCBSP_COUNT;
- else if (cpu_is_omap2430())
- omap_mcbsp_count = OMAP2430_MCBSP_COUNT;
- else if (cpu_is_omap34xx())
- omap_mcbsp_count = OMAP34XX_MCBSP_COUNT;
- else if (cpu_is_omap44xx())
- omap_mcbsp_count = OMAP44XX_MCBSP_COUNT;
+ omap_hwmod_for_each_by_class("mcbsp_sidetone", omap_mcbsp_st,
+ NULL);
+ omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
GFP_KERNEL);
if (!mcbsp_ptr)
return -ENOMEM;
- if (cpu_is_omap2420())
- omap_mcbsp_register_board_cfg(omap2420_mcbsp_res[0],
- OMAP2420_MCBSP_RES_SZ,
- omap2420_mcbsp_pdata,
- OMAP2420_MCBSP_COUNT);
- if (cpu_is_omap2430())
- omap_mcbsp_register_board_cfg(omap2430_mcbsp_res[0],
- OMAP2420_MCBSP_RES_SZ,
- omap2430_mcbsp_pdata,
- OMAP2430_MCBSP_COUNT);
- if (cpu_is_omap34xx())
- omap_mcbsp_register_board_cfg(omap34xx_mcbsp_res[0],
- OMAP34XX_MCBSP_RES_SZ,
- omap34xx_mcbsp_pdata,
- OMAP34XX_MCBSP_COUNT);
- if (cpu_is_omap44xx())
- omap_mcbsp_register_board_cfg(omap44xx_mcbsp_res[0],
- OMAP44XX_MCBSP_RES_SZ,
- omap44xx_mcbsp_pdata,
- OMAP44XX_MCBSP_COUNT);
-
return omap_mcbsp_init();
}
arch_initcall(omap2_mcbsp_init);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 09/10] OMAP: McBSP: use omap_device APIs to modify SYSCONFIG
2010-12-21 7:40 [PATCH v1 01/10] OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct Kishon Vijay Abraham I
` (6 preceding siblings ...)
2010-12-21 7:40 ` [PATCH v1 08/10] OMAP2+: McBSP: hwmod adaptation for McBSP Kishon Vijay Abraham I
@ 2010-12-21 7:40 ` Kishon Vijay Abraham I
2011-01-04 7:35 ` Peter Ujfalusi
2010-12-21 7:40 ` [PATCH v1 10/10] OMAP: McBSP: Add pm runtime support Kishon Vijay Abraham I
2010-12-21 7:40 ` [PATCH v1 00/10] OMAP: McBSP: hwmod adaptation and runtime conversion Kishon Vijay Abraham I
9 siblings, 1 reply; 17+ messages in thread
From: Kishon Vijay Abraham I @ 2010-12-21 7:40 UTC (permalink / raw)
To: linux-omap; +Cc: paul, khilman, p-basak2, b-cousson, kishon
McBSP2/3 in OMAP3 has sidetone feature which requires autoidle
to be disabled before starting the sidetone. Also SYSCONFIG
register has to be set with smart idle or no idle depending on the
dma op mode (threshold or element sync). For doing these operations
dynamically at runtime, omap_device APIs are used to modify SYSCONFIG register.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm/plat-omap/mcbsp.c | 66 ++++++++++++++++++++++---------------------
1 files changed, 34 insertions(+), 32 deletions(-)
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 0adffea..9a0f76a 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -27,6 +27,7 @@
#include <plat/dma.h>
#include <plat/mcbsp.h>
+#include <plat/omap_device.h>
#include "../mach-omap2/cm-regbits-34xx.h"
@@ -226,9 +227,19 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
EXPORT_SYMBOL(omap_mcbsp_config);
#ifdef CONFIG_ARCH_OMAP3
+static struct omap_device *find_omap_device_by_dev(struct device *dev)
+{
+ struct platform_device *pdev = container_of(dev,
+ struct platform_device, dev);
+ return container_of(pdev, struct omap_device, pdev);
+}
+
static void omap_st_on(struct omap_mcbsp *mcbsp)
{
unsigned int w;
+ struct omap_device *od;
+
+ od = find_omap_device_by_dev(mcbsp->dev);
/*
* Sidetone uses McBSP ICLK - which must not idle when sidetones
@@ -242,8 +253,7 @@ static void omap_st_on(struct omap_mcbsp *mcbsp)
w = MCBSP_READ(mcbsp, SSELCR);
MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN);
- w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
- MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w & ~(ST_AUTOIDLE));
+ omap_device_disable_autoidle(od);
/* Enable Sidetone from Sidetone Core */
w = MCBSP_ST_READ(mcbsp, SSELCR);
@@ -253,12 +263,14 @@ static void omap_st_on(struct omap_mcbsp *mcbsp)
static void omap_st_off(struct omap_mcbsp *mcbsp)
{
unsigned int w;
+ struct omap_device *od;
+
+ od = find_omap_device_by_dev(mcbsp->dev);
w = MCBSP_ST_READ(mcbsp, SSELCR);
MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN));
- w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
- MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w | ST_AUTOIDLE);
+ omap_device_enable_autoidle(od);
w = MCBSP_READ(mcbsp, SSELCR);
MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
@@ -271,9 +283,11 @@ static void omap_st_off(struct omap_mcbsp *mcbsp)
static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
{
u16 val, i;
+ struct omap_device *od;
- val = MCBSP_ST_READ(mcbsp, SYSCONFIG);
- MCBSP_ST_WRITE(mcbsp, SYSCONFIG, val & ~(ST_AUTOIDLE));
+ od = find_omap_device_by_dev(mcbsp->dev);
+
+ omap_device_disable_autoidle(od);
val = MCBSP_ST_READ(mcbsp, SSELCR);
@@ -301,9 +315,11 @@ static void omap_st_chgain(struct omap_mcbsp *mcbsp)
{
u16 w;
struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
+ struct omap_device *od;
+
+ od = find_omap_device_by_dev(mcbsp->dev);
- w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
- MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w & ~(ST_AUTOIDLE));
+ omap_device_disable_autoidle(od);
w = MCBSP_ST_READ(mcbsp, SSELCR);
@@ -646,49 +662,35 @@ EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
{
+ struct omap_device *od;
+
+ od = find_omap_device_by_dev(mcbsp->dev);
/*
* Enable wakup behavior, smart idle and all wakeups
* REVISIT: some wakeups may be unnecessary
*/
if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- u16 syscon;
-
- syscon = MCBSP_READ(mcbsp, SYSCON);
- syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
-
- if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {
- syscon |= (ENAWAKEUP | SIDLEMODE(0x02) |
- CLOCKACTIVITY(0x02));
- MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
- } else {
- syscon |= SIDLEMODE(0x01);
- }
-
- MCBSP_WRITE(mcbsp, SYSCON, syscon);
+ if (mcbsp->dma_op_mode != MCBSP_DMA_MODE_THRESHOLD)
+ omap_device_noidle(od);
}
}
static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
{
+ struct omap_device *od;
+
+ od = find_omap_device_by_dev(mcbsp->dev);
+
/*
* Disable wakup behavior, smart idle and all wakeups
*/
if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- u16 syscon;
-
- syscon = MCBSP_READ(mcbsp, SYSCON);
- syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
/*
* HW bug workaround - If no_idle mode is taken, we need to
* go to smart_idle before going to always_idle, or the
* device will not hit retention anymore.
*/
- syscon |= SIDLEMODE(0x02);
- MCBSP_WRITE(mcbsp, SYSCON, syscon);
-
- syscon &= ~(SIDLEMODE(0x03));
- MCBSP_WRITE(mcbsp, SYSCON, syscon);
-
+ omap_device_default_idle(od);
MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
}
}
--
1.7.0.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v1 09/10] OMAP: McBSP: use omap_device APIs to modify SYSCONFIG
2010-12-21 7:40 ` [PATCH v1 09/10] OMAP: McBSP: use omap_device APIs to modify SYSCONFIG Kishon Vijay Abraham I
@ 2011-01-04 7:35 ` Peter Ujfalusi
2011-01-04 9:34 ` ABRAHAM, KISHON VIJAY
[not found] ` <AANLkTinW4uEW1qOjBfXiwayi1mr=iygohxX5mtr9KwBo@mail.gmail.com>
0 siblings, 2 replies; 17+ messages in thread
From: Peter Ujfalusi @ 2011-01-04 7:35 UTC (permalink / raw)
To: ext Kishon Vijay Abraham I; +Cc: linux-omap, paul, khilman, p-basak2, b-cousson
Hi,
On 12/21/10 09:40, ext Kishon Vijay Abraham I wrote:
> McBSP2/3 in OMAP3 has sidetone feature which requires autoidle
> to be disabled before starting the sidetone. Also SYSCONFIG
> register has to be set with smart idle or no idle depending on the
> dma op mode (threshold or element sync). For doing these operations
> dynamically at runtime, omap_device APIs are used to modify SYSCONFIG register.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
> {
> + struct omap_device *od;
> +
> + od = find_omap_device_by_dev(mcbsp->dev);
> /*
> * Enable wakup behavior, smart idle and all wakeups
> * REVISIT: some wakeups may be unnecessary
> */
> if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> - u16 syscon;
> -
> - syscon = MCBSP_READ(mcbsp, SYSCON);
> - syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
> -
> - if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {
> - syscon |= (ENAWAKEUP | SIDLEMODE(0x02) |
> - CLOCKACTIVITY(0x02));
> - MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
> - } else {
> - syscon |= SIDLEMODE(0x01);
> - }
> -
> - MCBSP_WRITE(mcbsp, SYSCON, syscon);
> + if (mcbsp->dma_op_mode != MCBSP_DMA_MODE_THRESHOLD)
> + omap_device_noidle(od);
Should you configure McBSP to SMART_IDLE, when the THRESHOLD mode is
selected?
While we are here:
1. How we select the WAKE events from McBSP?
We need XRDYEN, and RRDYEN bits for wake (in WAKEUPEN register), and
also we need to enable the WAKEUP in SYSCON register.
2. How we are configuring the CLOCKACTIVITY field in SYSCON register?
--
Péter
--
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^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH v1 09/10] OMAP: McBSP: use omap_device APIs to modify SYSCONFIG
2011-01-04 7:35 ` Peter Ujfalusi
@ 2011-01-04 9:34 ` ABRAHAM, KISHON VIJAY
[not found] ` <AANLkTinW4uEW1qOjBfXiwayi1mr=iygohxX5mtr9KwBo@mail.gmail.com>
1 sibling, 0 replies; 17+ messages in thread
From: ABRAHAM, KISHON VIJAY @ 2011-01-04 9:34 UTC (permalink / raw)
To: Peter Ujfalusi; +Cc: linux-omap, paul, khilman, p-basak2, b-cousson
On Tue, Jan 4, 2011 at 1:05 PM, Peter Ujfalusi <peter.ujfalusi@nokia.com> wrote:
>
> Hi,
>
> On 12/21/10 09:40, ext Kishon Vijay Abraham I wrote:
> > McBSP2/3 in OMAP3 has sidetone feature which requires autoidle
> > to be disabled before starting the sidetone. Also SYSCONFIG
> > register has to be set with smart idle or no idle depending on the
> > dma op mode (threshold or element sync). For doing these operations
> > dynamically at runtime, omap_device APIs are used to modify SYSCONFIG register.
> >
> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>
>
> > static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
> > {
> > + struct omap_device *od;
> > +
> > + od = find_omap_device_by_dev(mcbsp->dev);
> > /*
> > * Enable wakup behavior, smart idle and all wakeups
> > * REVISIT: some wakeups may be unnecessary
> > */
> > if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> > - u16 syscon;
> > -
> > - syscon = MCBSP_READ(mcbsp, SYSCON);
> > - syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
> > -
> > - if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {
> > - syscon |= (ENAWAKEUP | SIDLEMODE(0x02) |
> > - CLOCKACTIVITY(0x02));
> > - MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
> > - } else {
> > - syscon |= SIDLEMODE(0x01);
> > - }
> > -
> > - MCBSP_WRITE(mcbsp, SYSCON, syscon);
> > + if (mcbsp->dma_op_mode != MCBSP_DMA_MODE_THRESHOLD)
> > + omap_device_noidle(od);
>
> Should you configure McBSP to SMART_IDLE, when the THRESHOLD mode is
> selected?
> While we are here:
> 1. How we select the WAKE events from McBSP?
> We need XRDYEN, and RRDYEN bits for wake (in WAKEUPEN register),
Ahh.. Ok. This setting still need to be present. Will add it in
my next patch version.
Thanks.
and
> also we need to enable the WAKEUP in SYSCON register.
Setting of WAKEUPEN will be taken care by pm_runtime_get_sync()
> 2. How we are configuring the CLOCKACTIVITY field in SYSCON register?
It's been set in the hwmod database. In [1], there is a field
.clockact in
omap_hwmod_class_sysconfig where we set the clock activity to 2. Whenever
we do a get_sync, CLOCKACTIVITY field in SYSCON register will be set
to the value present in .clockact field.
[1] https://patchwork.kernel.org/patch/423731/
>
> --
> Péter
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
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the body of a message to majordomo@vger.kernel.org
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^ permalink raw reply [flat|nested] 17+ messages in thread[parent not found: <AANLkTinW4uEW1qOjBfXiwayi1mr=iygohxX5mtr9KwBo@mail.gmail.com>]
* Re: [PATCH v1 09/10] OMAP: McBSP: use omap_device APIs to modify SYSCONFIG
[not found] ` <AANLkTinW4uEW1qOjBfXiwayi1mr=iygohxX5mtr9KwBo@mail.gmail.com>
@ 2011-01-04 9:46 ` Peter Ujfalusi
0 siblings, 0 replies; 17+ messages in thread
From: Peter Ujfalusi @ 2011-01-04 9:46 UTC (permalink / raw)
To: ext ABRAHAM, KISHON VIJAY; +Cc: linux-omap, paul, khilman, p-basak2, b-cousson
On 01/04/11 11:26, ext ABRAHAM, KISHON VIJAY wrote:
>> 1. How we select the WAKE events from McBSP?
>> We need XRDYEN, and RRDYEN bits for wake (in WAKEUPEN register),
>
> Ahh.. Ok. This setting still need to be present. Will add it in my
> next patch version.
> Thanks.
Thanks.
>> and
>> also we need to enable the WAKEUP in SYSCON register.
>
> Setting of WAKEUPEN will be taken care by pm_runtime_get_sync()
I need to get more familiar with the hwmod things ;)
>> 2. How we are configuring the CLOCKACTIVITY field in SYSCON register?
>
>
> It's been set in the hwmod database. In [1], there is a field
> .clockact in
> omap_hwmod_class_sysconfig where we set the clock activity to 2.
> Whenever
> we do a get_sync, CLOCKACTIVITY field in SYSCON register will be set
> to the value present in .clockact field.
>
> [1] https://patchwork.kernel.org/patch/423731/
I see. Is there a way to change the CLOCKACTIVITY field in certain cases?
What I mean is:
the 0x2 means that ICLK can be switched off, PRCM FCLK must kept on
I have a setup, where I can switch off the FCLK for a period of time (so
PER domain can hit retention). For this I'll need to have 0x0 in
CLOCKACTIVITY.
I'm not sure what are the side effects if we always use 0x0, but IMHO
that shall be fine as well.
--
Péter
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
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^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v1 10/10] OMAP: McBSP: Add pm runtime support
2010-12-21 7:40 [PATCH v1 01/10] OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct Kishon Vijay Abraham I
` (7 preceding siblings ...)
2010-12-21 7:40 ` [PATCH v1 09/10] OMAP: McBSP: use omap_device APIs to modify SYSCONFIG Kishon Vijay Abraham I
@ 2010-12-21 7:40 ` Kishon Vijay Abraham I
2010-12-21 7:40 ` [PATCH v1 00/10] OMAP: McBSP: hwmod adaptation and runtime conversion Kishon Vijay Abraham I
9 siblings, 0 replies; 17+ messages in thread
From: Kishon Vijay Abraham I @ 2010-12-21 7:40 UTC (permalink / raw)
To: linux-omap; +Cc: paul, khilman, p-basak2, b-cousson, kishon
Add pm runtime support for McBSP driver.
Reference to fclk is not removed because it is required when the
functional clock is switched from one source to another.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm/mach-omap2/mcbsp.c | 5 +++--
arch/arm/plat-omap/include/plat/mcbsp.h | 1 -
arch/arm/plat-omap/mcbsp.c | 23 ++++++-----------------
3 files changed, 9 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 40d8f93..284c34e 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -23,6 +23,7 @@
#include <plat/cpu.h>
#include <plat/mcbsp.h>
#include <plat/omap_device.h>
+#include <linux/pm_runtime.h>
#include "control.h"
@@ -86,7 +87,7 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
return -EINVAL;
}
- clk_disable(mcbsp->fclk);
+ pm_runtime_put_sync(mcbsp->dev);
r = clk_set_parent(mcbsp->fclk, fck_src);
if (IS_ERR_VALUE(r)) {
@@ -96,7 +97,7 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
return -EINVAL;
}
- clk_enable(mcbsp->fclk);
+ pm_runtime_get_sync(mcbsp->dev);
clk_put(fck_src);
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index d8275f7..a2bd268 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -477,7 +477,6 @@ struct omap_mcbsp {
/* Protect the field .free, while checking if the mcbsp is in use */
spinlock_t lock;
struct omap_mcbsp_platform_data *pdata;
- struct clk *iclk;
struct clk *fclk;
#ifdef CONFIG_ARCH_OMAP3
struct omap_mcbsp_st_data *st_data;
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 9a0f76a..ac332ab 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -28,6 +28,7 @@
#include <plat/dma.h>
#include <plat/mcbsp.h>
#include <plat/omap_device.h>
+#include <linux/pm_runtime.h>
#include "../mach-omap2/cm-regbits-34xx.h"
@@ -764,8 +765,7 @@ int omap_mcbsp_request(unsigned int id)
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
mcbsp->pdata->ops->request(id);
- clk_enable(mcbsp->iclk);
- clk_enable(mcbsp->fclk);
+ pm_runtime_get_sync(mcbsp->dev);
/* Do procedure specific to omap34xx arch, if applicable */
omap34xx_mcbsp_request(mcbsp);
@@ -813,8 +813,7 @@ err_clk_disable:
/* Do procedure specific to omap34xx arch, if applicable */
omap34xx_mcbsp_free(mcbsp);
- clk_disable(mcbsp->fclk);
- clk_disable(mcbsp->iclk);
+ pm_runtime_put_sync(mcbsp->dev);
spin_lock(&mcbsp->lock);
mcbsp->free = true;
@@ -844,8 +843,7 @@ void omap_mcbsp_free(unsigned int id)
/* Do procedure specific to omap34xx arch, if applicable */
omap34xx_mcbsp_free(mcbsp);
- clk_disable(mcbsp->fclk);
- clk_disable(mcbsp->iclk);
+ pm_runtime_put_sync(mcbsp->dev);
if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
/* Free IRQs */
@@ -1858,32 +1856,24 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
}
mcbsp->dma_tx_sync = res->start;
- mcbsp->iclk = clk_get(&pdev->dev, "ick");
- if (IS_ERR(mcbsp->iclk)) {
- ret = PTR_ERR(mcbsp->iclk);
- dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
- goto err_res;
- }
-
mcbsp->fclk = clk_get(&pdev->dev, "fck");
if (IS_ERR(mcbsp->fclk)) {
ret = PTR_ERR(mcbsp->fclk);
dev_err(&pdev->dev, "unable to get fck: %d\n", ret);
- goto err_fclk;
+ goto err_res;
}
mcbsp->pdata = pdata;
mcbsp->dev = &pdev->dev;
mcbsp_ptr[id] = mcbsp;
platform_set_drvdata(pdev, mcbsp);
+ pm_runtime_enable(mcbsp->dev);
/* Initialize mcbsp properties for OMAP34XX if needed / applicable */
omap34xx_device_init(mcbsp);
return 0;
-err_fclk:
- clk_put(mcbsp->iclk);
err_res:
iounmap(mcbsp->io_base);
err_ioremap:
@@ -1906,7 +1896,6 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
omap34xx_device_exit(mcbsp);
clk_put(mcbsp->fclk);
- clk_put(mcbsp->iclk);
iounmap(mcbsp->io_base);
kfree(mcbsp);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 00/10] OMAP: McBSP: hwmod adaptation and runtime conversion
2010-12-21 7:40 [PATCH v1 01/10] OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct Kishon Vijay Abraham I
` (8 preceding siblings ...)
2010-12-21 7:40 ` [PATCH v1 10/10] OMAP: McBSP: Add pm runtime support Kishon Vijay Abraham I
@ 2010-12-21 7:40 ` Kishon Vijay Abraham I
2010-12-22 15:42 ` Jarkko Nikula
2010-12-23 9:21 ` Varadarajan, Charulatha
9 siblings, 2 replies; 17+ messages in thread
From: Kishon Vijay Abraham I @ 2010-12-21 7:40 UTC (permalink / raw)
To: linux-omap; +Cc: paul, khilman, p-basak2, b-cousson, kishon
Modify OMAP McBSP driver to use omap hwmod framework and pm runtime APIs.
Created on top of linux OMAP master (linux-omap-2.6 :master)
Tested on OMAP4430 and OMAP3430 SDP boards. Verified that this patch
series does not break the OMAP1 build.
Highlights
* McBSP is designed to use multiple hwmods for a single device when the McBSP
device has sidetone feature.
* To avoid funcionality break of OMAP1 McBSP in between the series
and to keep the patches readable, implementation was done in two steps:
- First modify mcbsp driver to use platform_get* APIs
- then convert it to use hwmod framework for OMAP2+.
* API's like omap_device_noidle() and omap_device_default_idle() is used to
change the SYCONFIG register bits. This change is done to align with the
discussion on [2]
* Use '.rev' of omap_hwmod class to identify OMAP3 specific settings
* Use *ST_* macros for idlest_idle bit
* Incorporate other general review comments provided for hwmod adpatation
of other OMAP driver's (eg., do pdata free after a omap_device_build())
* Retain fclk even after pm_runtime adaptation to facilitate switching of
functional clock from one source to another
Discussions related to the first RFC patch can be found at [1]
[1]: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36743.html
[2]: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg39615.html
Charulatha V (3)
OMAP2420: hwmod data: Add McBSP
OMAP2430: hwmod data: Add McBSP
OMAP3: hwmod data: Add McBSP
Benoit Cousson (1)
OMAP4: hwmod data: Add McBSP
Kishon Vijay Abraham I (6):
OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct
OMAP: McBSP: Convert McBSP to platform device model
OMAP3: hwmod: add dev_attr for McBSP sidetone
OMAP2+: McBSP: hwmod adaptation for McBSP
OMAP: McBSP: use omap_device APIs to modify SYSCONFIG
OMAP: McBSP: Add pm runtime support
arch/arm/mach-omap1/mcbsp.c | 383 +++++++++++++++----
arch/arm/mach-omap2/mcbsp.c | 246 ++++---------
arch/arm/mach-omap2/omap_hwmod.c | 1 +
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 167 ++++++++
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 415 ++++++++++++++++++++
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 535 ++++++++++++++++++++++++++
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 320 +++++++++++++++
arch/arm/mach-omap2/prcm-common.h | 4 +
arch/arm/plat-omap/devices.c | 10 +-
arch/arm/plat-omap/include/plat/mcbsp.h | 26 +-
arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 +-
arch/arm/plat-omap/mcbsp.c | 143 +++++---
12 files changed, 1942 insertions(+), 312 deletions(-)
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH v1 00/10] OMAP: McBSP: hwmod adaptation and runtime conversion
2010-12-21 7:40 ` [PATCH v1 00/10] OMAP: McBSP: hwmod adaptation and runtime conversion Kishon Vijay Abraham I
@ 2010-12-22 15:42 ` Jarkko Nikula
2010-12-23 9:21 ` Varadarajan, Charulatha
1 sibling, 0 replies; 17+ messages in thread
From: Jarkko Nikula @ 2010-12-22 15:42 UTC (permalink / raw)
To: Kishon Vijay Abraham I; +Cc: linux-omap, paul, khilman, p-basak2, b-cousson
Hi
On Tue, 21 Dec 2010 13:10:31 +0530
Kishon Vijay Abraham I <kishon@ti.com> wrote:
> Modify OMAP McBSP driver to use omap hwmod framework and pm runtime APIs.
>
> Created on top of linux OMAP master (linux-omap-2.6 :master)
> Tested on OMAP4430 and OMAP3430 SDP boards. Verified that this patch
> series does not break the OMAP1 build.
>
Is there some patches missing or conflict with head
e8790546b376d9d77c541f8c17acb080e7342467 as the patch 02/10 doesn't
apply?
Applying: OMAP: McBSP: Convert McBSP to platform device model
error: patch failed: arch/arm/mach-omap1/mcbsp.c:78
error: arch/arm/mach-omap1/mcbsp.c: patch does not apply
Patch failed at 0001 OMAP: McBSP: Convert McBSP to platform device model
--
Jarkko
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 00/10] OMAP: McBSP: hwmod adaptation and runtime conversion
2010-12-21 7:40 ` [PATCH v1 00/10] OMAP: McBSP: hwmod adaptation and runtime conversion Kishon Vijay Abraham I
2010-12-22 15:42 ` Jarkko Nikula
@ 2010-12-23 9:21 ` Varadarajan, Charulatha
1 sibling, 0 replies; 17+ messages in thread
From: Varadarajan, Charulatha @ 2010-12-23 9:21 UTC (permalink / raw)
To: Kishon Vijay Abraham I; +Cc: linux-omap, paul, khilman, p-basak2, b-cousson
Kishon,
On Tue, Dec 21, 2010 at 13:10, Kishon Vijay Abraham I <kishon@ti.com> wrote:
>
> Modify OMAP McBSP driver to use omap hwmod framework and pm runtime APIs.
This patch series should also delete the macros like
"OMAP*_MCBSP*_BASE" once the driver
starts using hwmod framework because such information can be extracted
from hwmod database.
>
> Created on top of linux OMAP master (linux-omap-2.6 :master)
> Tested on OMAP4430 and OMAP3430 SDP boards. Verified that this patch
> series does not break the OMAP1 build.
-V Charulatha
^ permalink raw reply [flat|nested] 17+ messages in thread