Re: [PATCH] OMAP: DSS2: Have separate irq handlers for DISPC and DSI

Tomi Valkeinen
2011-02-18T09:56:13Z

On Fri, 2011-02-18 at 03:45 -0600, Turquette, Mike wrote:

<snip>

> PRM_IRQSTATUS_* registers will have status bits set even when the
> corresponding PRM_IRQENABLE_* bits are not set. The common assumption
> was that status bits would not be set if interrupts weren't enabled
> and this caused us some issues in prcm_interrupt_handler some time
> back. I don't know how DSS_IRQSTATUS works under the hood, but be
> careful of such assumptions :-)

That's how DISPC_IRQ* and DSI_IRQ* also works. But that's not what this
discussion was about =). DISPC and DSI have a shared interrupt line, and
there's a DSS_IRQSTATUS register with two bits, telling if the interrupt
was for DISPC or DSI.

Tomi