From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Cousson, Benoit" Subject: Re: [PATCH 2/2] OMAP3: wdtimer: Fix CORE idle transition Date: Thu, 10 Mar 2011 12:22:48 +0100 Message-ID: <4D78B488.1060507@ti.com> References: <1299754448-24888-1-git-send-email-kalle.jokiniemi@nokia.com> <1299754448-24888-3-git-send-email-kalle.jokiniemi@nokia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Return-path: Received: from devils.ext.ti.com ([198.47.26.153]:42474 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751069Ab1CJLW4 (ORCPT ); Thu, 10 Mar 2011 06:22:56 -0500 In-Reply-To: <1299754448-24888-3-git-send-email-kalle.jokiniemi@nokia.com> Sender: linux-omap-owner@vger.kernel.org List-Id: linux-omap@vger.kernel.org To: Kalle Jokiniemi Cc: "paul@pwsan.com" , "Hilman, Kevin" , "tony@atomide.com" , "linux-omap@vger.kernel.org" On 3/10/2011 11:54 AM, Kalle Jokiniemi wrote: > From: Paul Walmsley > > The HW superwised smart idle for wdtimer in OMAP3 prevents > CORE power domain idle transitions. Disable it by swithing > to SW supervised transitions. We should probably highlight that this looks like a HW bug. Smartidle and clockactivity are supposed to be supported by this module on OMAP3. Some further investigation with TI HW folks are needed to understand that. Regards, Benoit > > Signed-off-by: Kalle Jokiniemi > Signed-off-by: Paul Walmsley > --- > arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 1 + > 1 files changed, 1 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > index 196a834..a99a4f3 100644 > --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > @@ -1293,6 +1293,7 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = { > .slaves = omap3xxx_wd_timer2_slaves, > .slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves), > .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > + .flags = HWMOD_SWSUP_SIDLE, > }; > > /* UART common */