Setting OMAP DSS fck

Setting OMAP DSS fck

[Tomi Valkeinen]

[-- Attachment #1: Type: text/plain, Size: 343 bytes --]

Hi,

Why is it that the rate of DSS functional clock (dss_dss_clk on OMAP4)
cannot be set, but we need to get the parent of the fck, and set the
rate of that? The same is on OMAP3.

From driver's perspective I think this only makes things more complex,
as the driver is not interested in the parent, only about the dss fck.

 Tomi


[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 836 bytes --]

Re: Setting OMAP DSS fck

[Cousson, Benoit]

Hi Tomi,

On 12/1/2011 9:16 AM, Tomi Valkeinen wrote:
> Hi,
>
> Why is it that the rate of DSS functional clock (dss_dss_clk on OMAP4)
> cannot be set, but we need to get the parent of the fck, and set the
> rate of that? The same is on OMAP3.

This is a limitation of the clock fmwk, you cannot change the rate if 
you do not have a .set_rate function in your clock node. It is not 
propagated automatically to the parent.

In your case, here is the parent:

static struct clk dpll_per_m5x2_ck = {
	.name		= "dpll_per_m5x2_ck",
	.parent		= &dpll_per_x2_ck,
	.clksel		= dpll_per_m2x2_div,
	.clksel_reg	= OMAP4430_CM_DIV_M5_DPLL_PER,
	.clksel_mask	= OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK,
	.ops		= &clkops_omap4_dpllmx_ops,
	.recalc		= &omap2_clksel_recalc,
	.round_rate	= &omap2_clksel_round_rate,
	.set_rate	= &omap2_clksel_set_rate,
};

And here is the child you are trying to set the rate to.

static struct clk dss_dss_clk = {
	.name		= "dss_dss_clk",
	.ops		= &clkops_omap2_dflt,
	.enable_reg	= OMAP4430_CM_DSS_DSS_CLKCTRL,
	.enable_bit	= OMAP4430_OPTFCLKEN_DSSCLK_SHIFT,
	.clkdm_name	= "l3_dss_clkdm",
	.parent		= &dpll_per_m5x2_ck,
	.recalc		= &followparent_recalc,
};

Propagating a set_rate to a parent is not a simple task because the fmwk 
do not have a clue about the siblings you might potentially have. And 
changing the parent will have an impact on every potential children.

In this case, it seems that there is only one child, so it might be 
possible.

I know this kind of issue was discussed during the new common clock fmwk 
discussion.

I'm Cc'ing Mike who will know the status of such feature.

>  From driver's perspective I think this only makes things more complex,
> as the driver is not interested in the parent, only about the dss fck.

Fully agree. It should transparent for the driver.

Regards,
Benoit

Re: Setting OMAP DSS fck

[Turquette, Mike]

On Thu, Dec 1, 2011 at 12:58 AM, Cousson, Benoit <b-cousson@ti.com> wrote:
> On 12/1/2011 9:16 AM, Tomi Valkeinen wrote:
>>  From driver's perspective I think this only makes things more complex,
>> as the driver is not interested in the parent, only about the dss fck.
>
> Fully agree. It should transparent for the driver.

The new common clk patches do try to take care of this.  A child clk
may be marked with CLK_PARENT_RATE_CHANGE flag which tells
clk_set_rate to (potentially) propagate up to the parent and change
it's rate.

This won't help you currently Tomi, but you can take comfort knowing
that someday your driver won't have to know details about dss_fck's
parent ;-)

Regards,
Mike
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: Setting OMAP DSS fck

[Paul Walmsley]

On Thu, 1 Dec 2011, Tomi Valkeinen wrote:

> Why is it that the rate of DSS functional clock (dss_dss_clk on OMAP4)
> cannot be set, but we need to get the parent of the fck, and set the
> rate of that? The same is on OMAP3.
> 
> From driver's perspective I think this only makes things more complex,
> as the driver is not interested in the parent, only about the dss fck.

Yeah, I agree.  We've talked about implementing rate changes that 
percolate up to some higher point in the clock tree, but have never gotten 
around to it due to other, higher priorities.  And now the common clock 
discussion has reduced the desire to do much OMAP-specific implementation 
of this stuff.

Another (related) problem is that the driver probably needs to know the 
ranges of the possible values that can be set.


- Paul

Re: Setting OMAP DSS fck

[Tomi Valkeinen]

[-- Attachment #1: Type: text/plain, Size: 1345 bytes --]

On Thu, 2011-12-01 at 11:23 -0700, Paul Walmsley wrote:
> On Thu, 1 Dec 2011, Tomi Valkeinen wrote:
> 
> > Why is it that the rate of DSS functional clock (dss_dss_clk on OMAP4)
> > cannot be set, but we need to get the parent of the fck, and set the
> > rate of that? The same is on OMAP3.
> > 
> > From driver's perspective I think this only makes things more complex,
> > as the driver is not interested in the parent, only about the dss fck.
> 
> Yeah, I agree.  We've talked about implementing rate changes that 
> percolate up to some higher point in the clock tree, but have never gotten 
> around to it due to other, higher priorities.  And now the common clock 
> discussion has reduced the desire to do much OMAP-specific implementation 
> of this stuff.
> 
> Another (related) problem is that the driver probably needs to know the 
> ranges of the possible values that can be set.

That's true. The DSS driver has knowledge of the possible divider ranges
that the parent clock can use. Not very neat.

And note that the DSS driver needs to know about the possible dividers,
not the clock freq range. We need to get quite exact pixel clocks,
derived via some dividers, and we iterate through the dividers trying to
find a divider set that produces a pixel clock that is close to the
required one.

 Tomi


[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 836 bytes --]