Re: oprofile and ARM A9 hardware counter

[Jon Hunter <jon-hunter@ti.com>]

Hi Will,

On 05/11/2012 08:49 AM, Will Deacon wrote:
> On Fri, May 11, 2012 at 02:47:17PM +0100, Jon Hunter wrote:
>> On 05/11/2012 07:25 AM, Will Deacon wrote:
>>> I figured I may as well take perf for a spin and see how I got on. The good
>>> news is that the hwmod bits all seem to work as before and the correct IRQs
>>> are requested:
>>>
>>> root@florentine-pogen:~# cat /proc/interrupts
>>>            CPU0       CPU1
>>>  29:      44527      17916       GIC  twd
>>>  33:          0          0       GIC  arm-pmu
>>>  34:          0          0       GIC  arm-pmu
>>>
>>> But, unfortunately, as you can see from the above, I just can't persuade them
>>> to fire. The PMU counters do tick, but they happily increment through zero
>>> without us realising. I retested with my perf/omap4 branch to make sure my
>>> board is ok, and the irqs do fire there.
>>>
>>> Any ideas?
>>
>> Do you disable OMAP2/3 support in the kernel config, so that CPU_HAS_PMU
>> is enabled?
> 
> I enabled OMAP3 debug peripherals, so I selected CPU_HAS_PMU that way.

I tried the same (make omap2plus_defconfig and enabled the above
option), and I do see the interrupts firing on both 4430 and 4460...

/ # cat /proc/interrupts
           CPU0       CPU1
 29:       1023        404       GIC  twd
 33:        401          0       GIC  arm-pmu
 34:          0        441       GIC  arm-pmu


What is your kernel commit ID that you applied the patches on top of?

What board are you using? Blaze, panda, etc, and is it 4430 or 4460?

Cheers
Jon