* [PATCH 1/4] ARM/dts: omap5: Update GPIO with address space and interrupt
2012-10-22 10:22 [PATCH 0/4] ARM/dts: Update OMAP5 with address space and interrupts Sebastien Guiriec
@ 2012-10-22 10:22 ` Sebastien Guiriec
2012-10-22 10:22 ` [PATCH 2/4] ARM/dts: omap5: Update I2C with address space and interrupts Sebastien Guiriec
` (3 subsequent siblings)
4 siblings, 0 replies; 16+ messages in thread
From: Sebastien Guiriec @ 2012-10-22 10:22 UTC (permalink / raw)
To: Sebastien Guiriec, Benoit Cousson, Tony Lindgren
Cc: linux-omap, linux-arm-kernel, Santosh Shilimkar, Peter Ujfalusi
Add base address and interrupt line inside Device Tree data for
OMAP5
Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 42c78be..9e39f9f 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -104,6 +104,8 @@
gpio1: gpio@4ae10000 {
compatible = "ti,omap4-gpio";
+ reg = <0x4ae10000 0x200>;
+ interrupts = <0 29 0x4>;
ti,hwmods = "gpio1";
gpio-controller;
#gpio-cells = <2>;
@@ -113,6 +115,8 @@
gpio2: gpio@48055000 {
compatible = "ti,omap4-gpio";
+ reg = <0x48055000 0x200>;
+ interrupts = <0 30 0x4>;
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <2>;
@@ -122,6 +126,8 @@
gpio3: gpio@48057000 {
compatible = "ti,omap4-gpio";
+ reg = <0x48057000 0x200>;
+ interrupts = <0 31 0x4>;
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <2>;
@@ -131,6 +137,8 @@
gpio4: gpio@48059000 {
compatible = "ti,omap4-gpio";
+ reg = <0x48059000 0x200>;
+ interrupts = <0 32 0x4>;
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <2>;
@@ -140,6 +148,8 @@
gpio5: gpio@4805b000 {
compatible = "ti,omap4-gpio";
+ reg = <0x4805b000 0x200>;
+ interrupts = <0 33 0x4>;
ti,hwmods = "gpio5";
gpio-controller;
#gpio-cells = <2>;
@@ -149,6 +159,8 @@
gpio6: gpio@4805d000 {
compatible = "ti,omap4-gpio";
+ reg = <0x4805d000 0x200>;
+ interrupts = <0 34 0x4>;
ti,hwmods = "gpio6";
gpio-controller;
#gpio-cells = <2>;
@@ -158,6 +170,8 @@
gpio7: gpio@48051000 {
compatible = "ti,omap4-gpio";
+ reg = <0x48051000 0x200>;
+ interrupts = <0 35 0x4>;
ti,hwmods = "gpio7";
gpio-controller;
#gpio-cells = <2>;
@@ -167,6 +181,8 @@
gpio8: gpio@48053000 {
compatible = "ti,omap4-gpio";
+ reg = <0x48053000 0x200>;
+ interrupts = <0 121 0x4>;
ti,hwmods = "gpio8";
gpio-controller;
#gpio-cells = <2>;
--
1.7.10.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 2/4] ARM/dts: omap5: Update I2C with address space and interrupts
2012-10-22 10:22 [PATCH 0/4] ARM/dts: Update OMAP5 with address space and interrupts Sebastien Guiriec
2012-10-22 10:22 ` [PATCH 1/4] ARM/dts: omap5: Update GPIO with address space and interrupt Sebastien Guiriec
@ 2012-10-22 10:22 ` Sebastien Guiriec
2012-10-22 11:14 ` Shubhrajyoti Datta
2012-10-22 10:22 ` [PATCH 3/4] ARM/dts: omap5: Update UART " Sebastien Guiriec
` (2 subsequent siblings)
4 siblings, 1 reply; 16+ messages in thread
From: Sebastien Guiriec @ 2012-10-22 10:22 UTC (permalink / raw)
To: Sebastien Guiriec, Benoit Cousson, Tony Lindgren
Cc: linux-omap, linux-arm-kernel, Santosh Shilimkar, Peter Ujfalusi
Add base address and interrupt line inside Device Tree data for
OMAP5
Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 9e39f9f..6c22e1b 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -192,6 +192,8 @@
i2c1: i2c@48070000 {
compatible = "ti,omap4-i2c";
+ reg = <0x48070000 0x100>;
+ interrupts = <0 56 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c1";
@@ -199,6 +201,8 @@
i2c2: i2c@48072000 {
compatible = "ti,omap4-i2c";
+ reg = <0x48072000 0x100>;
+ interrupts = <0 57 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c2";
@@ -206,20 +210,26 @@
i2c3: i2c@48060000 {
compatible = "ti,omap4-i2c";
+ reg = <0x48060000 0x100>;
+ interrupts = <0 61 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c3";
};
- i2c4: i2c@4807A000 {
+ i2c4: i2c@4807a000 {
compatible = "ti,omap4-i2c";
+ reg = <0x4807a000 0x100>;
+ interrupts = <0 62 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c4";
};
- i2c5: i2c@4807C000 {
+ i2c5: i2c@4807c000 {
compatible = "ti,omap4-i2c";
+ reg = <0x4807c000 0x100>;
+ interrupts = <0 60 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c5";
--
1.7.10.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 2/4] ARM/dts: omap5: Update I2C with address space and interrupts
2012-10-22 10:22 ` [PATCH 2/4] ARM/dts: omap5: Update I2C with address space and interrupts Sebastien Guiriec
@ 2012-10-22 11:14 ` Shubhrajyoti Datta
0 siblings, 0 replies; 16+ messages in thread
From: Shubhrajyoti Datta @ 2012-10-22 11:14 UTC (permalink / raw)
To: Sebastien Guiriec
Cc: Benoit Cousson, Tony Lindgren, linux-omap, linux-arm-kernel,
Santosh Shilimkar, Peter Ujfalusi
On Mon, Oct 22, 2012 at 3:52 PM, Sebastien Guiriec <s-guiriec@ti.com> wrote:
> Add base address and interrupt line inside Device Tree data for
> OMAP5
Looks good to me.
Thanks ,
Reviewed-by: Shubhrajyoti D <shubhrajyoti@ti.com>
>
> Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
> ---
> arch/arm/boot/dts/omap5.dtsi | 14 ++++++++++++--
> 1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index 9e39f9f..6c22e1b 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -192,6 +192,8 @@
>
> i2c1: i2c@48070000 {
> compatible = "ti,omap4-i2c";
> + reg = <0x48070000 0x100>;
> + interrupts = <0 56 0x4>;
> #address-cells = <1>;
> #size-cells = <0>;
> ti,hwmods = "i2c1";
> @@ -199,6 +201,8 @@
>
> i2c2: i2c@48072000 {
> compatible = "ti,omap4-i2c";
> + reg = <0x48072000 0x100>;
> + interrupts = <0 57 0x4>;
> #address-cells = <1>;
> #size-cells = <0>;
> ti,hwmods = "i2c2";
> @@ -206,20 +210,26 @@
>
> i2c3: i2c@48060000 {
> compatible = "ti,omap4-i2c";
> + reg = <0x48060000 0x100>;
> + interrupts = <0 61 0x4>;
> #address-cells = <1>;
> #size-cells = <0>;
> ti,hwmods = "i2c3";
> };
>
> - i2c4: i2c@4807A000 {
> + i2c4: i2c@4807a000 {
> compatible = "ti,omap4-i2c";
> + reg = <0x4807a000 0x100>;
> + interrupts = <0 62 0x4>;
> #address-cells = <1>;
> #size-cells = <0>;
> ti,hwmods = "i2c4";
> };
>
> - i2c5: i2c@4807C000 {
> + i2c5: i2c@4807c000 {
> compatible = "ti,omap4-i2c";
> + reg = <0x4807c000 0x100>;
> + interrupts = <0 60 0x4>;
> #address-cells = <1>;
> #size-cells = <0>;
> ti,hwmods = "i2c5";
> --
> 1.7.10.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 3/4] ARM/dts: omap5: Update UART with address space and interrupts
2012-10-22 10:22 [PATCH 0/4] ARM/dts: Update OMAP5 with address space and interrupts Sebastien Guiriec
2012-10-22 10:22 ` [PATCH 1/4] ARM/dts: omap5: Update GPIO with address space and interrupt Sebastien Guiriec
2012-10-22 10:22 ` [PATCH 2/4] ARM/dts: omap5: Update I2C with address space and interrupts Sebastien Guiriec
@ 2012-10-22 10:22 ` Sebastien Guiriec
2012-10-22 11:16 ` Sourav
2012-10-22 10:22 ` [PATCH 4/4] ARM/dts: omap5: Update MMC " Sebastien Guiriec
2012-10-22 14:11 ` [PATCH 0/4] ARM/dts: Update OMAP5 " Benoit Cousson
4 siblings, 1 reply; 16+ messages in thread
From: Sebastien Guiriec @ 2012-10-22 10:22 UTC (permalink / raw)
To: Sebastien Guiriec, Benoit Cousson, Tony Lindgren
Cc: linux-omap, linux-arm-kernel, Santosh Shilimkar, Peter Ujfalusi
Add base address and interrupt line inside Device Tree data for
Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 6c22e1b..413df94 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -237,36 +237,48 @@
uart1: serial@4806a000 {
compatible = "ti,omap4-uart";
+ reg = <0x4806a000 0x100>;
+ interrupts = <0 72 0x4>;
ti,hwmods = "uart1";
clock-frequency = <48000000>;
};
uart2: serial@4806c000 {
compatible = "ti,omap4-uart";
+ reg = <0x4806c000 0x100>;
+ interrupts = <0 73 0x4>;
ti,hwmods = "uart2";
clock-frequency = <48000000>;
};
uart3: serial@48020000 {
compatible = "ti,omap4-uart";
+ reg = <0x48020000 0x100>;
+ interrupts = <0 74 0x4>;
ti,hwmods = "uart3";
clock-frequency = <48000000>;
};
uart4: serial@4806e000 {
compatible = "ti,omap4-uart";
+ reg = <0x4806e000 0x100>;
+ interrupts = <0 70 0x4>;
ti,hwmods = "uart4";
clock-frequency = <48000000>;
};
uart5: serial@48066000 {
- compatible = "ti,omap5-uart";
+ compatible = "ti,omap4-uart";
+ reg = <0x48066000 0x100>;
+ interrupts = <0 105 0x4>;
ti,hwmods = "uart5";
clock-frequency = <48000000>;
};
uart6: serial@48068000 {
- compatible = "ti,omap6-uart";
+ compatible = "ti,omap4-uart";
+ reg = <0x48068000 0x100>;
+ interrupts = <0 106 0x4>;
ti,hwmods = "uart6";
clock-frequency = <48000000>;
};
--
1.7.10.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 3/4] ARM/dts: omap5: Update UART with address space and interrupts
2012-10-22 10:22 ` [PATCH 3/4] ARM/dts: omap5: Update UART " Sebastien Guiriec
@ 2012-10-22 11:16 ` Sourav
2012-10-22 11:57 ` Benoit Cousson
0 siblings, 1 reply; 16+ messages in thread
From: Sourav @ 2012-10-22 11:16 UTC (permalink / raw)
To: Sebastien Guiriec
Cc: Benoit Cousson, Tony Lindgren, Peter Ujfalusi, linux-omap,
Santosh Shilimkar, linux-arm-kernel
Hi Sebastien,
On Monday 22 October 2012 03:52 PM, Sebastien Guiriec wrote:
> Add base address and interrupt line inside Device Tree data for
Incomplete sentence!
> Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
> ---
> arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++--
> 1 file changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index 6c22e1b..413df94 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -237,36 +237,48 @@
>
> uart1: serial@4806a000 {
> compatible = "ti,omap4-uart";
> + reg = <0x4806a000 0x100>;
> + interrupts = <0 72 0x4>;
> ti,hwmods = "uart1";
> clock-frequency = <48000000>;
> };
>
> uart2: serial@4806c000 {
> compatible = "ti,omap4-uart";
> + reg = <0x4806c000 0x100>;
> + interrupts = <0 73 0x4>;
> ti,hwmods = "uart2";
> clock-frequency = <48000000>;
> };
>
> uart3: serial@48020000 {
> compatible = "ti,omap4-uart";
> + reg = <0x48020000 0x100>;
> + interrupts = <0 74 0x4>;
> ti,hwmods = "uart3";
> clock-frequency = <48000000>;
> };
>
> uart4: serial@4806e000 {
> compatible = "ti,omap4-uart";
> + reg = <0x4806e000 0x100>;
> + interrupts = <0 70 0x4>;
> ti,hwmods = "uart4";
> clock-frequency = <48000000>;
> };
>
> uart5: serial@48066000 {
> - compatible = "ti,omap5-uart";
> + compatible = "ti,omap4-uart";
> + reg = <0x48066000 0x100>;
> + interrupts = <0 105 0x4>;
In Omap5 TRM, the interrupt number mentioned for uart5 is 138. How is
105 coming?
> ti,hwmods = "uart5";
> clock-frequency = <48000000>;
> };
>
> uart6: serial@48068000 {
> - compatible = "ti,omap6-uart";
> + compatible = "ti,omap4-uart";
> + reg = <0x48068000 0x100>;
> + interrupts = <0 106 0x4>;
Same here, TRM shows this number to be 139 ?
> ti,hwmods = "uart6";
> clock-frequency = <48000000>;
> };
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 3/4] ARM/dts: omap5: Update UART with address space and interrupts
2012-10-22 11:16 ` Sourav
@ 2012-10-22 11:57 ` Benoit Cousson
2012-10-22 12:07 ` Benoit Cousson
0 siblings, 1 reply; 16+ messages in thread
From: Benoit Cousson @ 2012-10-22 11:57 UTC (permalink / raw)
To: Sourav
Cc: Sebastien Guiriec, Tony Lindgren, Peter Ujfalusi, linux-omap,
Santosh Shilimkar, linux-arm-kernel
Hi Sourav,
On 10/22/2012 01:16 PM, Sourav wrote:
> Hi Sebastien,
> On Monday 22 October 2012 03:52 PM, Sebastien Guiriec wrote:
>> Add base address and interrupt line inside Device Tree data for
> Incomplete sentence!
>> Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
>> ---
>> arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++--
>> 1 file changed, 14 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>> index 6c22e1b..413df94 100644
>> --- a/arch/arm/boot/dts/omap5.dtsi
>> +++ b/arch/arm/boot/dts/omap5.dtsi
>> @@ -237,36 +237,48 @@
>> uart1: serial@4806a000 {
>> compatible = "ti,omap4-uart";
>> + reg = <0x4806a000 0x100>;
>> + interrupts = <0 72 0x4>;
>> ti,hwmods = "uart1";
>> clock-frequency = <48000000>;
>> };
>> uart2: serial@4806c000 {
>> compatible = "ti,omap4-uart";
>> + reg = <0x4806c000 0x100>;
>> + interrupts = <0 73 0x4>;
>> ti,hwmods = "uart2";
>> clock-frequency = <48000000>;
>> };
>> uart3: serial@48020000 {
>> compatible = "ti,omap4-uart";
>> + reg = <0x48020000 0x100>;
>> + interrupts = <0 74 0x4>;
>> ti,hwmods = "uart3";
>> clock-frequency = <48000000>;
>> };
>> uart4: serial@4806e000 {
>> compatible = "ti,omap4-uart";
>> + reg = <0x4806e000 0x100>;
>> + interrupts = <0 70 0x4>;
>> ti,hwmods = "uart4";
>> clock-frequency = <48000000>;
>> };
>> uart5: serial@48066000 {
>> - compatible = "ti,omap5-uart";
>> + compatible = "ti,omap4-uart";
>> + reg = <0x48066000 0x100>;
>> + interrupts = <0 105 0x4>;
> In Omap5 TRM, the interrupt number mentioned for uart5 is 138. How is
> 105 coming?
It is from hwmod and thus from the HW spec. It looks like the TRM is
wrong... or the HW spec :-)
>> ti,hwmods = "uart5";
>> clock-frequency = <48000000>;
>> };
>> uart6: serial@48068000 {
>> - compatible = "ti,omap6-uart";
>> + compatible = "ti,omap4-uart";
>> + reg = <0x48068000 0x100>;
>> + interrupts = <0 106 0x4>;
> Same here, TRM shows this number to be 139 ?
Same source.
Regards,
Benoit
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 3/4] ARM/dts: omap5: Update UART with address space and interrupts
2012-10-22 11:57 ` Benoit Cousson
@ 2012-10-22 12:07 ` Benoit Cousson
2012-10-22 12:27 ` Sourav
0 siblings, 1 reply; 16+ messages in thread
From: Benoit Cousson @ 2012-10-22 12:07 UTC (permalink / raw)
To: Sourav
Cc: Sebastien Guiriec, Tony Lindgren, Peter Ujfalusi, linux-omap,
Santosh Shilimkar, linux-arm-kernel
On 10/22/2012 01:57 PM, Benoit Cousson wrote:
> Hi Sourav,
>
> On 10/22/2012 01:16 PM, Sourav wrote:
>> Hi Sebastien,
>> On Monday 22 October 2012 03:52 PM, Sebastien Guiriec wrote:
>>> Add base address and interrupt line inside Device Tree data for
>> Incomplete sentence!
>>> Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
>>> ---
>>> arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++--
>>> 1 file changed, 14 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>>> index 6c22e1b..413df94 100644
>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>> @@ -237,36 +237,48 @@
>>> uart1: serial@4806a000 {
>>> compatible = "ti,omap4-uart";
>>> + reg = <0x4806a000 0x100>;
>>> + interrupts = <0 72 0x4>;
>>> ti,hwmods = "uart1";
>>> clock-frequency = <48000000>;
>>> };
>>> uart2: serial@4806c000 {
>>> compatible = "ti,omap4-uart";
>>> + reg = <0x4806c000 0x100>;
>>> + interrupts = <0 73 0x4>;
>>> ti,hwmods = "uart2";
>>> clock-frequency = <48000000>;
>>> };
>>> uart3: serial@48020000 {
>>> compatible = "ti,omap4-uart";
>>> + reg = <0x48020000 0x100>;
>>> + interrupts = <0 74 0x4>;
>>> ti,hwmods = "uart3";
>>> clock-frequency = <48000000>;
>>> };
>>> uart4: serial@4806e000 {
>>> compatible = "ti,omap4-uart";
>>> + reg = <0x4806e000 0x100>;
>>> + interrupts = <0 70 0x4>;
>>> ti,hwmods = "uart4";
>>> clock-frequency = <48000000>;
>>> };
>>> uart5: serial@48066000 {
>>> - compatible = "ti,omap5-uart";
>>> + compatible = "ti,omap4-uart";
>>> + reg = <0x48066000 0x100>;
>>> + interrupts = <0 105 0x4>;
>> In Omap5 TRM, the interrupt number mentioned for uart5 is 138. How is
>> 105 coming?
>
> It is from hwmod and thus from the HW spec. It looks like the TRM is
> wrong... or the HW spec :-)
>
>>> ti,hwmods = "uart5";
>>> clock-frequency = <48000000>;
>>> };
>>> uart6: serial@48068000 {
>>> - compatible = "ti,omap6-uart";
>>> + compatible = "ti,omap4-uart";
>>> + reg = <0x48068000 0x100>;
>>> + interrupts = <0 106 0x4>;
>> Same here, TRM shows this number to be 139 ?
In fact, even the TRM (ES1.0 NDA vM) is aligned with these data.
Where did you see 138 and 139?
Regards,
Benoit
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 3/4] ARM/dts: omap5: Update UART with address space and interrupts
2012-10-22 12:07 ` Benoit Cousson
@ 2012-10-22 12:27 ` Sourav
2012-10-22 12:31 ` Felipe Balbi
2012-10-22 12:50 ` Benoit Cousson
0 siblings, 2 replies; 16+ messages in thread
From: Sourav @ 2012-10-22 12:27 UTC (permalink / raw)
To: Benoit Cousson
Cc: Sebastien Guiriec, Tony Lindgren, Peter Ujfalusi, linux-omap,
Santosh Shilimkar, linux-arm-kernel
Hi Benoit,
On Monday 22 October 2012 05:37 PM, Benoit Cousson wrote:
> On 10/22/2012 01:57 PM, Benoit Cousson wrote:
>> Hi Sourav,
>>
>> On 10/22/2012 01:16 PM, Sourav wrote:
>>> Hi Sebastien,
>>> On Monday 22 October 2012 03:52 PM, Sebastien Guiriec wrote:
>>>> Add base address and interrupt line inside Device Tree data for
>>> Incomplete sentence!
>>>> Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
>>>> ---
>>>> arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++--
>>>> 1 file changed, 14 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>>>> index 6c22e1b..413df94 100644
>>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>>> @@ -237,36 +237,48 @@
>>>> uart1: serial@4806a000 {
>>>> compatible = "ti,omap4-uart";
>>>> + reg = <0x4806a000 0x100>;
>>>> + interrupts = <0 72 0x4>;
>>>> ti,hwmods = "uart1";
>>>> clock-frequency = <48000000>;
>>>> };
>>>> uart2: serial@4806c000 {
>>>> compatible = "ti,omap4-uart";
>>>> + reg = <0x4806c000 0x100>;
>>>> + interrupts = <0 73 0x4>;
>>>> ti,hwmods = "uart2";
>>>> clock-frequency = <48000000>;
>>>> };
>>>> uart3: serial@48020000 {
>>>> compatible = "ti,omap4-uart";
>>>> + reg = <0x48020000 0x100>;
>>>> + interrupts = <0 74 0x4>;
>>>> ti,hwmods = "uart3";
>>>> clock-frequency = <48000000>;
>>>> };
>>>> uart4: serial@4806e000 {
>>>> compatible = "ti,omap4-uart";
>>>> + reg = <0x4806e000 0x100>;
>>>> + interrupts = <0 70 0x4>;
>>>> ti,hwmods = "uart4";
>>>> clock-frequency = <48000000>;
>>>> };
>>>> uart5: serial@48066000 {
>>>> - compatible = "ti,omap5-uart";
>>>> + compatible = "ti,omap4-uart";
>>>> + reg = <0x48066000 0x100>;
>>>> + interrupts = <0 105 0x4>;
>>> In Omap5 TRM, the interrupt number mentioned for uart5 is 138. How is
>>> 105 coming?
>> It is from hwmod and thus from the HW spec. It looks like the TRM is
>> wrong... or the HW spec :-)
>>
>>>> ti,hwmods = "uart5";
>>>> clock-frequency = <48000000>;
>>>> };
>>>> uart6: serial@48068000 {
>>>> - compatible = "ti,omap6-uart";
>>>> + compatible = "ti,omap4-uart";
>>>> + reg = <0x48068000 0x100>;
>>>> + interrupts = <0 106 0x4>;
>>> Same here, TRM shows this number to be 139 ?
> In fact, even the TRM (ES1.0 NDA vM) is aligned with these data.
> Where did you see 138 and 139?
I looked at Page 6300 of the above TRM, Figure 24-60. Is this place not
correct to look
up for these data?
> Regards,
> Benoit
>
>
>
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 3/4] ARM/dts: omap5: Update UART with address space and interrupts
2012-10-22 12:27 ` Sourav
@ 2012-10-22 12:31 ` Felipe Balbi
2012-10-22 12:50 ` Benoit Cousson
1 sibling, 0 replies; 16+ messages in thread
From: Felipe Balbi @ 2012-10-22 12:31 UTC (permalink / raw)
To: Sourav
Cc: Benoit Cousson, Sebastien Guiriec, Tony Lindgren, Peter Ujfalusi,
linux-omap, Santosh Shilimkar, linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 3139 bytes --]
On Mon, Oct 22, 2012 at 05:57:00PM +0530, Sourav wrote:
> Hi Benoit,
> On Monday 22 October 2012 05:37 PM, Benoit Cousson wrote:
> >On 10/22/2012 01:57 PM, Benoit Cousson wrote:
> >>Hi Sourav,
> >>
> >>On 10/22/2012 01:16 PM, Sourav wrote:
> >>>Hi Sebastien,
> >>>On Monday 22 October 2012 03:52 PM, Sebastien Guiriec wrote:
> >>>>Add base address and interrupt line inside Device Tree data for
> >>>Incomplete sentence!
> >>>>Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
> >>>>---
> >>>> arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++--
> >>>> 1 file changed, 14 insertions(+), 2 deletions(-)
> >>>>
> >>>>diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> >>>>index 6c22e1b..413df94 100644
> >>>>--- a/arch/arm/boot/dts/omap5.dtsi
> >>>>+++ b/arch/arm/boot/dts/omap5.dtsi
> >>>>@@ -237,36 +237,48 @@
> >>>> uart1: serial@4806a000 {
> >>>> compatible = "ti,omap4-uart";
> >>>>+ reg = <0x4806a000 0x100>;
> >>>>+ interrupts = <0 72 0x4>;
> >>>> ti,hwmods = "uart1";
> >>>> clock-frequency = <48000000>;
> >>>> };
> >>>> uart2: serial@4806c000 {
> >>>> compatible = "ti,omap4-uart";
> >>>>+ reg = <0x4806c000 0x100>;
> >>>>+ interrupts = <0 73 0x4>;
> >>>> ti,hwmods = "uart2";
> >>>> clock-frequency = <48000000>;
> >>>> };
> >>>> uart3: serial@48020000 {
> >>>> compatible = "ti,omap4-uart";
> >>>>+ reg = <0x48020000 0x100>;
> >>>>+ interrupts = <0 74 0x4>;
> >>>> ti,hwmods = "uart3";
> >>>> clock-frequency = <48000000>;
> >>>> };
> >>>> uart4: serial@4806e000 {
> >>>> compatible = "ti,omap4-uart";
> >>>>+ reg = <0x4806e000 0x100>;
> >>>>+ interrupts = <0 70 0x4>;
> >>>> ti,hwmods = "uart4";
> >>>> clock-frequency = <48000000>;
> >>>> };
> >>>> uart5: serial@48066000 {
> >>>>- compatible = "ti,omap5-uart";
> >>>>+ compatible = "ti,omap4-uart";
> >>>>+ reg = <0x48066000 0x100>;
> >>>>+ interrupts = <0 105 0x4>;
> >>>In Omap5 TRM, the interrupt number mentioned for uart5 is 138. How is
> >>>105 coming?
> >>It is from hwmod and thus from the HW spec. It looks like the TRM is
> >>wrong... or the HW spec :-)
> >>
> >>>> ti,hwmods = "uart5";
> >>>> clock-frequency = <48000000>;
> >>>> };
> >>>> uart6: serial@48068000 {
> >>>>- compatible = "ti,omap6-uart";
> >>>>+ compatible = "ti,omap4-uart";
> >>>>+ reg = <0x48068000 0x100>;
> >>>>+ interrupts = <0 106 0x4>;
> >>>Same here, TRM shows this number to be 139 ?
> >In fact, even the TRM (ES1.0 NDA vM) is aligned with these data.
> >Where did you see 138 and 139?
> I looked at Page 6300 of the above TRM, Figure 24-60. Is this place
correct page is 6366
--
balbi
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 3/4] ARM/dts: omap5: Update UART with address space and interrupts
2012-10-22 12:27 ` Sourav
2012-10-22 12:31 ` Felipe Balbi
@ 2012-10-22 12:50 ` Benoit Cousson
2012-10-22 12:56 ` Sourav
1 sibling, 1 reply; 16+ messages in thread
From: Benoit Cousson @ 2012-10-22 12:50 UTC (permalink / raw)
To: Sourav
Cc: Sebastien Guiriec, Tony Lindgren, Peter Ujfalusi, linux-omap,
Santosh Shilimkar, linux-arm-kernel
On 10/22/2012 02:27 PM, Sourav wrote:
> Hi Benoit,
> On Monday 22 October 2012 05:37 PM, Benoit Cousson wrote:
>> On 10/22/2012 01:57 PM, Benoit Cousson wrote:
>>> Hi Sourav,
>>>
>>> On 10/22/2012 01:16 PM, Sourav wrote:
>>>> Hi Sebastien,
>>>> On Monday 22 October 2012 03:52 PM, Sebastien Guiriec wrote:
>>>>> Add base address and interrupt line inside Device Tree data for
>>>> Incomplete sentence!
>>>>> Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
>>>>> ---
>>>>> arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++--
>>>>> 1 file changed, 14 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm/boot/dts/omap5.dtsi
>>>>> b/arch/arm/boot/dts/omap5.dtsi
>>>>> index 6c22e1b..413df94 100644
>>>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>>>> @@ -237,36 +237,48 @@
>>>>> uart1: serial@4806a000 {
>>>>> compatible = "ti,omap4-uart";
>>>>> + reg = <0x4806a000 0x100>;
>>>>> + interrupts = <0 72 0x4>;
>>>>> ti,hwmods = "uart1";
>>>>> clock-frequency = <48000000>;
>>>>> };
>>>>> uart2: serial@4806c000 {
>>>>> compatible = "ti,omap4-uart";
>>>>> + reg = <0x4806c000 0x100>;
>>>>> + interrupts = <0 73 0x4>;
>>>>> ti,hwmods = "uart2";
>>>>> clock-frequency = <48000000>;
>>>>> };
>>>>> uart3: serial@48020000 {
>>>>> compatible = "ti,omap4-uart";
>>>>> + reg = <0x48020000 0x100>;
>>>>> + interrupts = <0 74 0x4>;
>>>>> ti,hwmods = "uart3";
>>>>> clock-frequency = <48000000>;
>>>>> };
>>>>> uart4: serial@4806e000 {
>>>>> compatible = "ti,omap4-uart";
>>>>> + reg = <0x4806e000 0x100>;
>>>>> + interrupts = <0 70 0x4>;
>>>>> ti,hwmods = "uart4";
>>>>> clock-frequency = <48000000>;
>>>>> };
>>>>> uart5: serial@48066000 {
>>>>> - compatible = "ti,omap5-uart";
>>>>> + compatible = "ti,omap4-uart";
>>>>> + reg = <0x48066000 0x100>;
>>>>> + interrupts = <0 105 0x4>;
>>>> In Omap5 TRM, the interrupt number mentioned for uart5 is 138. How is
>>>> 105 coming?
>>> It is from hwmod and thus from the HW spec. It looks like the TRM is
>>> wrong... or the HW spec :-)
>>>
>>>>> ti,hwmods = "uart5";
>>>>> clock-frequency = <48000000>;
>>>>> };
>>>>> uart6: serial@48068000 {
>>>>> - compatible = "ti,omap6-uart";
>>>>> + compatible = "ti,omap4-uart";
>>>>> + reg = <0x48068000 0x100>;
>>>>> + interrupts = <0 106 0x4>;
>>>> Same here, TRM shows this number to be 139 ?
>> In fact, even the TRM (ES1.0 NDA vM) is aligned with these data.
>> Where did you see 138 and 139?
> I looked at Page 6300 of the above TRM, Figure 24-60. Is this place not
> correct to look
> up for these data?
Nope. Well it should be accurate but since it is a diagram, it does not
necessarily reflect the latest integration data like IRQ line.
You'd better use the table that list all the IRQ per CPU:
18.3.2 Interrupt Requests to INTC_MPU
Regards,
Benoit
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 3/4] ARM/dts: omap5: Update UART with address space and interrupts
2012-10-22 12:50 ` Benoit Cousson
@ 2012-10-22 12:56 ` Sourav
2012-10-22 13:55 ` Sourav
0 siblings, 1 reply; 16+ messages in thread
From: Sourav @ 2012-10-22 12:56 UTC (permalink / raw)
To: Benoit Cousson
Cc: Sebastien Guiriec, Tony Lindgren, Peter Ujfalusi, linux-omap,
Santosh Shilimkar, linux-arm-kernel
On Monday 22 October 2012 06:20 PM, Benoit Cousson wrote:
> On 10/22/2012 02:27 PM, Sourav wrote:
>> Hi Benoit,
>> On Monday 22 October 2012 05:37 PM, Benoit Cousson wrote:
>>> On 10/22/2012 01:57 PM, Benoit Cousson wrote:
>>>> Hi Sourav,
>>>>
>>>> On 10/22/2012 01:16 PM, Sourav wrote:
>>>>> Hi Sebastien,
>>>>> On Monday 22 October 2012 03:52 PM, Sebastien Guiriec wrote:
>>>>>> Add base address and interrupt line inside Device Tree data for
>>>>> Incomplete sentence!
>>>>>> Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
>>>>>> ---
>>>>>> arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++--
>>>>>> 1 file changed, 14 insertions(+), 2 deletions(-)
>>>>>>
>>>>>> diff --git a/arch/arm/boot/dts/omap5.dtsi
>>>>>> b/arch/arm/boot/dts/omap5.dtsi
>>>>>> index 6c22e1b..413df94 100644
>>>>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>>>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>>>>> @@ -237,36 +237,48 @@
>>>>>> uart1: serial@4806a000 {
>>>>>> compatible = "ti,omap4-uart";
>>>>>> + reg = <0x4806a000 0x100>;
>>>>>> + interrupts = <0 72 0x4>;
>>>>>> ti,hwmods = "uart1";
>>>>>> clock-frequency = <48000000>;
>>>>>> };
>>>>>> uart2: serial@4806c000 {
>>>>>> compatible = "ti,omap4-uart";
>>>>>> + reg = <0x4806c000 0x100>;
>>>>>> + interrupts = <0 73 0x4>;
>>>>>> ti,hwmods = "uart2";
>>>>>> clock-frequency = <48000000>;
>>>>>> };
>>>>>> uart3: serial@48020000 {
>>>>>> compatible = "ti,omap4-uart";
>>>>>> + reg = <0x48020000 0x100>;
>>>>>> + interrupts = <0 74 0x4>;
>>>>>> ti,hwmods = "uart3";
>>>>>> clock-frequency = <48000000>;
>>>>>> };
>>>>>> uart4: serial@4806e000 {
>>>>>> compatible = "ti,omap4-uart";
>>>>>> + reg = <0x4806e000 0x100>;
>>>>>> + interrupts = <0 70 0x4>;
>>>>>> ti,hwmods = "uart4";
>>>>>> clock-frequency = <48000000>;
>>>>>> };
>>>>>> uart5: serial@48066000 {
>>>>>> - compatible = "ti,omap5-uart";
>>>>>> + compatible = "ti,omap4-uart";
>>>>>> + reg = <0x48066000 0x100>;
>>>>>> + interrupts = <0 105 0x4>;
>>>>> In Omap5 TRM, the interrupt number mentioned for uart5 is 138. How is
>>>>> 105 coming?
>>>> It is from hwmod and thus from the HW spec. It looks like the TRM is
>>>> wrong... or the HW spec :-)
>>>>
>>>>>> ti,hwmods = "uart5";
>>>>>> clock-frequency = <48000000>;
>>>>>> };
>>>>>> uart6: serial@48068000 {
>>>>>> - compatible = "ti,omap6-uart";
>>>>>> + compatible = "ti,omap4-uart";
>>>>>> + reg = <0x48068000 0x100>;
>>>>>> + interrupts = <0 106 0x4>;
>>>>> Same here, TRM shows this number to be 139 ?
>>> In fact, even the TRM (ES1.0 NDA vM) is aligned with these data.
>>> Where did you see 138 and 139?
>> I looked at Page 6300 of the above TRM, Figure 24-60. Is this place not
>> correct to look
>> up for these data?
> Nope. Well it should be accurate but since it is a diagram, it does not
> necessarily reflect the latest integration data like IRQ line.
>
> You'd better use the table that list all the IRQ per CPU:
>
> 18.3.2 Interrupt Requests to INTC_MPU
Ahh. True. The table does show the numbers to be 105 and 106.
Thanks for the pointer.
~Sourav
> Regards,
> Benoit
>
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 3/4] ARM/dts: omap5: Update UART with address space and interrupts
2012-10-22 12:56 ` Sourav
@ 2012-10-22 13:55 ` Sourav
0 siblings, 0 replies; 16+ messages in thread
From: Sourav @ 2012-10-22 13:55 UTC (permalink / raw)
To: Sebastien Guiriec
Cc: Tony Lindgren, Peter Ujfalusi, Santosh Shilimkar, Benoit Cousson,
linux-omap, linux-arm-kernel
Hi Sebestien,
On Monday 22 October 2012 06:26 PM, Sourav wrote:
> On Monday 22 October 2012 06:20 PM, Benoit Cousson wrote:
>> On 10/22/2012 02:27 PM, Sourav wrote:
>>> Hi Benoit,
>>> On Monday 22 October 2012 05:37 PM, Benoit Cousson wrote:
>>>> On 10/22/2012 01:57 PM, Benoit Cousson wrote:
>>>>> Hi Sourav,
>>>>>
>>>>> On 10/22/2012 01:16 PM, Sourav wrote:
>>>>>> Hi Sebastien,
>>>>>> On Monday 22 October 2012 03:52 PM, Sebastien Guiriec wrote:
>>>>>>> Add base address and interrupt line inside Device Tree data for
>>>>>> Incomplete sentence!
>>>>>>> Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
>>>>>>> ---
>>>>>>> arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++--
>>>>>>> 1 file changed, 14 insertions(+), 2 deletions(-)
>>>>>>>
>>>>>>> diff --git a/arch/arm/boot/dts/omap5.dtsi
>>>>>>> b/arch/arm/boot/dts/omap5.dtsi
>>>>>>> index 6c22e1b..413df94 100644
>>>>>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>>>>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>>>>>> @@ -237,36 +237,48 @@
>>>>>>> uart1: serial@4806a000 {
>>>>>>> compatible = "ti,omap4-uart";
>>>>>>> + reg = <0x4806a000 0x100>;
>>>>>>> + interrupts = <0 72 0x4>;
>>>>>>> ti,hwmods = "uart1";
>>>>>>> clock-frequency = <48000000>;
>>>>>>> };
>>>>>>> uart2: serial@4806c000 {
>>>>>>> compatible = "ti,omap4-uart";
>>>>>>> + reg = <0x4806c000 0x100>;
>>>>>>> + interrupts = <0 73 0x4>;
>>>>>>> ti,hwmods = "uart2";
>>>>>>> clock-frequency = <48000000>;
>>>>>>> };
>>>>>>> uart3: serial@48020000 {
>>>>>>> compatible = "ti,omap4-uart";
>>>>>>> + reg = <0x48020000 0x100>;
>>>>>>> + interrupts = <0 74 0x4>;
>>>>>>> ti,hwmods = "uart3";
>>>>>>> clock-frequency = <48000000>;
>>>>>>> };
>>>>>>> uart4: serial@4806e000 {
>>>>>>> compatible = "ti,omap4-uart";
>>>>>>> + reg = <0x4806e000 0x100>;
>>>>>>> + interrupts = <0 70 0x4>;
>>>>>>> ti,hwmods = "uart4";
>>>>>>> clock-frequency = <48000000>;
>>>>>>> };
>>>>>>> uart5: serial@48066000 {
>>>>>>> - compatible = "ti,omap5-uart";
>>>>>>> + compatible = "ti,omap4-uart";
>>>>>>> + reg = <0x48066000 0x100>;
>>>>>>> + interrupts = <0 105 0x4>;
>>>>>> In Omap5 TRM, the interrupt number mentioned for uart5 is 138.
>>>>>> How is
>>>>>> 105 coming?
>>>>> It is from hwmod and thus from the HW spec. It looks like the TRM is
>>>>> wrong... or the HW spec :-)
>>>>>
>>>>>>> ti,hwmods = "uart5";
>>>>>>> clock-frequency = <48000000>;
>>>>>>> };
>>>>>>> uart6: serial@48068000 {
>>>>>>> - compatible = "ti,omap6-uart";
>>>>>>> + compatible = "ti,omap4-uart";
>>>>>>> + reg = <0x48068000 0x100>;
>>>>>>> + interrupts = <0 106 0x4>;
>>>>>> Same here, TRM shows this number to be 139 ?
>>>> In fact, even the TRM (ES1.0 NDA vM) is aligned with these data.
>>>> Where did you see 138 and 139?
>>> I looked at Page 6300 of the above TRM, Figure 24-60. Is this place not
>>> correct to look
>>> up for these data?
>> Nope. Well it should be accurate but since it is a diagram, it does not
>> necessarily reflect the latest integration data like IRQ line.
>>
>> You'd better use the table that list all the IRQ per CPU:
>>
>> 18.3.2 Interrupt Requests to INTC_MPU
> Ahh. True. The table does show the numbers to be 105 and 106.
> Thanks for the pointer.
>
> ~Sourav
>> Regards,
>> Benoit
>>
>
After fixing the minor comment on the commit log, you can add
Acked-by: Sourav Poddar <sourav.poddar@ti.com>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 4/4] ARM/dts: omap5: Update MMC with address space and interrupts
2012-10-22 10:22 [PATCH 0/4] ARM/dts: Update OMAP5 with address space and interrupts Sebastien Guiriec
` (2 preceding siblings ...)
2012-10-22 10:22 ` [PATCH 3/4] ARM/dts: omap5: Update UART " Sebastien Guiriec
@ 2012-10-22 10:22 ` Sebastien Guiriec
2012-10-22 14:11 ` [PATCH 0/4] ARM/dts: Update OMAP5 " Benoit Cousson
4 siblings, 0 replies; 16+ messages in thread
From: Sebastien Guiriec @ 2012-10-22 10:22 UTC (permalink / raw)
To: Sebastien Guiriec, Benoit Cousson, Tony Lindgren
Cc: linux-omap, linux-arm-kernel, Santosh Shilimkar, Peter Ujfalusi
Add base address and interrupt line inside Device Tree data for
OMAP5.
Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 413df94..b643cd3 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -285,6 +285,8 @@
mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
+ reg = <0x4809c000 0x400>;
+ interrupts = <0 83 0x4>;
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
@@ -292,24 +294,32 @@
mmc2: mmc@480b4000 {
compatible = "ti,omap4-hsmmc";
+ reg = <0x480b4000 0x400>;
+ interrupts = <0 86 0x4>;
ti,hwmods = "mmc2";
ti,needs-special-reset;
};
mmc3: mmc@480ad000 {
compatible = "ti,omap4-hsmmc";
+ reg = <0x480ad000 0x400>;
+ interrupts = <0 94 0x4>;
ti,hwmods = "mmc3";
ti,needs-special-reset;
};
mmc4: mmc@480d1000 {
compatible = "ti,omap4-hsmmc";
+ reg = <0x480d1000 0x400>;
+ interrupts = <0 96 0x4>;
ti,hwmods = "mmc4";
ti,needs-special-reset;
};
mmc5: mmc@480d5000 {
compatible = "ti,omap4-hsmmc";
+ reg = <0x480d5000 0x400>;
+ interrupts = <0 59 0x4>;
ti,hwmods = "mmc5";
ti,needs-special-reset;
};
--
1.7.10.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 0/4] ARM/dts: Update OMAP5 with address space and interrupts
2012-10-22 10:22 [PATCH 0/4] ARM/dts: Update OMAP5 with address space and interrupts Sebastien Guiriec
` (3 preceding siblings ...)
2012-10-22 10:22 ` [PATCH 4/4] ARM/dts: omap5: Update MMC " Sebastien Guiriec
@ 2012-10-22 14:11 ` Benoit Cousson
2012-10-22 15:21 ` Sebastien Guiriec
4 siblings, 1 reply; 16+ messages in thread
From: Benoit Cousson @ 2012-10-22 14:11 UTC (permalink / raw)
To: Sebastien Guiriec
Cc: Tony Lindgren, linux-omap, linux-arm-kernel, Santosh Shilimkar,
Peter Ujfalusi
Hi Seb,
Good work. Thanks for that series.
Just update it with all the acked-by you've got from the TI driver folks
+ the minor comment and I'll pull it in the for_3.8/dts branch.
That's a detail but you should update the subject with "ARM: dts: OMAP5:
XXX" prefix for consistency with the latest naming convention.
Please, Cc the DT list as well.
Regards,
Benoit
On 10/22/2012 12:22 PM, Sebastien Guiriec wrote:
> Since kernel 3.7 the DTS data are not overwriten by hwmod data we can add the address space
> and interrupt line description inside dtsi file for OMAP5. This serie is updating the
> current OMAP5 IP with missing entry.
>
> It has been tested on OMAP5 with 3.7-audio-display feature tree.
> - MMC is probing and functional
> - TWL6041 probing (GPIO/I2C)
> - booting (UART)
>
> Sebastien Guiriec (4):
> ARM/dts: omap5: Update GPIO with address space and interrupt
> ARM/dts: omap5: Update I2C with address space and interrupts
> ARM/dts: omap5: Update UART with address space and interrupts
> ARM/dts: omap5: Update MMC with address space and interrupts
>
> arch/arm/boot/dts/omap5.dtsi | 56 +++++++++++++++++++++++++++++++++++++++---
> 1 file changed, 52 insertions(+), 4 deletions(-)
>
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 0/4] ARM/dts: Update OMAP5 with address space and interrupts
2012-10-22 14:11 ` [PATCH 0/4] ARM/dts: Update OMAP5 " Benoit Cousson
@ 2012-10-22 15:21 ` Sebastien Guiriec
0 siblings, 0 replies; 16+ messages in thread
From: Sebastien Guiriec @ 2012-10-22 15:21 UTC (permalink / raw)
To: Benoit Cousson
Cc: Tony Lindgren, linux-omap, linux-arm-kernel, Santosh Shilimkar,
Peter Ujfalusi
Hi Benoit,
On 10/22/2012 04:11 PM, Benoit Cousson wrote:
> Hi Seb,
>
> Good work. Thanks for that series.
>
> Just update it with all the acked-by you've got from the TI driver folks
> + the minor comment and I'll pull it in the for_3.8/dts branch.
>
> That's a detail but you should update the subject with "ARM: dts: OMAP5:
> XXX" prefix for consistency with the latest naming convention.
Thanks for the information I will update the series. I was thinking that
it was the convention according to a past talk. I will update our full
audio/display feature tree with this convention.
>
> Please, Cc the DT list as well.
>
> Regards,
> Benoit
>
> On 10/22/2012 12:22 PM, Sebastien Guiriec wrote:
>> Since kernel 3.7 the DTS data are not overwriten by hwmod data we can add the address space
>> and interrupt line description inside dtsi file for OMAP5. This serie is updating the
>> current OMAP5 IP with missing entry.
>>
>> It has been tested on OMAP5 with 3.7-audio-display feature tree.
>> - MMC is probing and functional
>> - TWL6041 probing (GPIO/I2C)
>> - booting (UART)
>>
>> Sebastien Guiriec (4):
>> ARM/dts: omap5: Update GPIO with address space and interrupt
>> ARM/dts: omap5: Update I2C with address space and interrupts
>> ARM/dts: omap5: Update UART with address space and interrupts
>> ARM/dts: omap5: Update MMC with address space and interrupts
>>
>> arch/arm/boot/dts/omap5.dtsi | 56 +++++++++++++++++++++++++++++++++++++++---
>> 1 file changed, 52 insertions(+), 4 deletions(-)
>>
>
^ permalink raw reply [flat|nested] 16+ messages in thread