From: Joel Fernandes <joelf@ti.com>
To: Russell King - ARM Linux <linux@arm.linux.org.uk>
Cc: "André Hentschel" <nerv@dawncrow.de>,
"Jonathan Austin" <jonathan.austin@arm.com>,
"Nicolas Pitre" <nico@linaro.org>,
linux-kernel@vger.kernel.org,
"Santosh Shilimkar" <santosh.shilimkar@ti.com>,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC] ARM: kernel: irq: Simplify allocation of stack frame
Date: Mon, 7 Oct 2013 11:28:03 -0500 [thread overview]
Message-ID: <5252E113.3080301@ti.com> (raw)
In-Reply-To: <20131006224150.GA25647@n2100.arm.linux.org.uk>
On 10/06/2013 05:41 PM, Russell King - ARM Linux wrote:
> On Sun, Oct 06, 2013 at 05:30:47PM -0500, Joel Fernandes wrote:
>> On receiving IRQ exception in SVC mode, all the SVC mode registers are saved
>> onto the stack very early on.
>>
>> The stack frame allocation code for IRQ entry during SVC mode (svc_entry) is
>> hard to read as 4-less is allocated initially only to be allocated later
>> implicity using the mov r3, [sp, #-4]! instruction. We make code easier to read
>> by allocating the 4 bytes on the stack frame in the beginning itself and remove
>> all instances where 4 bytes is adjusted.
>
> You omit to say that this results in saving one additional register
> unnecessarily in the stmia. We could use a stmib there instead which
> would avoid that issue while keeping the rest of the change.
>
Hi Russel,
BTW I used ETM to check the number of cycles used to store the extra register
with and without this patch and with both cases it takes 7 cycles.
My platform uses Cortex-A8 (AM335x SoC).
Thanks,
-Joel
prev parent reply other threads:[~2013-10-07 16:28 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-06 22:30 [RFC] ARM: kernel: irq: Simplify allocation of stack frame Joel Fernandes
2013-10-06 22:41 ` Russell King - ARM Linux
2013-10-07 4:56 ` Joel Fernandes
2013-10-07 16:28 ` Joel Fernandes [this message]
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