[PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC

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* [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC
@ 2014-05-28 10:20 Keerthy
  2014-05-28 10:20 ` [PATCH 1/9] mfd: Add DT bindings for tps65917 PMIC Keerthy
                   ` (9 more replies)
  0 siblings, 10 replies; 26+ messages in thread
From: Keerthy @ 2014-05-28 10:20 UTC (permalink / raw)
  To: linux-omap; +Cc: lgirdwood, broonie, linux-kernel, sameo, lee.jones, Keerthy

The TPS65917 chip is a power management IC for Portable Navigation Systems
and Tablet Computing devices. It contains the following components:

 - Regulators.
 - GPADC.
 - Over Temperature warning and Shut down.

This patch series adds support for TPS65917 mfd device. At this time only
the regulator functionality is made available.

The closest drivers are PALMAS series drivers. Hence adapted palmas mfd
driver to support the tps65917 PMIC.

The register set for SMPSs and LDOs are changed and the ramp delay support
is also changed. Bit-field defenitions are changed.
Hence added driver data structures for mfd and regulator drivers
for palmas and added support for tps65917.

The patches are boot tested on DRA72-EVM.
The patches are boot tested on OMAP5-UEVM board.

Keerthy (9):
  mfd: Add DT bindings for tps65917 PMIC
  regulator: palmas: Add tps65917 compatible string
  mfd: palmas: Add tps65917 specific definitions and enums
  mfd: palmas: Add tps65917 support
  regulator: palmas: Shift the reg_info structure definition to the
    header file
  mfd: palmas: shift the palmas_sleep_requestor_info structure
    definition to the header file
  regulator: palmas: Add palmas_pmic_driver_data structure
  regulator: palmas: add driver data and modularize the probe
  regulator: palmas: Add tps65917 PMIC support

 Documentation/devicetree/bindings/mfd/palmas.txt   |    2 +
 .../devicetree/bindings/regulator/palmas-pmic.txt  |    1 +
 drivers/mfd/palmas.c                               |  228 +++--
 drivers/regulator/palmas-regulator.c               | 1006 +++++++++++++++-----
 include/linux/mfd/palmas.h                         |  837 ++++++++++++++++
 5 files changed, 1770 insertions(+), 304 deletions(-)

-- 
1.7.9.5

^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH 1/9] mfd: Add DT bindings for tps65917 PMIC
  2014-05-28 10:20 [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
@ 2014-05-28 10:20 ` Keerthy
  2014-05-28 10:20 ` [PATCH 2/9] regulator: palmas: Add tps65917 compatible string Keerthy
                   ` (8 subsequent siblings)
  9 siblings, 0 replies; 26+ messages in thread
From: Keerthy @ 2014-05-28 10:20 UTC (permalink / raw)
  To: linux-omap; +Cc: lgirdwood, broonie, linux-kernel, sameo, lee.jones, Keerthy

Add DT bindings for tps65917 PMIC.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 Documentation/devicetree/bindings/mfd/palmas.txt |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/palmas.txt b/Documentation/devicetree/bindings/mfd/palmas.txt
index e5f0f83..eda8989 100644
--- a/Documentation/devicetree/bindings/mfd/palmas.txt
+++ b/Documentation/devicetree/bindings/mfd/palmas.txt
@@ -6,6 +6,7 @@ twl6037 (palmas)
 tps65913 (palmas)
 tps65914 (palmas)
 tps659038
+tps65917
 
 Required properties:
 - compatible : Should be from the list
@@ -16,6 +17,7 @@ Required properties:
   ti,tps65914
   ti,tps80036
   ti,tps659038
+  ti,tps65917
 and also the generic series names
   ti,palmas
 - interrupt-controller : palmas has its own internal IRQs
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* [PATCH 2/9] regulator: palmas: Add tps65917 compatible string
  2014-05-28 10:20 [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
  2014-05-28 10:20 ` [PATCH 1/9] mfd: Add DT bindings for tps65917 PMIC Keerthy
@ 2014-05-28 10:20 ` Keerthy
  2014-05-28 10:20 ` [PATCH 3/9] mfd: palmas: Add tps65917 specific definitions and enums Keerthy
                   ` (7 subsequent siblings)
  9 siblings, 0 replies; 26+ messages in thread
From: Keerthy @ 2014-05-28 10:20 UTC (permalink / raw)
  To: linux-omap; +Cc: lgirdwood, broonie, linux-kernel, sameo, lee.jones, Keerthy

Add tps65917 compatible string.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 .../devicetree/bindings/regulator/palmas-pmic.txt  |    1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/regulator/palmas-pmic.txt b/Documentation/devicetree/bindings/regulator/palmas-pmic.txt
index 42e6b6b..725393c 100644
--- a/Documentation/devicetree/bindings/regulator/palmas-pmic.txt
+++ b/Documentation/devicetree/bindings/regulator/palmas-pmic.txt
@@ -7,6 +7,7 @@ Required properties:
   ti,twl6037-pmic
   ti,tps65913-pmic
   ti,tps65914-pmic
+  ti,tps65917-pmic
 and also the generic series names
   ti,palmas-pmic
 - interrupt-parent : The parent interrupt controller which is palmas.
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* [PATCH 3/9] mfd: palmas: Add tps65917 specific definitions and enums
  2014-05-28 10:20 [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
  2014-05-28 10:20 ` [PATCH 1/9] mfd: Add DT bindings for tps65917 PMIC Keerthy
  2014-05-28 10:20 ` [PATCH 2/9] regulator: palmas: Add tps65917 compatible string Keerthy
@ 2014-05-28 10:20 ` Keerthy
  2014-06-17 16:11   ` Lee Jones
  2014-05-28 10:20 ` [PATCH 4/9] mfd: palmas: Add tps65917 support Keerthy
                   ` (6 subsequent siblings)
  9 siblings, 1 reply; 26+ messages in thread
From: Keerthy @ 2014-05-28 10:20 UTC (permalink / raw)
  To: linux-omap; +Cc: lgirdwood, broonie, linux-kernel, sameo, lee.jones, Keerthy

Add tps65917 specific definitions and enums.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 include/linux/mfd/palmas.h |  793 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 793 insertions(+)

diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
index ccbb21f..52a24a9 100644
--- a/include/linux/mfd/palmas.h
+++ b/include/linux/mfd/palmas.h
@@ -30,6 +30,8 @@
 #define PALMAS_CHIP_ID			0xC035
 #define PALMAS_CHIP_CHARGER_ID		0xC036
 
+#define TPS65917_RESERVED		-1
+
 #define is_palmas(a)	(((a) == PALMAS_CHIP_OLD_ID) || \
 			((a) == PALMAS_CHIP_ID))
 #define is_palmas_charger(a) ((a) == PALMAS_CHIP_CHARGER_ID)
@@ -184,6 +186,27 @@ enum palmas_regulators {
 	PALMAS_NUM_REGS,
 };
 
+enum tps65917_regulators {
+	/* SMPS regulators */
+	TPS65917_REG_SMPS1,
+	TPS65917_REG_SMPS2,
+	TPS65917_REG_SMPS3,
+	TPS65917_REG_SMPS4,
+	TPS65917_REG_SMPS5,
+	/* LDO regulators */
+	TPS65917_REG_LDO1,
+	TPS65917_REG_LDO2,
+	TPS65917_REG_LDO3,
+	TPS65917_REG_LDO4,
+	TPS65917_REG_LDO5,
+	TPS65917_REG_REGEN1,
+	TPS65917_REG_REGEN2,
+	TPS65917_REG_REGEN3,
+
+	/* Total number of regulators */
+	TPS65917_NUM_REGS,
+};
+
 /* External controll signal name */
 enum {
 	PALMAS_EXT_CONTROL_ENABLE1      = 0x1,
@@ -228,6 +251,24 @@ enum palmas_external_requestor_id {
 	PALMAS_EXTERNAL_REQSTR_ID_MAX,
 };
 
+enum tps65917_external_requestor_id {
+	TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
+	TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
+	TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
+	TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
+	TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
+	TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
+	TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
+	TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
+	TPS65917_EXTERNAL_REQSTR_ID_LDO1,
+	TPS65917_EXTERNAL_REQSTR_ID_LDO2,
+	TPS65917_EXTERNAL_REQSTR_ID_LDO3,
+	TPS65917_EXTERNAL_REQSTR_ID_LDO4,
+	TPS65917_EXTERNAL_REQSTR_ID_LDO5,
+	/* Last entry */
+	TPS65917_EXTERNAL_REQSTR_ID_MAX,
+};
+
 struct palmas_pmic_platform_data {
 	/* An array of pointers to regulator init data indexed by regulator
 	 * ID
@@ -349,6 +390,48 @@ struct palmas_gpadc_result {
 
 #define PALMAS_MAX_CHANNELS 16
 
+/* Define the tps65917 IRQ numbers */
+enum tps65917_irqs {
+	/* INT1 registers */
+	TPS65917_RESERVED1,
+	TPS65917_PWRON_IRQ,
+	TPS65917_LONG_PRESS_KEY_IRQ,
+	TPS65917_RESERVED2,
+	TPS65917_PWRDOWN_IRQ,
+	TPS65917_HOTDIE_IRQ,
+	TPS65917_VSYS_MON_IRQ,
+	TPS65917_RESERVED3,
+	/* INT2 registers */
+	TPS65917_RESERVED4,
+	TPS65917_OTP_ERROR_IRQ,
+	TPS65917_WDT_IRQ,
+	TPS65917_RESERVED5,
+	TPS65917_RESET_IN_IRQ,
+	TPS65917_FSD_IRQ,
+	TPS65917_SHORT_IRQ,
+	TPS65917_RESERVED6,
+	/* INT3 registers */
+	TPS65917_GPADC_AUTO_0_IRQ,
+	TPS65917_GPADC_AUTO_1_IRQ,
+	TPS65917_GPADC_EOC_SW_IRQ,
+	TPS65917_RESREVED6,
+	TPS65917_RESERVED7,
+	TPS65917_RESERVED8,
+	TPS65917_RESERVED9,
+	TPS65917_VBUS_IRQ,
+	/* INT4 registers */
+	TPS65917_GPIO_0_IRQ,
+	TPS65917_GPIO_1_IRQ,
+	TPS65917_GPIO_2_IRQ,
+	TPS65917_GPIO_3_IRQ,
+	TPS65917_GPIO_4_IRQ,
+	TPS65917_GPIO_5_IRQ,
+	TPS65917_GPIO_6_IRQ,
+	TPS65917_RESERVED10,
+	/* Total Number IRQs */
+	TPS65917_NUM_IRQ,
+};
+
 /* Define the palmas IRQ numbers */
 enum palmas_irqs {
 	/* INT1 registers */
@@ -400,6 +483,7 @@ struct palmas_pmic {
 
 	int smps123;
 	int smps457;
+	int smps12;
 
 	int range[PALMAS_REG_SMPS10_OUT1];
 	unsigned int ramp_delay[PALMAS_REG_SMPS10_OUT1];
@@ -2871,6 +2955,715 @@ enum usb_irq_events {
 #define PALMAS_GPADC_TRIM15					0x0E
 #define PALMAS_GPADC_TRIM16					0x0F
 
+/* TPS65917 Interrupt registers */
+
+/* Registers for function INTERRUPT */
+#define TPS65917_INT1_STATUS					0x00
+#define TPS65917_INT1_MASK					0x01
+#define TPS65917_INT1_LINE_STATE				0x02
+#define TPS65917_INT2_STATUS					0x05
+#define TPS65917_INT2_MASK					0x06
+#define TPS65917_INT2_LINE_STATE				0x07
+#define TPS65917_INT3_STATUS					0x0A
+#define TPS65917_INT3_MASK					0x0B
+#define TPS65917_INT3_LINE_STATE				0x0C
+#define TPS65917_INT4_STATUS					0x0F
+#define TPS65917_INT4_MASK					0x10
+#define TPS65917_INT4_LINE_STATE				0x11
+#define TPS65917_INT4_EDGE_DETECT1				0x12
+#define TPS65917_INT4_EDGE_DETECT2				0x13
+#define TPS65917_INT_CTRL					0x14
+
+/* Bit definitions for INT1_STATUS */
+#define TPS65917_INT1_STATUS_VSYS_MON				0x40
+#define TPS65917_INT1_STATUS_VSYS_MON_SHIFT			0x06
+#define TPS65917_INT1_STATUS_HOTDIE				0x20
+#define TPS65917_INT1_STATUS_HOTDIE_SHIFT			0x05
+#define TPS65917_INT1_STATUS_PWRDOWN				0x10
+#define TPS65917_INT1_STATUS_PWRDOWN_SHIFT			0x04
+#define TPS65917_INT1_STATUS_LONG_PRESS_KEY			0x04
+#define TPS65917_INT1_STATUS_LONG_PRESS_KEY_SHIFT		0x02
+#define TPS65917_INT1_STATUS_PWRON				0x02
+#define TPS65917_INT1_STATUS_PWRON_SHIFT			0x01
+
+/* Bit definitions for INT1_MASK */
+#define TPS65917_INT1_MASK_VSYS_MON				0x40
+#define TPS65917_INT1_MASK_VSYS_MON_SHIFT			0x06
+#define TPS65917_INT1_MASK_HOTDIE				0x20
+#define TPS65917_INT1_MASK_HOTDIE_SHIFT			0x05
+#define TPS65917_INT1_MASK_PWRDOWN				0x10
+#define TPS65917_INT1_MASK_PWRDOWN_SHIFT			0x04
+#define TPS65917_INT1_MASK_LONG_PRESS_KEY			0x04
+#define TPS65917_INT1_MASK_LONG_PRESS_KEY_SHIFT		0x02
+#define TPS65917_INT1_MASK_PWRON				0x02
+#define TPS65917_INT1_MASK_PWRON_SHIFT				0x01
+
+/* Bit definitions for INT1_LINE_STATE */
+#define TPS65917_INT1_LINE_STATE_VSYS_MON			0x40
+#define TPS65917_INT1_LINE_STATE_VSYS_MON_SHIFT		0x06
+#define TPS65917_INT1_LINE_STATE_HOTDIE			0x20
+#define TPS65917_INT1_LINE_STATE_HOTDIE_SHIFT			0x05
+#define TPS65917_INT1_LINE_STATE_PWRDOWN			0x10
+#define TPS65917_INT1_LINE_STATE_PWRDOWN_SHIFT			0x04
+#define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY		0x04
+#define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT		0x02
+#define TPS65917_INT1_LINE_STATE_PWRON				0x02
+#define TPS65917_INT1_LINE_STATE_PWRON_SHIFT			0x01
+
+/* Bit definitions for INT2_STATUS */
+#define TPS65917_INT2_STATUS_SHORT				0x40
+#define TPS65917_INT2_STATUS_SHORT_SHIFT			0x06
+#define TPS65917_INT2_STATUS_FSD				0x20
+#define TPS65917_INT2_STATUS_FSD_SHIFT				0x05
+#define TPS65917_INT2_STATUS_RESET_IN				0x10
+#define TPS65917_INT2_STATUS_RESET_IN_SHIFT			0x04
+#define TPS65917_INT2_STATUS_WDT				0x04
+#define TPS65917_INT2_STATUS_WDT_SHIFT				0x02
+#define TPS65917_INT2_STATUS_OTP_ERROR				0x02
+#define TPS65917_INT2_STATUS_OTP_ERROR_SHIFT			0x01
+
+/* Bit definitions for INT2_MASK */
+#define TPS65917_INT2_MASK_SHORT				0x40
+#define TPS65917_INT2_MASK_SHORT_SHIFT				0x06
+#define TPS65917_INT2_MASK_FSD					0x20
+#define TPS65917_INT2_MASK_FSD_SHIFT				0x05
+#define TPS65917_INT2_MASK_RESET_IN				0x10
+#define TPS65917_INT2_MASK_RESET_IN_SHIFT			0x04
+#define TPS65917_INT2_MASK_WDT					0x04
+#define TPS65917_INT2_MASK_WDT_SHIFT				0x02
+#define TPS65917_INT2_MASK_OTP_ERROR_TIMER			0x02
+#define TPS65917_INT2_MASK_OTP_ERROR_SHIFT			0x01
+
+/* Bit definitions for INT2_LINE_STATE */
+#define TPS65917_INT2_LINE_STATE_SHORT				0x40
+#define TPS65917_INT2_LINE_STATE_SHORT_SHIFT			0x06
+#define TPS65917_INT2_LINE_STATE_FSD				0x20
+#define TPS65917_INT2_LINE_STATE_FSD_SHIFT			0x05
+#define TPS65917_INT2_LINE_STATE_RESET_IN			0x10
+#define TPS65917_INT2_LINE_STATE_RESET_IN_SHIFT		0x04
+#define TPS65917_INT2_LINE_STATE_WDT				0x04
+#define TPS65917_INT2_LINE_STATE_WDT_SHIFT			0x02
+#define TPS65917_INT2_LINE_STATE_OTP_ERROR			0x02
+#define TPS65917_INT2_LINE_STATE_OTP_ERROR_SHIFT		0x01
+
+/* Bit definitions for INT3_STATUS */
+#define TPS65917_INT3_STATUS_VBUS				0x80
+#define TPS65917_INT3_STATUS_VBUS_SHIFT			0x07
+#define TPS65917_INT3_STATUS_GPADC_EOC_SW			0x04
+#define TPS65917_INT3_STATUS_GPADC_EOC_SW_SHIFT		0x02
+#define TPS65917_INT3_STATUS_GPADC_AUTO_1			0x02
+#define TPS65917_INT3_STATUS_GPADC_AUTO_1_SHIFT		0x01
+#define TPS65917_INT3_STATUS_GPADC_AUTO_0			0x01
+#define TPS65917_INT3_STATUS_GPADC_AUTO_0_SHIFT		0x00
+
+/* Bit definitions for INT3_MASK */
+#define TPS65917_INT3_MASK_VBUS				0x80
+#define TPS65917_INT3_MASK_VBUS_SHIFT				0x07
+#define TPS65917_INT3_MASK_GPADC_EOC_SW			0x04
+#define TPS65917_INT3_MASK_GPADC_EOC_SW_SHIFT			0x02
+#define TPS65917_INT3_MASK_GPADC_AUTO_1			0x02
+#define TPS65917_INT3_MASK_GPADC_AUTO_1_SHIFT			0x01
+#define TPS65917_INT3_MASK_GPADC_AUTO_0			0x01
+#define TPS65917_INT3_MASK_GPADC_AUTO_0_SHIFT			0x00
+
+/* Bit definitions for INT3_LINE_STATE */
+#define TPS65917_INT3_LINE_STATE_VBUS				0x80
+#define TPS65917_INT3_LINE_STATE_VBUS_SHIFT			0x07
+#define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW			0x04
+#define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT		0x02
+#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1			0x02
+#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT		0x01
+#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0			0x01
+#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT		0x00
+
+/* Bit definitions for INT4_STATUS */
+#define TPS65917_INT4_STATUS_GPIO_6				0x40
+#define TPS65917_INT4_STATUS_GPIO_6_SHIFT			0x06
+#define TPS65917_INT4_STATUS_GPIO_5				0x20
+#define TPS65917_INT4_STATUS_GPIO_5_SHIFT			0x05
+#define TPS65917_INT4_STATUS_GPIO_4				0x10
+#define TPS65917_INT4_STATUS_GPIO_4_SHIFT			0x04
+#define TPS65917_INT4_STATUS_GPIO_3				0x08
+#define TPS65917_INT4_STATUS_GPIO_3_SHIFT			0x03
+#define TPS65917_INT4_STATUS_GPIO_2				0x04
+#define TPS65917_INT4_STATUS_GPIO_2_SHIFT			0x02
+#define TPS65917_INT4_STATUS_GPIO_1				0x02
+#define TPS65917_INT4_STATUS_GPIO_1_SHIFT			0x01
+#define TPS65917_INT4_STATUS_GPIO_0				0x01
+#define TPS65917_INT4_STATUS_GPIO_0_SHIFT			0x00
+
+/* Bit definitions for INT4_MASK */
+#define TPS65917_INT4_MASK_GPIO_6				0x40
+#define TPS65917_INT4_MASK_GPIO_6_SHIFT			0x06
+#define TPS65917_INT4_MASK_GPIO_5				0x20
+#define TPS65917_INT4_MASK_GPIO_5_SHIFT			0x05
+#define TPS65917_INT4_MASK_GPIO_4				0x10
+#define TPS65917_INT4_MASK_GPIO_4_SHIFT			0x04
+#define TPS65917_INT4_MASK_GPIO_3				0x08
+#define TPS65917_INT4_MASK_GPIO_3_SHIFT			0x03
+#define TPS65917_INT4_MASK_GPIO_2				0x04
+#define TPS65917_INT4_MASK_GPIO_2_SHIFT			0x02
+#define TPS65917_INT4_MASK_GPIO_1				0x02
+#define TPS65917_INT4_MASK_GPIO_1_SHIFT			0x01
+#define TPS65917_INT4_MASK_GPIO_0				0x01
+#define TPS65917_INT4_MASK_GPIO_0_SHIFT			0x00
+
+/* Bit definitions for INT4_LINE_STATE */
+#define TPS65917_INT4_LINE_STATE_GPIO_6			0x40
+#define TPS65917_INT4_LINE_STATE_GPIO_6_SHIFT			0x06
+#define TPS65917_INT4_LINE_STATE_GPIO_5			0x20
+#define TPS65917_INT4_LINE_STATE_GPIO_5_SHIFT			0x05
+#define TPS65917_INT4_LINE_STATE_GPIO_4			0x10
+#define TPS65917_INT4_LINE_STATE_GPIO_4_SHIFT			0x04
+#define TPS65917_INT4_LINE_STATE_GPIO_3			0x08
+#define TPS65917_INT4_LINE_STATE_GPIO_3_SHIFT			0x03
+#define TPS65917_INT4_LINE_STATE_GPIO_2			0x04
+#define TPS65917_INT4_LINE_STATE_GPIO_2_SHIFT			0x02
+#define TPS65917_INT4_LINE_STATE_GPIO_1			0x02
+#define TPS65917_INT4_LINE_STATE_GPIO_1_SHIFT			0x01
+#define TPS65917_INT4_LINE_STATE_GPIO_0			0x01
+#define TPS65917_INT4_LINE_STATE_GPIO_0_SHIFT			0x00
+
+/* Bit definitions for INT4_EDGE_DETECT1 */
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING		0x80
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT		0x07
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING		0x40
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT	0x06
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING		0x20
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT		0x05
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING		0x10
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT	0x04
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING		0x08
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT		0x03
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING		0x04
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT	0x02
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING		0x02
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT		0x01
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING		0x01
+#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT	0x00
+
+/* Bit definitions for INT4_EDGE_DETECT2 */
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING		0x20
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT		0x05
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING		0x10
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT	0x04
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING		0x08
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT		0x03
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING		0x04
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT	0x02
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING		0x02
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT		0x01
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING		0x01
+#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT	0x00
+
+/* Bit definitions for INT_CTRL */
+#define TPS65917_INT_CTRL_INT_PENDING				0x04
+#define TPS65917_INT_CTRL_INT_PENDING_SHIFT			0x02
+#define TPS65917_INT_CTRL_INT_CLEAR				0x01
+#define TPS65917_INT_CTRL_INT_CLEAR_SHIFT			0x00
+
+/* TPS65917 SMPS Registers */
+
+/* Registers for function SMPS */
+#define TPS65917_SMPS1_CTRL					0x00
+#define TPS65917_SMPS1_FORCE					0x02
+#define TPS65917_SMPS1_VOLTAGE					0x03
+#define TPS65917_SMPS2_CTRL					0x04
+#define TPS65917_SMPS2_FORCE					0x06
+#define TPS65917_SMPS2_VOLTAGE					0x07
+#define TPS65917_SMPS3_CTRL					0x0C
+#define TPS65917_SMPS3_FORCE					0x0E
+#define TPS65917_SMPS3_VOLTAGE					0x0F
+#define TPS65917_SMPS4_CTRL					0x10
+#define TPS65917_SMPS4_VOLTAGE					0x13
+#define TPS65917_SMPS5_CTRL					0x18
+#define TPS65917_SMPS5_VOLTAGE					0x1B
+#define TPS65917_SMPS_CTRL					0x24
+#define TPS65917_SMPS_PD_CTRL					0x25
+#define TPS65917_SMPS_THERMAL_EN				0x27
+#define TPS65917_SMPS_THERMAL_STATUS				0x28
+#define TPS65917_SMPS_SHORT_STATUS				0x29
+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN		0x2A
+#define TPS65917_SMPS_POWERGOOD_MASK1				0x2B
+#define TPS65917_SMPS_POWERGOOD_MASK2				0x2C
+
+/* Bit definitions for SMPS1_CTRL */
+#define TPS65917_SMPS1_CTRL_WR_S				0x80
+#define TPS65917_SMPS1_CTRL_WR_S_SHIFT				0x07
+#define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN			0x40
+#define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
+#define TPS65917_SMPS1_CTRL_STATUS_MASK			0x30
+#define TPS65917_SMPS1_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_SMPS1_CTRL_MODE_SLEEP_MASK			0x0C
+#define TPS65917_SMPS1_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_SMPS1_CTRL_MODE_ACTIVE_MASK			0x03
+#define TPS65917_SMPS1_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for SMPS1_FORCE */
+#define TPS65917_SMPS1_FORCE_CMD				0x80
+#define TPS65917_SMPS1_FORCE_CMD_SHIFT				0x07
+#define TPS65917_SMPS1_FORCE_VSEL_MASK				0x7F
+#define TPS65917_SMPS1_FORCE_VSEL_SHIFT			0x00
+
+/* Bit definitions for SMPS1_VOLTAGE */
+#define TPS65917_SMPS1_VOLTAGE_RANGE				0x80
+#define TPS65917_SMPS1_VOLTAGE_RANGE_SHIFT			0x07
+#define TPS65917_SMPS1_VOLTAGE_VSEL_MASK			0x7F
+#define TPS65917_SMPS1_VOLTAGE_VSEL_SHIFT			0x00
+
+/* Bit definitions for SMPS2_CTRL */
+#define TPS65917_SMPS2_CTRL_WR_S				0x80
+#define TPS65917_SMPS2_CTRL_WR_S_SHIFT				0x07
+#define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN			0x40
+#define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
+#define TPS65917_SMPS2_CTRL_STATUS_MASK			0x30
+#define TPS65917_SMPS2_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_SMPS2_CTRL_MODE_SLEEP_MASK			0x0C
+#define TPS65917_SMPS2_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_SMPS2_CTRL_MODE_ACTIVE_MASK			0x03
+#define TPS65917_SMPS2_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for SMPS2_FORCE */
+#define TPS65917_SMPS2_FORCE_CMD				0x80
+#define TPS65917_SMPS2_FORCE_CMD_SHIFT				0x07
+#define TPS65917_SMPS2_FORCE_VSEL_MASK				0x7F
+#define TPS65917_SMPS2_FORCE_VSEL_SHIFT			0x00
+
+/* Bit definitions for SMPS2_VOLTAGE */
+#define TPS65917_SMPS2_VOLTAGE_RANGE				0x80
+#define TPS65917_SMPS2_VOLTAGE_RANGE_SHIFT			0x07
+#define TPS65917_SMPS2_VOLTAGE_VSEL_MASK			0x7F
+#define TPS65917_SMPS2_VOLTAGE_VSEL_SHIFT			0x00
+
+/* Bit definitions for SMPS3_CTRL */
+#define TPS65917_SMPS3_CTRL_WR_S				0x80
+#define TPS65917_SMPS3_CTRL_WR_S_SHIFT				0x07
+#define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN			0x40
+#define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
+#define TPS65917_SMPS3_CTRL_STATUS_MASK			0x30
+#define TPS65917_SMPS3_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_SMPS3_CTRL_MODE_SLEEP_MASK			0x0C
+#define TPS65917_SMPS3_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_SMPS3_CTRL_MODE_ACTIVE_MASK			0x03
+#define TPS65917_SMPS3_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for SMPS3_FORCE */
+#define TPS65917_SMPS3_FORCE_CMD				0x80
+#define TPS65917_SMPS3_FORCE_CMD_SHIFT				0x07
+#define TPS65917_SMPS3_FORCE_VSEL_MASK				0x7F
+#define TPS65917_SMPS3_FORCE_VSEL_SHIFT			0x00
+
+/* Bit definitions for SMPS3_VOLTAGE */
+#define TPS65917_SMPS3_VOLTAGE_RANGE				0x80
+#define TPS65917_SMPS3_VOLTAGE_RANGE_SHIFT			0x07
+#define TPS65917_SMPS3_VOLTAGE_VSEL_MASK			0x7F
+#define TPS65917_SMPS3_VOLTAGE_VSEL_SHIFT			0x00
+
+/* Bit definitions for SMPS4_CTRL */
+#define TPS65917_SMPS4_CTRL_WR_S				0x80
+#define TPS65917_SMPS4_CTRL_WR_S_SHIFT				0x07
+#define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN			0x40
+#define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
+#define TPS65917_SMPS4_CTRL_STATUS_MASK			0x30
+#define TPS65917_SMPS4_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_SMPS4_CTRL_MODE_SLEEP_MASK			0x0C
+#define TPS65917_SMPS4_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_SMPS4_CTRL_MODE_ACTIVE_MASK			0x03
+#define TPS65917_SMPS4_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for SMPS4_VOLTAGE */
+#define TPS65917_SMPS4_VOLTAGE_RANGE				0x80
+#define TPS65917_SMPS4_VOLTAGE_RANGE_SHIFT			0x07
+#define TPS65917_SMPS4_VOLTAGE_VSEL_MASK			0x7F
+#define TPS65917_SMPS4_VOLTAGE_VSEL_SHIFT			0x00
+
+/* Bit definitions for SMPS5_CTRL */
+#define TPS65917_SMPS5_CTRL_WR_S				0x80
+#define TPS65917_SMPS5_CTRL_WR_S_SHIFT				0x07
+#define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN			0x40
+#define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
+#define TPS65917_SMPS5_CTRL_STATUS_MASK			0x30
+#define TPS65917_SMPS5_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_SMPS5_CTRL_MODE_SLEEP_MASK			0x0C
+#define TPS65917_SMPS5_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_SMPS5_CTRL_MODE_ACTIVE_MASK			0x03
+#define TPS65917_SMPS5_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for SMPS5_VOLTAGE */
+#define TPS65917_SMPS5_VOLTAGE_RANGE				0x80
+#define TPS65917_SMPS5_VOLTAGE_RANGE_SHIFT			0x07
+#define TPS65917_SMPS5_VOLTAGE_VSEL_MASK			0x7F
+#define TPS65917_SMPS5_VOLTAGE_VSEL_SHIFT			0x00
+
+/* Bit definitions for SMPS_CTRL */
+#define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN			0x10
+#define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN_SHIFT		0x04
+#define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL			0x03
+#define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL_SHIFT		0x00
+
+/* Bit definitions for SMPS_PD_CTRL */
+#define TPS65917_SMPS_PD_CTRL_SMPS5				0x40
+#define TPS65917_SMPS_PD_CTRL_SMPS5_SHIFT			0x06
+#define TPS65917_SMPS_PD_CTRL_SMPS4				0x10
+#define TPS65917_SMPS_PD_CTRL_SMPS4_SHIFT			0x04
+#define TPS65917_SMPS_PD_CTRL_SMPS3				0x08
+#define TPS65917_SMPS_PD_CTRL_SMPS3_SHIFT			0x03
+#define TPS65917_SMPS_PD_CTRL_SMPS2				0x02
+#define TPS65917_SMPS_PD_CTRL_SMPS2_SHIFT			0x01
+#define TPS65917_SMPS_PD_CTRL_SMPS1				0x01
+#define TPS65917_SMPS_PD_CTRL_SMPS1_SHIFT			0x00
+
+/* Bit definitions for SMPS_THERMAL_EN */
+#define TPS65917_SMPS_THERMAL_EN_SMPS5				0x40
+#define TPS65917_SMPS_THERMAL_EN_SMPS5_SHIFT			0x06
+#define TPS65917_SMPS_THERMAL_EN_SMPS3				0x08
+#define TPS65917_SMPS_THERMAL_EN_SMPS3_SHIFT			0x03
+#define TPS65917_SMPS_THERMAL_EN_SMPS12			0x01
+#define TPS65917_SMPS_THERMAL_EN_SMPS12_SHIFT			0x00
+
+/* Bit definitions for SMPS_THERMAL_STATUS */
+#define TPS65917_SMPS_THERMAL_STATUS_SMPS5			0x40
+#define TPS65917_SMPS_THERMAL_STATUS_SMPS5_SHIFT		0x06
+#define TPS65917_SMPS_THERMAL_STATUS_SMPS3			0x08
+#define TPS65917_SMPS_THERMAL_STATUS_SMPS3_SHIFT		0x03
+#define TPS65917_SMPS_THERMAL_STATUS_SMPS12			0x01
+#define TPS65917_SMPS_THERMAL_STATUS_SMPS12_SHIFT		0x00
+
+/* Bit definitions for SMPS_SHORT_STATUS */
+#define TPS65917_SMPS_SHORT_STATUS_SMPS5			0x40
+#define TPS65917_SMPS_SHORT_STATUS_SMPS5_SHIFT			0x06
+#define TPS65917_SMPS_SHORT_STATUS_SMPS4			0x10
+#define TPS65917_SMPS_SHORT_STATUS_SMPS4_SHIFT			0x04
+#define TPS65917_SMPS_SHORT_STATUS_SMPS3			0x08
+#define TPS65917_SMPS_SHORT_STATUS_SMPS3_SHIFT			0x03
+#define TPS65917_SMPS_SHORT_STATUS_SMPS2			0x02
+#define TPS65917_SMPS_SHORT_STATUS_SMPS2_SHIFT			0x01
+#define TPS65917_SMPS_SHORT_STATUS_SMPS1			0x01
+#define TPS65917_SMPS_SHORT_STATUS_SMPS1_SHIFT			0x00
+
+/* Bit definitions for SMPS_NEGATIVE_CURRENT_LIMIT_EN */
+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5		0x40
+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5_SHIFT	0x06
+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4		0x10
+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4_SHIFT	0x04
+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3		0x08
+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT	0x03
+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2		0x02
+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2_SHIFT	0x01
+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1		0x01
+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1_SHIFT	0x00
+
+/* Bit definitions for SMPS_POWERGOOD_MASK1 */
+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5			0x40
+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5_SHIFT		0x06
+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4			0x10
+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4_SHIFT		0x04
+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3			0x08
+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT		0x03
+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2			0x02
+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2_SHIFT		0x01
+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1			0x01
+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1_SHIFT		0x00
+
+/* Bit definitions for SMPS_POWERGOOD_MASK2 */
+#define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT		0x80
+#define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT	0x07
+#define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM_SHIFT			0x10
+#define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM			0x04
+
+/* Bit definitions for SMPS_PLL_CTRL */
+
+#define TPS65917_SMPS_PLL_CTRL_PLL_EN_PLL_BYPASS_SHIFT		0x08
+#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_EN_BYPASS		0x03
+#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK_SHIFT	0x04
+#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK		0x02
+
+/* Registers for function LDO */
+#define TPS65917_LDO1_CTRL					0x00
+#define TPS65917_LDO1_VOLTAGE					0x01
+#define TPS65917_LDO2_CTRL					0x02
+#define TPS65917_LDO2_VOLTAGE					0x03
+#define TPS65917_LDO3_CTRL					0x04
+#define TPS65917_LDO3_VOLTAGE					0x05
+#define TPS65917_LDO4_CTRL					0x0E
+#define TPS65917_LDO4_VOLTAGE					0x0F
+#define TPS65917_LDO5_CTRL					0x12
+#define TPS65917_LDO5_VOLTAGE					0x13
+#define TPS65917_LDO_PD_CTRL1					0x1B
+#define TPS65917_LDO_PD_CTRL2					0x1C
+#define TPS65917_LDO_SHORT_STATUS1				0x1D
+#define TPS65917_LDO_SHORT_STATUS2				0x1E
+#define TPS65917_LDO_PD_CTRL3					0x2D
+#define TPS65917_LDO_SHORT_STATUS3				0x2E
+
+/* Bit definitions for LDO1_CTRL */
+#define TPS65917_LDO1_CTRL_WR_S				0x80
+#define TPS65917_LDO1_CTRL_WR_S_SHIFT				0x07
+#define TPS65917_LDO1_CTRL_BYPASS_EN				0x40
+#define TPS65917_LDO1_CTRL_BYPASS_EN_SHIFT			0x06
+#define TPS65917_LDO1_CTRL_STATUS				0x10
+#define TPS65917_LDO1_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_LDO1_CTRL_MODE_SLEEP				0x04
+#define TPS65917_LDO1_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_LDO1_CTRL_MODE_ACTIVE				0x01
+#define TPS65917_LDO1_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for LDO1_VOLTAGE */
+#define TPS65917_LDO1_VOLTAGE_VSEL_MASK			0x2F
+#define TPS65917_LDO1_VOLTAGE_VSEL_SHIFT			0x00
+
+/* Bit definitions for LDO2_CTRL */
+#define TPS65917_LDO2_CTRL_WR_S				0x80
+#define TPS65917_LDO2_CTRL_WR_S_SHIFT				0x07
+#define TPS65917_LDO2_CTRL_BYPASS_EN				0x40
+#define TPS65917_LDO2_CTRL_BYPASS_EN_SHIFT			0x06
+#define TPS65917_LDO2_CTRL_STATUS				0x10
+#define TPS65917_LDO2_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_LDO2_CTRL_MODE_SLEEP				0x04
+#define TPS65917_LDO2_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_LDO2_CTRL_MODE_ACTIVE				0x01
+#define TPS65917_LDO2_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for LDO2_VOLTAGE */
+#define TPS65917_LDO2_VOLTAGE_VSEL_MASK			0x2F
+#define TPS65917_LDO2_VOLTAGE_VSEL_SHIFT			0x00
+
+/* Bit definitions for LDO3_CTRL */
+#define TPS65917_LDO3_CTRL_WR_S				0x80
+#define TPS65917_LDO3_CTRL_WR_S_SHIFT				0x07
+#define TPS65917_LDO3_CTRL_STATUS				0x10
+#define TPS65917_LDO3_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_LDO3_CTRL_MODE_SLEEP				0x04
+#define TPS65917_LDO3_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_LDO3_CTRL_MODE_ACTIVE				0x01
+#define TPS65917_LDO3_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for LDO3_VOLTAGE */
+#define TPS65917_LDO3_VOLTAGE_VSEL_MASK			0x2F
+#define TPS65917_LDO3_VOLTAGE_VSEL_SHIFT			0x00
+
+/* Bit definitions for LDO4_CTRL */
+#define TPS65917_LDO4_CTRL_WR_S				0x80
+#define TPS65917_LDO4_CTRL_WR_S_SHIFT				0x07
+#define TPS65917_LDO4_CTRL_STATUS				0x10
+#define TPS65917_LDO4_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_LDO4_CTRL_MODE_SLEEP				0x04
+#define TPS65917_LDO4_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_LDO4_CTRL_MODE_ACTIVE				0x01
+#define TPS65917_LDO4_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for LDO4_VOLTAGE */
+#define TPS65917_LDO4_VOLTAGE_VSEL_MASK			0x2F
+#define TPS65917_LDO4_VOLTAGE_VSEL_SHIFT			0x00
+
+/* Bit definitions for LDO5_CTRL */
+#define TPS65917_LDO5_CTRL_WR_S				0x80
+#define TPS65917_LDO5_CTRL_WR_S_SHIFT				0x07
+#define TPS65917_LDO5_CTRL_STATUS				0x10
+#define TPS65917_LDO5_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_LDO5_CTRL_MODE_SLEEP				0x04
+#define TPS65917_LDO5_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_LDO5_CTRL_MODE_ACTIVE				0x01
+#define TPS65917_LDO5_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for LDO5_VOLTAGE */
+#define TPS65917_LDO5_VOLTAGE_VSEL_MASK			0x2F
+#define TPS65917_LDO5_VOLTAGE_VSEL_SHIFT			0x00
+
+/* Bit definitions for LDO_PD_CTRL1 */
+#define TPS65917_LDO_PD_CTRL1_LDO4				0x80
+#define TPS65917_LDO_PD_CTRL1_LDO4_SHIFT			0x07
+#define TPS65917_LDO_PD_CTRL1_LDO2				0x02
+#define TPS65917_LDO_PD_CTRL1_LDO2_SHIFT			0x01
+#define TPS65917_LDO_PD_CTRL1_LDO1				0x01
+#define TPS65917_LDO_PD_CTRL1_LDO1_SHIFT			0x00
+
+/* Bit definitions for LDO_PD_CTRL2 */
+#define TPS65917_LDO_PD_CTRL2_LDO3				0x04
+#define TPS65917_LDO_PD_CTRL2_LDO3_SHIFT			0x02
+#define TPS65917_LDO_PD_CTRL2_LDO5				0x02
+#define TPS65917_LDO_PD_CTRL2_LDO5_SHIFT			0x01
+
+/* Bit definitions for LDO_PD_CTRL3 */
+#define TPS65917_LDO_PD_CTRL2_LDOVANA				0x80
+#define TPS65917_LDO_PD_CTRL2_LDOVANA_SHIFT			0x07
+
+/* Bit definitions for LDO_SHORT_STATUS1 */
+#define TPS65917_LDO_SHORT_STATUS1_LDO4			0x80
+#define TPS65917_LDO_SHORT_STATUS1_LDO4_SHIFT			0x07
+#define TPS65917_LDO_SHORT_STATUS1_LDO2			0x02
+#define TPS65917_LDO_SHORT_STATUS1_LDO2_SHIFT			0x01
+#define TPS65917_LDO_SHORT_STATUS1_LDO1			0x01
+#define TPS65917_LDO_SHORT_STATUS1_LDO1_SHIFT			0x00
+
+/* Bit definitions for LDO_SHORT_STATUS2 */
+#define TPS65917_LDO_SHORT_STATUS2_LDO3			0x04
+#define TPS65917_LDO_SHORT_STATUS2_LDO3_SHIFT			0x02
+#define TPS65917_LDO_SHORT_STATUS2_LDO5			0x02
+#define TPS65917_LDO_SHORT_STATUS2_LDO5_SHIFT			0x01
+
+/* Bit definitions for LDO_SHORT_STATUS2 */
+#define TPS65917_LDO_SHORT_STATUS2_LDOVANA			0x80
+#define TPS65917_LDO_SHORT_STATUS2_LDOVANA_SHIFT		0x07
+
+/* Bit definitions for REGEN1_CTRL */
+#define TPS65917_REGEN1_CTRL_STATUS				0x10
+#define TPS65917_REGEN1_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_REGEN1_CTRL_MODE_SLEEP			0x04
+#define TPS65917_REGEN1_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_REGEN1_CTRL_MODE_ACTIVE			0x01
+#define TPS65917_REGEN1_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for PLLEN_CTRL */
+#define TPS65917_PLLEN_CTRL_STATUS				0x10
+#define TPS65917_PLLEN_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_PLLEN_CTRL_MODE_SLEEP				0x04
+#define TPS65917_PLLEN_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_PLLEN_CTRL_MODE_ACTIVE			0x01
+#define TPS65917_PLLEN_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for REGEN2_CTRL */
+#define TPS65917_REGEN2_CTRL_STATUS				0x10
+#define TPS65917_REGEN2_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_REGEN2_CTRL_MODE_SLEEP			0x04
+#define TPS65917_REGEN2_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_REGEN2_CTRL_MODE_ACTIVE			0x01
+#define TPS65917_REGEN2_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Bit definitions for NSLEEP_RES_ASSIGN */
+#define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN			0x08
+#define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN_SHIFT		0x03
+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN3			0x04
+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN3_SHIFT		0x02
+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN2			0x02
+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN2_SHIFT		0x01
+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN1			0x01
+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN1_SHIFT		0x00
+
+/* Bit definitions for NSLEEP_SMPS_ASSIGN */
+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5			0x40
+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5_SHIFT		0x06
+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4			0x10
+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4_SHIFT		0x04
+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3			0x08
+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT		0x03
+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2			0x02
+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2_SHIFT		0x01
+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1			0x01
+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1_SHIFT		0x00
+
+/* Bit definitions for NSLEEP_LDO_ASSIGN1 */
+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4			0x80
+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT			0x07
+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2			0x02
+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT			0x01
+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1			0x01
+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT			0x00
+
+/* Bit definitions for NSLEEP_LDO_ASSIGN2 */
+#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3			0x04
+#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3_SHIFT			0x02
+#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5			0x02
+#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5_SHIFT			0x01
+
+/* Bit definitions for ENABLE1_RES_ASSIGN */
+#define TPS65917_ENABLE1_RES_ASSIGN_PLLEN			0x08
+#define TPS65917_ENABLE1_RES_ASSIGN_PLLEN_SHIFT		0x03
+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN3			0x04
+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN3_SHIFT		0x02
+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN2			0x02
+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN2_SHIFT		0x01
+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN1			0x01
+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN1_SHIFT		0x00
+
+/* Bit definitions for ENABLE1_SMPS_ASSIGN */
+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5			0x40
+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5_SHIFT		0x06
+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4			0x10
+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4_SHIFT		0x04
+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3			0x08
+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT		0x03
+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2			0x02
+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2_SHIFT		0x01
+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1			0x01
+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1_SHIFT		0x00
+
+/* Bit definitions for ENABLE1_LDO_ASSIGN1 */
+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4			0x80
+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT		0x07
+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2			0x02
+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT		0x01
+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1			0x01
+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT		0x00
+
+/* Bit definitions for ENABLE1_LDO_ASSIGN2 */
+#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3			0x04
+#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3_SHIFT		0x02
+#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5			0x02
+#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5_SHIFT		0x01
+
+/* Bit definitions for ENABLE2_RES_ASSIGN */
+#define TPS65917_ENABLE2_RES_ASSIGN_PLLEN			0x08
+#define TPS65917_ENABLE2_RES_ASSIGN_PLLEN_SHIFT		0x03
+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN3			0x04
+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN3_SHIFT		0x02
+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN2			0x02
+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN2_SHIFT		0x01
+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN1			0x01
+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN1_SHIFT		0x00
+
+/* Bit definitions for ENABLE2_SMPS_ASSIGN */
+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5			0x40
+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5_SHIFT		0x06
+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4			0x10
+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4_SHIFT		0x04
+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3			0x08
+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT		0x03
+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2			0x02
+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2_SHIFT		0x01
+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1			0x01
+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1_SHIFT		0x00
+
+/* Bit definitions for ENABLE2_LDO_ASSIGN1 */
+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4			0x80
+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT		0x07
+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2			0x02
+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT		0x01
+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1			0x01
+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT		0x00
+
+/* Bit definitions for ENABLE2_LDO_ASSIGN2 */
+#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3			0x04
+#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3_SHIFT		0x02
+#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5			0x02
+#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5_SHIFT		0x01
+
+/* Bit definitions for REGEN3_CTRL */
+#define TPS65917_REGEN3_CTRL_STATUS				0x10
+#define TPS65917_REGEN3_CTRL_STATUS_SHIFT			0x04
+#define TPS65917_REGEN3_CTRL_MODE_SLEEP			0x04
+#define TPS65917_REGEN3_CTRL_MODE_SLEEP_SHIFT			0x02
+#define TPS65917_REGEN3_CTRL_MODE_ACTIVE			0x01
+#define TPS65917_REGEN3_CTRL_MODE_ACTIVE_SHIFT			0x00
+
+/* Registers for function RESOURCE */
+#define TPS65917_REGEN1_CTRL					0x2
+#define TPS65917_PLLEN_CTRL					0x3
+#define TPS65917_NSLEEP_RES_ASSIGN				0x6
+#define TPS65917_NSLEEP_SMPS_ASSIGN				0x7
+#define TPS65917_NSLEEP_LDO_ASSIGN1				0x8
+#define TPS65917_NSLEEP_LDO_ASSIGN2				0x9
+#define TPS65917_ENABLE1_RES_ASSIGN				0xA
+#define TPS65917_ENABLE1_SMPS_ASSIGN				0xB
+#define TPS65917_ENABLE1_LDO_ASSIGN1				0xC
+#define TPS65917_ENABLE1_LDO_ASSIGN2				0xD
+#define TPS65917_ENABLE2_RES_ASSIGN				0xE
+#define TPS65917_ENABLE2_SMPS_ASSIGN				0xF
+#define TPS65917_ENABLE2_LDO_ASSIGN1				0x10
+#define TPS65917_ENABLE2_LDO_ASSIGN2				0x11
+#define TPS65917_REGEN2_CTRL					0x12
+#define TPS65917_REGEN3_CTRL					0x13
+
 static inline int palmas_read(struct palmas *palmas, unsigned int base,
 		unsigned int reg, unsigned int *val)
 {
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH 3/9] mfd: palmas: Add tps65917 specific definitions and enums
  2014-05-28 10:20 ` [PATCH 3/9] mfd: palmas: Add tps65917 specific definitions and enums Keerthy
@ 2014-06-17 16:11   ` Lee Jones
  2014-06-18  5:07     ` Keerthy
  0 siblings, 1 reply; 26+ messages in thread
From: Lee Jones @ 2014-06-17 16:11 UTC (permalink / raw)
  To: Keerthy; +Cc: linux-omap, lgirdwood, broonie, linux-kernel, sameo

> Add tps65917 specific definitions and enums.
> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
>  include/linux/mfd/palmas.h |  793 ++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 793 insertions(+)

Acked-by: Lee Jones <lee.jones@linaro.org>

> diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
> index ccbb21f..52a24a9 100644
> --- a/include/linux/mfd/palmas.h
> +++ b/include/linux/mfd/palmas.h
> @@ -30,6 +30,8 @@
>  #define PALMAS_CHIP_ID			0xC035
>  #define PALMAS_CHIP_CHARGER_ID		0xC036
>  
> +#define TPS65917_RESERVED		-1
> +
>  #define is_palmas(a)	(((a) == PALMAS_CHIP_OLD_ID) || \
>  			((a) == PALMAS_CHIP_ID))
>  #define is_palmas_charger(a) ((a) == PALMAS_CHIP_CHARGER_ID)
> @@ -184,6 +186,27 @@ enum palmas_regulators {
>  	PALMAS_NUM_REGS,
>  };
>  
> +enum tps65917_regulators {
> +	/* SMPS regulators */
> +	TPS65917_REG_SMPS1,
> +	TPS65917_REG_SMPS2,
> +	TPS65917_REG_SMPS3,
> +	TPS65917_REG_SMPS4,
> +	TPS65917_REG_SMPS5,
> +	/* LDO regulators */
> +	TPS65917_REG_LDO1,
> +	TPS65917_REG_LDO2,
> +	TPS65917_REG_LDO3,
> +	TPS65917_REG_LDO4,
> +	TPS65917_REG_LDO5,
> +	TPS65917_REG_REGEN1,
> +	TPS65917_REG_REGEN2,
> +	TPS65917_REG_REGEN3,
> +
> +	/* Total number of regulators */
> +	TPS65917_NUM_REGS,
> +};
> +
>  /* External controll signal name */
>  enum {
>  	PALMAS_EXT_CONTROL_ENABLE1      = 0x1,
> @@ -228,6 +251,24 @@ enum palmas_external_requestor_id {
>  	PALMAS_EXTERNAL_REQSTR_ID_MAX,
>  };
>  
> +enum tps65917_external_requestor_id {
> +	TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
> +	TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
> +	TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
> +	TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
> +	TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
> +	TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
> +	TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
> +	TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
> +	TPS65917_EXTERNAL_REQSTR_ID_LDO1,
> +	TPS65917_EXTERNAL_REQSTR_ID_LDO2,
> +	TPS65917_EXTERNAL_REQSTR_ID_LDO3,
> +	TPS65917_EXTERNAL_REQSTR_ID_LDO4,
> +	TPS65917_EXTERNAL_REQSTR_ID_LDO5,
> +	/* Last entry */
> +	TPS65917_EXTERNAL_REQSTR_ID_MAX,
> +};
> +
>  struct palmas_pmic_platform_data {
>  	/* An array of pointers to regulator init data indexed by regulator
>  	 * ID
> @@ -349,6 +390,48 @@ struct palmas_gpadc_result {
>  
>  #define PALMAS_MAX_CHANNELS 16
>  
> +/* Define the tps65917 IRQ numbers */
> +enum tps65917_irqs {
> +	/* INT1 registers */
> +	TPS65917_RESERVED1,
> +	TPS65917_PWRON_IRQ,
> +	TPS65917_LONG_PRESS_KEY_IRQ,
> +	TPS65917_RESERVED2,
> +	TPS65917_PWRDOWN_IRQ,
> +	TPS65917_HOTDIE_IRQ,
> +	TPS65917_VSYS_MON_IRQ,
> +	TPS65917_RESERVED3,
> +	/* INT2 registers */
> +	TPS65917_RESERVED4,
> +	TPS65917_OTP_ERROR_IRQ,
> +	TPS65917_WDT_IRQ,
> +	TPS65917_RESERVED5,
> +	TPS65917_RESET_IN_IRQ,
> +	TPS65917_FSD_IRQ,
> +	TPS65917_SHORT_IRQ,
> +	TPS65917_RESERVED6,
> +	/* INT3 registers */
> +	TPS65917_GPADC_AUTO_0_IRQ,
> +	TPS65917_GPADC_AUTO_1_IRQ,
> +	TPS65917_GPADC_EOC_SW_IRQ,
> +	TPS65917_RESREVED6,
> +	TPS65917_RESERVED7,
> +	TPS65917_RESERVED8,
> +	TPS65917_RESERVED9,
> +	TPS65917_VBUS_IRQ,
> +	/* INT4 registers */
> +	TPS65917_GPIO_0_IRQ,
> +	TPS65917_GPIO_1_IRQ,
> +	TPS65917_GPIO_2_IRQ,
> +	TPS65917_GPIO_3_IRQ,
> +	TPS65917_GPIO_4_IRQ,
> +	TPS65917_GPIO_5_IRQ,
> +	TPS65917_GPIO_6_IRQ,
> +	TPS65917_RESERVED10,
> +	/* Total Number IRQs */
> +	TPS65917_NUM_IRQ,
> +};
> +
>  /* Define the palmas IRQ numbers */
>  enum palmas_irqs {
>  	/* INT1 registers */
> @@ -400,6 +483,7 @@ struct palmas_pmic {
>  
>  	int smps123;
>  	int smps457;
> +	int smps12;
>  
>  	int range[PALMAS_REG_SMPS10_OUT1];
>  	unsigned int ramp_delay[PALMAS_REG_SMPS10_OUT1];
> @@ -2871,6 +2955,715 @@ enum usb_irq_events {
>  #define PALMAS_GPADC_TRIM15					0x0E
>  #define PALMAS_GPADC_TRIM16					0x0F
>  
> +/* TPS65917 Interrupt registers */
> +
> +/* Registers for function INTERRUPT */
> +#define TPS65917_INT1_STATUS					0x00
> +#define TPS65917_INT1_MASK					0x01
> +#define TPS65917_INT1_LINE_STATE				0x02
> +#define TPS65917_INT2_STATUS					0x05
> +#define TPS65917_INT2_MASK					0x06
> +#define TPS65917_INT2_LINE_STATE				0x07
> +#define TPS65917_INT3_STATUS					0x0A
> +#define TPS65917_INT3_MASK					0x0B
> +#define TPS65917_INT3_LINE_STATE				0x0C
> +#define TPS65917_INT4_STATUS					0x0F
> +#define TPS65917_INT4_MASK					0x10
> +#define TPS65917_INT4_LINE_STATE				0x11
> +#define TPS65917_INT4_EDGE_DETECT1				0x12
> +#define TPS65917_INT4_EDGE_DETECT2				0x13
> +#define TPS65917_INT_CTRL					0x14
> +
> +/* Bit definitions for INT1_STATUS */
> +#define TPS65917_INT1_STATUS_VSYS_MON				0x40
> +#define TPS65917_INT1_STATUS_VSYS_MON_SHIFT			0x06
> +#define TPS65917_INT1_STATUS_HOTDIE				0x20
> +#define TPS65917_INT1_STATUS_HOTDIE_SHIFT			0x05
> +#define TPS65917_INT1_STATUS_PWRDOWN				0x10
> +#define TPS65917_INT1_STATUS_PWRDOWN_SHIFT			0x04
> +#define TPS65917_INT1_STATUS_LONG_PRESS_KEY			0x04
> +#define TPS65917_INT1_STATUS_LONG_PRESS_KEY_SHIFT		0x02
> +#define TPS65917_INT1_STATUS_PWRON				0x02
> +#define TPS65917_INT1_STATUS_PWRON_SHIFT			0x01
> +
> +/* Bit definitions for INT1_MASK */
> +#define TPS65917_INT1_MASK_VSYS_MON				0x40
> +#define TPS65917_INT1_MASK_VSYS_MON_SHIFT			0x06
> +#define TPS65917_INT1_MASK_HOTDIE				0x20
> +#define TPS65917_INT1_MASK_HOTDIE_SHIFT			0x05
> +#define TPS65917_INT1_MASK_PWRDOWN				0x10
> +#define TPS65917_INT1_MASK_PWRDOWN_SHIFT			0x04
> +#define TPS65917_INT1_MASK_LONG_PRESS_KEY			0x04
> +#define TPS65917_INT1_MASK_LONG_PRESS_KEY_SHIFT		0x02
> +#define TPS65917_INT1_MASK_PWRON				0x02
> +#define TPS65917_INT1_MASK_PWRON_SHIFT				0x01
> +
> +/* Bit definitions for INT1_LINE_STATE */
> +#define TPS65917_INT1_LINE_STATE_VSYS_MON			0x40
> +#define TPS65917_INT1_LINE_STATE_VSYS_MON_SHIFT		0x06
> +#define TPS65917_INT1_LINE_STATE_HOTDIE			0x20
> +#define TPS65917_INT1_LINE_STATE_HOTDIE_SHIFT			0x05
> +#define TPS65917_INT1_LINE_STATE_PWRDOWN			0x10
> +#define TPS65917_INT1_LINE_STATE_PWRDOWN_SHIFT			0x04
> +#define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY		0x04
> +#define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT		0x02
> +#define TPS65917_INT1_LINE_STATE_PWRON				0x02
> +#define TPS65917_INT1_LINE_STATE_PWRON_SHIFT			0x01
> +
> +/* Bit definitions for INT2_STATUS */
> +#define TPS65917_INT2_STATUS_SHORT				0x40
> +#define TPS65917_INT2_STATUS_SHORT_SHIFT			0x06
> +#define TPS65917_INT2_STATUS_FSD				0x20
> +#define TPS65917_INT2_STATUS_FSD_SHIFT				0x05
> +#define TPS65917_INT2_STATUS_RESET_IN				0x10
> +#define TPS65917_INT2_STATUS_RESET_IN_SHIFT			0x04
> +#define TPS65917_INT2_STATUS_WDT				0x04
> +#define TPS65917_INT2_STATUS_WDT_SHIFT				0x02
> +#define TPS65917_INT2_STATUS_OTP_ERROR				0x02
> +#define TPS65917_INT2_STATUS_OTP_ERROR_SHIFT			0x01
> +
> +/* Bit definitions for INT2_MASK */
> +#define TPS65917_INT2_MASK_SHORT				0x40
> +#define TPS65917_INT2_MASK_SHORT_SHIFT				0x06
> +#define TPS65917_INT2_MASK_FSD					0x20
> +#define TPS65917_INT2_MASK_FSD_SHIFT				0x05
> +#define TPS65917_INT2_MASK_RESET_IN				0x10
> +#define TPS65917_INT2_MASK_RESET_IN_SHIFT			0x04
> +#define TPS65917_INT2_MASK_WDT					0x04
> +#define TPS65917_INT2_MASK_WDT_SHIFT				0x02
> +#define TPS65917_INT2_MASK_OTP_ERROR_TIMER			0x02
> +#define TPS65917_INT2_MASK_OTP_ERROR_SHIFT			0x01
> +
> +/* Bit definitions for INT2_LINE_STATE */
> +#define TPS65917_INT2_LINE_STATE_SHORT				0x40
> +#define TPS65917_INT2_LINE_STATE_SHORT_SHIFT			0x06
> +#define TPS65917_INT2_LINE_STATE_FSD				0x20
> +#define TPS65917_INT2_LINE_STATE_FSD_SHIFT			0x05
> +#define TPS65917_INT2_LINE_STATE_RESET_IN			0x10
> +#define TPS65917_INT2_LINE_STATE_RESET_IN_SHIFT		0x04
> +#define TPS65917_INT2_LINE_STATE_WDT				0x04
> +#define TPS65917_INT2_LINE_STATE_WDT_SHIFT			0x02
> +#define TPS65917_INT2_LINE_STATE_OTP_ERROR			0x02
> +#define TPS65917_INT2_LINE_STATE_OTP_ERROR_SHIFT		0x01
> +
> +/* Bit definitions for INT3_STATUS */
> +#define TPS65917_INT3_STATUS_VBUS				0x80
> +#define TPS65917_INT3_STATUS_VBUS_SHIFT			0x07
> +#define TPS65917_INT3_STATUS_GPADC_EOC_SW			0x04
> +#define TPS65917_INT3_STATUS_GPADC_EOC_SW_SHIFT		0x02
> +#define TPS65917_INT3_STATUS_GPADC_AUTO_1			0x02
> +#define TPS65917_INT3_STATUS_GPADC_AUTO_1_SHIFT		0x01
> +#define TPS65917_INT3_STATUS_GPADC_AUTO_0			0x01
> +#define TPS65917_INT3_STATUS_GPADC_AUTO_0_SHIFT		0x00
> +
> +/* Bit definitions for INT3_MASK */
> +#define TPS65917_INT3_MASK_VBUS				0x80
> +#define TPS65917_INT3_MASK_VBUS_SHIFT				0x07
> +#define TPS65917_INT3_MASK_GPADC_EOC_SW			0x04
> +#define TPS65917_INT3_MASK_GPADC_EOC_SW_SHIFT			0x02
> +#define TPS65917_INT3_MASK_GPADC_AUTO_1			0x02
> +#define TPS65917_INT3_MASK_GPADC_AUTO_1_SHIFT			0x01
> +#define TPS65917_INT3_MASK_GPADC_AUTO_0			0x01
> +#define TPS65917_INT3_MASK_GPADC_AUTO_0_SHIFT			0x00
> +
> +/* Bit definitions for INT3_LINE_STATE */
> +#define TPS65917_INT3_LINE_STATE_VBUS				0x80
> +#define TPS65917_INT3_LINE_STATE_VBUS_SHIFT			0x07
> +#define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW			0x04
> +#define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT		0x02
> +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1			0x02
> +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT		0x01
> +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0			0x01
> +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT		0x00
> +
> +/* Bit definitions for INT4_STATUS */
> +#define TPS65917_INT4_STATUS_GPIO_6				0x40
> +#define TPS65917_INT4_STATUS_GPIO_6_SHIFT			0x06
> +#define TPS65917_INT4_STATUS_GPIO_5				0x20
> +#define TPS65917_INT4_STATUS_GPIO_5_SHIFT			0x05
> +#define TPS65917_INT4_STATUS_GPIO_4				0x10
> +#define TPS65917_INT4_STATUS_GPIO_4_SHIFT			0x04
> +#define TPS65917_INT4_STATUS_GPIO_3				0x08
> +#define TPS65917_INT4_STATUS_GPIO_3_SHIFT			0x03
> +#define TPS65917_INT4_STATUS_GPIO_2				0x04
> +#define TPS65917_INT4_STATUS_GPIO_2_SHIFT			0x02
> +#define TPS65917_INT4_STATUS_GPIO_1				0x02
> +#define TPS65917_INT4_STATUS_GPIO_1_SHIFT			0x01
> +#define TPS65917_INT4_STATUS_GPIO_0				0x01
> +#define TPS65917_INT4_STATUS_GPIO_0_SHIFT			0x00
> +
> +/* Bit definitions for INT4_MASK */
> +#define TPS65917_INT4_MASK_GPIO_6				0x40
> +#define TPS65917_INT4_MASK_GPIO_6_SHIFT			0x06
> +#define TPS65917_INT4_MASK_GPIO_5				0x20
> +#define TPS65917_INT4_MASK_GPIO_5_SHIFT			0x05
> +#define TPS65917_INT4_MASK_GPIO_4				0x10
> +#define TPS65917_INT4_MASK_GPIO_4_SHIFT			0x04
> +#define TPS65917_INT4_MASK_GPIO_3				0x08
> +#define TPS65917_INT4_MASK_GPIO_3_SHIFT			0x03
> +#define TPS65917_INT4_MASK_GPIO_2				0x04
> +#define TPS65917_INT4_MASK_GPIO_2_SHIFT			0x02
> +#define TPS65917_INT4_MASK_GPIO_1				0x02
> +#define TPS65917_INT4_MASK_GPIO_1_SHIFT			0x01
> +#define TPS65917_INT4_MASK_GPIO_0				0x01
> +#define TPS65917_INT4_MASK_GPIO_0_SHIFT			0x00
> +
> +/* Bit definitions for INT4_LINE_STATE */
> +#define TPS65917_INT4_LINE_STATE_GPIO_6			0x40
> +#define TPS65917_INT4_LINE_STATE_GPIO_6_SHIFT			0x06
> +#define TPS65917_INT4_LINE_STATE_GPIO_5			0x20
> +#define TPS65917_INT4_LINE_STATE_GPIO_5_SHIFT			0x05
> +#define TPS65917_INT4_LINE_STATE_GPIO_4			0x10
> +#define TPS65917_INT4_LINE_STATE_GPIO_4_SHIFT			0x04
> +#define TPS65917_INT4_LINE_STATE_GPIO_3			0x08
> +#define TPS65917_INT4_LINE_STATE_GPIO_3_SHIFT			0x03
> +#define TPS65917_INT4_LINE_STATE_GPIO_2			0x04
> +#define TPS65917_INT4_LINE_STATE_GPIO_2_SHIFT			0x02
> +#define TPS65917_INT4_LINE_STATE_GPIO_1			0x02
> +#define TPS65917_INT4_LINE_STATE_GPIO_1_SHIFT			0x01
> +#define TPS65917_INT4_LINE_STATE_GPIO_0			0x01
> +#define TPS65917_INT4_LINE_STATE_GPIO_0_SHIFT			0x00
> +
> +/* Bit definitions for INT4_EDGE_DETECT1 */
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING		0x80
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT		0x07
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING		0x40
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT	0x06
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING		0x20
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT		0x05
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING		0x10
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT	0x04
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING		0x08
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT		0x03
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING		0x04
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT	0x02
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING		0x02
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT		0x01
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING		0x01
> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT	0x00
> +
> +/* Bit definitions for INT4_EDGE_DETECT2 */
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING		0x20
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT		0x05
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING		0x10
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT	0x04
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING		0x08
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT		0x03
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING		0x04
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT	0x02
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING		0x02
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT		0x01
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING		0x01
> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT	0x00
> +
> +/* Bit definitions for INT_CTRL */
> +#define TPS65917_INT_CTRL_INT_PENDING				0x04
> +#define TPS65917_INT_CTRL_INT_PENDING_SHIFT			0x02
> +#define TPS65917_INT_CTRL_INT_CLEAR				0x01
> +#define TPS65917_INT_CTRL_INT_CLEAR_SHIFT			0x00
> +
> +/* TPS65917 SMPS Registers */
> +
> +/* Registers for function SMPS */
> +#define TPS65917_SMPS1_CTRL					0x00
> +#define TPS65917_SMPS1_FORCE					0x02
> +#define TPS65917_SMPS1_VOLTAGE					0x03
> +#define TPS65917_SMPS2_CTRL					0x04
> +#define TPS65917_SMPS2_FORCE					0x06
> +#define TPS65917_SMPS2_VOLTAGE					0x07
> +#define TPS65917_SMPS3_CTRL					0x0C
> +#define TPS65917_SMPS3_FORCE					0x0E
> +#define TPS65917_SMPS3_VOLTAGE					0x0F
> +#define TPS65917_SMPS4_CTRL					0x10
> +#define TPS65917_SMPS4_VOLTAGE					0x13
> +#define TPS65917_SMPS5_CTRL					0x18
> +#define TPS65917_SMPS5_VOLTAGE					0x1B
> +#define TPS65917_SMPS_CTRL					0x24
> +#define TPS65917_SMPS_PD_CTRL					0x25
> +#define TPS65917_SMPS_THERMAL_EN				0x27
> +#define TPS65917_SMPS_THERMAL_STATUS				0x28
> +#define TPS65917_SMPS_SHORT_STATUS				0x29
> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN		0x2A
> +#define TPS65917_SMPS_POWERGOOD_MASK1				0x2B
> +#define TPS65917_SMPS_POWERGOOD_MASK2				0x2C
> +
> +/* Bit definitions for SMPS1_CTRL */
> +#define TPS65917_SMPS1_CTRL_WR_S				0x80
> +#define TPS65917_SMPS1_CTRL_WR_S_SHIFT				0x07
> +#define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN			0x40
> +#define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
> +#define TPS65917_SMPS1_CTRL_STATUS_MASK			0x30
> +#define TPS65917_SMPS1_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_SMPS1_CTRL_MODE_SLEEP_MASK			0x0C
> +#define TPS65917_SMPS1_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_SMPS1_CTRL_MODE_ACTIVE_MASK			0x03
> +#define TPS65917_SMPS1_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for SMPS1_FORCE */
> +#define TPS65917_SMPS1_FORCE_CMD				0x80
> +#define TPS65917_SMPS1_FORCE_CMD_SHIFT				0x07
> +#define TPS65917_SMPS1_FORCE_VSEL_MASK				0x7F
> +#define TPS65917_SMPS1_FORCE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for SMPS1_VOLTAGE */
> +#define TPS65917_SMPS1_VOLTAGE_RANGE				0x80
> +#define TPS65917_SMPS1_VOLTAGE_RANGE_SHIFT			0x07
> +#define TPS65917_SMPS1_VOLTAGE_VSEL_MASK			0x7F
> +#define TPS65917_SMPS1_VOLTAGE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for SMPS2_CTRL */
> +#define TPS65917_SMPS2_CTRL_WR_S				0x80
> +#define TPS65917_SMPS2_CTRL_WR_S_SHIFT				0x07
> +#define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN			0x40
> +#define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
> +#define TPS65917_SMPS2_CTRL_STATUS_MASK			0x30
> +#define TPS65917_SMPS2_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_SMPS2_CTRL_MODE_SLEEP_MASK			0x0C
> +#define TPS65917_SMPS2_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_SMPS2_CTRL_MODE_ACTIVE_MASK			0x03
> +#define TPS65917_SMPS2_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for SMPS2_FORCE */
> +#define TPS65917_SMPS2_FORCE_CMD				0x80
> +#define TPS65917_SMPS2_FORCE_CMD_SHIFT				0x07
> +#define TPS65917_SMPS2_FORCE_VSEL_MASK				0x7F
> +#define TPS65917_SMPS2_FORCE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for SMPS2_VOLTAGE */
> +#define TPS65917_SMPS2_VOLTAGE_RANGE				0x80
> +#define TPS65917_SMPS2_VOLTAGE_RANGE_SHIFT			0x07
> +#define TPS65917_SMPS2_VOLTAGE_VSEL_MASK			0x7F
> +#define TPS65917_SMPS2_VOLTAGE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for SMPS3_CTRL */
> +#define TPS65917_SMPS3_CTRL_WR_S				0x80
> +#define TPS65917_SMPS3_CTRL_WR_S_SHIFT				0x07
> +#define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN			0x40
> +#define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
> +#define TPS65917_SMPS3_CTRL_STATUS_MASK			0x30
> +#define TPS65917_SMPS3_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_SMPS3_CTRL_MODE_SLEEP_MASK			0x0C
> +#define TPS65917_SMPS3_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_SMPS3_CTRL_MODE_ACTIVE_MASK			0x03
> +#define TPS65917_SMPS3_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for SMPS3_FORCE */
> +#define TPS65917_SMPS3_FORCE_CMD				0x80
> +#define TPS65917_SMPS3_FORCE_CMD_SHIFT				0x07
> +#define TPS65917_SMPS3_FORCE_VSEL_MASK				0x7F
> +#define TPS65917_SMPS3_FORCE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for SMPS3_VOLTAGE */
> +#define TPS65917_SMPS3_VOLTAGE_RANGE				0x80
> +#define TPS65917_SMPS3_VOLTAGE_RANGE_SHIFT			0x07
> +#define TPS65917_SMPS3_VOLTAGE_VSEL_MASK			0x7F
> +#define TPS65917_SMPS3_VOLTAGE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for SMPS4_CTRL */
> +#define TPS65917_SMPS4_CTRL_WR_S				0x80
> +#define TPS65917_SMPS4_CTRL_WR_S_SHIFT				0x07
> +#define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN			0x40
> +#define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
> +#define TPS65917_SMPS4_CTRL_STATUS_MASK			0x30
> +#define TPS65917_SMPS4_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_SMPS4_CTRL_MODE_SLEEP_MASK			0x0C
> +#define TPS65917_SMPS4_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_SMPS4_CTRL_MODE_ACTIVE_MASK			0x03
> +#define TPS65917_SMPS4_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for SMPS4_VOLTAGE */
> +#define TPS65917_SMPS4_VOLTAGE_RANGE				0x80
> +#define TPS65917_SMPS4_VOLTAGE_RANGE_SHIFT			0x07
> +#define TPS65917_SMPS4_VOLTAGE_VSEL_MASK			0x7F
> +#define TPS65917_SMPS4_VOLTAGE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for SMPS5_CTRL */
> +#define TPS65917_SMPS5_CTRL_WR_S				0x80
> +#define TPS65917_SMPS5_CTRL_WR_S_SHIFT				0x07
> +#define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN			0x40
> +#define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
> +#define TPS65917_SMPS5_CTRL_STATUS_MASK			0x30
> +#define TPS65917_SMPS5_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_SMPS5_CTRL_MODE_SLEEP_MASK			0x0C
> +#define TPS65917_SMPS5_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_SMPS5_CTRL_MODE_ACTIVE_MASK			0x03
> +#define TPS65917_SMPS5_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for SMPS5_VOLTAGE */
> +#define TPS65917_SMPS5_VOLTAGE_RANGE				0x80
> +#define TPS65917_SMPS5_VOLTAGE_RANGE_SHIFT			0x07
> +#define TPS65917_SMPS5_VOLTAGE_VSEL_MASK			0x7F
> +#define TPS65917_SMPS5_VOLTAGE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for SMPS_CTRL */
> +#define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN			0x10
> +#define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN_SHIFT		0x04
> +#define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL			0x03
> +#define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL_SHIFT		0x00
> +
> +/* Bit definitions for SMPS_PD_CTRL */
> +#define TPS65917_SMPS_PD_CTRL_SMPS5				0x40
> +#define TPS65917_SMPS_PD_CTRL_SMPS5_SHIFT			0x06
> +#define TPS65917_SMPS_PD_CTRL_SMPS4				0x10
> +#define TPS65917_SMPS_PD_CTRL_SMPS4_SHIFT			0x04
> +#define TPS65917_SMPS_PD_CTRL_SMPS3				0x08
> +#define TPS65917_SMPS_PD_CTRL_SMPS3_SHIFT			0x03
> +#define TPS65917_SMPS_PD_CTRL_SMPS2				0x02
> +#define TPS65917_SMPS_PD_CTRL_SMPS2_SHIFT			0x01
> +#define TPS65917_SMPS_PD_CTRL_SMPS1				0x01
> +#define TPS65917_SMPS_PD_CTRL_SMPS1_SHIFT			0x00
> +
> +/* Bit definitions for SMPS_THERMAL_EN */
> +#define TPS65917_SMPS_THERMAL_EN_SMPS5				0x40
> +#define TPS65917_SMPS_THERMAL_EN_SMPS5_SHIFT			0x06
> +#define TPS65917_SMPS_THERMAL_EN_SMPS3				0x08
> +#define TPS65917_SMPS_THERMAL_EN_SMPS3_SHIFT			0x03
> +#define TPS65917_SMPS_THERMAL_EN_SMPS12			0x01
> +#define TPS65917_SMPS_THERMAL_EN_SMPS12_SHIFT			0x00
> +
> +/* Bit definitions for SMPS_THERMAL_STATUS */
> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS5			0x40
> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS5_SHIFT		0x06
> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS3			0x08
> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS3_SHIFT		0x03
> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS12			0x01
> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS12_SHIFT		0x00
> +
> +/* Bit definitions for SMPS_SHORT_STATUS */
> +#define TPS65917_SMPS_SHORT_STATUS_SMPS5			0x40
> +#define TPS65917_SMPS_SHORT_STATUS_SMPS5_SHIFT			0x06
> +#define TPS65917_SMPS_SHORT_STATUS_SMPS4			0x10
> +#define TPS65917_SMPS_SHORT_STATUS_SMPS4_SHIFT			0x04
> +#define TPS65917_SMPS_SHORT_STATUS_SMPS3			0x08
> +#define TPS65917_SMPS_SHORT_STATUS_SMPS3_SHIFT			0x03
> +#define TPS65917_SMPS_SHORT_STATUS_SMPS2			0x02
> +#define TPS65917_SMPS_SHORT_STATUS_SMPS2_SHIFT			0x01
> +#define TPS65917_SMPS_SHORT_STATUS_SMPS1			0x01
> +#define TPS65917_SMPS_SHORT_STATUS_SMPS1_SHIFT			0x00
> +
> +/* Bit definitions for SMPS_NEGATIVE_CURRENT_LIMIT_EN */
> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5		0x40
> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5_SHIFT	0x06
> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4		0x10
> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4_SHIFT	0x04
> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3		0x08
> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT	0x03
> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2		0x02
> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2_SHIFT	0x01
> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1		0x01
> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1_SHIFT	0x00
> +
> +/* Bit definitions for SMPS_POWERGOOD_MASK1 */
> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5			0x40
> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5_SHIFT		0x06
> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4			0x10
> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4_SHIFT		0x04
> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3			0x08
> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT		0x03
> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2			0x02
> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2_SHIFT		0x01
> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1			0x01
> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1_SHIFT		0x00
> +
> +/* Bit definitions for SMPS_POWERGOOD_MASK2 */
> +#define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT		0x80
> +#define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT	0x07
> +#define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM_SHIFT			0x10
> +#define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM			0x04
> +
> +/* Bit definitions for SMPS_PLL_CTRL */
> +
> +#define TPS65917_SMPS_PLL_CTRL_PLL_EN_PLL_BYPASS_SHIFT		0x08
> +#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_EN_BYPASS		0x03
> +#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK_SHIFT	0x04
> +#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK		0x02
> +
> +/* Registers for function LDO */
> +#define TPS65917_LDO1_CTRL					0x00
> +#define TPS65917_LDO1_VOLTAGE					0x01
> +#define TPS65917_LDO2_CTRL					0x02
> +#define TPS65917_LDO2_VOLTAGE					0x03
> +#define TPS65917_LDO3_CTRL					0x04
> +#define TPS65917_LDO3_VOLTAGE					0x05
> +#define TPS65917_LDO4_CTRL					0x0E
> +#define TPS65917_LDO4_VOLTAGE					0x0F
> +#define TPS65917_LDO5_CTRL					0x12
> +#define TPS65917_LDO5_VOLTAGE					0x13
> +#define TPS65917_LDO_PD_CTRL1					0x1B
> +#define TPS65917_LDO_PD_CTRL2					0x1C
> +#define TPS65917_LDO_SHORT_STATUS1				0x1D
> +#define TPS65917_LDO_SHORT_STATUS2				0x1E
> +#define TPS65917_LDO_PD_CTRL3					0x2D
> +#define TPS65917_LDO_SHORT_STATUS3				0x2E
> +
> +/* Bit definitions for LDO1_CTRL */
> +#define TPS65917_LDO1_CTRL_WR_S				0x80
> +#define TPS65917_LDO1_CTRL_WR_S_SHIFT				0x07
> +#define TPS65917_LDO1_CTRL_BYPASS_EN				0x40
> +#define TPS65917_LDO1_CTRL_BYPASS_EN_SHIFT			0x06
> +#define TPS65917_LDO1_CTRL_STATUS				0x10
> +#define TPS65917_LDO1_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_LDO1_CTRL_MODE_SLEEP				0x04
> +#define TPS65917_LDO1_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_LDO1_CTRL_MODE_ACTIVE				0x01
> +#define TPS65917_LDO1_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for LDO1_VOLTAGE */
> +#define TPS65917_LDO1_VOLTAGE_VSEL_MASK			0x2F
> +#define TPS65917_LDO1_VOLTAGE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for LDO2_CTRL */
> +#define TPS65917_LDO2_CTRL_WR_S				0x80
> +#define TPS65917_LDO2_CTRL_WR_S_SHIFT				0x07
> +#define TPS65917_LDO2_CTRL_BYPASS_EN				0x40
> +#define TPS65917_LDO2_CTRL_BYPASS_EN_SHIFT			0x06
> +#define TPS65917_LDO2_CTRL_STATUS				0x10
> +#define TPS65917_LDO2_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_LDO2_CTRL_MODE_SLEEP				0x04
> +#define TPS65917_LDO2_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_LDO2_CTRL_MODE_ACTIVE				0x01
> +#define TPS65917_LDO2_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for LDO2_VOLTAGE */
> +#define TPS65917_LDO2_VOLTAGE_VSEL_MASK			0x2F
> +#define TPS65917_LDO2_VOLTAGE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for LDO3_CTRL */
> +#define TPS65917_LDO3_CTRL_WR_S				0x80
> +#define TPS65917_LDO3_CTRL_WR_S_SHIFT				0x07
> +#define TPS65917_LDO3_CTRL_STATUS				0x10
> +#define TPS65917_LDO3_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_LDO3_CTRL_MODE_SLEEP				0x04
> +#define TPS65917_LDO3_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_LDO3_CTRL_MODE_ACTIVE				0x01
> +#define TPS65917_LDO3_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for LDO3_VOLTAGE */
> +#define TPS65917_LDO3_VOLTAGE_VSEL_MASK			0x2F
> +#define TPS65917_LDO3_VOLTAGE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for LDO4_CTRL */
> +#define TPS65917_LDO4_CTRL_WR_S				0x80
> +#define TPS65917_LDO4_CTRL_WR_S_SHIFT				0x07
> +#define TPS65917_LDO4_CTRL_STATUS				0x10
> +#define TPS65917_LDO4_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_LDO4_CTRL_MODE_SLEEP				0x04
> +#define TPS65917_LDO4_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_LDO4_CTRL_MODE_ACTIVE				0x01
> +#define TPS65917_LDO4_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for LDO4_VOLTAGE */
> +#define TPS65917_LDO4_VOLTAGE_VSEL_MASK			0x2F
> +#define TPS65917_LDO4_VOLTAGE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for LDO5_CTRL */
> +#define TPS65917_LDO5_CTRL_WR_S				0x80
> +#define TPS65917_LDO5_CTRL_WR_S_SHIFT				0x07
> +#define TPS65917_LDO5_CTRL_STATUS				0x10
> +#define TPS65917_LDO5_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_LDO5_CTRL_MODE_SLEEP				0x04
> +#define TPS65917_LDO5_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_LDO5_CTRL_MODE_ACTIVE				0x01
> +#define TPS65917_LDO5_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for LDO5_VOLTAGE */
> +#define TPS65917_LDO5_VOLTAGE_VSEL_MASK			0x2F
> +#define TPS65917_LDO5_VOLTAGE_VSEL_SHIFT			0x00
> +
> +/* Bit definitions for LDO_PD_CTRL1 */
> +#define TPS65917_LDO_PD_CTRL1_LDO4				0x80
> +#define TPS65917_LDO_PD_CTRL1_LDO4_SHIFT			0x07
> +#define TPS65917_LDO_PD_CTRL1_LDO2				0x02
> +#define TPS65917_LDO_PD_CTRL1_LDO2_SHIFT			0x01
> +#define TPS65917_LDO_PD_CTRL1_LDO1				0x01
> +#define TPS65917_LDO_PD_CTRL1_LDO1_SHIFT			0x00
> +
> +/* Bit definitions for LDO_PD_CTRL2 */
> +#define TPS65917_LDO_PD_CTRL2_LDO3				0x04
> +#define TPS65917_LDO_PD_CTRL2_LDO3_SHIFT			0x02
> +#define TPS65917_LDO_PD_CTRL2_LDO5				0x02
> +#define TPS65917_LDO_PD_CTRL2_LDO5_SHIFT			0x01
> +
> +/* Bit definitions for LDO_PD_CTRL3 */
> +#define TPS65917_LDO_PD_CTRL2_LDOVANA				0x80
> +#define TPS65917_LDO_PD_CTRL2_LDOVANA_SHIFT			0x07
> +
> +/* Bit definitions for LDO_SHORT_STATUS1 */
> +#define TPS65917_LDO_SHORT_STATUS1_LDO4			0x80
> +#define TPS65917_LDO_SHORT_STATUS1_LDO4_SHIFT			0x07
> +#define TPS65917_LDO_SHORT_STATUS1_LDO2			0x02
> +#define TPS65917_LDO_SHORT_STATUS1_LDO2_SHIFT			0x01
> +#define TPS65917_LDO_SHORT_STATUS1_LDO1			0x01
> +#define TPS65917_LDO_SHORT_STATUS1_LDO1_SHIFT			0x00
> +
> +/* Bit definitions for LDO_SHORT_STATUS2 */
> +#define TPS65917_LDO_SHORT_STATUS2_LDO3			0x04
> +#define TPS65917_LDO_SHORT_STATUS2_LDO3_SHIFT			0x02
> +#define TPS65917_LDO_SHORT_STATUS2_LDO5			0x02
> +#define TPS65917_LDO_SHORT_STATUS2_LDO5_SHIFT			0x01
> +
> +/* Bit definitions for LDO_SHORT_STATUS2 */
> +#define TPS65917_LDO_SHORT_STATUS2_LDOVANA			0x80
> +#define TPS65917_LDO_SHORT_STATUS2_LDOVANA_SHIFT		0x07
> +
> +/* Bit definitions for REGEN1_CTRL */
> +#define TPS65917_REGEN1_CTRL_STATUS				0x10
> +#define TPS65917_REGEN1_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_REGEN1_CTRL_MODE_SLEEP			0x04
> +#define TPS65917_REGEN1_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_REGEN1_CTRL_MODE_ACTIVE			0x01
> +#define TPS65917_REGEN1_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for PLLEN_CTRL */
> +#define TPS65917_PLLEN_CTRL_STATUS				0x10
> +#define TPS65917_PLLEN_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_PLLEN_CTRL_MODE_SLEEP				0x04
> +#define TPS65917_PLLEN_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_PLLEN_CTRL_MODE_ACTIVE			0x01
> +#define TPS65917_PLLEN_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for REGEN2_CTRL */
> +#define TPS65917_REGEN2_CTRL_STATUS				0x10
> +#define TPS65917_REGEN2_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_REGEN2_CTRL_MODE_SLEEP			0x04
> +#define TPS65917_REGEN2_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_REGEN2_CTRL_MODE_ACTIVE			0x01
> +#define TPS65917_REGEN2_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Bit definitions for NSLEEP_RES_ASSIGN */
> +#define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN			0x08
> +#define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN_SHIFT		0x03
> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN3			0x04
> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN3_SHIFT		0x02
> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN2			0x02
> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN2_SHIFT		0x01
> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN1			0x01
> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN1_SHIFT		0x00
> +
> +/* Bit definitions for NSLEEP_SMPS_ASSIGN */
> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5			0x40
> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5_SHIFT		0x06
> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4			0x10
> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4_SHIFT		0x04
> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3			0x08
> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT		0x03
> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2			0x02
> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2_SHIFT		0x01
> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1			0x01
> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1_SHIFT		0x00
> +
> +/* Bit definitions for NSLEEP_LDO_ASSIGN1 */
> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4			0x80
> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT			0x07
> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2			0x02
> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT			0x01
> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1			0x01
> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT			0x00
> +
> +/* Bit definitions for NSLEEP_LDO_ASSIGN2 */
> +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3			0x04
> +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3_SHIFT			0x02
> +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5			0x02
> +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5_SHIFT			0x01
> +
> +/* Bit definitions for ENABLE1_RES_ASSIGN */
> +#define TPS65917_ENABLE1_RES_ASSIGN_PLLEN			0x08
> +#define TPS65917_ENABLE1_RES_ASSIGN_PLLEN_SHIFT		0x03
> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN3			0x04
> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN3_SHIFT		0x02
> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN2			0x02
> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN2_SHIFT		0x01
> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN1			0x01
> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN1_SHIFT		0x00
> +
> +/* Bit definitions for ENABLE1_SMPS_ASSIGN */
> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5			0x40
> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5_SHIFT		0x06
> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4			0x10
> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4_SHIFT		0x04
> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3			0x08
> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT		0x03
> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2			0x02
> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2_SHIFT		0x01
> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1			0x01
> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1_SHIFT		0x00
> +
> +/* Bit definitions for ENABLE1_LDO_ASSIGN1 */
> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4			0x80
> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT		0x07
> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2			0x02
> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT		0x01
> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1			0x01
> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT		0x00
> +
> +/* Bit definitions for ENABLE1_LDO_ASSIGN2 */
> +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3			0x04
> +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3_SHIFT		0x02
> +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5			0x02
> +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5_SHIFT		0x01
> +
> +/* Bit definitions for ENABLE2_RES_ASSIGN */
> +#define TPS65917_ENABLE2_RES_ASSIGN_PLLEN			0x08
> +#define TPS65917_ENABLE2_RES_ASSIGN_PLLEN_SHIFT		0x03
> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN3			0x04
> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN3_SHIFT		0x02
> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN2			0x02
> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN2_SHIFT		0x01
> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN1			0x01
> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN1_SHIFT		0x00
> +
> +/* Bit definitions for ENABLE2_SMPS_ASSIGN */
> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5			0x40
> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5_SHIFT		0x06
> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4			0x10
> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4_SHIFT		0x04
> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3			0x08
> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT		0x03
> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2			0x02
> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2_SHIFT		0x01
> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1			0x01
> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1_SHIFT		0x00
> +
> +/* Bit definitions for ENABLE2_LDO_ASSIGN1 */
> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4			0x80
> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT		0x07
> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2			0x02
> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT		0x01
> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1			0x01
> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT		0x00
> +
> +/* Bit definitions for ENABLE2_LDO_ASSIGN2 */
> +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3			0x04
> +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3_SHIFT		0x02
> +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5			0x02
> +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5_SHIFT		0x01
> +
> +/* Bit definitions for REGEN3_CTRL */
> +#define TPS65917_REGEN3_CTRL_STATUS				0x10
> +#define TPS65917_REGEN3_CTRL_STATUS_SHIFT			0x04
> +#define TPS65917_REGEN3_CTRL_MODE_SLEEP			0x04
> +#define TPS65917_REGEN3_CTRL_MODE_SLEEP_SHIFT			0x02
> +#define TPS65917_REGEN3_CTRL_MODE_ACTIVE			0x01
> +#define TPS65917_REGEN3_CTRL_MODE_ACTIVE_SHIFT			0x00
> +
> +/* Registers for function RESOURCE */
> +#define TPS65917_REGEN1_CTRL					0x2
> +#define TPS65917_PLLEN_CTRL					0x3
> +#define TPS65917_NSLEEP_RES_ASSIGN				0x6
> +#define TPS65917_NSLEEP_SMPS_ASSIGN				0x7
> +#define TPS65917_NSLEEP_LDO_ASSIGN1				0x8
> +#define TPS65917_NSLEEP_LDO_ASSIGN2				0x9
> +#define TPS65917_ENABLE1_RES_ASSIGN				0xA
> +#define TPS65917_ENABLE1_SMPS_ASSIGN				0xB
> +#define TPS65917_ENABLE1_LDO_ASSIGN1				0xC
> +#define TPS65917_ENABLE1_LDO_ASSIGN2				0xD
> +#define TPS65917_ENABLE2_RES_ASSIGN				0xE
> +#define TPS65917_ENABLE2_SMPS_ASSIGN				0xF
> +#define TPS65917_ENABLE2_LDO_ASSIGN1				0x10
> +#define TPS65917_ENABLE2_LDO_ASSIGN2				0x11
> +#define TPS65917_REGEN2_CTRL					0x12
> +#define TPS65917_REGEN3_CTRL					0x13
> +
>  static inline int palmas_read(struct palmas *palmas, unsigned int base,
>  		unsigned int reg, unsigned int *val)
>  {

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH 3/9] mfd: palmas: Add tps65917 specific definitions and enums
  2014-06-17 16:11   ` Lee Jones
@ 2014-06-18  5:07     ` Keerthy
  0 siblings, 0 replies; 26+ messages in thread
From: Keerthy @ 2014-06-18  5:07 UTC (permalink / raw)
  To: Lee Jones; +Cc: Keerthy, linux-omap, lgirdwood, broonie, linux-kernel, sameo

On Tuesday 17 June 2014 09:41 PM, Lee Jones wrote:
>> Add tps65917 specific definitions and enums.
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>>   include/linux/mfd/palmas.h |  793 ++++++++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 793 insertions(+)
> Acked-by: Lee Jones <lee.jones@linaro.org>

Thanks.

>
>> diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
>> index ccbb21f..52a24a9 100644
>> --- a/include/linux/mfd/palmas.h
>> +++ b/include/linux/mfd/palmas.h
>> @@ -30,6 +30,8 @@
>>   #define PALMAS_CHIP_ID			0xC035
>>   #define PALMAS_CHIP_CHARGER_ID		0xC036
>>   
>> +#define TPS65917_RESERVED		-1
>> +
>>   #define is_palmas(a)	(((a) == PALMAS_CHIP_OLD_ID) || \
>>   			((a) == PALMAS_CHIP_ID))
>>   #define is_palmas_charger(a) ((a) == PALMAS_CHIP_CHARGER_ID)
>> @@ -184,6 +186,27 @@ enum palmas_regulators {
>>   	PALMAS_NUM_REGS,
>>   };
>>   
>> +enum tps65917_regulators {
>> +	/* SMPS regulators */
>> +	TPS65917_REG_SMPS1,
>> +	TPS65917_REG_SMPS2,
>> +	TPS65917_REG_SMPS3,
>> +	TPS65917_REG_SMPS4,
>> +	TPS65917_REG_SMPS5,
>> +	/* LDO regulators */
>> +	TPS65917_REG_LDO1,
>> +	TPS65917_REG_LDO2,
>> +	TPS65917_REG_LDO3,
>> +	TPS65917_REG_LDO4,
>> +	TPS65917_REG_LDO5,
>> +	TPS65917_REG_REGEN1,
>> +	TPS65917_REG_REGEN2,
>> +	TPS65917_REG_REGEN3,
>> +
>> +	/* Total number of regulators */
>> +	TPS65917_NUM_REGS,
>> +};
>> +
>>   /* External controll signal name */
>>   enum {
>>   	PALMAS_EXT_CONTROL_ENABLE1      = 0x1,
>> @@ -228,6 +251,24 @@ enum palmas_external_requestor_id {
>>   	PALMAS_EXTERNAL_REQSTR_ID_MAX,
>>   };
>>   
>> +enum tps65917_external_requestor_id {
>> +	TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
>> +	TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
>> +	TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
>> +	TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
>> +	TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
>> +	TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
>> +	TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
>> +	TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
>> +	TPS65917_EXTERNAL_REQSTR_ID_LDO1,
>> +	TPS65917_EXTERNAL_REQSTR_ID_LDO2,
>> +	TPS65917_EXTERNAL_REQSTR_ID_LDO3,
>> +	TPS65917_EXTERNAL_REQSTR_ID_LDO4,
>> +	TPS65917_EXTERNAL_REQSTR_ID_LDO5,
>> +	/* Last entry */
>> +	TPS65917_EXTERNAL_REQSTR_ID_MAX,
>> +};
>> +
>>   struct palmas_pmic_platform_data {
>>   	/* An array of pointers to regulator init data indexed by regulator
>>   	 * ID
>> @@ -349,6 +390,48 @@ struct palmas_gpadc_result {
>>   
>>   #define PALMAS_MAX_CHANNELS 16
>>   
>> +/* Define the tps65917 IRQ numbers */
>> +enum tps65917_irqs {
>> +	/* INT1 registers */
>> +	TPS65917_RESERVED1,
>> +	TPS65917_PWRON_IRQ,
>> +	TPS65917_LONG_PRESS_KEY_IRQ,
>> +	TPS65917_RESERVED2,
>> +	TPS65917_PWRDOWN_IRQ,
>> +	TPS65917_HOTDIE_IRQ,
>> +	TPS65917_VSYS_MON_IRQ,
>> +	TPS65917_RESERVED3,
>> +	/* INT2 registers */
>> +	TPS65917_RESERVED4,
>> +	TPS65917_OTP_ERROR_IRQ,
>> +	TPS65917_WDT_IRQ,
>> +	TPS65917_RESERVED5,
>> +	TPS65917_RESET_IN_IRQ,
>> +	TPS65917_FSD_IRQ,
>> +	TPS65917_SHORT_IRQ,
>> +	TPS65917_RESERVED6,
>> +	/* INT3 registers */
>> +	TPS65917_GPADC_AUTO_0_IRQ,
>> +	TPS65917_GPADC_AUTO_1_IRQ,
>> +	TPS65917_GPADC_EOC_SW_IRQ,
>> +	TPS65917_RESREVED6,
>> +	TPS65917_RESERVED7,
>> +	TPS65917_RESERVED8,
>> +	TPS65917_RESERVED9,
>> +	TPS65917_VBUS_IRQ,
>> +	/* INT4 registers */
>> +	TPS65917_GPIO_0_IRQ,
>> +	TPS65917_GPIO_1_IRQ,
>> +	TPS65917_GPIO_2_IRQ,
>> +	TPS65917_GPIO_3_IRQ,
>> +	TPS65917_GPIO_4_IRQ,
>> +	TPS65917_GPIO_5_IRQ,
>> +	TPS65917_GPIO_6_IRQ,
>> +	TPS65917_RESERVED10,
>> +	/* Total Number IRQs */
>> +	TPS65917_NUM_IRQ,
>> +};
>> +
>>   /* Define the palmas IRQ numbers */
>>   enum palmas_irqs {
>>   	/* INT1 registers */
>> @@ -400,6 +483,7 @@ struct palmas_pmic {
>>   
>>   	int smps123;
>>   	int smps457;
>> +	int smps12;
>>   
>>   	int range[PALMAS_REG_SMPS10_OUT1];
>>   	unsigned int ramp_delay[PALMAS_REG_SMPS10_OUT1];
>> @@ -2871,6 +2955,715 @@ enum usb_irq_events {
>>   #define PALMAS_GPADC_TRIM15					0x0E
>>   #define PALMAS_GPADC_TRIM16					0x0F
>>   
>> +/* TPS65917 Interrupt registers */
>> +
>> +/* Registers for function INTERRUPT */
>> +#define TPS65917_INT1_STATUS					0x00
>> +#define TPS65917_INT1_MASK					0x01
>> +#define TPS65917_INT1_LINE_STATE				0x02
>> +#define TPS65917_INT2_STATUS					0x05
>> +#define TPS65917_INT2_MASK					0x06
>> +#define TPS65917_INT2_LINE_STATE				0x07
>> +#define TPS65917_INT3_STATUS					0x0A
>> +#define TPS65917_INT3_MASK					0x0B
>> +#define TPS65917_INT3_LINE_STATE				0x0C
>> +#define TPS65917_INT4_STATUS					0x0F
>> +#define TPS65917_INT4_MASK					0x10
>> +#define TPS65917_INT4_LINE_STATE				0x11
>> +#define TPS65917_INT4_EDGE_DETECT1				0x12
>> +#define TPS65917_INT4_EDGE_DETECT2				0x13
>> +#define TPS65917_INT_CTRL					0x14
>> +
>> +/* Bit definitions for INT1_STATUS */
>> +#define TPS65917_INT1_STATUS_VSYS_MON				0x40
>> +#define TPS65917_INT1_STATUS_VSYS_MON_SHIFT			0x06
>> +#define TPS65917_INT1_STATUS_HOTDIE				0x20
>> +#define TPS65917_INT1_STATUS_HOTDIE_SHIFT			0x05
>> +#define TPS65917_INT1_STATUS_PWRDOWN				0x10
>> +#define TPS65917_INT1_STATUS_PWRDOWN_SHIFT			0x04
>> +#define TPS65917_INT1_STATUS_LONG_PRESS_KEY			0x04
>> +#define TPS65917_INT1_STATUS_LONG_PRESS_KEY_SHIFT		0x02
>> +#define TPS65917_INT1_STATUS_PWRON				0x02
>> +#define TPS65917_INT1_STATUS_PWRON_SHIFT			0x01
>> +
>> +/* Bit definitions for INT1_MASK */
>> +#define TPS65917_INT1_MASK_VSYS_MON				0x40
>> +#define TPS65917_INT1_MASK_VSYS_MON_SHIFT			0x06
>> +#define TPS65917_INT1_MASK_HOTDIE				0x20
>> +#define TPS65917_INT1_MASK_HOTDIE_SHIFT			0x05
>> +#define TPS65917_INT1_MASK_PWRDOWN				0x10
>> +#define TPS65917_INT1_MASK_PWRDOWN_SHIFT			0x04
>> +#define TPS65917_INT1_MASK_LONG_PRESS_KEY			0x04
>> +#define TPS65917_INT1_MASK_LONG_PRESS_KEY_SHIFT		0x02
>> +#define TPS65917_INT1_MASK_PWRON				0x02
>> +#define TPS65917_INT1_MASK_PWRON_SHIFT				0x01
>> +
>> +/* Bit definitions for INT1_LINE_STATE */
>> +#define TPS65917_INT1_LINE_STATE_VSYS_MON			0x40
>> +#define TPS65917_INT1_LINE_STATE_VSYS_MON_SHIFT		0x06
>> +#define TPS65917_INT1_LINE_STATE_HOTDIE			0x20
>> +#define TPS65917_INT1_LINE_STATE_HOTDIE_SHIFT			0x05
>> +#define TPS65917_INT1_LINE_STATE_PWRDOWN			0x10
>> +#define TPS65917_INT1_LINE_STATE_PWRDOWN_SHIFT			0x04
>> +#define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY		0x04
>> +#define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT		0x02
>> +#define TPS65917_INT1_LINE_STATE_PWRON				0x02
>> +#define TPS65917_INT1_LINE_STATE_PWRON_SHIFT			0x01
>> +
>> +/* Bit definitions for INT2_STATUS */
>> +#define TPS65917_INT2_STATUS_SHORT				0x40
>> +#define TPS65917_INT2_STATUS_SHORT_SHIFT			0x06
>> +#define TPS65917_INT2_STATUS_FSD				0x20
>> +#define TPS65917_INT2_STATUS_FSD_SHIFT				0x05
>> +#define TPS65917_INT2_STATUS_RESET_IN				0x10
>> +#define TPS65917_INT2_STATUS_RESET_IN_SHIFT			0x04
>> +#define TPS65917_INT2_STATUS_WDT				0x04
>> +#define TPS65917_INT2_STATUS_WDT_SHIFT				0x02
>> +#define TPS65917_INT2_STATUS_OTP_ERROR				0x02
>> +#define TPS65917_INT2_STATUS_OTP_ERROR_SHIFT			0x01
>> +
>> +/* Bit definitions for INT2_MASK */
>> +#define TPS65917_INT2_MASK_SHORT				0x40
>> +#define TPS65917_INT2_MASK_SHORT_SHIFT				0x06
>> +#define TPS65917_INT2_MASK_FSD					0x20
>> +#define TPS65917_INT2_MASK_FSD_SHIFT				0x05
>> +#define TPS65917_INT2_MASK_RESET_IN				0x10
>> +#define TPS65917_INT2_MASK_RESET_IN_SHIFT			0x04
>> +#define TPS65917_INT2_MASK_WDT					0x04
>> +#define TPS65917_INT2_MASK_WDT_SHIFT				0x02
>> +#define TPS65917_INT2_MASK_OTP_ERROR_TIMER			0x02
>> +#define TPS65917_INT2_MASK_OTP_ERROR_SHIFT			0x01
>> +
>> +/* Bit definitions for INT2_LINE_STATE */
>> +#define TPS65917_INT2_LINE_STATE_SHORT				0x40
>> +#define TPS65917_INT2_LINE_STATE_SHORT_SHIFT			0x06
>> +#define TPS65917_INT2_LINE_STATE_FSD				0x20
>> +#define TPS65917_INT2_LINE_STATE_FSD_SHIFT			0x05
>> +#define TPS65917_INT2_LINE_STATE_RESET_IN			0x10
>> +#define TPS65917_INT2_LINE_STATE_RESET_IN_SHIFT		0x04
>> +#define TPS65917_INT2_LINE_STATE_WDT				0x04
>> +#define TPS65917_INT2_LINE_STATE_WDT_SHIFT			0x02
>> +#define TPS65917_INT2_LINE_STATE_OTP_ERROR			0x02
>> +#define TPS65917_INT2_LINE_STATE_OTP_ERROR_SHIFT		0x01
>> +
>> +/* Bit definitions for INT3_STATUS */
>> +#define TPS65917_INT3_STATUS_VBUS				0x80
>> +#define TPS65917_INT3_STATUS_VBUS_SHIFT			0x07
>> +#define TPS65917_INT3_STATUS_GPADC_EOC_SW			0x04
>> +#define TPS65917_INT3_STATUS_GPADC_EOC_SW_SHIFT		0x02
>> +#define TPS65917_INT3_STATUS_GPADC_AUTO_1			0x02
>> +#define TPS65917_INT3_STATUS_GPADC_AUTO_1_SHIFT		0x01
>> +#define TPS65917_INT3_STATUS_GPADC_AUTO_0			0x01
>> +#define TPS65917_INT3_STATUS_GPADC_AUTO_0_SHIFT		0x00
>> +
>> +/* Bit definitions for INT3_MASK */
>> +#define TPS65917_INT3_MASK_VBUS				0x80
>> +#define TPS65917_INT3_MASK_VBUS_SHIFT				0x07
>> +#define TPS65917_INT3_MASK_GPADC_EOC_SW			0x04
>> +#define TPS65917_INT3_MASK_GPADC_EOC_SW_SHIFT			0x02
>> +#define TPS65917_INT3_MASK_GPADC_AUTO_1			0x02
>> +#define TPS65917_INT3_MASK_GPADC_AUTO_1_SHIFT			0x01
>> +#define TPS65917_INT3_MASK_GPADC_AUTO_0			0x01
>> +#define TPS65917_INT3_MASK_GPADC_AUTO_0_SHIFT			0x00
>> +
>> +/* Bit definitions for INT3_LINE_STATE */
>> +#define TPS65917_INT3_LINE_STATE_VBUS				0x80
>> +#define TPS65917_INT3_LINE_STATE_VBUS_SHIFT			0x07
>> +#define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW			0x04
>> +#define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT		0x02
>> +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1			0x02
>> +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT		0x01
>> +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0			0x01
>> +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT		0x00
>> +
>> +/* Bit definitions for INT4_STATUS */
>> +#define TPS65917_INT4_STATUS_GPIO_6				0x40
>> +#define TPS65917_INT4_STATUS_GPIO_6_SHIFT			0x06
>> +#define TPS65917_INT4_STATUS_GPIO_5				0x20
>> +#define TPS65917_INT4_STATUS_GPIO_5_SHIFT			0x05
>> +#define TPS65917_INT4_STATUS_GPIO_4				0x10
>> +#define TPS65917_INT4_STATUS_GPIO_4_SHIFT			0x04
>> +#define TPS65917_INT4_STATUS_GPIO_3				0x08
>> +#define TPS65917_INT4_STATUS_GPIO_3_SHIFT			0x03
>> +#define TPS65917_INT4_STATUS_GPIO_2				0x04
>> +#define TPS65917_INT4_STATUS_GPIO_2_SHIFT			0x02
>> +#define TPS65917_INT4_STATUS_GPIO_1				0x02
>> +#define TPS65917_INT4_STATUS_GPIO_1_SHIFT			0x01
>> +#define TPS65917_INT4_STATUS_GPIO_0				0x01
>> +#define TPS65917_INT4_STATUS_GPIO_0_SHIFT			0x00
>> +
>> +/* Bit definitions for INT4_MASK */
>> +#define TPS65917_INT4_MASK_GPIO_6				0x40
>> +#define TPS65917_INT4_MASK_GPIO_6_SHIFT			0x06
>> +#define TPS65917_INT4_MASK_GPIO_5				0x20
>> +#define TPS65917_INT4_MASK_GPIO_5_SHIFT			0x05
>> +#define TPS65917_INT4_MASK_GPIO_4				0x10
>> +#define TPS65917_INT4_MASK_GPIO_4_SHIFT			0x04
>> +#define TPS65917_INT4_MASK_GPIO_3				0x08
>> +#define TPS65917_INT4_MASK_GPIO_3_SHIFT			0x03
>> +#define TPS65917_INT4_MASK_GPIO_2				0x04
>> +#define TPS65917_INT4_MASK_GPIO_2_SHIFT			0x02
>> +#define TPS65917_INT4_MASK_GPIO_1				0x02
>> +#define TPS65917_INT4_MASK_GPIO_1_SHIFT			0x01
>> +#define TPS65917_INT4_MASK_GPIO_0				0x01
>> +#define TPS65917_INT4_MASK_GPIO_0_SHIFT			0x00
>> +
>> +/* Bit definitions for INT4_LINE_STATE */
>> +#define TPS65917_INT4_LINE_STATE_GPIO_6			0x40
>> +#define TPS65917_INT4_LINE_STATE_GPIO_6_SHIFT			0x06
>> +#define TPS65917_INT4_LINE_STATE_GPIO_5			0x20
>> +#define TPS65917_INT4_LINE_STATE_GPIO_5_SHIFT			0x05
>> +#define TPS65917_INT4_LINE_STATE_GPIO_4			0x10
>> +#define TPS65917_INT4_LINE_STATE_GPIO_4_SHIFT			0x04
>> +#define TPS65917_INT4_LINE_STATE_GPIO_3			0x08
>> +#define TPS65917_INT4_LINE_STATE_GPIO_3_SHIFT			0x03
>> +#define TPS65917_INT4_LINE_STATE_GPIO_2			0x04
>> +#define TPS65917_INT4_LINE_STATE_GPIO_2_SHIFT			0x02
>> +#define TPS65917_INT4_LINE_STATE_GPIO_1			0x02
>> +#define TPS65917_INT4_LINE_STATE_GPIO_1_SHIFT			0x01
>> +#define TPS65917_INT4_LINE_STATE_GPIO_0			0x01
>> +#define TPS65917_INT4_LINE_STATE_GPIO_0_SHIFT			0x00
>> +
>> +/* Bit definitions for INT4_EDGE_DETECT1 */
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING		0x80
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT		0x07
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING		0x40
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT	0x06
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING		0x20
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT		0x05
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING		0x10
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT	0x04
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING		0x08
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT		0x03
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING		0x04
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT	0x02
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING		0x02
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT		0x01
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING		0x01
>> +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT	0x00
>> +
>> +/* Bit definitions for INT4_EDGE_DETECT2 */
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING		0x20
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT		0x05
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING		0x10
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT	0x04
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING		0x08
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT		0x03
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING		0x04
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT	0x02
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING		0x02
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT		0x01
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING		0x01
>> +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT	0x00
>> +
>> +/* Bit definitions for INT_CTRL */
>> +#define TPS65917_INT_CTRL_INT_PENDING				0x04
>> +#define TPS65917_INT_CTRL_INT_PENDING_SHIFT			0x02
>> +#define TPS65917_INT_CTRL_INT_CLEAR				0x01
>> +#define TPS65917_INT_CTRL_INT_CLEAR_SHIFT			0x00
>> +
>> +/* TPS65917 SMPS Registers */
>> +
>> +/* Registers for function SMPS */
>> +#define TPS65917_SMPS1_CTRL					0x00
>> +#define TPS65917_SMPS1_FORCE					0x02
>> +#define TPS65917_SMPS1_VOLTAGE					0x03
>> +#define TPS65917_SMPS2_CTRL					0x04
>> +#define TPS65917_SMPS2_FORCE					0x06
>> +#define TPS65917_SMPS2_VOLTAGE					0x07
>> +#define TPS65917_SMPS3_CTRL					0x0C
>> +#define TPS65917_SMPS3_FORCE					0x0E
>> +#define TPS65917_SMPS3_VOLTAGE					0x0F
>> +#define TPS65917_SMPS4_CTRL					0x10
>> +#define TPS65917_SMPS4_VOLTAGE					0x13
>> +#define TPS65917_SMPS5_CTRL					0x18
>> +#define TPS65917_SMPS5_VOLTAGE					0x1B
>> +#define TPS65917_SMPS_CTRL					0x24
>> +#define TPS65917_SMPS_PD_CTRL					0x25
>> +#define TPS65917_SMPS_THERMAL_EN				0x27
>> +#define TPS65917_SMPS_THERMAL_STATUS				0x28
>> +#define TPS65917_SMPS_SHORT_STATUS				0x29
>> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN		0x2A
>> +#define TPS65917_SMPS_POWERGOOD_MASK1				0x2B
>> +#define TPS65917_SMPS_POWERGOOD_MASK2				0x2C
>> +
>> +/* Bit definitions for SMPS1_CTRL */
>> +#define TPS65917_SMPS1_CTRL_WR_S				0x80
>> +#define TPS65917_SMPS1_CTRL_WR_S_SHIFT				0x07
>> +#define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN			0x40
>> +#define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
>> +#define TPS65917_SMPS1_CTRL_STATUS_MASK			0x30
>> +#define TPS65917_SMPS1_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_SMPS1_CTRL_MODE_SLEEP_MASK			0x0C
>> +#define TPS65917_SMPS1_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_SMPS1_CTRL_MODE_ACTIVE_MASK			0x03
>> +#define TPS65917_SMPS1_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS1_FORCE */
>> +#define TPS65917_SMPS1_FORCE_CMD				0x80
>> +#define TPS65917_SMPS1_FORCE_CMD_SHIFT				0x07
>> +#define TPS65917_SMPS1_FORCE_VSEL_MASK				0x7F
>> +#define TPS65917_SMPS1_FORCE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS1_VOLTAGE */
>> +#define TPS65917_SMPS1_VOLTAGE_RANGE				0x80
>> +#define TPS65917_SMPS1_VOLTAGE_RANGE_SHIFT			0x07
>> +#define TPS65917_SMPS1_VOLTAGE_VSEL_MASK			0x7F
>> +#define TPS65917_SMPS1_VOLTAGE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS2_CTRL */
>> +#define TPS65917_SMPS2_CTRL_WR_S				0x80
>> +#define TPS65917_SMPS2_CTRL_WR_S_SHIFT				0x07
>> +#define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN			0x40
>> +#define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
>> +#define TPS65917_SMPS2_CTRL_STATUS_MASK			0x30
>> +#define TPS65917_SMPS2_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_SMPS2_CTRL_MODE_SLEEP_MASK			0x0C
>> +#define TPS65917_SMPS2_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_SMPS2_CTRL_MODE_ACTIVE_MASK			0x03
>> +#define TPS65917_SMPS2_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS2_FORCE */
>> +#define TPS65917_SMPS2_FORCE_CMD				0x80
>> +#define TPS65917_SMPS2_FORCE_CMD_SHIFT				0x07
>> +#define TPS65917_SMPS2_FORCE_VSEL_MASK				0x7F
>> +#define TPS65917_SMPS2_FORCE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS2_VOLTAGE */
>> +#define TPS65917_SMPS2_VOLTAGE_RANGE				0x80
>> +#define TPS65917_SMPS2_VOLTAGE_RANGE_SHIFT			0x07
>> +#define TPS65917_SMPS2_VOLTAGE_VSEL_MASK			0x7F
>> +#define TPS65917_SMPS2_VOLTAGE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS3_CTRL */
>> +#define TPS65917_SMPS3_CTRL_WR_S				0x80
>> +#define TPS65917_SMPS3_CTRL_WR_S_SHIFT				0x07
>> +#define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN			0x40
>> +#define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
>> +#define TPS65917_SMPS3_CTRL_STATUS_MASK			0x30
>> +#define TPS65917_SMPS3_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_SMPS3_CTRL_MODE_SLEEP_MASK			0x0C
>> +#define TPS65917_SMPS3_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_SMPS3_CTRL_MODE_ACTIVE_MASK			0x03
>> +#define TPS65917_SMPS3_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS3_FORCE */
>> +#define TPS65917_SMPS3_FORCE_CMD				0x80
>> +#define TPS65917_SMPS3_FORCE_CMD_SHIFT				0x07
>> +#define TPS65917_SMPS3_FORCE_VSEL_MASK				0x7F
>> +#define TPS65917_SMPS3_FORCE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS3_VOLTAGE */
>> +#define TPS65917_SMPS3_VOLTAGE_RANGE				0x80
>> +#define TPS65917_SMPS3_VOLTAGE_RANGE_SHIFT			0x07
>> +#define TPS65917_SMPS3_VOLTAGE_VSEL_MASK			0x7F
>> +#define TPS65917_SMPS3_VOLTAGE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS4_CTRL */
>> +#define TPS65917_SMPS4_CTRL_WR_S				0x80
>> +#define TPS65917_SMPS4_CTRL_WR_S_SHIFT				0x07
>> +#define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN			0x40
>> +#define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
>> +#define TPS65917_SMPS4_CTRL_STATUS_MASK			0x30
>> +#define TPS65917_SMPS4_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_SMPS4_CTRL_MODE_SLEEP_MASK			0x0C
>> +#define TPS65917_SMPS4_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_SMPS4_CTRL_MODE_ACTIVE_MASK			0x03
>> +#define TPS65917_SMPS4_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS4_VOLTAGE */
>> +#define TPS65917_SMPS4_VOLTAGE_RANGE				0x80
>> +#define TPS65917_SMPS4_VOLTAGE_RANGE_SHIFT			0x07
>> +#define TPS65917_SMPS4_VOLTAGE_VSEL_MASK			0x7F
>> +#define TPS65917_SMPS4_VOLTAGE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS5_CTRL */
>> +#define TPS65917_SMPS5_CTRL_WR_S				0x80
>> +#define TPS65917_SMPS5_CTRL_WR_S_SHIFT				0x07
>> +#define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN			0x40
>> +#define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN_SHIFT		0x06
>> +#define TPS65917_SMPS5_CTRL_STATUS_MASK			0x30
>> +#define TPS65917_SMPS5_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_SMPS5_CTRL_MODE_SLEEP_MASK			0x0C
>> +#define TPS65917_SMPS5_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_SMPS5_CTRL_MODE_ACTIVE_MASK			0x03
>> +#define TPS65917_SMPS5_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS5_VOLTAGE */
>> +#define TPS65917_SMPS5_VOLTAGE_RANGE				0x80
>> +#define TPS65917_SMPS5_VOLTAGE_RANGE_SHIFT			0x07
>> +#define TPS65917_SMPS5_VOLTAGE_VSEL_MASK			0x7F
>> +#define TPS65917_SMPS5_VOLTAGE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS_CTRL */
>> +#define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN			0x10
>> +#define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN_SHIFT		0x04
>> +#define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL			0x03
>> +#define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL_SHIFT		0x00
>> +
>> +/* Bit definitions for SMPS_PD_CTRL */
>> +#define TPS65917_SMPS_PD_CTRL_SMPS5				0x40
>> +#define TPS65917_SMPS_PD_CTRL_SMPS5_SHIFT			0x06
>> +#define TPS65917_SMPS_PD_CTRL_SMPS4				0x10
>> +#define TPS65917_SMPS_PD_CTRL_SMPS4_SHIFT			0x04
>> +#define TPS65917_SMPS_PD_CTRL_SMPS3				0x08
>> +#define TPS65917_SMPS_PD_CTRL_SMPS3_SHIFT			0x03
>> +#define TPS65917_SMPS_PD_CTRL_SMPS2				0x02
>> +#define TPS65917_SMPS_PD_CTRL_SMPS2_SHIFT			0x01
>> +#define TPS65917_SMPS_PD_CTRL_SMPS1				0x01
>> +#define TPS65917_SMPS_PD_CTRL_SMPS1_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS_THERMAL_EN */
>> +#define TPS65917_SMPS_THERMAL_EN_SMPS5				0x40
>> +#define TPS65917_SMPS_THERMAL_EN_SMPS5_SHIFT			0x06
>> +#define TPS65917_SMPS_THERMAL_EN_SMPS3				0x08
>> +#define TPS65917_SMPS_THERMAL_EN_SMPS3_SHIFT			0x03
>> +#define TPS65917_SMPS_THERMAL_EN_SMPS12			0x01
>> +#define TPS65917_SMPS_THERMAL_EN_SMPS12_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS_THERMAL_STATUS */
>> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS5			0x40
>> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS5_SHIFT		0x06
>> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS3			0x08
>> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS3_SHIFT		0x03
>> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS12			0x01
>> +#define TPS65917_SMPS_THERMAL_STATUS_SMPS12_SHIFT		0x00
>> +
>> +/* Bit definitions for SMPS_SHORT_STATUS */
>> +#define TPS65917_SMPS_SHORT_STATUS_SMPS5			0x40
>> +#define TPS65917_SMPS_SHORT_STATUS_SMPS5_SHIFT			0x06
>> +#define TPS65917_SMPS_SHORT_STATUS_SMPS4			0x10
>> +#define TPS65917_SMPS_SHORT_STATUS_SMPS4_SHIFT			0x04
>> +#define TPS65917_SMPS_SHORT_STATUS_SMPS3			0x08
>> +#define TPS65917_SMPS_SHORT_STATUS_SMPS3_SHIFT			0x03
>> +#define TPS65917_SMPS_SHORT_STATUS_SMPS2			0x02
>> +#define TPS65917_SMPS_SHORT_STATUS_SMPS2_SHIFT			0x01
>> +#define TPS65917_SMPS_SHORT_STATUS_SMPS1			0x01
>> +#define TPS65917_SMPS_SHORT_STATUS_SMPS1_SHIFT			0x00
>> +
>> +/* Bit definitions for SMPS_NEGATIVE_CURRENT_LIMIT_EN */
>> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5		0x40
>> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5_SHIFT	0x06
>> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4		0x10
>> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4_SHIFT	0x04
>> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3		0x08
>> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT	0x03
>> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2		0x02
>> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2_SHIFT	0x01
>> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1		0x01
>> +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1_SHIFT	0x00
>> +
>> +/* Bit definitions for SMPS_POWERGOOD_MASK1 */
>> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5			0x40
>> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5_SHIFT		0x06
>> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4			0x10
>> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4_SHIFT		0x04
>> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3			0x08
>> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT		0x03
>> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2			0x02
>> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2_SHIFT		0x01
>> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1			0x01
>> +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1_SHIFT		0x00
>> +
>> +/* Bit definitions for SMPS_POWERGOOD_MASK2 */
>> +#define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT		0x80
>> +#define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT	0x07
>> +#define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM_SHIFT			0x10
>> +#define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM			0x04
>> +
>> +/* Bit definitions for SMPS_PLL_CTRL */
>> +
>> +#define TPS65917_SMPS_PLL_CTRL_PLL_EN_PLL_BYPASS_SHIFT		0x08
>> +#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_EN_BYPASS		0x03
>> +#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK_SHIFT	0x04
>> +#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK		0x02
>> +
>> +/* Registers for function LDO */
>> +#define TPS65917_LDO1_CTRL					0x00
>> +#define TPS65917_LDO1_VOLTAGE					0x01
>> +#define TPS65917_LDO2_CTRL					0x02
>> +#define TPS65917_LDO2_VOLTAGE					0x03
>> +#define TPS65917_LDO3_CTRL					0x04
>> +#define TPS65917_LDO3_VOLTAGE					0x05
>> +#define TPS65917_LDO4_CTRL					0x0E
>> +#define TPS65917_LDO4_VOLTAGE					0x0F
>> +#define TPS65917_LDO5_CTRL					0x12
>> +#define TPS65917_LDO5_VOLTAGE					0x13
>> +#define TPS65917_LDO_PD_CTRL1					0x1B
>> +#define TPS65917_LDO_PD_CTRL2					0x1C
>> +#define TPS65917_LDO_SHORT_STATUS1				0x1D
>> +#define TPS65917_LDO_SHORT_STATUS2				0x1E
>> +#define TPS65917_LDO_PD_CTRL3					0x2D
>> +#define TPS65917_LDO_SHORT_STATUS3				0x2E
>> +
>> +/* Bit definitions for LDO1_CTRL */
>> +#define TPS65917_LDO1_CTRL_WR_S				0x80
>> +#define TPS65917_LDO1_CTRL_WR_S_SHIFT				0x07
>> +#define TPS65917_LDO1_CTRL_BYPASS_EN				0x40
>> +#define TPS65917_LDO1_CTRL_BYPASS_EN_SHIFT			0x06
>> +#define TPS65917_LDO1_CTRL_STATUS				0x10
>> +#define TPS65917_LDO1_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_LDO1_CTRL_MODE_SLEEP				0x04
>> +#define TPS65917_LDO1_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_LDO1_CTRL_MODE_ACTIVE				0x01
>> +#define TPS65917_LDO1_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO1_VOLTAGE */
>> +#define TPS65917_LDO1_VOLTAGE_VSEL_MASK			0x2F
>> +#define TPS65917_LDO1_VOLTAGE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO2_CTRL */
>> +#define TPS65917_LDO2_CTRL_WR_S				0x80
>> +#define TPS65917_LDO2_CTRL_WR_S_SHIFT				0x07
>> +#define TPS65917_LDO2_CTRL_BYPASS_EN				0x40
>> +#define TPS65917_LDO2_CTRL_BYPASS_EN_SHIFT			0x06
>> +#define TPS65917_LDO2_CTRL_STATUS				0x10
>> +#define TPS65917_LDO2_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_LDO2_CTRL_MODE_SLEEP				0x04
>> +#define TPS65917_LDO2_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_LDO2_CTRL_MODE_ACTIVE				0x01
>> +#define TPS65917_LDO2_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO2_VOLTAGE */
>> +#define TPS65917_LDO2_VOLTAGE_VSEL_MASK			0x2F
>> +#define TPS65917_LDO2_VOLTAGE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO3_CTRL */
>> +#define TPS65917_LDO3_CTRL_WR_S				0x80
>> +#define TPS65917_LDO3_CTRL_WR_S_SHIFT				0x07
>> +#define TPS65917_LDO3_CTRL_STATUS				0x10
>> +#define TPS65917_LDO3_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_LDO3_CTRL_MODE_SLEEP				0x04
>> +#define TPS65917_LDO3_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_LDO3_CTRL_MODE_ACTIVE				0x01
>> +#define TPS65917_LDO3_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO3_VOLTAGE */
>> +#define TPS65917_LDO3_VOLTAGE_VSEL_MASK			0x2F
>> +#define TPS65917_LDO3_VOLTAGE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO4_CTRL */
>> +#define TPS65917_LDO4_CTRL_WR_S				0x80
>> +#define TPS65917_LDO4_CTRL_WR_S_SHIFT				0x07
>> +#define TPS65917_LDO4_CTRL_STATUS				0x10
>> +#define TPS65917_LDO4_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_LDO4_CTRL_MODE_SLEEP				0x04
>> +#define TPS65917_LDO4_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_LDO4_CTRL_MODE_ACTIVE				0x01
>> +#define TPS65917_LDO4_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO4_VOLTAGE */
>> +#define TPS65917_LDO4_VOLTAGE_VSEL_MASK			0x2F
>> +#define TPS65917_LDO4_VOLTAGE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO5_CTRL */
>> +#define TPS65917_LDO5_CTRL_WR_S				0x80
>> +#define TPS65917_LDO5_CTRL_WR_S_SHIFT				0x07
>> +#define TPS65917_LDO5_CTRL_STATUS				0x10
>> +#define TPS65917_LDO5_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_LDO5_CTRL_MODE_SLEEP				0x04
>> +#define TPS65917_LDO5_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_LDO5_CTRL_MODE_ACTIVE				0x01
>> +#define TPS65917_LDO5_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO5_VOLTAGE */
>> +#define TPS65917_LDO5_VOLTAGE_VSEL_MASK			0x2F
>> +#define TPS65917_LDO5_VOLTAGE_VSEL_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO_PD_CTRL1 */
>> +#define TPS65917_LDO_PD_CTRL1_LDO4				0x80
>> +#define TPS65917_LDO_PD_CTRL1_LDO4_SHIFT			0x07
>> +#define TPS65917_LDO_PD_CTRL1_LDO2				0x02
>> +#define TPS65917_LDO_PD_CTRL1_LDO2_SHIFT			0x01
>> +#define TPS65917_LDO_PD_CTRL1_LDO1				0x01
>> +#define TPS65917_LDO_PD_CTRL1_LDO1_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO_PD_CTRL2 */
>> +#define TPS65917_LDO_PD_CTRL2_LDO3				0x04
>> +#define TPS65917_LDO_PD_CTRL2_LDO3_SHIFT			0x02
>> +#define TPS65917_LDO_PD_CTRL2_LDO5				0x02
>> +#define TPS65917_LDO_PD_CTRL2_LDO5_SHIFT			0x01
>> +
>> +/* Bit definitions for LDO_PD_CTRL3 */
>> +#define TPS65917_LDO_PD_CTRL2_LDOVANA				0x80
>> +#define TPS65917_LDO_PD_CTRL2_LDOVANA_SHIFT			0x07
>> +
>> +/* Bit definitions for LDO_SHORT_STATUS1 */
>> +#define TPS65917_LDO_SHORT_STATUS1_LDO4			0x80
>> +#define TPS65917_LDO_SHORT_STATUS1_LDO4_SHIFT			0x07
>> +#define TPS65917_LDO_SHORT_STATUS1_LDO2			0x02
>> +#define TPS65917_LDO_SHORT_STATUS1_LDO2_SHIFT			0x01
>> +#define TPS65917_LDO_SHORT_STATUS1_LDO1			0x01
>> +#define TPS65917_LDO_SHORT_STATUS1_LDO1_SHIFT			0x00
>> +
>> +/* Bit definitions for LDO_SHORT_STATUS2 */
>> +#define TPS65917_LDO_SHORT_STATUS2_LDO3			0x04
>> +#define TPS65917_LDO_SHORT_STATUS2_LDO3_SHIFT			0x02
>> +#define TPS65917_LDO_SHORT_STATUS2_LDO5			0x02
>> +#define TPS65917_LDO_SHORT_STATUS2_LDO5_SHIFT			0x01
>> +
>> +/* Bit definitions for LDO_SHORT_STATUS2 */
>> +#define TPS65917_LDO_SHORT_STATUS2_LDOVANA			0x80
>> +#define TPS65917_LDO_SHORT_STATUS2_LDOVANA_SHIFT		0x07
>> +
>> +/* Bit definitions for REGEN1_CTRL */
>> +#define TPS65917_REGEN1_CTRL_STATUS				0x10
>> +#define TPS65917_REGEN1_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_REGEN1_CTRL_MODE_SLEEP			0x04
>> +#define TPS65917_REGEN1_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_REGEN1_CTRL_MODE_ACTIVE			0x01
>> +#define TPS65917_REGEN1_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for PLLEN_CTRL */
>> +#define TPS65917_PLLEN_CTRL_STATUS				0x10
>> +#define TPS65917_PLLEN_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_PLLEN_CTRL_MODE_SLEEP				0x04
>> +#define TPS65917_PLLEN_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_PLLEN_CTRL_MODE_ACTIVE			0x01
>> +#define TPS65917_PLLEN_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for REGEN2_CTRL */
>> +#define TPS65917_REGEN2_CTRL_STATUS				0x10
>> +#define TPS65917_REGEN2_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_REGEN2_CTRL_MODE_SLEEP			0x04
>> +#define TPS65917_REGEN2_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_REGEN2_CTRL_MODE_ACTIVE			0x01
>> +#define TPS65917_REGEN2_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Bit definitions for NSLEEP_RES_ASSIGN */
>> +#define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN			0x08
>> +#define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN_SHIFT		0x03
>> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN3			0x04
>> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN3_SHIFT		0x02
>> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN2			0x02
>> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN2_SHIFT		0x01
>> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN1			0x01
>> +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN1_SHIFT		0x00
>> +
>> +/* Bit definitions for NSLEEP_SMPS_ASSIGN */
>> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5			0x40
>> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5_SHIFT		0x06
>> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4			0x10
>> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4_SHIFT		0x04
>> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3			0x08
>> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT		0x03
>> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2			0x02
>> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2_SHIFT		0x01
>> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1			0x01
>> +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1_SHIFT		0x00
>> +
>> +/* Bit definitions for NSLEEP_LDO_ASSIGN1 */
>> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4			0x80
>> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT			0x07
>> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2			0x02
>> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT			0x01
>> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1			0x01
>> +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT			0x00
>> +
>> +/* Bit definitions for NSLEEP_LDO_ASSIGN2 */
>> +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3			0x04
>> +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3_SHIFT			0x02
>> +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5			0x02
>> +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5_SHIFT			0x01
>> +
>> +/* Bit definitions for ENABLE1_RES_ASSIGN */
>> +#define TPS65917_ENABLE1_RES_ASSIGN_PLLEN			0x08
>> +#define TPS65917_ENABLE1_RES_ASSIGN_PLLEN_SHIFT		0x03
>> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN3			0x04
>> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN3_SHIFT		0x02
>> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN2			0x02
>> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN2_SHIFT		0x01
>> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN1			0x01
>> +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN1_SHIFT		0x00
>> +
>> +/* Bit definitions for ENABLE1_SMPS_ASSIGN */
>> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5			0x40
>> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5_SHIFT		0x06
>> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4			0x10
>> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4_SHIFT		0x04
>> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3			0x08
>> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT		0x03
>> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2			0x02
>> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2_SHIFT		0x01
>> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1			0x01
>> +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1_SHIFT		0x00
>> +
>> +/* Bit definitions for ENABLE1_LDO_ASSIGN1 */
>> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4			0x80
>> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT		0x07
>> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2			0x02
>> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT		0x01
>> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1			0x01
>> +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT		0x00
>> +
>> +/* Bit definitions for ENABLE1_LDO_ASSIGN2 */
>> +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3			0x04
>> +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3_SHIFT		0x02
>> +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5			0x02
>> +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5_SHIFT		0x01
>> +
>> +/* Bit definitions for ENABLE2_RES_ASSIGN */
>> +#define TPS65917_ENABLE2_RES_ASSIGN_PLLEN			0x08
>> +#define TPS65917_ENABLE2_RES_ASSIGN_PLLEN_SHIFT		0x03
>> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN3			0x04
>> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN3_SHIFT		0x02
>> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN2			0x02
>> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN2_SHIFT		0x01
>> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN1			0x01
>> +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN1_SHIFT		0x00
>> +
>> +/* Bit definitions for ENABLE2_SMPS_ASSIGN */
>> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5			0x40
>> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5_SHIFT		0x06
>> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4			0x10
>> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4_SHIFT		0x04
>> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3			0x08
>> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT		0x03
>> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2			0x02
>> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2_SHIFT		0x01
>> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1			0x01
>> +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1_SHIFT		0x00
>> +
>> +/* Bit definitions for ENABLE2_LDO_ASSIGN1 */
>> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4			0x80
>> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT		0x07
>> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2			0x02
>> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT		0x01
>> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1			0x01
>> +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT		0x00
>> +
>> +/* Bit definitions for ENABLE2_LDO_ASSIGN2 */
>> +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3			0x04
>> +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3_SHIFT		0x02
>> +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5			0x02
>> +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5_SHIFT		0x01
>> +
>> +/* Bit definitions for REGEN3_CTRL */
>> +#define TPS65917_REGEN3_CTRL_STATUS				0x10
>> +#define TPS65917_REGEN3_CTRL_STATUS_SHIFT			0x04
>> +#define TPS65917_REGEN3_CTRL_MODE_SLEEP			0x04
>> +#define TPS65917_REGEN3_CTRL_MODE_SLEEP_SHIFT			0x02
>> +#define TPS65917_REGEN3_CTRL_MODE_ACTIVE			0x01
>> +#define TPS65917_REGEN3_CTRL_MODE_ACTIVE_SHIFT			0x00
>> +
>> +/* Registers for function RESOURCE */
>> +#define TPS65917_REGEN1_CTRL					0x2
>> +#define TPS65917_PLLEN_CTRL					0x3
>> +#define TPS65917_NSLEEP_RES_ASSIGN				0x6
>> +#define TPS65917_NSLEEP_SMPS_ASSIGN				0x7
>> +#define TPS65917_NSLEEP_LDO_ASSIGN1				0x8
>> +#define TPS65917_NSLEEP_LDO_ASSIGN2				0x9
>> +#define TPS65917_ENABLE1_RES_ASSIGN				0xA
>> +#define TPS65917_ENABLE1_SMPS_ASSIGN				0xB
>> +#define TPS65917_ENABLE1_LDO_ASSIGN1				0xC
>> +#define TPS65917_ENABLE1_LDO_ASSIGN2				0xD
>> +#define TPS65917_ENABLE2_RES_ASSIGN				0xE
>> +#define TPS65917_ENABLE2_SMPS_ASSIGN				0xF
>> +#define TPS65917_ENABLE2_LDO_ASSIGN1				0x10
>> +#define TPS65917_ENABLE2_LDO_ASSIGN2				0x11
>> +#define TPS65917_REGEN2_CTRL					0x12
>> +#define TPS65917_REGEN3_CTRL					0x13
>> +
>>   static inline int palmas_read(struct palmas *palmas, unsigned int base,
>>   		unsigned int reg, unsigned int *val)
>>   {

^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH 4/9] mfd: palmas: Add tps65917 support
  2014-05-28 10:20 [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
                   ` (2 preceding siblings ...)
  2014-05-28 10:20 ` [PATCH 3/9] mfd: palmas: Add tps65917 specific definitions and enums Keerthy
@ 2014-05-28 10:20 ` Keerthy
  2014-06-17 16:19   ` Lee Jones
  2014-05-28 10:20 ` [PATCH 5/9] regulator: palmas: Shift the reg_info structure definition to the header file Keerthy
                   ` (5 subsequent siblings)
  9 siblings, 1 reply; 26+ messages in thread
From: Keerthy @ 2014-05-28 10:20 UTC (permalink / raw)
  To: linux-omap; +Cc: lgirdwood, broonie, linux-kernel, sameo, lee.jones, Keerthy

Add tps65917 PMIC support. tps65917 is a subset of palmas PMIC.
Some of the register definitions and the interrupt mappings
are different.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 drivers/mfd/palmas.c |  176 ++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 171 insertions(+), 5 deletions(-)

diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
index d280d78..485d755 100644
--- a/drivers/mfd/palmas.c
+++ b/drivers/mfd/palmas.c
@@ -92,6 +92,133 @@ static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {
 	},
 };
 
+static const struct regmap_irq tps65917_irqs[] = {
+	/* INT1 IRQs */
+	[TPS65917_RESERVED1] = {
+		.mask = TPS65917_RESERVED,
+	},
+	[TPS65917_PWRON_IRQ] = {
+		.mask = TPS65917_INT1_STATUS_PWRON,
+	},
+	[TPS65917_LONG_PRESS_KEY_IRQ] = {
+		.mask = TPS65917_INT1_STATUS_LONG_PRESS_KEY,
+	},
+	[TPS65917_RESERVED2] = {
+		.mask = TPS65917_RESERVED,
+	},
+	[TPS65917_PWRDOWN_IRQ] = {
+		.mask = TPS65917_INT1_STATUS_PWRDOWN,
+	},
+	[TPS65917_HOTDIE_IRQ] = {
+		.mask = TPS65917_INT1_STATUS_HOTDIE,
+	},
+	[TPS65917_VSYS_MON_IRQ] = {
+		.mask = TPS65917_INT1_STATUS_VSYS_MON,
+	},
+	[TPS65917_RESERVED3] = {
+		.mask = TPS65917_RESERVED,
+	},
+	/* INT2 IRQs*/
+	[TPS65917_RESERVED4] = {
+		.mask = TPS65917_RESERVED,
+		.reg_offset = 1,
+	},
+	[TPS65917_OTP_ERROR_IRQ] = {
+		.mask = TPS65917_INT2_STATUS_OTP_ERROR,
+		.reg_offset = 1,
+	},
+	[TPS65917_WDT_IRQ] = {
+		.mask = TPS65917_INT2_STATUS_WDT,
+		.reg_offset = 1,
+	},
+	[TPS65917_RESERVED5] = {
+		.mask = TPS65917_RESERVED,
+		.reg_offset = 1,
+	},
+	[TPS65917_RESET_IN_IRQ] = {
+		.mask = TPS65917_INT2_STATUS_RESET_IN,
+		.reg_offset = 1,
+	},
+	[TPS65917_FSD_IRQ] = {
+		.mask = TPS65917_INT2_STATUS_FSD,
+		.reg_offset = 1,
+	},
+	[TPS65917_SHORT_IRQ] = {
+		.mask = TPS65917_INT2_STATUS_SHORT,
+		.reg_offset = 1,
+	},
+	[TPS65917_RESERVED6] = {
+		.mask = TPS65917_RESERVED,
+		.reg_offset = 1,
+	},
+	/* INT3 IRQs */
+	[TPS65917_GPADC_AUTO_0_IRQ] = {
+		.mask = TPS65917_INT3_STATUS_GPADC_AUTO_0,
+		.reg_offset = 2,
+	},
+	[TPS65917_GPADC_AUTO_1_IRQ] = {
+		.mask = TPS65917_INT3_STATUS_GPADC_AUTO_1,
+		.reg_offset = 2,
+	},
+	[TPS65917_GPADC_EOC_SW_IRQ] = {
+		.mask = TPS65917_INT3_STATUS_GPADC_EOC_SW,
+		.reg_offset = 2,
+	},
+	[TPS65917_RESREVED6] = {
+		.mask = TPS65917_RESERVED6,
+		.reg_offset = 2,
+	},
+	[TPS65917_RESERVED7] = {
+		.mask = TPS65917_RESERVED,
+		.reg_offset = 2,
+	},
+	[TPS65917_RESERVED8] = {
+		.mask = TPS65917_RESERVED,
+		.reg_offset = 2,
+	},
+	[TPS65917_RESERVED9] = {
+		.mask = TPS65917_RESERVED,
+		.reg_offset = 2,
+	},
+	[TPS65917_VBUS_IRQ] = {
+		.mask = TPS65917_INT3_STATUS_VBUS,
+		.reg_offset = 2,
+	},
+	/* INT4 IRQs */
+	[TPS65917_GPIO_0_IRQ] = {
+		.mask = TPS65917_INT4_STATUS_GPIO_0,
+		.reg_offset = 3,
+	},
+	[TPS65917_GPIO_1_IRQ] = {
+		.mask = TPS65917_INT4_STATUS_GPIO_1,
+		.reg_offset = 3,
+	},
+	[TPS65917_GPIO_2_IRQ] = {
+		.mask = TPS65917_INT4_STATUS_GPIO_2,
+		.reg_offset = 3,
+	},
+	[TPS65917_GPIO_3_IRQ] = {
+		.mask = TPS65917_INT4_STATUS_GPIO_3,
+		.reg_offset = 3,
+	},
+	[TPS65917_GPIO_4_IRQ] = {
+		.mask = TPS65917_INT4_STATUS_GPIO_4,
+		.reg_offset = 3,
+	},
+	[TPS65917_GPIO_5_IRQ] = {
+		.mask = TPS65917_INT4_STATUS_GPIO_5,
+		.reg_offset = 3,
+	},
+	[TPS65917_GPIO_6_IRQ] = {
+		.mask = TPS65917_INT4_STATUS_GPIO_6,
+		.reg_offset = 3,
+	},
+	[TPS65917_RESERVED10] = {
+		.mask = TPS65917_RESERVED10,
+		.reg_offset = 3,
+	},
+};
+
 static const struct regmap_irq palmas_irqs[] = {
 	/* INT1 IRQs */
 	[PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = {
@@ -232,6 +359,19 @@ static struct regmap_irq_chip palmas_irq_chip = {
 			PALMAS_INT1_MASK),
 };
 
+static struct regmap_irq_chip tps65917_irq_chip = {
+	.name = "tps65917",
+	.irqs = tps65917_irqs,
+	.num_irqs = ARRAY_SIZE(tps65917_irqs),
+
+	.num_regs = 4,
+	.irq_reg_stride = 5,
+	.status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
+			PALMAS_INT1_STATUS),
+	.mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
+			PALMAS_INT1_MASK),
+};
+
 int palmas_ext_control_req_config(struct palmas *palmas,
 	enum palmas_external_requestor_id id,  int ext_ctrl, bool enable)
 {
@@ -357,14 +497,38 @@ static void palmas_power_off(void)
 static unsigned int palmas_features = PALMAS_PMIC_FEATURE_SMPS10_BOOST;
 static unsigned int tps659038_features;
 
+struct palmas_driver_data {
+	unsigned int *features;
+	struct regmap_irq_chip *irq_chip;
+};
+
+static struct palmas_driver_data palmas_data = {
+	.features = &palmas_features,
+	.irq_chip = &palmas_irq_chip,
+};
+
+static struct palmas_driver_data tps659038_data = {
+	.features = &tps659038_features,
+	.irq_chip = &palmas_irq_chip,
+};
+
+static struct palmas_driver_data tps65917_data = {
+	.features = &tps659038_features,
+	.irq_chip = &tps65917_irq_chip,
+};
+
 static const struct of_device_id of_palmas_match_tbl[] = {
 	{
 		.compatible = "ti,palmas",
-		.data = &palmas_features,
+		.data = &palmas_data,
 	},
 	{
 		.compatible = "ti,tps659038",
-		.data = &tps659038_features,
+		.data = &tps659038_data,
+	},
+	{
+		.compatible = "ti,tps65917",
+		.data = &tps65917_data,
 	},
 	{ },
 };
@@ -375,6 +539,7 @@ static int palmas_i2c_probe(struct i2c_client *i2c,
 {
 	struct palmas *palmas;
 	struct palmas_platform_data *pdata;
+	struct palmas_driver_data *driver_data;
 	struct device_node *node = i2c->dev.of_node;
 	int ret = 0, i;
 	unsigned int reg, addr, *features;
@@ -408,7 +573,8 @@ static int palmas_i2c_probe(struct i2c_client *i2c,
 	if (!match)
 		return -ENODATA;
 
-	features = (unsigned int *)match->data;
+	driver_data = (struct palmas_driver_data *)match->data;
+	features = (unsigned int *)driver_data->features;
 	palmas->features = *features;
 
 	for (i = 0; i < PALMAS_NUM_CLIENTS; i++) {
@@ -463,8 +629,8 @@ static int palmas_i2c_probe(struct i2c_client *i2c,
 	regmap_write(palmas->regmap[slave], addr, reg);
 
 	ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq,
-			IRQF_ONESHOT | pdata->irq_flags, 0, &palmas_irq_chip,
-			&palmas->irq_data);
+				  IRQF_ONESHOT | pdata->irq_flags, 0,
+				  driver_data->irq_chip, &palmas->irq_data);
 	if (ret < 0)
 		goto err_i2c;
 
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH 4/9] mfd: palmas: Add tps65917 support
  2014-05-28 10:20 ` [PATCH 4/9] mfd: palmas: Add tps65917 support Keerthy
@ 2014-06-17 16:19   ` Lee Jones
  2014-06-18  5:06     ` Keerthy
  0 siblings, 1 reply; 26+ messages in thread
From: Lee Jones @ 2014-06-17 16:19 UTC (permalink / raw)
  To: Keerthy; +Cc: linux-omap, lgirdwood, broonie, linux-kernel, sameo

> Add tps65917 PMIC support. tps65917 is a subset of palmas PMIC.
> Some of the register definitions and the interrupt mappings
> are different.
> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
>  drivers/mfd/palmas.c |  176 ++++++++++++++++++++++++++++++++++++++++++++++++--
>  1 file changed, 171 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
> index d280d78..485d755 100644
> --- a/drivers/mfd/palmas.c
> +++ b/drivers/mfd/palmas.c

[...]

> +struct palmas_driver_data {
> +	unsigned int *features;
> +	struct regmap_irq_chip *irq_chip;
> +};
> +
> +static struct palmas_driver_data palmas_data = {
> +	.features = &palmas_features,
> +	.irq_chip = &palmas_irq_chip,
> +};
> +
> +static struct palmas_driver_data tps659038_data = {
> +	.features = &tps659038_features,
> +	.irq_chip = &palmas_irq_chip,
> +};
> +
> +static struct palmas_driver_data tps65917_data = {
> +	.features = &tps659038_features,
> +	.irq_chip = &tps65917_irq_chip,
> +};
> +

[...]

> @@ -375,6 +539,7 @@ static int palmas_i2c_probe(struct i2c_client *i2c,
>  {
>  	struct palmas *palmas;
>  	struct palmas_platform_data *pdata;
> +	struct palmas_driver_data *driver_data;
>  	struct device_node *node = i2c->dev.of_node;
>  	int ret = 0, i;
>  	unsigned int reg, addr, *features;
> @@ -408,7 +573,8 @@ static int palmas_i2c_probe(struct i2c_client *i2c,
>  	if (!match)
>  		return -ENODATA;
>  
> -	features = (unsigned int *)match->data;
> +	driver_data = (struct palmas_driver_data *)match->data;
> +	features = (unsigned int *)driver_data->features;
>  	palmas->features = *features;

Couple of things a) I don't think the cast is required here and b) you
may as well do away with the local features variable here.

Just do:
  palmas->features = *driver_data->features;

Once fixed, re-submit with my:
  Acked-by: Lee Jones <lee.jones@linaro.org>

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH 4/9] mfd: palmas: Add tps65917 support
  2014-06-17 16:19   ` Lee Jones
@ 2014-06-18  5:06     ` Keerthy
  0 siblings, 0 replies; 26+ messages in thread
From: Keerthy @ 2014-06-18  5:06 UTC (permalink / raw)
  To: Lee Jones; +Cc: Keerthy, linux-omap, lgirdwood, broonie, linux-kernel, sameo

On Tuesday 17 June 2014 09:49 PM, Lee Jones wrote:
>> Add tps65917 PMIC support. tps65917 is a subset of palmas PMIC.
>> Some of the register definitions and the interrupt mappings
>> are different.
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>>   drivers/mfd/palmas.c |  176 ++++++++++++++++++++++++++++++++++++++++++++++++--
>>   1 file changed, 171 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
>> index d280d78..485d755 100644
>> --- a/drivers/mfd/palmas.c
>> +++ b/drivers/mfd/palmas.c
> [...]
>
>> +struct palmas_driver_data {
>> +	unsigned int *features;
>> +	struct regmap_irq_chip *irq_chip;
>> +};
>> +
>> +static struct palmas_driver_data palmas_data = {
>> +	.features = &palmas_features,
>> +	.irq_chip = &palmas_irq_chip,
>> +};
>> +
>> +static struct palmas_driver_data tps659038_data = {
>> +	.features = &tps659038_features,
>> +	.irq_chip = &palmas_irq_chip,
>> +};
>> +
>> +static struct palmas_driver_data tps65917_data = {
>> +	.features = &tps659038_features,
>> +	.irq_chip = &tps65917_irq_chip,
>> +};
>> +
> [...]
>
>> @@ -375,6 +539,7 @@ static int palmas_i2c_probe(struct i2c_client *i2c,
>>   {
>>   	struct palmas *palmas;
>>   	struct palmas_platform_data *pdata;
>> +	struct palmas_driver_data *driver_data;
>>   	struct device_node *node = i2c->dev.of_node;
>>   	int ret = 0, i;
>>   	unsigned int reg, addr, *features;
>> @@ -408,7 +573,8 @@ static int palmas_i2c_probe(struct i2c_client *i2c,
>>   	if (!match)
>>   		return -ENODATA;
>>   
>> -	features = (unsigned int *)match->data;
>> +	driver_data = (struct palmas_driver_data *)match->data;
>> +	features = (unsigned int *)driver_data->features;
>>   	palmas->features = *features;
> Couple of things a) I don't think the cast is required here and b) you
> may as well do away with the local features variable here.
>
> Just do:
>    palmas->features = *driver_data->features;
>
> Once fixed, re-submit with my:
>    Acked-by: Lee Jones <lee.jones@linaro.org>

Sure. I will redo and send this set.
Thanks.

>

^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH 5/9] regulator: palmas: Shift the reg_info structure definition to the header file
  2014-05-28 10:20 [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
                   ` (3 preceding siblings ...)
  2014-05-28 10:20 ` [PATCH 4/9] mfd: palmas: Add tps65917 support Keerthy
@ 2014-05-28 10:20 ` Keerthy
  2014-06-17 16:32   ` Lee Jones
  2014-05-28 10:20 ` [PATCH 6/9] mfd: palmas: shift the palmas_sleep_requestor_info " Keerthy
                   ` (4 subsequent siblings)
  9 siblings, 1 reply; 26+ messages in thread
From: Keerthy @ 2014-05-28 10:20 UTC (permalink / raw)
  To: linux-omap; +Cc: lgirdwood, broonie, linux-kernel, sameo, lee.jones, Keerthy

Shift the reg_info structure definition to the header file.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 drivers/regulator/palmas-regulator.c |    9 ---------
 include/linux/mfd/palmas.h           |    9 +++++++++
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/regulator/palmas-regulator.c b/drivers/regulator/palmas-regulator.c
index 9602eba..d41f3de 100644
--- a/drivers/regulator/palmas-regulator.c
+++ b/drivers/regulator/palmas-regulator.c
@@ -27,15 +27,6 @@
 #include <linux/of_platform.h>
 #include <linux/regulator/of_regulator.h>
 
-struct regs_info {
-	char	*name;
-	char	*sname;
-	u8	vsel_addr;
-	u8	ctrl_addr;
-	u8	tstep_addr;
-	int	sleep_id;
-};
-
 static const struct regulator_linear_range smps_low_ranges[] = {
 	REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
 	REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
index 52a24a9..150a6314 100644
--- a/include/linux/mfd/palmas.h
+++ b/include/linux/mfd/palmas.h
@@ -88,6 +88,15 @@ struct palmas {
 	u8 pwm_muxed;
 };
 
+struct regs_info {
+	char	*name;
+	char	*sname;
+	u8	vsel_addr;
+	u8	ctrl_addr;
+	u8	tstep_addr;
+	int	sleep_id;
+};
+
 struct palmas_gpadc_platform_data {
 	/* Channel 3 current source is only enabled during conversion */
 	int ch3_current;
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH 5/9] regulator: palmas: Shift the reg_info structure definition to the header file
  2014-05-28 10:20 ` [PATCH 5/9] regulator: palmas: Shift the reg_info structure definition to the header file Keerthy
@ 2014-06-17 16:32   ` Lee Jones
  2014-06-18  5:05     ` Keerthy
  0 siblings, 1 reply; 26+ messages in thread
From: Lee Jones @ 2014-06-17 16:32 UTC (permalink / raw)
  To: Keerthy; +Cc: linux-omap, lgirdwood, broonie, linux-kernel, sameo

On Wed, 28 May 2014, Keerthy wrote:

> Shift the reg_info structure definition to the header file.
> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
>  drivers/regulator/palmas-regulator.c |    9 ---------
>  include/linux/mfd/palmas.h           |    9 +++++++++
>  2 files changed, 9 insertions(+), 9 deletions(-)

Patch looks fine.  I guess we'll wait and pull the entire set in once
it's ready.

Acked-by: Lee Jones <lee.jones@linaro.org>

> diff --git a/drivers/regulator/palmas-regulator.c b/drivers/regulator/palmas-regulator.c
> index 9602eba..d41f3de 100644
> --- a/drivers/regulator/palmas-regulator.c
> +++ b/drivers/regulator/palmas-regulator.c
> @@ -27,15 +27,6 @@
>  #include <linux/of_platform.h>
>  #include <linux/regulator/of_regulator.h>
>  
> -struct regs_info {
> -	char	*name;
> -	char	*sname;
> -	u8	vsel_addr;
> -	u8	ctrl_addr;
> -	u8	tstep_addr;
> -	int	sleep_id;
> -};
> -
>  static const struct regulator_linear_range smps_low_ranges[] = {
>  	REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
>  	REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
> diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
> index 52a24a9..150a6314 100644
> --- a/include/linux/mfd/palmas.h
> +++ b/include/linux/mfd/palmas.h
> @@ -88,6 +88,15 @@ struct palmas {
>  	u8 pwm_muxed;
>  };
>  
> +struct regs_info {
> +	char	*name;
> +	char	*sname;
> +	u8	vsel_addr;
> +	u8	ctrl_addr;
> +	u8	tstep_addr;
> +	int	sleep_id;
> +};
> +
>  struct palmas_gpadc_platform_data {
>  	/* Channel 3 current source is only enabled during conversion */
>  	int ch3_current;

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH 5/9] regulator: palmas: Shift the reg_info structure definition to the header file
  2014-06-17 16:32   ` Lee Jones
@ 2014-06-18  5:05     ` Keerthy
  0 siblings, 0 replies; 26+ messages in thread
From: Keerthy @ 2014-06-18  5:05 UTC (permalink / raw)
  To: Lee Jones; +Cc: Keerthy, linux-omap, lgirdwood, broonie, linux-kernel, sameo

On Tuesday 17 June 2014 10:02 PM, Lee Jones wrote:
> On Wed, 28 May 2014, Keerthy wrote:
>
>> Shift the reg_info structure definition to the header file.
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>>   drivers/regulator/palmas-regulator.c |    9 ---------
>>   include/linux/mfd/palmas.h           |    9 +++++++++
>>   2 files changed, 9 insertions(+), 9 deletions(-)
> Patch looks fine.  I guess we'll wait and pull the entire set in once
> it's ready.
>
> Acked-by: Lee Jones <lee.jones@linaro.org>

Thanks.

>
>> diff --git a/drivers/regulator/palmas-regulator.c b/drivers/regulator/palmas-regulator.c
>> index 9602eba..d41f3de 100644
>> --- a/drivers/regulator/palmas-regulator.c
>> +++ b/drivers/regulator/palmas-regulator.c
>> @@ -27,15 +27,6 @@
>>   #include <linux/of_platform.h>
>>   #include <linux/regulator/of_regulator.h>
>>   
>> -struct regs_info {
>> -	char	*name;
>> -	char	*sname;
>> -	u8	vsel_addr;
>> -	u8	ctrl_addr;
>> -	u8	tstep_addr;
>> -	int	sleep_id;
>> -};
>> -
>>   static const struct regulator_linear_range smps_low_ranges[] = {
>>   	REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
>>   	REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
>> diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
>> index 52a24a9..150a6314 100644
>> --- a/include/linux/mfd/palmas.h
>> +++ b/include/linux/mfd/palmas.h
>> @@ -88,6 +88,15 @@ struct palmas {
>>   	u8 pwm_muxed;
>>   };
>>   
>> +struct regs_info {
>> +	char	*name;
>> +	char	*sname;
>> +	u8	vsel_addr;
>> +	u8	ctrl_addr;
>> +	u8	tstep_addr;
>> +	int	sleep_id;
>> +};
>> +
>>   struct palmas_gpadc_platform_data {
>>   	/* Channel 3 current source is only enabled during conversion */
>>   	int ch3_current;

^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH 6/9] mfd: palmas: shift the palmas_sleep_requestor_info structure definition to the header file
  2014-05-28 10:20 [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
                   ` (4 preceding siblings ...)
  2014-05-28 10:20 ` [PATCH 5/9] regulator: palmas: Shift the reg_info structure definition to the header file Keerthy
@ 2014-05-28 10:20 ` Keerthy
  2014-06-17 16:33   ` Lee Jones
  2014-05-28 10:20 ` [PATCH 7/9] regulator: palmas: Add palmas_pmic_driver_data structure Keerthy
                   ` (3 subsequent siblings)
  9 siblings, 1 reply; 26+ messages in thread
From: Keerthy @ 2014-05-28 10:20 UTC (permalink / raw)
  To: linux-omap; +Cc: lgirdwood, broonie, linux-kernel, sameo, lee.jones, Keerthy

shift the palmas_sleep_requestor_info structure definition to the header file.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 drivers/mfd/palmas.c       |   10 ----------
 include/linux/mfd/palmas.h |   10 ++++++++++
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
index 485d755..f1f31d5 100644
--- a/drivers/mfd/palmas.c
+++ b/drivers/mfd/palmas.c
@@ -25,16 +25,6 @@
 #include <linux/mfd/palmas.h>
 #include <linux/of_device.h>
 
-#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 |	\
-			PALMAS_EXT_CONTROL_ENABLE2 |	\
-			PALMAS_EXT_CONTROL_NSLEEP)
-
-struct palmas_sleep_requestor_info {
-	int id;
-	int reg_offset;
-	int bit_pos;
-};
-
 #define EXTERNAL_REQUESTOR(_id, _offset, _pos)		\
 	[PALMAS_EXTERNAL_REQSTR_ID_##_id] = {		\
 		.id = PALMAS_EXTERNAL_REQSTR_ID_##_id,	\
diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
index 150a6314..8d68452 100644
--- a/include/linux/mfd/palmas.h
+++ b/include/linux/mfd/palmas.h
@@ -88,6 +88,16 @@ struct palmas {
 	u8 pwm_muxed;
 };
 
+#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 |	\
+			PALMAS_EXT_CONTROL_ENABLE2 |	\
+			PALMAS_EXT_CONTROL_NSLEEP)
+
+struct palmas_sleep_requestor_info {
+	int id;
+	int reg_offset;
+	int bit_pos;
+};
+
 struct regs_info {
 	char	*name;
 	char	*sname;
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH 6/9] mfd: palmas: shift the palmas_sleep_requestor_info structure definition to the header file
  2014-05-28 10:20 ` [PATCH 6/9] mfd: palmas: shift the palmas_sleep_requestor_info " Keerthy
@ 2014-06-17 16:33   ` Lee Jones
  2014-06-18  5:04     ` Keerthy
  0 siblings, 1 reply; 26+ messages in thread
From: Lee Jones @ 2014-06-17 16:33 UTC (permalink / raw)
  To: Keerthy; +Cc: linux-omap, lgirdwood, broonie, linux-kernel, sameo

On Wed, 28 May 2014, Keerthy wrote:

> shift the palmas_sleep_requestor_info structure definition to the header file.
> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
>  drivers/mfd/palmas.c       |   10 ----------
>  include/linux/mfd/palmas.h |   10 ++++++++++
>  2 files changed, 10 insertions(+), 10 deletions(-)

Acked-by: Lee Jones <lee.jones@linaro.org>

> diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
> index 485d755..f1f31d5 100644
> --- a/drivers/mfd/palmas.c
> +++ b/drivers/mfd/palmas.c
> @@ -25,16 +25,6 @@
>  #include <linux/mfd/palmas.h>
>  #include <linux/of_device.h>
>  
> -#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 |	\
> -			PALMAS_EXT_CONTROL_ENABLE2 |	\
> -			PALMAS_EXT_CONTROL_NSLEEP)
> -
> -struct palmas_sleep_requestor_info {
> -	int id;
> -	int reg_offset;
> -	int bit_pos;
> -};
> -
>  #define EXTERNAL_REQUESTOR(_id, _offset, _pos)		\
>  	[PALMAS_EXTERNAL_REQSTR_ID_##_id] = {		\
>  		.id = PALMAS_EXTERNAL_REQSTR_ID_##_id,	\
> diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
> index 150a6314..8d68452 100644
> --- a/include/linux/mfd/palmas.h
> +++ b/include/linux/mfd/palmas.h
> @@ -88,6 +88,16 @@ struct palmas {
>  	u8 pwm_muxed;
>  };
>  
> +#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 |	\
> +			PALMAS_EXT_CONTROL_ENABLE2 |	\
> +			PALMAS_EXT_CONTROL_NSLEEP)
> +
> +struct palmas_sleep_requestor_info {
> +	int id;
> +	int reg_offset;
> +	int bit_pos;
> +};
> +
>  struct regs_info {
>  	char	*name;
>  	char	*sname;

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH 6/9] mfd: palmas: shift the palmas_sleep_requestor_info structure definition to the header file
  2014-06-17 16:33   ` Lee Jones
@ 2014-06-18  5:04     ` Keerthy
  0 siblings, 0 replies; 26+ messages in thread
From: Keerthy @ 2014-06-18  5:04 UTC (permalink / raw)
  To: Lee Jones; +Cc: Keerthy, linux-omap, lgirdwood, broonie, linux-kernel, sameo

On Tuesday 17 June 2014 10:03 PM, Lee Jones wrote:
> On Wed, 28 May 2014, Keerthy wrote:
>
>> shift the palmas_sleep_requestor_info structure definition to the header file.
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>>   drivers/mfd/palmas.c       |   10 ----------
>>   include/linux/mfd/palmas.h |   10 ++++++++++
>>   2 files changed, 10 insertions(+), 10 deletions(-)
> Acked-by: Lee Jones <lee.jones@linaro.org>

Thanks.

>
>> diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
>> index 485d755..f1f31d5 100644
>> --- a/drivers/mfd/palmas.c
>> +++ b/drivers/mfd/palmas.c
>> @@ -25,16 +25,6 @@
>>   #include <linux/mfd/palmas.h>
>>   #include <linux/of_device.h>
>>   
>> -#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 |	\
>> -			PALMAS_EXT_CONTROL_ENABLE2 |	\
>> -			PALMAS_EXT_CONTROL_NSLEEP)
>> -
>> -struct palmas_sleep_requestor_info {
>> -	int id;
>> -	int reg_offset;
>> -	int bit_pos;
>> -};
>> -
>>   #define EXTERNAL_REQUESTOR(_id, _offset, _pos)		\
>>   	[PALMAS_EXTERNAL_REQSTR_ID_##_id] = {		\
>>   		.id = PALMAS_EXTERNAL_REQSTR_ID_##_id,	\
>> diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
>> index 150a6314..8d68452 100644
>> --- a/include/linux/mfd/palmas.h
>> +++ b/include/linux/mfd/palmas.h
>> @@ -88,6 +88,16 @@ struct palmas {
>>   	u8 pwm_muxed;
>>   };
>>   
>> +#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 |	\
>> +			PALMAS_EXT_CONTROL_ENABLE2 |	\
>> +			PALMAS_EXT_CONTROL_NSLEEP)
>> +
>> +struct palmas_sleep_requestor_info {
>> +	int id;
>> +	int reg_offset;
>> +	int bit_pos;
>> +};
>> +
>>   struct regs_info {
>>   	char	*name;
>>   	char	*sname;

^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH 7/9] regulator: palmas: Add palmas_pmic_driver_data structure
  2014-05-28 10:20 [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
                   ` (5 preceding siblings ...)
  2014-05-28 10:20 ` [PATCH 6/9] mfd: palmas: shift the palmas_sleep_requestor_info " Keerthy
@ 2014-05-28 10:20 ` Keerthy
  2014-06-17 16:37   ` Lee Jones
  2014-05-28 10:20 ` [PATCH 8/9] regulator: palmas: add driver data and modularize the probe Keerthy
                   ` (2 subsequent siblings)
  9 siblings, 1 reply; 26+ messages in thread
From: Keerthy @ 2014-05-28 10:20 UTC (permalink / raw)
  To: linux-omap; +Cc: lgirdwood, broonie, linux-kernel, sameo, lee.jones, Keerthy

Add palmas_pmic_driver_data structure.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 include/linux/mfd/palmas.h |   25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
index 8d68452..70f0695 100644
--- a/include/linux/mfd/palmas.h
+++ b/include/linux/mfd/palmas.h
@@ -53,6 +53,8 @@ struct palmas_pmic;
 struct palmas_gpadc;
 struct palmas_resource;
 struct palmas_usb;
+struct palmas_pmic_driver_data;
+struct palmas_pmic_platform_data;
 
 enum palmas_usb_state {
 	PALMAS_USB_STATE_DISCONNECT,
@@ -76,6 +78,8 @@ struct palmas {
 	struct mutex irq_lock;
 	struct regmap_irq_chip_data *irq_data;
 
+	struct palmas_pmic_driver_data *pmic_ddata;
+
 	/* Child Devices */
 	struct palmas_pmic *pmic;
 	struct palmas_gpadc *gpadc;
@@ -107,6 +111,27 @@ struct regs_info {
 	int	sleep_id;
 };
 
+struct palmas_pmic_driver_data {
+	int smps_start;
+	int smps_end;
+	int ldo_begin;
+	int ldo_end;
+	int max_reg;
+	struct regs_info *palmas_regs_info;
+	struct of_regulator_match *palmas_matches;
+	struct palmas_sleep_requestor_info *sleep_req_info;
+	int (*smps_register)(struct palmas_pmic *pmic,
+			     struct palmas_pmic_driver_data *ddata,
+			     struct palmas_pmic_platform_data *pdata,
+			     const char *pdev_name,
+			     struct regulator_config config);
+	int (*ldo_register)(struct palmas_pmic *pmic,
+			    struct palmas_pmic_driver_data *ddata,
+			    struct palmas_pmic_platform_data *pdata,
+			    const char *pdev_name,
+			    struct regulator_config config);
+};
+
 struct palmas_gpadc_platform_data {
 	/* Channel 3 current source is only enabled during conversion */
 	int ch3_current;
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH 7/9] regulator: palmas: Add palmas_pmic_driver_data structure
  2014-05-28 10:20 ` [PATCH 7/9] regulator: palmas: Add palmas_pmic_driver_data structure Keerthy
@ 2014-06-17 16:37   ` Lee Jones
  2014-06-18  5:01     ` Keerthy
  0 siblings, 1 reply; 26+ messages in thread
From: Lee Jones @ 2014-06-17 16:37 UTC (permalink / raw)
  To: Keerthy; +Cc: linux-omap, lgirdwood, broonie, linux-kernel, sameo

On Wed, 28 May 2014, Keerthy wrote:

> Add palmas_pmic_driver_data structure.
> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
>  include/linux/mfd/palmas.h |   25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
> index 8d68452..70f0695 100644
> --- a/include/linux/mfd/palmas.h
> +++ b/include/linux/mfd/palmas.h
> @@ -53,6 +53,8 @@ struct palmas_pmic;
>  struct palmas_gpadc;
>  struct palmas_resource;
>  struct palmas_usb;
> +struct palmas_pmic_driver_data;
> +struct palmas_pmic_platform_data;
>  
>  enum palmas_usb_state {
>  	PALMAS_USB_STATE_DISCONNECT,
> @@ -76,6 +78,8 @@ struct palmas {
>  	struct mutex irq_lock;
>  	struct regmap_irq_chip_data *irq_data;
>  
> +	struct palmas_pmic_driver_data *pmic_ddata;
> +
>  	/* Child Devices */
>  	struct palmas_pmic *pmic;
>  	struct palmas_gpadc *gpadc;
> @@ -107,6 +111,27 @@ struct regs_info {
>  	int	sleep_id;
>  };
>  
> +struct palmas_pmic_driver_data {
> +	int smps_start;
> +	int smps_end;
> +	int ldo_begin;
> +	int ldo_end;
> +	int max_reg;
> +	struct regs_info *palmas_regs_info;
> +	struct of_regulator_match *palmas_matches;
> +	struct palmas_sleep_requestor_info *sleep_req_info;
> +	int (*smps_register)(struct palmas_pmic *pmic,
> +			     struct palmas_pmic_driver_data *ddata,
> +			     struct palmas_pmic_platform_data *pdata,
> +			     const char *pdev_name,
> +			     struct regulator_config config);
> +	int (*ldo_register)(struct palmas_pmic *pmic,
> +			    struct palmas_pmic_driver_data *ddata,
> +			    struct palmas_pmic_platform_data *pdata,
> +			    const char *pdev_name,
> +			    struct regulator_config config);

Are you sure you need to store all of this stuff?

Particularly the match pointer.  Do you really re-use it?

> +};
> +
>  struct palmas_gpadc_platform_data {
>  	/* Channel 3 current source is only enabled during conversion */
>  	int ch3_current;

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH 7/9] regulator: palmas: Add palmas_pmic_driver_data structure
  2014-06-17 16:37   ` Lee Jones
@ 2014-06-18  5:01     ` Keerthy
  2014-06-18  7:24       ` Lee Jones
  0 siblings, 1 reply; 26+ messages in thread
From: Keerthy @ 2014-06-18  5:01 UTC (permalink / raw)
  To: Lee Jones; +Cc: Keerthy, linux-omap, lgirdwood, broonie, linux-kernel, sameo

On Tuesday 17 June 2014 10:07 PM, Lee Jones wrote:
> On Wed, 28 May 2014, Keerthy wrote:
>
>> Add palmas_pmic_driver_data structure.
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>>   include/linux/mfd/palmas.h |   25 +++++++++++++++++++++++++
>>   1 file changed, 25 insertions(+)
>>
>> diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
>> index 8d68452..70f0695 100644
>> --- a/include/linux/mfd/palmas.h
>> +++ b/include/linux/mfd/palmas.h
>> @@ -53,6 +53,8 @@ struct palmas_pmic;
>>   struct palmas_gpadc;
>>   struct palmas_resource;
>>   struct palmas_usb;
>> +struct palmas_pmic_driver_data;
>> +struct palmas_pmic_platform_data;
>>   
>>   enum palmas_usb_state {
>>   	PALMAS_USB_STATE_DISCONNECT,
>> @@ -76,6 +78,8 @@ struct palmas {
>>   	struct mutex irq_lock;
>>   	struct regmap_irq_chip_data *irq_data;
>>   
>> +	struct palmas_pmic_driver_data *pmic_ddata;
>> +
>>   	/* Child Devices */
>>   	struct palmas_pmic *pmic;
>>   	struct palmas_gpadc *gpadc;
>> @@ -107,6 +111,27 @@ struct regs_info {
>>   	int	sleep_id;
>>   };
>>   
>> +struct palmas_pmic_driver_data {
>> +	int smps_start;
>> +	int smps_end;
>> +	int ldo_begin;
>> +	int ldo_end;
>> +	int max_reg;
>> +	struct regs_info *palmas_regs_info;
>> +	struct of_regulator_match *palmas_matches;
>> +	struct palmas_sleep_requestor_info *sleep_req_info;
>> +	int (*smps_register)(struct palmas_pmic *pmic,
>> +			     struct palmas_pmic_driver_data *ddata,
>> +			     struct palmas_pmic_platform_data *pdata,
>> +			     const char *pdev_name,
>> +			     struct regulator_config config);
>> +	int (*ldo_register)(struct palmas_pmic *pmic,
>> +			    struct palmas_pmic_driver_data *ddata,
>> +			    struct palmas_pmic_platform_data *pdata,
>> +			    const char *pdev_name,
>> +			    struct regulator_config config);
> Are you sure you need to store all of this stuff?
>
> Particularly the match pointer.  Do you really re-use it?

Match pointer is used extensively in the palmas_regulator.c.
This structure is very much used by regulator driver.

>
>> +};
>> +
>>   struct palmas_gpadc_platform_data {
>>   	/* Channel 3 current source is only enabled during conversion */
>>   	int ch3_current;


^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH 7/9] regulator: palmas: Add palmas_pmic_driver_data structure
  2014-06-18  5:01     ` Keerthy
@ 2014-06-18  7:24       ` Lee Jones
  0 siblings, 0 replies; 26+ messages in thread
From: Lee Jones @ 2014-06-18  7:24 UTC (permalink / raw)
  To: Keerthy; +Cc: Keerthy, linux-omap, lgirdwood, broonie, linux-kernel, sameo

> >>Add palmas_pmic_driver_data structure.
> >>
> >>Signed-off-by: Keerthy <j-keerthy@ti.com>
> >>---
> >>  include/linux/mfd/palmas.h |   25 +++++++++++++++++++++++++
> >>  1 file changed, 25 insertions(+)
> >>
> >>diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
> >>index 8d68452..70f0695 100644
> >>--- a/include/linux/mfd/palmas.h
> >>+++ b/include/linux/mfd/palmas.h
[...]

> >>+struct palmas_pmic_driver_data {
> >>+	int smps_start;
> >>+	int smps_end;
> >>+	int ldo_begin;
> >>+	int ldo_end;
> >>+	int max_reg;
> >>+	struct regs_info *palmas_regs_info;
> >>+	struct of_regulator_match *palmas_matches;
> >>+	struct palmas_sleep_requestor_info *sleep_req_info;
> >>+	int (*smps_register)(struct palmas_pmic *pmic,
> >>+			     struct palmas_pmic_driver_data *ddata,
> >>+			     struct palmas_pmic_platform_data *pdata,
> >>+			     const char *pdev_name,
> >>+			     struct regulator_config config);
> >>+	int (*ldo_register)(struct palmas_pmic *pmic,
> >>+			    struct palmas_pmic_driver_data *ddata,
> >>+			    struct palmas_pmic_platform_data *pdata,
> >>+			    const char *pdev_name,
> >>+			    struct regulator_config config);
> >Are you sure you need to store all of this stuff?
> >
> >Particularly the match pointer.  Do you really re-use it?
> 
> Match pointer is used extensively in the palmas_regulator.c.
> This structure is very much used by regulator driver.

On closer inspection, I now see that it's a 'of_regulator_match',
rather than an 'of_match' pointer, which were my initial thoughts.  I
think it would have been weird to carry the 'of_match', but the
reality sounds sane.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH 8/9] regulator: palmas: add driver data and modularize the probe
  2014-05-28 10:20 [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
                   ` (6 preceding siblings ...)
  2014-05-28 10:20 ` [PATCH 7/9] regulator: palmas: Add palmas_pmic_driver_data structure Keerthy
@ 2014-05-28 10:20 ` Keerthy
  2014-06-17 16:45   ` Lee Jones
  2014-05-28 10:20 ` [PATCH 9/9] regulator: palmas: Add tps65917 PMIC support Keerthy
  2014-06-06 10:59 ` [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
  9 siblings, 1 reply; 26+ messages in thread
From: Keerthy @ 2014-05-28 10:20 UTC (permalink / raw)
  To: linux-omap; +Cc: lgirdwood, broonie, linux-kernel, sameo, lee.jones, Keerthy

add driver data and modularize the probe.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 drivers/mfd/palmas.c                 |   42 +--
 drivers/regulator/palmas-regulator.c |  656 ++++++++++++++++++++--------------
 2 files changed, 395 insertions(+), 303 deletions(-)

diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
index f1f31d5..d9a6051 100644
--- a/drivers/mfd/palmas.c
+++ b/drivers/mfd/palmas.c
@@ -25,42 +25,6 @@
 #include <linux/mfd/palmas.h>
 #include <linux/of_device.h>
 
-#define EXTERNAL_REQUESTOR(_id, _offset, _pos)		\
-	[PALMAS_EXTERNAL_REQSTR_ID_##_id] = {		\
-		.id = PALMAS_EXTERNAL_REQSTR_ID_##_id,	\
-		.reg_offset = _offset,			\
-		.bit_pos = _pos,			\
-	}
-
-static struct palmas_sleep_requestor_info sleep_req_info[] = {
-	EXTERNAL_REQUESTOR(REGEN1, 0, 0),
-	EXTERNAL_REQUESTOR(REGEN2, 0, 1),
-	EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
-	EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
-	EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
-	EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
-	EXTERNAL_REQUESTOR(REGEN3, 0, 6),
-	EXTERNAL_REQUESTOR(SMPS12, 1, 0),
-	EXTERNAL_REQUESTOR(SMPS3, 1, 1),
-	EXTERNAL_REQUESTOR(SMPS45, 1, 2),
-	EXTERNAL_REQUESTOR(SMPS6, 1, 3),
-	EXTERNAL_REQUESTOR(SMPS7, 1, 4),
-	EXTERNAL_REQUESTOR(SMPS8, 1, 5),
-	EXTERNAL_REQUESTOR(SMPS9, 1, 6),
-	EXTERNAL_REQUESTOR(SMPS10, 1, 7),
-	EXTERNAL_REQUESTOR(LDO1, 2, 0),
-	EXTERNAL_REQUESTOR(LDO2, 2, 1),
-	EXTERNAL_REQUESTOR(LDO3, 2, 2),
-	EXTERNAL_REQUESTOR(LDO4, 2, 3),
-	EXTERNAL_REQUESTOR(LDO5, 2, 4),
-	EXTERNAL_REQUESTOR(LDO6, 2, 5),
-	EXTERNAL_REQUESTOR(LDO7, 2, 6),
-	EXTERNAL_REQUESTOR(LDO8, 2, 7),
-	EXTERNAL_REQUESTOR(LDO9, 3, 0),
-	EXTERNAL_REQUESTOR(LDOLN, 3, 1),
-	EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
-};
-
 static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {
 	{
 		.reg_bits = 8,
@@ -370,6 +334,8 @@ int palmas_ext_control_req_config(struct palmas *palmas,
 	int bit_pos;
 	int ret;
 
+	struct palmas_pmic_driver_data *pmic_ddata = palmas->pmic_ddata;
+
 	if (!(ext_ctrl & PALMAS_EXT_REQ))
 		return 0;
 
@@ -387,8 +353,8 @@ int palmas_ext_control_req_config(struct palmas *palmas,
 		preq_mask_bit = 2;
 	}
 
-	bit_pos = sleep_req_info[id].bit_pos;
-	reg_add += sleep_req_info[id].reg_offset;
+	bit_pos = pmic_ddata->sleep_req_info[id].bit_pos;
+	reg_add += pmic_ddata->sleep_req_info[id].reg_offset;
 	if (enable)
 		ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
 				reg_add, BIT(bit_pos), BIT(bit_pos));
diff --git a/drivers/regulator/palmas-regulator.c b/drivers/regulator/palmas-regulator.c
index d41f3de..94c9863 100644
--- a/drivers/regulator/palmas-regulator.c
+++ b/drivers/regulator/palmas-regulator.c
@@ -39,7 +39,7 @@ static const struct regulator_linear_range smps_high_ranges[] = {
 	REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
 };
 
-static const struct regs_info palmas_regs_info[] = {
+static struct regs_info palmas_regs_info[] = {
 	{
 		.name		= "SMPS12",
 		.sname		= "smps1-in",
@@ -225,6 +225,42 @@ static const struct regs_info palmas_regs_info[] = {
 	},
 };
 
+#define EXTERNAL_REQUESTOR(_id, _offset, _pos)		\
+	[PALMAS_EXTERNAL_REQSTR_ID_##_id] = {		\
+		.id = PALMAS_EXTERNAL_REQSTR_ID_##_id,	\
+		.reg_offset = _offset,			\
+		.bit_pos = _pos,			\
+	}
+
+struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
+	EXTERNAL_REQUESTOR(REGEN1, 0, 0),
+	EXTERNAL_REQUESTOR(REGEN2, 0, 1),
+	EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
+	EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
+	EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
+	EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
+	EXTERNAL_REQUESTOR(REGEN3, 0, 6),
+	EXTERNAL_REQUESTOR(SMPS12, 1, 0),
+	EXTERNAL_REQUESTOR(SMPS3, 1, 1),
+	EXTERNAL_REQUESTOR(SMPS45, 1, 2),
+	EXTERNAL_REQUESTOR(SMPS6, 1, 3),
+	EXTERNAL_REQUESTOR(SMPS7, 1, 4),
+	EXTERNAL_REQUESTOR(SMPS8, 1, 5),
+	EXTERNAL_REQUESTOR(SMPS9, 1, 6),
+	EXTERNAL_REQUESTOR(SMPS10, 1, 7),
+	EXTERNAL_REQUESTOR(LDO1, 2, 0),
+	EXTERNAL_REQUESTOR(LDO2, 2, 1),
+	EXTERNAL_REQUESTOR(LDO3, 2, 2),
+	EXTERNAL_REQUESTOR(LDO4, 2, 3),
+	EXTERNAL_REQUESTOR(LDO5, 2, 4),
+	EXTERNAL_REQUESTOR(LDO6, 2, 5),
+	EXTERNAL_REQUESTOR(LDO7, 2, 6),
+	EXTERNAL_REQUESTOR(LDO8, 2, 7),
+	EXTERNAL_REQUESTOR(LDO9, 3, 0),
+	EXTERNAL_REQUESTOR(LDOLN, 3, 1),
+	EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
+};
+
 static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
 
 #define SMPS_CTRL_MODE_OFF		0x00
@@ -286,11 +322,14 @@ static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
 static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
 {
 	struct palmas_pmic *pmic = rdev_get_drvdata(dev);
+	struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
 	int id = rdev_get_id(dev);
 	unsigned int reg;
 	bool rail_enable = true;
 
-	palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
+	palmas_smps_read(pmic->palmas, ddata->palmas_regs_info[id].ctrl_addr,
+			 &reg);
+
 	reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
 
 	if (reg == SMPS_CTRL_MODE_OFF)
@@ -313,7 +352,7 @@ static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
 	pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
 	if (rail_enable)
 		palmas_smps_write(pmic->palmas,
-			palmas_regs_info[id].ctrl_addr, reg);
+				  ddata->palmas_regs_info[id].ctrl_addr, reg);
 	return 0;
 }
 
@@ -341,9 +380,10 @@ static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
 		 int ramp_delay)
 {
 	struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
+	struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
 	int id = rdev_get_id(rdev);
 	unsigned int reg = 0;
-	unsigned int addr = palmas_regs_info[id].tstep_addr;
+	unsigned int addr = ddata->palmas_regs_info[id].tstep_addr;
 	int ret;
 
 	/* SMPS3 and SMPS7 do not have tstep_addr setting */
@@ -412,10 +452,12 @@ static struct regulator_ops palmas_ops_smps10 = {
 static int palmas_is_enabled_ldo(struct regulator_dev *dev)
 {
 	struct palmas_pmic *pmic = rdev_get_drvdata(dev);
+	struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
 	int id = rdev_get_id(dev);
 	unsigned int reg;
 
-	palmas_ldo_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
+	palmas_ldo_read(pmic->palmas,
+			ddata->palmas_regs_info[id].ctrl_addr, &reg);
 
 	reg &= PALMAS_LDO1_CTRL_STATUS;
 
@@ -476,7 +518,9 @@ static int palmas_smps_init(struct palmas *palmas, int id,
 	unsigned int addr;
 	int ret;
 
-	addr = palmas_regs_info[id].ctrl_addr;
+	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
+
+	addr = ddata->palmas_regs_info[id].ctrl_addr;
 
 	ret = palmas_smps_read(palmas, addr, &reg);
 	if (ret)
@@ -511,8 +555,8 @@ static int palmas_smps_init(struct palmas *palmas, int id,
 	if (ret)
 		return ret;
 
-	if (palmas_regs_info[id].vsel_addr && reg_init->vsel) {
-		addr = palmas_regs_info[id].vsel_addr;
+	if (ddata->palmas_regs_info[id].vsel_addr && reg_init->vsel) {
+		addr = ddata->palmas_regs_info[id].vsel_addr;
 
 		reg = reg_init->vsel;
 
@@ -524,7 +568,7 @@ static int palmas_smps_init(struct palmas *palmas, int id,
 	if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
 			(id != PALMAS_REG_SMPS10_OUT2)) {
 		/* Enable externally controlled regulator */
-		addr = palmas_regs_info[id].ctrl_addr;
+		addr = ddata->palmas_regs_info[id].ctrl_addr;
 		ret = palmas_smps_read(palmas, addr, &reg);
 		if (ret < 0)
 			return ret;
@@ -547,7 +591,9 @@ static int palmas_ldo_init(struct palmas *palmas, int id,
 	unsigned int addr;
 	int ret;
 
-	addr = palmas_regs_info[id].ctrl_addr;
+	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
+
+	addr = ddata->palmas_regs_info[id].ctrl_addr;
 
 	ret = palmas_ldo_read(palmas, addr, &reg);
 	if (ret)
@@ -569,7 +615,7 @@ static int palmas_ldo_init(struct palmas *palmas, int id,
 
 	if (reg_init->roof_floor) {
 		/* Enable externally controlled regulator */
-		addr = palmas_regs_info[id].ctrl_addr;
+		addr = ddata->palmas_regs_info[id].ctrl_addr;
 		ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
 				addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
 				PALMAS_LDO1_CTRL_MODE_ACTIVE);
@@ -591,7 +637,9 @@ static int palmas_extreg_init(struct palmas *palmas, int id,
 	int ret;
 	unsigned int val = 0;
 
-	addr = palmas_regs_info[id].ctrl_addr;
+	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
+
+	addr = ddata->palmas_regs_info[id].ctrl_addr;
 
 	if (reg_init->mode_sleep)
 		val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
@@ -606,7 +654,7 @@ static int palmas_extreg_init(struct palmas *palmas, int id,
 
 	if (reg_init->roof_floor) {
 		/* Enable externally controlled regulator */
-		addr = palmas_regs_info[id].ctrl_addr;
+		addr = ddata->palmas_regs_info[id].ctrl_addr;
 		ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
 				addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
 				PALMAS_REGEN1_CTRL_MODE_ACTIVE);
@@ -627,7 +675,9 @@ static void palmas_enable_ldo8_track(struct palmas *palmas)
 	unsigned int addr;
 	int ret;
 
-	addr = palmas_regs_info[PALMAS_REG_LDO8].ctrl_addr;
+	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
+
+	addr = ddata->palmas_regs_info[PALMAS_REG_LDO8].ctrl_addr;
 
 	ret = palmas_ldo_read(palmas, addr, &reg);
 	if (ret) {
@@ -646,7 +696,7 @@ static void palmas_enable_ldo8_track(struct palmas *palmas)
 	 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
 	 * and can be set from 0.45 to 1.65 V.
 	 */
-	addr = palmas_regs_info[PALMAS_REG_LDO8].vsel_addr;
+	addr = ddata->palmas_regs_info[PALMAS_REG_LDO8].vsel_addr;
 	ret = palmas_ldo_read(palmas, addr, &reg);
 	if (ret) {
 		dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
@@ -661,169 +711,131 @@ static void palmas_enable_ldo8_track(struct palmas *palmas)
 	return;
 }
 
-static struct of_regulator_match palmas_matches[] = {
-	{ .name = "smps12", },
-	{ .name = "smps123", },
-	{ .name = "smps3", },
-	{ .name = "smps45", },
-	{ .name = "smps457", },
-	{ .name = "smps6", },
-	{ .name = "smps7", },
-	{ .name = "smps8", },
-	{ .name = "smps9", },
-	{ .name = "smps10_out2", },
-	{ .name = "smps10_out1", },
-	{ .name = "ldo1", },
-	{ .name = "ldo2", },
-	{ .name = "ldo3", },
-	{ .name = "ldo4", },
-	{ .name = "ldo5", },
-	{ .name = "ldo6", },
-	{ .name = "ldo7", },
-	{ .name = "ldo8", },
-	{ .name = "ldo9", },
-	{ .name = "ldoln", },
-	{ .name = "ldousb", },
-	{ .name = "regen1", },
-	{ .name = "regen2", },
-	{ .name = "regen3", },
-	{ .name = "sysen1", },
-	{ .name = "sysen2", },
-};
-
-static void palmas_dt_to_pdata(struct device *dev,
-		struct device_node *node,
-		struct palmas_pmic_platform_data *pdata)
+static int palmas_ldo_registration(struct palmas_pmic *pmic,
+				   struct palmas_pmic_driver_data *ddata,
+				   struct palmas_pmic_platform_data *pdata,
+				   const char *pdev_name,
+				   struct regulator_config config)
 {
-	struct device_node *regulators;
-	u32 prop;
-	int idx, ret;
+	int id, ret;
+	struct regulator_dev *rdev;
+	struct palmas_reg_init *reg_init;
 
-	node = of_node_get(node);
-	regulators = of_get_child_by_name(node, "regulators");
-	if (!regulators) {
-		dev_info(dev, "regulator node not found\n");
-		return;
-	}
+	for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
+		if (pdata && pdata->reg_init[id])
+			reg_init = pdata->reg_init[id];
+		else
+			reg_init = NULL;
 
-	ret = of_regulator_match(dev, regulators, palmas_matches,
-			PALMAS_NUM_REGS);
-	of_node_put(regulators);
-	if (ret < 0) {
-		dev_err(dev, "Error parsing regulator init data: %d\n", ret);
-		return;
-	}
+		/* Miss out regulators which are not available due
+		 * to alternate functions.
+		 */
 
-	for (idx = 0; idx < PALMAS_NUM_REGS; idx++) {
-		if (!palmas_matches[idx].init_data ||
-				!palmas_matches[idx].of_node)
-			continue;
+		/* Register the regulators */
+		pmic->desc[id].name = ddata->palmas_regs_info[id].name;
+		pmic->desc[id].id = id;
+		pmic->desc[id].type = REGULATOR_VOLTAGE;
+		pmic->desc[id].owner = THIS_MODULE;
 
-		pdata->reg_data[idx] = palmas_matches[idx].init_data;
+		if (id < PALMAS_REG_REGEN1) {
+			pmic->desc[id].n_voltages = PALMAS_LDO_NUM_VOLTAGES;
+			if (reg_init && reg_init->roof_floor)
+				pmic->desc[id].ops =
+					&palmas_ops_ext_control_ldo;
+			else
+				pmic->desc[id].ops = &palmas_ops_ldo;
+			pmic->desc[id].min_uV = 900000;
+			pmic->desc[id].uV_step = 50000;
+			pmic->desc[id].linear_min_sel = 1;
+			pmic->desc[id].enable_time = 500;
+			pmic->desc[id].vsel_reg =
+					PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
+							   ddata->palmas_regs_info[id].vsel_addr);
+			pmic->desc[id].vsel_mask =
+					PALMAS_LDO1_VOLTAGE_VSEL_MASK;
+			pmic->desc[id].enable_reg =
+					PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
+							   ddata->palmas_regs_info[id].ctrl_addr);
+			pmic->desc[id].enable_mask =
+					PALMAS_LDO1_CTRL_MODE_ACTIVE;
 
-		pdata->reg_init[idx] = devm_kzalloc(dev,
-				sizeof(struct palmas_reg_init), GFP_KERNEL);
+			/* Check if LDO8 is in tracking mode or not */
+			if (pdata && (id == PALMAS_REG_LDO8) &&
+			    pdata->enable_ldo8_tracking) {
+				palmas_enable_ldo8_track(pmic->palmas);
+				pmic->desc[id].min_uV = 450000;
+				pmic->desc[id].uV_step = 25000;
+			}
 
-		pdata->reg_init[idx]->warm_reset =
-			of_property_read_bool(palmas_matches[idx].of_node,
-					     "ti,warm-reset");
+			/* LOD6 in vibrator mode will have enable time 2000us */
+			if (pdata && pdata->ldo6_vibrator &&
+			    (id == PALMAS_REG_LDO6))
+				pmic->desc[id].enable_time = 2000;
+		} else {
+			pmic->desc[id].n_voltages = 1;
+			if (reg_init && reg_init->roof_floor)
+				pmic->desc[id].ops =
+					&palmas_ops_ext_control_extreg;
+			else
+				pmic->desc[id].ops = &palmas_ops_extreg;
+			pmic->desc[id].enable_reg =
+					PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
+							   ddata->palmas_regs_info[id].ctrl_addr);
+			pmic->desc[id].enable_mask =
+					PALMAS_REGEN1_CTRL_MODE_ACTIVE;
+		}
 
-		ret = of_property_read_u32(palmas_matches[idx].of_node,
-					      "ti,roof-floor", &prop);
-		/* EINVAL: Property not found */
-		if (ret != -EINVAL) {
-			int econtrol;
+		if (pdata)
+			config.init_data = pdata->reg_data[id];
+		else
+			config.init_data = NULL;
 
-			/* use default value, when no value is specified */
-			econtrol = PALMAS_EXT_CONTROL_NSLEEP;
-			if (!ret) {
-				switch (prop) {
-				case 1:
-					econtrol = PALMAS_EXT_CONTROL_ENABLE1;
-					break;
-				case 2:
-					econtrol = PALMAS_EXT_CONTROL_ENABLE2;
-					break;
-				case 3:
-					econtrol = PALMAS_EXT_CONTROL_NSLEEP;
-					break;
-				default:
-					WARN_ON(1);
-					dev_warn(dev,
-					"%s: Invalid roof-floor option: %u\n",
-					     palmas_matches[idx].name, prop);
-					break;
-				}
-			}
-			pdata->reg_init[idx]->roof_floor = econtrol;
-		}
+		pmic->desc[id].supply_name = ddata->palmas_regs_info[id].sname;
+		config.of_node = ddata->palmas_matches[id].of_node;
 
-		ret = of_property_read_u32(palmas_matches[idx].of_node,
-				"ti,mode-sleep", &prop);
-		if (!ret)
-			pdata->reg_init[idx]->mode_sleep = prop;
+		rdev = devm_regulator_register(pmic->dev, &pmic->desc[id],
+					       &config);
+		if (IS_ERR(rdev)) {
+			dev_err(pmic->dev,
+				"failed to register %s regulator\n",
+				pdev_name);
+			return PTR_ERR(rdev);
+		}
 
-		ret = of_property_read_bool(palmas_matches[idx].of_node,
-					    "ti,smps-range");
-		if (ret)
-			pdata->reg_init[idx]->vsel =
-				PALMAS_SMPS12_VOLTAGE_RANGE;
+		/* Save regulator for cleanup */
+		pmic->rdev[id] = rdev;
 
-		if (idx == PALMAS_REG_LDO8)
-			pdata->enable_ldo8_tracking = of_property_read_bool(
-						palmas_matches[idx].of_node,
-						"ti,enable-ldo8-tracking");
+		/* Initialise sleep/init values from platform data */
+		if (pdata) {
+			reg_init = pdata->reg_init[id];
+			if (reg_init) {
+				if (id <= ddata->ldo_end)
+					ret = palmas_ldo_init(pmic->palmas, id,
+							      reg_init);
+				else
+					ret = palmas_extreg_init(pmic->palmas,
+								 id, reg_init);
+				if (ret)
+					return ret;
+			}
+		}
 	}
 
-	pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
+	return 0;
 }
 
-
-static int palmas_regulators_probe(struct platform_device *pdev)
+static int palmas_smps_registration(struct palmas_pmic *pmic,
+				    struct palmas_pmic_driver_data *ddata,
+				    struct palmas_pmic_platform_data *pdata,
+				    const char *pdev_name,
+				    struct regulator_config config)
 {
-	struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
-	struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
-	struct device_node *node = pdev->dev.of_node;
+	int id, ret;
+	unsigned int addr, reg;
 	struct regulator_dev *rdev;
-	struct regulator_config config = { };
-	struct palmas_pmic *pmic;
 	struct palmas_reg_init *reg_init;
-	int id = 0, ret;
-	unsigned int addr, reg;
-
-	if (node && !pdata) {
-		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
-
-		if (!pdata)
-			return -ENOMEM;
-
-		palmas_dt_to_pdata(&pdev->dev, node, pdata);
-	}
-
-	pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
-	if (!pmic)
-		return -ENOMEM;
-
-	pmic->dev = &pdev->dev;
-	pmic->palmas = palmas;
-	palmas->pmic = pmic;
-	platform_set_drvdata(pdev, pmic);
-
-	ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
-	if (ret)
-		return ret;
-
-	if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
-		pmic->smps123 = 1;
-
-	if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
-		pmic->smps457 = 1;
 
-	config.regmap = palmas->regmap[REGULATOR_SLAVE];
-	config.dev = &pdev->dev;
-	config.driver_data = pmic;
-
-	for (id = 0; id < PALMAS_REG_LDO1; id++) {
+	for (id = ddata->smps_start; id < ddata->smps_end; id++) {
 		bool ramp_delay_support = false;
 
 		/*
@@ -857,7 +869,7 @@ static int palmas_regulators_probe(struct platform_device *pdev)
 			break;
 		case PALMAS_REG_SMPS10_OUT1:
 		case PALMAS_REG_SMPS10_OUT2:
-			if (!PALMAS_PMIC_HAS(palmas, SMPS10_BOOST))
+			if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
 				continue;
 		}
 
@@ -865,10 +877,10 @@ static int palmas_regulators_probe(struct platform_device *pdev)
 			ramp_delay_support = true;
 
 		if (ramp_delay_support) {
-			addr = palmas_regs_info[id].tstep_addr;
+			addr = ddata->palmas_regs_info[id].tstep_addr;
 			ret = palmas_smps_read(pmic->palmas, addr, &reg);
 			if (ret < 0) {
-				dev_err(&pdev->dev,
+				dev_err(pmic->dev,
 					"reading TSTEP reg failed: %d\n", ret);
 				return ret;
 			}
@@ -880,7 +892,7 @@ static int palmas_regulators_probe(struct platform_device *pdev)
 		/* Initialise sleep/init values from platform data */
 		if (pdata && pdata->reg_init[id]) {
 			reg_init = pdata->reg_init[id];
-			ret = palmas_smps_init(palmas, id, reg_init);
+			ret = palmas_smps_init(pmic->palmas, id, reg_init);
 			if (ret)
 				return ret;
 		} else {
@@ -888,7 +900,7 @@ static int palmas_regulators_probe(struct platform_device *pdev)
 		}
 
 		/* Register the regulators */
-		pmic->desc[id].name = palmas_regs_info[id].name;
+		pmic->desc[id].name = ddata->palmas_regs_info[id].name;
 		pmic->desc[id].id = id;
 
 		switch (id) {
@@ -963,15 +975,15 @@ static int palmas_regulators_probe(struct platform_device *pdev)
 		else
 			config.init_data = NULL;
 
-		pmic->desc[id].supply_name = palmas_regs_info[id].sname;
-		config.of_node = palmas_matches[id].of_node;
+		pmic->desc[id].supply_name = ddata->palmas_regs_info[id].sname;
+		config.of_node = ddata->palmas_matches[id].of_node;
 
-		rdev = devm_regulator_register(&pdev->dev, &pmic->desc[id],
+		rdev = devm_regulator_register(pmic->dev, &pmic->desc[id],
 					       &config);
 		if (IS_ERR(rdev)) {
-			dev_err(&pdev->dev,
+			dev_err(pmic->dev,
 				"failed to register %s regulator\n",
-				pdev->name);
+				pdev_name);
 			return PTR_ERR(rdev);
 		}
 
@@ -979,123 +991,237 @@ static int palmas_regulators_probe(struct platform_device *pdev)
 		pmic->rdev[id] = rdev;
 	}
 
-	/* Start this loop from the id left from previous loop */
-	for (; id < PALMAS_NUM_REGS; id++) {
-		if (pdata && pdata->reg_init[id])
-			reg_init = pdata->reg_init[id];
-		else
-			reg_init = NULL;
+	return 0;
+}
 
-		/* Miss out regulators which are not available due
-		 * to alternate functions.
-		 */
+static struct of_regulator_match palmas_matches[] = {
+	{ .name = "smps12", },
+	{ .name = "smps123", },
+	{ .name = "smps3", },
+	{ .name = "smps45", },
+	{ .name = "smps457", },
+	{ .name = "smps6", },
+	{ .name = "smps7", },
+	{ .name = "smps8", },
+	{ .name = "smps9", },
+	{ .name = "smps10_out2", },
+	{ .name = "smps10_out1", },
+	{ .name = "ldo1", },
+	{ .name = "ldo2", },
+	{ .name = "ldo3", },
+	{ .name = "ldo4", },
+	{ .name = "ldo5", },
+	{ .name = "ldo6", },
+	{ .name = "ldo7", },
+	{ .name = "ldo8", },
+	{ .name = "ldo9", },
+	{ .name = "ldoln", },
+	{ .name = "ldousb", },
+	{ .name = "regen1", },
+	{ .name = "regen2", },
+	{ .name = "regen3", },
+	{ .name = "sysen1", },
+	{ .name = "sysen2", },
+};
 
-		/* Register the regulators */
-		pmic->desc[id].name = palmas_regs_info[id].name;
-		pmic->desc[id].id = id;
-		pmic->desc[id].type = REGULATOR_VOLTAGE;
-		pmic->desc[id].owner = THIS_MODULE;
+struct palmas_pmic_driver_data palmas_ddata = {
+	.smps_start = PALMAS_REG_SMPS12,
+	.smps_end = PALMAS_REG_SMPS10_OUT1,
+	.ldo_begin = PALMAS_REG_LDO1,
+	.ldo_end = PALMAS_REG_LDOUSB,
+	.max_reg = PALMAS_NUM_REGS,
+	.palmas_regs_info = palmas_regs_info,
+	.palmas_matches = palmas_matches,
+	.sleep_req_info = palma_sleep_req_info,
+	.smps_register = palmas_smps_registration,
+	.ldo_register = palmas_ldo_registration,
+};
 
-		if (id < PALMAS_REG_REGEN1) {
-			pmic->desc[id].n_voltages = PALMAS_LDO_NUM_VOLTAGES;
-			if (reg_init && reg_init->roof_floor)
-				pmic->desc[id].ops =
-					&palmas_ops_ext_control_ldo;
-			else
-				pmic->desc[id].ops = &palmas_ops_ldo;
-			pmic->desc[id].min_uV = 900000;
-			pmic->desc[id].uV_step = 50000;
-			pmic->desc[id].linear_min_sel = 1;
-			pmic->desc[id].enable_time = 500;
-			pmic->desc[id].vsel_reg =
-					PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
-						palmas_regs_info[id].vsel_addr);
-			pmic->desc[id].vsel_mask =
-					PALMAS_LDO1_VOLTAGE_VSEL_MASK;
-			pmic->desc[id].enable_reg =
-					PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
-						palmas_regs_info[id].ctrl_addr);
-			pmic->desc[id].enable_mask =
-					PALMAS_LDO1_CTRL_MODE_ACTIVE;
+static void palmas_dt_to_pdata(struct device *dev,
+			       struct device_node *node,
+			       struct palmas_pmic_platform_data *pdata,
+			       struct palmas_pmic_driver_data *ddata)
+{
+	struct device_node *regulators;
+	u32 prop;
+	int idx, ret;
 
-			/* Check if LDO8 is in tracking mode or not */
-			if (pdata && (id == PALMAS_REG_LDO8) &&
-					pdata->enable_ldo8_tracking) {
-				palmas_enable_ldo8_track(palmas);
-				pmic->desc[id].min_uV = 450000;
-				pmic->desc[id].uV_step = 25000;
-			}
+	node = of_node_get(node);
+	regulators = of_get_child_by_name(node, "regulators");
+	if (!regulators) {
+		dev_info(dev, "regulator node not found\n");
+		return;
+	}
 
-			/* LOD6 in vibrator mode will have enable time 2000us */
-			if (pdata && pdata->ldo6_vibrator &&
-				(id == PALMAS_REG_LDO6))
-				pmic->desc[id].enable_time = 2000;
-		} else {
-			pmic->desc[id].n_voltages = 1;
-			if (reg_init && reg_init->roof_floor)
-				pmic->desc[id].ops =
-					&palmas_ops_ext_control_extreg;
-			else
-				pmic->desc[id].ops = &palmas_ops_extreg;
-			pmic->desc[id].enable_reg =
-					PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
-						palmas_regs_info[id].ctrl_addr);
-			pmic->desc[id].enable_mask =
-					PALMAS_REGEN1_CTRL_MODE_ACTIVE;
-		}
+	ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
+				 ddata->max_reg);
+	of_node_put(regulators);
+	if (ret < 0) {
+		dev_err(dev, "Error parsing regulator init data: %d\n", ret);
+		return;
+	}
 
-		if (pdata)
-			config.init_data = pdata->reg_data[id];
-		else
-			config.init_data = NULL;
+	for (idx = 0; idx < ddata->max_reg; idx++) {
+		if (!ddata->palmas_matches[idx].init_data ||
+		    !ddata->palmas_matches[idx].of_node)
+			continue;
 
-		pmic->desc[id].supply_name = palmas_regs_info[id].sname;
-		config.of_node = palmas_matches[id].of_node;
+		pdata->reg_data[idx] = ddata->palmas_matches[idx].init_data;
 
-		rdev = devm_regulator_register(&pdev->dev, &pmic->desc[id],
-					       &config);
-		if (IS_ERR(rdev)) {
-			dev_err(&pdev->dev,
-				"failed to register %s regulator\n",
-				pdev->name);
-			return PTR_ERR(rdev);
-		}
+		pdata->reg_init[idx] = devm_kzalloc(dev,
+				sizeof(struct palmas_reg_init), GFP_KERNEL);
 
-		/* Save regulator for cleanup */
-		pmic->rdev[id] = rdev;
+		pdata->reg_init[idx]->warm_reset =
+			of_property_read_bool(ddata->palmas_matches[idx].of_node,
+					      "ti,warm-reset");
 
-		/* Initialise sleep/init values from platform data */
-		if (pdata) {
-			reg_init = pdata->reg_init[id];
-			if (reg_init) {
-				if (id < PALMAS_REG_REGEN1)
-					ret = palmas_ldo_init(palmas,
-							id, reg_init);
-				else
-					ret = palmas_extreg_init(palmas,
-							id, reg_init);
-				if (ret)
-					return ret;
+		ret = of_property_read_u32(ddata->palmas_matches[idx].of_node,
+					   "ti,roof-floor", &prop);
+		/* EINVAL: Property not found */
+		if (ret != -EINVAL) {
+			int econtrol;
+
+			/* use default value, when no value is specified */
+			econtrol = PALMAS_EXT_CONTROL_NSLEEP;
+			if (!ret) {
+				switch (prop) {
+				case 1:
+					econtrol = PALMAS_EXT_CONTROL_ENABLE1;
+					break;
+				case 2:
+					econtrol = PALMAS_EXT_CONTROL_ENABLE2;
+					break;
+				case 3:
+					econtrol = PALMAS_EXT_CONTROL_NSLEEP;
+					break;
+				default:
+					WARN_ON(1);
+					dev_warn(dev,
+						 "%s: Invalid roof-floor option: %u\n",
+					     palmas_matches[idx].name, prop);
+					break;
+				}
 			}
+			pdata->reg_init[idx]->roof_floor = econtrol;
 		}
-	}
 
+		ret = of_property_read_u32(ddata->palmas_matches[idx].of_node,
+					   "ti,mode-sleep", &prop);
+		if (!ret)
+			pdata->reg_init[idx]->mode_sleep = prop;
 
-	return 0;
+		ret = of_property_read_bool(ddata->palmas_matches[idx].of_node,
+					    "ti,smps-range");
+		if (ret)
+			pdata->reg_init[idx]->vsel =
+				PALMAS_SMPS12_VOLTAGE_RANGE;
+
+		if (idx == PALMAS_REG_LDO8)
+			pdata->enable_ldo8_tracking = of_property_read_bool(
+						ddata->palmas_matches[idx].of_node,
+						"ti,enable-ldo8-tracking");
+	}
+
+	pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
 }
 
 static struct of_device_id of_palmas_match_tbl[] = {
-	{ .compatible = "ti,palmas-pmic", },
-	{ .compatible = "ti,twl6035-pmic", },
-	{ .compatible = "ti,twl6036-pmic", },
-	{ .compatible = "ti,twl6037-pmic", },
-	{ .compatible = "ti,tps65913-pmic", },
-	{ .compatible = "ti,tps65914-pmic", },
-	{ .compatible = "ti,tps80036-pmic", },
-	{ .compatible = "ti,tps659038-pmic", },
+	{
+		.compatible = "ti,palmas-pmic",
+		.data = &palmas_ddata,
+	},
+	{
+		.compatible = "ti,twl6035-pmic",
+		.data = &palmas_ddata,
+	},
+	{
+		.compatible = "ti,twl6036-pmic",
+		.data = &palmas_ddata,
+	},
+	{
+		.compatible = "ti,twl6037-pmic",
+		.data = &palmas_ddata,
+	},
+	{
+		.compatible = "ti,tps65913-pmic",
+		.data = &palmas_ddata,
+	},
+	{
+		.compatible = "ti,tps65914-pmic",
+		.data = &palmas_ddata,
+	},
+	{
+		.compatible = "ti,tps80036-pmic",
+		.data = &palmas_ddata,
+	},
+	{
+		.compatible = "ti,tps659038-pmic",
+		.data = &palmas_ddata,
+	},
 	{ /* end */ }
 };
 
+static int palmas_regulators_probe(struct platform_device *pdev)
+{
+	struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
+	struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
+	struct device_node *node = pdev->dev.of_node;
+	struct palmas_pmic_driver_data *driver_data;
+	struct regulator_config config = { };
+	struct palmas_pmic *pmic;
+	const char *pdev_name;
+	const struct of_device_id *match;
+	int ret = 0;
+	unsigned int reg;
+
+	match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev);
+
+	if (!match)
+		return -ENODATA;
+
+	driver_data = (struct palmas_pmic_driver_data *)match->data;
+	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+	if (!pdata)
+		return -ENOMEM;
+
+	pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
+	if (!pmic)
+		return -ENOMEM;
+
+	pmic->dev = &pdev->dev;
+	pmic->palmas = palmas;
+	palmas->pmic = pmic;
+	platform_set_drvdata(pdev, pmic);
+	pmic->palmas->pmic_ddata = driver_data;
+
+	palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
+
+	ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
+	if (ret)
+		return ret;
+
+	if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
+		pmic->smps123 = 1;
+
+	if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
+		pmic->smps457 = 1;
+
+	config.regmap = palmas->regmap[REGULATOR_SLAVE];
+	config.dev = &pdev->dev;
+	config.driver_data = pmic;
+	pdev_name = pdev->name;
+
+	ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
+					 config);
+	if (ret)
+		return ret;
+
+	ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
+					config);
+
+	return ret;
+}
+
 static struct platform_driver palmas_driver = {
 	.driver = {
 		.name = "palmas-pmic",
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH 8/9] regulator: palmas: add driver data and modularize the probe
  2014-05-28 10:20 ` [PATCH 8/9] regulator: palmas: add driver data and modularize the probe Keerthy
@ 2014-06-17 16:45   ` Lee Jones
  2014-06-18  4:53     ` Keerthy
  0 siblings, 1 reply; 26+ messages in thread
From: Lee Jones @ 2014-06-17 16:45 UTC (permalink / raw)
  To: Keerthy; +Cc: linux-omap, lgirdwood, broonie, linux-kernel, sameo

> add driver data and modularize the probe.
> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
>  drivers/mfd/palmas.c                 |   42 +--
>  drivers/regulator/palmas-regulator.c |  656 ++++++++++++++++++++--------------
>  2 files changed, 395 insertions(+), 303 deletions(-)
> 
> diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c

[...]

> @@ -370,6 +334,8 @@ int palmas_ext_control_req_config(struct palmas *palmas,
>  	int bit_pos;
>  	int ret;
>  
> +	struct palmas_pmic_driver_data *pmic_ddata = palmas->pmic_ddata;
> +

Nit: I'd prefer the declarations to be grouped together, normally with
the struct defines above the ints etc.

[...]

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH 8/9] regulator: palmas: add driver data and modularize the probe
  2014-06-17 16:45   ` Lee Jones
@ 2014-06-18  4:53     ` Keerthy
  0 siblings, 0 replies; 26+ messages in thread
From: Keerthy @ 2014-06-18  4:53 UTC (permalink / raw)
  To: Lee Jones; +Cc: Keerthy, linux-omap, lgirdwood, broonie, linux-kernel, sameo

On Tuesday 17 June 2014 10:15 PM, Lee Jones wrote:
>> add driver data and modularize the probe.
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>>   drivers/mfd/palmas.c                 |   42 +--
>>   drivers/regulator/palmas-regulator.c |  656 ++++++++++++++++++++--------------
>>   2 files changed, 395 insertions(+), 303 deletions(-)
>>
>> diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
> [...]
>
>> @@ -370,6 +334,8 @@ int palmas_ext_control_req_config(struct palmas *palmas,
>>   	int bit_pos;
>>   	int ret;
>>   
>> +	struct palmas_pmic_driver_data *pmic_ddata = palmas->pmic_ddata;
>> +
> Nit: I'd prefer the declarations to be grouped together, normally with
> the struct defines above the ints etc.

Ok. I will change this.

>
> [...]
>

^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH 9/9] regulator: palmas: Add tps65917 PMIC support
  2014-05-28 10:20 [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
                   ` (7 preceding siblings ...)
  2014-05-28 10:20 ` [PATCH 8/9] regulator: palmas: add driver data and modularize the probe Keerthy
@ 2014-05-28 10:20 ` Keerthy
  2014-06-06 10:59 ` [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
  9 siblings, 0 replies; 26+ messages in thread
From: Keerthy @ 2014-05-28 10:20 UTC (permalink / raw)
  To: linux-omap; +Cc: lgirdwood, broonie, linux-kernel, sameo, lee.jones, Keerthy

Add tps65917 PMIC support.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 drivers/regulator/palmas-regulator.c |  387 ++++++++++++++++++++++++++++++++++
 1 file changed, 387 insertions(+)

diff --git a/drivers/regulator/palmas-regulator.c b/drivers/regulator/palmas-regulator.c
index 94c9863..98c4532 100644
--- a/drivers/regulator/palmas-regulator.c
+++ b/drivers/regulator/palmas-regulator.c
@@ -225,6 +225,94 @@ static struct regs_info palmas_regs_info[] = {
 	},
 };
 
+static struct regs_info tps65917_regs_info[] = {
+	{
+		.name		= "SMPS1",
+		.sname		= "smps1-in",
+		.vsel_addr	= TPS65917_SMPS1_VOLTAGE,
+		.ctrl_addr	= TPS65917_SMPS1_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
+	},
+	{
+		.name		= "SMPS2",
+		.sname		= "smps2-in",
+		.vsel_addr	= TPS65917_SMPS2_VOLTAGE,
+		.ctrl_addr	= TPS65917_SMPS2_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
+	},
+	{
+		.name		= "SMPS3",
+		.sname		= "smps3-in",
+		.vsel_addr	= TPS65917_SMPS3_VOLTAGE,
+		.ctrl_addr	= TPS65917_SMPS3_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
+	},
+	{
+		.name		= "SMPS4",
+		.sname		= "smps4-in",
+		.vsel_addr	= TPS65917_SMPS4_VOLTAGE,
+		.ctrl_addr	= TPS65917_SMPS4_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
+	},
+	{
+		.name		= "SMPS5",
+		.sname		= "smps5-in",
+		.vsel_addr	= TPS65917_SMPS5_VOLTAGE,
+		.ctrl_addr	= TPS65917_SMPS5_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
+	},
+	{
+		.name		= "LDO1",
+		.sname		= "ldo1-in",
+		.vsel_addr	= TPS65917_LDO1_VOLTAGE,
+		.ctrl_addr	= TPS65917_LDO1_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO1,
+	},
+	{
+		.name		= "LDO2",
+		.sname		= "ldo2-in",
+		.vsel_addr	= TPS65917_LDO2_VOLTAGE,
+		.ctrl_addr	= TPS65917_LDO2_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO2,
+	},
+	{
+		.name		= "LDO3",
+		.sname		= "ldo3-in",
+		.vsel_addr	= TPS65917_LDO3_VOLTAGE,
+		.ctrl_addr	= TPS65917_LDO3_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO3,
+	},
+	{
+		.name		= "LDO4",
+		.sname		= "ldo4-in",
+		.vsel_addr	= TPS65917_LDO4_VOLTAGE,
+		.ctrl_addr	= TPS65917_LDO4_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO4,
+	},
+	{
+		.name		= "LDO5",
+		.sname		= "ldo5-in",
+		.vsel_addr	= TPS65917_LDO5_VOLTAGE,
+		.ctrl_addr	= TPS65917_LDO5_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO5,
+	},
+	{
+		.name		= "REGEN1",
+		.ctrl_addr	= TPS65917_REGEN1_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
+	},
+	{
+		.name		= "REGEN2",
+		.ctrl_addr	= TPS65917_REGEN2_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
+	},
+	{
+		.name		= "REGEN3",
+		.ctrl_addr	= TPS65917_REGEN3_CTRL,
+		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
+	},
+};
+
 #define EXTERNAL_REQUESTOR(_id, _offset, _pos)		\
 	[PALMAS_EXTERNAL_REQSTR_ID_##_id] = {		\
 		.id = PALMAS_EXTERNAL_REQSTR_ID_##_id,	\
@@ -261,6 +349,29 @@ struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
 	EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
 };
 
+#define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos)		\
+	[TPS65917_EXTERNAL_REQSTR_ID_##_id] = {		\
+		.id = TPS65917_EXTERNAL_REQSTR_ID_##_id,	\
+		.reg_offset = _offset,			\
+		.bit_pos = _pos,			\
+	}
+
+static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
+	EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
+	EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
+	EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
+	EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
+	EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
+	EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
+	EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
+	EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
+	EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
+	EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
+	EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
+	EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
+	EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
+};
+
 static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
 
 #define SMPS_CTRL_MODE_OFF		0x00
@@ -449,6 +560,28 @@ static struct regulator_ops palmas_ops_smps10 = {
 	.get_bypass		= regulator_get_bypass_regmap,
 };
 
+static struct regulator_ops tps65917_ops_smps = {
+	.is_enabled		= regulator_is_enabled_regmap,
+	.enable			= regulator_enable_regmap,
+	.disable		= regulator_disable_regmap,
+	.set_mode		= palmas_set_mode_smps,
+	.get_mode		= palmas_get_mode_smps,
+	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
+	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
+	.list_voltage		= regulator_list_voltage_linear_range,
+	.map_voltage		= regulator_map_voltage_linear_range,
+	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
+};
+
+static struct regulator_ops tps65917_ops_ext_control_smps = {
+	.set_mode		= palmas_set_mode_smps,
+	.get_mode		= palmas_get_mode_smps,
+	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
+	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
+	.list_voltage		= regulator_list_voltage_linear_range,
+	.map_voltage		= regulator_map_voltage_linear_range,
+};
+
 static int palmas_is_enabled_ldo(struct regulator_dev *dev)
 {
 	struct palmas_pmic *pmic = rdev_get_drvdata(dev);
@@ -490,6 +623,17 @@ static struct regulator_ops palmas_ops_extreg = {
 static struct regulator_ops palmas_ops_ext_control_extreg = {
 };
 
+static struct regulator_ops tps65917_ops_ldo = {
+	.is_enabled		= palmas_is_enabled_ldo,
+	.enable			= regulator_enable_regmap,
+	.disable		= regulator_disable_regmap,
+	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
+	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
+	.list_voltage		= regulator_list_voltage_linear,
+	.map_voltage		= regulator_map_voltage_linear,
+	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
+};
+
 static int palmas_regulator_config_external(struct palmas *palmas, int id,
 		struct palmas_reg_init *reg_init)
 {
@@ -824,6 +968,111 @@ static int palmas_ldo_registration(struct palmas_pmic *pmic,
 	return 0;
 }
 
+static int tps65917_ldo_registration(struct palmas_pmic *pmic,
+				     struct palmas_pmic_driver_data *ddata,
+				     struct palmas_pmic_platform_data *pdata,
+				     const char *pdev_name,
+				     struct regulator_config config)
+{
+	int id, ret;
+	struct regulator_dev *rdev;
+	struct palmas_reg_init *reg_init;
+
+	for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
+		if (pdata && pdata->reg_init[id])
+			reg_init = pdata->reg_init[id];
+		else
+			reg_init = NULL;
+
+		/* Miss out regulators which are not available due
+		 * to alternate functions.
+		 */
+
+		/* Register the regulators */
+		pmic->desc[id].name = ddata->palmas_regs_info[id].name;
+		pmic->desc[id].id = id;
+		pmic->desc[id].type = REGULATOR_VOLTAGE;
+		pmic->desc[id].owner = THIS_MODULE;
+
+		if (id < TPS65917_REG_REGEN1) {
+			pmic->desc[id].n_voltages = PALMAS_LDO_NUM_VOLTAGES;
+			if (reg_init && reg_init->roof_floor)
+				pmic->desc[id].ops =
+					&palmas_ops_ext_control_ldo;
+			else
+				pmic->desc[id].ops = &tps65917_ops_ldo;
+			pmic->desc[id].min_uV = 900000;
+			pmic->desc[id].uV_step = 50000;
+			pmic->desc[id].linear_min_sel = 1;
+			pmic->desc[id].enable_time = 500;
+			pmic->desc[id].vsel_reg =
+					PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
+							   ddata->palmas_regs_info[id].vsel_addr);
+			pmic->desc[id].vsel_mask =
+					PALMAS_LDO1_VOLTAGE_VSEL_MASK;
+			pmic->desc[id].enable_reg =
+					PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
+							   ddata->palmas_regs_info[id].ctrl_addr);
+			pmic->desc[id].enable_mask =
+					PALMAS_LDO1_CTRL_MODE_ACTIVE;
+			/*
+			 * To be confirmed. Discussion on going with PMIC Team.
+			 * It is of the order of ~60mV/uS.
+			 */
+			pmic->desc[id].ramp_delay = 2500;
+		} else {
+			pmic->desc[id].n_voltages = 1;
+			if (reg_init && reg_init->roof_floor)
+				pmic->desc[id].ops =
+					&palmas_ops_ext_control_extreg;
+			else
+				pmic->desc[id].ops = &palmas_ops_extreg;
+			pmic->desc[id].enable_reg =
+					PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
+							   ddata->palmas_regs_info[id].ctrl_addr);
+			pmic->desc[id].enable_mask =
+					PALMAS_REGEN1_CTRL_MODE_ACTIVE;
+		}
+
+		if (pdata)
+			config.init_data = pdata->reg_data[id];
+		else
+			config.init_data = NULL;
+
+		pmic->desc[id].supply_name = ddata->palmas_regs_info[id].sname;
+		config.of_node = ddata->palmas_matches[id].of_node;
+
+		rdev = devm_regulator_register(pmic->dev, &pmic->desc[id],
+					       &config);
+		if (IS_ERR(rdev)) {
+			dev_err(pmic->dev,
+				"failed to register %s regulator\n",
+				pdev_name);
+			return PTR_ERR(rdev);
+		}
+
+		/* Save regulator for cleanup */
+		pmic->rdev[id] = rdev;
+
+		/* Initialise sleep/init values from platform data */
+		if (pdata) {
+			reg_init = pdata->reg_init[id];
+			if (reg_init) {
+				if (id < TPS65917_REG_REGEN1)
+					ret = palmas_ldo_init(pmic->palmas,
+							      id, reg_init);
+				else
+					ret = palmas_extreg_init(pmic->palmas,
+								 id, reg_init);
+				if (ret)
+					return ret;
+			}
+		}
+	}
+
+	return 0;
+}
+
 static int palmas_smps_registration(struct palmas_pmic *pmic,
 				    struct palmas_pmic_driver_data *ddata,
 				    struct palmas_pmic_platform_data *pdata,
@@ -994,6 +1243,109 @@ static int palmas_smps_registration(struct palmas_pmic *pmic,
 	return 0;
 }
 
+static int tps65917_smps_registration(struct palmas_pmic *pmic,
+				      struct palmas_pmic_driver_data *ddata,
+				      struct palmas_pmic_platform_data *pdata,
+				      const char *pdev_name,
+				      struct regulator_config config)
+{
+	int id, ret;
+	unsigned int addr, reg;
+	struct regulator_dev *rdev;
+	struct palmas_reg_init *reg_init;
+
+	for (id = ddata->smps_start; id < ddata->smps_end; id++) {
+		/*
+		 * Miss out regulators which are not available due
+		 * to slaving configurations.
+		 */
+		pmic->desc[id].n_linear_ranges = 3;
+		if ((id == TPS65917_REG_SMPS2) && pmic->smps12)
+			continue;
+
+		/* Initialise sleep/init values from platform data */
+		if (pdata && pdata->reg_init[id]) {
+			reg_init = pdata->reg_init[id];
+			ret = palmas_smps_init(pmic->palmas, id, reg_init);
+			if (ret)
+				return ret;
+		} else {
+			reg_init = NULL;
+		}
+
+		/* Register the regulators */
+		pmic->desc[id].name = ddata->palmas_regs_info[id].name;
+		pmic->desc[id].id = id;
+
+		/*
+		 * Read and store the RANGE bit for later use
+		 * This must be done before regulator is probed,
+		 * otherwise we error in probe with unsupportable
+		 * ranges. Read the current smps mode for later use.
+		 */
+		addr = ddata->palmas_regs_info[id].vsel_addr;
+
+		ret = palmas_smps_read(pmic->palmas, addr, &reg);
+		if (ret)
+			return ret;
+		if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
+			pmic->range[id] = 1;
+
+		if (pmic->range[id])
+				pmic->desc[id].linear_ranges = smps_high_ranges;
+			else
+				pmic->desc[id].linear_ranges = smps_low_ranges;
+
+
+		if (reg_init && reg_init->roof_floor)
+			pmic->desc[id].ops =
+					&tps65917_ops_ext_control_smps;
+		else
+			pmic->desc[id].ops = &tps65917_ops_smps;
+		pmic->desc[id].n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
+		pmic->desc[id].vsel_reg =
+				PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
+						   tps65917_regs_info[id].vsel_addr);
+		pmic->desc[id].vsel_mask =
+				PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
+
+		pmic->desc[id].ramp_delay = 2500;
+
+		/* Read the smps mode for later use. */
+		addr = ddata->palmas_regs_info[id].ctrl_addr;
+		ret = palmas_smps_read(pmic->palmas, addr, &reg);
+		if (ret)
+			return ret;
+		pmic->current_reg_mode[id] = reg &
+				PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
+
+		pmic->desc[id].type = REGULATOR_VOLTAGE;
+		pmic->desc[id].owner = THIS_MODULE;
+
+		if (pdata)
+			config.init_data = pdata->reg_data[id];
+		else
+			config.init_data = NULL;
+
+		pmic->desc[id].supply_name = ddata->palmas_regs_info[id].sname;
+		config.of_node = ddata->palmas_matches[id].of_node;
+
+		rdev = devm_regulator_register(pmic->dev, &pmic->desc[id],
+					       &config);
+		if (IS_ERR(rdev)) {
+			dev_err(pmic->dev,
+				"failed to register %s regulator\n",
+				pdev_name);
+			return PTR_ERR(rdev);
+		}
+
+		/* Save regulator for cleanup */
+		pmic->rdev[id] = rdev;
+	}
+
+	return 0;
+}
+
 static struct of_regulator_match palmas_matches[] = {
 	{ .name = "smps12", },
 	{ .name = "smps123", },
@@ -1024,6 +1376,24 @@ static struct of_regulator_match palmas_matches[] = {
 	{ .name = "sysen2", },
 };
 
+static struct of_regulator_match tps65917_matches[] = {
+	{ .name = "smps1", },
+	{ .name = "smps2", },
+	{ .name = "smps3", },
+	{ .name = "smps4", },
+	{ .name = "smps5", },
+	{ .name = "ldo1", },
+	{ .name = "ldo2", },
+	{ .name = "ldo3", },
+	{ .name = "ldo4", },
+	{ .name = "ldo5", },
+	{ .name = "regen1", },
+	{ .name = "regen2", },
+	{ .name = "regen3", },
+	{ .name = "sysen1", },
+	{ .name = "sysen2", },
+};
+
 struct palmas_pmic_driver_data palmas_ddata = {
 	.smps_start = PALMAS_REG_SMPS12,
 	.smps_end = PALMAS_REG_SMPS10_OUT1,
@@ -1037,6 +1407,19 @@ struct palmas_pmic_driver_data palmas_ddata = {
 	.ldo_register = palmas_ldo_registration,
 };
 
+struct palmas_pmic_driver_data tps65917_ddata = {
+	.smps_start = TPS65917_REG_SMPS1,
+	.smps_end = TPS65917_REG_SMPS5,
+	.ldo_begin = TPS65917_REG_LDO1,
+	.ldo_end = TPS65917_REG_LDO5,
+	.max_reg = TPS65917_NUM_REGS,
+	.palmas_regs_info = tps65917_regs_info,
+	.palmas_matches = tps65917_matches,
+	.sleep_req_info = tps65917_sleep_req_info,
+	.smps_register = tps65917_smps_registration,
+	.ldo_register = tps65917_ldo_registration,
+};
+
 static void palmas_dt_to_pdata(struct device *dev,
 			       struct device_node *node,
 			       struct palmas_pmic_platform_data *pdata,
@@ -1158,6 +1541,10 @@ static struct of_device_id of_palmas_match_tbl[] = {
 		.compatible = "ti,tps659038-pmic",
 		.data = &palmas_ddata,
 	},
+	 {
+		.compatible = "ti,tps65917-pmic",
+		.data = &tps65917_ddata,
+	},
 	{ /* end */ }
 };
 
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC
  2014-05-28 10:20 [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
                   ` (8 preceding siblings ...)
  2014-05-28 10:20 ` [PATCH 9/9] regulator: palmas: Add tps65917 PMIC support Keerthy
@ 2014-06-06 10:59 ` Keerthy
  2014-06-06 12:43   ` Lee Jones
  2014-06-06 12:50   ` Mark Brown
  9 siblings, 2 replies; 26+ messages in thread
From: Keerthy @ 2014-06-06 10:59 UTC (permalink / raw)
  To: Keerthy; +Cc: linux-omap, lgirdwood, broonie, linux-kernel, sameo, lee.jones

Hi Mark/Lee Jones,

On Wednesday 28 May 2014 03:50 PM, Keerthy wrote:
> The TPS65917 chip is a power management IC for Portable Navigation Systems
> and Tablet Computing devices. It contains the following components:
>
>   - Regulators.
>   - GPADC.
>   - Over Temperature warning and Shut down.
>
> This patch series adds support for TPS65917 mfd device. At this time only
> the regulator functionality is made available.
>
> The closest drivers are PALMAS series drivers. Hence adapted palmas mfd
> driver to support the tps65917 PMIC.
>
> The register set for SMPSs and LDOs are changed and the ramp delay support
> is also changed. Bit-field defenitions are changed.
> Hence added driver data structures for mfd and regulator drivers
> for palmas and added support for tps65917.
>
> The patches are boot tested on DRA72-EVM.
> The patches are boot tested on OMAP5-UEVM board.

A gentle ping on this rework.

> Keerthy (9):
>    mfd: Add DT bindings for tps65917 PMIC
>    regulator: palmas: Add tps65917 compatible string
>    mfd: palmas: Add tps65917 specific definitions and enums
>    mfd: palmas: Add tps65917 support
>    regulator: palmas: Shift the reg_info structure definition to the
>      header file
>    mfd: palmas: shift the palmas_sleep_requestor_info structure
>      definition to the header file
>    regulator: palmas: Add palmas_pmic_driver_data structure
>    regulator: palmas: add driver data and modularize the probe
>    regulator: palmas: Add tps65917 PMIC support
>
>   Documentation/devicetree/bindings/mfd/palmas.txt   |    2 +
>   .../devicetree/bindings/regulator/palmas-pmic.txt  |    1 +
>   drivers/mfd/palmas.c                               |  228 +++--
>   drivers/regulator/palmas-regulator.c               | 1006 +++++++++++++++-----
>   include/linux/mfd/palmas.h                         |  837 ++++++++++++++++
>   5 files changed, 1770 insertions(+), 304 deletions(-)
>

Regards,
Keerthy

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC
  2014-06-06 10:59 ` [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
@ 2014-06-06 12:43   ` Lee Jones
  2014-06-06 12:50   ` Mark Brown
  1 sibling, 0 replies; 26+ messages in thread
From: Lee Jones @ 2014-06-06 12:43 UTC (permalink / raw)
  To: Keerthy; +Cc: Keerthy, linux-omap, lgirdwood, broonie, linux-kernel, sameo

> Hi Mark/Lee Jones,
> 
> On Wednesday 28 May 2014 03:50 PM, Keerthy wrote:
> >The TPS65917 chip is a power management IC for Portable Navigation Systems
> >and Tablet Computing devices. It contains the following components:
> >
> >  - Regulators.
> >  - GPADC.
> >  - Over Temperature warning and Shut down.
> >
> >This patch series adds support for TPS65917 mfd device. At this time only
> >the regulator functionality is made available.
> >
> >The closest drivers are PALMAS series drivers. Hence adapted palmas mfd
> >driver to support the tps65917 PMIC.
> >
> >The register set for SMPSs and LDOs are changed and the ramp delay support
> >is also changed. Bit-field defenitions are changed.
> >Hence added driver data structures for mfd and regulator drivers
> >for palmas and added support for tps65917.
> >
> >The patches are boot tested on DRA72-EVM.
> >The patches are boot tested on OMAP5-UEVM board.
> 
> A gentle ping on this rework.

There's no point in pinging on any patch during the merge-window.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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To unsubscribe from this list: send the line "unsubscribe linux-omap" in
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^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC
  2014-06-06 10:59 ` [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
  2014-06-06 12:43   ` Lee Jones
@ 2014-06-06 12:50   ` Mark Brown
  1 sibling, 0 replies; 26+ messages in thread
From: Mark Brown @ 2014-06-06 12:50 UTC (permalink / raw)
  To: Keerthy; +Cc: Keerthy, linux-omap, lgirdwood, linux-kernel, sameo, lee.jones

[-- Attachment #1: Type: text/plain, Size: 128 bytes --]

On Fri, Jun 06, 2014 at 04:29:03PM +0530, Keerthy wrote:

> A gentle ping on this rework.

Please don't send contentless pings.

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 836 bytes --]

^ permalink raw reply	[flat|nested] 26+ messages in thread

end of thread, other threads:[~2014-06-18  7:24 UTC | newest]

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-- links below jump to the message on this page --
2014-05-28 10:20 [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
2014-05-28 10:20 ` [PATCH 1/9] mfd: Add DT bindings for tps65917 PMIC Keerthy
2014-05-28 10:20 ` [PATCH 2/9] regulator: palmas: Add tps65917 compatible string Keerthy
2014-05-28 10:20 ` [PATCH 3/9] mfd: palmas: Add tps65917 specific definitions and enums Keerthy
2014-06-17 16:11   ` Lee Jones
2014-06-18  5:07     ` Keerthy
2014-05-28 10:20 ` [PATCH 4/9] mfd: palmas: Add tps65917 support Keerthy
2014-06-17 16:19   ` Lee Jones
2014-06-18  5:06     ` Keerthy
2014-05-28 10:20 ` [PATCH 5/9] regulator: palmas: Shift the reg_info structure definition to the header file Keerthy
2014-06-17 16:32   ` Lee Jones
2014-06-18  5:05     ` Keerthy
2014-05-28 10:20 ` [PATCH 6/9] mfd: palmas: shift the palmas_sleep_requestor_info " Keerthy
2014-06-17 16:33   ` Lee Jones
2014-06-18  5:04     ` Keerthy
2014-05-28 10:20 ` [PATCH 7/9] regulator: palmas: Add palmas_pmic_driver_data structure Keerthy
2014-06-17 16:37   ` Lee Jones
2014-06-18  5:01     ` Keerthy
2014-06-18  7:24       ` Lee Jones
2014-05-28 10:20 ` [PATCH 8/9] regulator: palmas: add driver data and modularize the probe Keerthy
2014-06-17 16:45   ` Lee Jones
2014-06-18  4:53     ` Keerthy
2014-05-28 10:20 ` [PATCH 9/9] regulator: palmas: Add tps65917 PMIC support Keerthy
2014-06-06 10:59 ` [PATCH 0/9] mfd: tps65917: Add support for for TPS65917 PMIC Keerthy
2014-06-06 12:43   ` Lee Jones
2014-06-06 12:50   ` Mark Brown

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