* Re: [PATCH 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module
2014-06-18 12:16 ` [PATCH 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module Roger Quadros
@ 2014-06-18 12:34 ` Rajendra Nayak
2014-06-18 19:49 ` Roger Quadros
2014-06-18 19:50 ` [PATCH v2 " Roger Quadros
` (2 subsequent siblings)
3 siblings, 1 reply; 18+ messages in thread
From: Rajendra Nayak @ 2014-06-18 12:34 UTC (permalink / raw)
To: Roger Quadros
Cc: tony, paul, nm, kishon, george.cherian, balbi, balajitk, nsekhar,
linux-omap, linux-kernel
On Wednesday 18 June 2014 05:46 PM, Roger Quadros wrote:
> This module is needed for the SATA and PCIe PHYs.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Tested-by: Roger Quadros <rogerq@ti.com>
> ---
> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> index 20b4398..cedef6b 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> @@ -1215,6 +1215,30 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
> },
> };
>
> +/* ocp2scp3 */
> +static struct omap_hwmod dra7xx_ocp2scp3_hwmod;
> +
> +/* l4_cfg -> ocp2scp3 */
> +static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
> + .master = &dra7xx_l4_cfg_hwmod,
> + .slave = &dra7xx_ocp2scp3_hwmod,
> + .clk = "l4_root_clk_div",
> + .user = OCP_USER_MPU | OCP_USER_SDMA,
> +};
is it not possible to move this down in the file where all interface
structs are defined?
> +
> +static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
> + .name = "ocp2scp3",
> + .class = &dra7xx_ocp2scp_hwmod_class,
> + .clkdm_name = "l3init_clkdm",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_offs = DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
> + .context_offs = DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
> + .modulemode = MODULEMODE_HWCTRL,
> + },
> + },
> +};
> +
> /*
> * 'qspi' class
> *
> @@ -2672,6 +2696,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
> &dra7xx_l4_per1__mmc4,
> &dra7xx_l4_cfg__mpu,
> &dra7xx_l4_cfg__ocp2scp1,
> + &dra7xx_l4_cfg__ocp2scp3,
> &dra7xx_l3_main_1__qspi,
> &dra7xx_l4_cfg__sata,
> &dra7xx_l4_cfg__smartreflex_core,
>
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module
2014-06-18 12:34 ` Rajendra Nayak
@ 2014-06-18 19:49 ` Roger Quadros
0 siblings, 0 replies; 18+ messages in thread
From: Roger Quadros @ 2014-06-18 19:49 UTC (permalink / raw)
To: Rajendra Nayak
Cc: tony, paul, nm, kishon, george.cherian, balbi, balajitk, nsekhar,
linux-omap, linux-kernel
On 06/18/2014 03:34 PM, Rajendra Nayak wrote:
> On Wednesday 18 June 2014 05:46 PM, Roger Quadros wrote:
>> This module is needed for the SATA and PCIe PHYs.
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> Tested-by: Roger Quadros <rogerq@ti.com>
>> ---
>> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 25 +++++++++++++++++++++++++
>> 1 file changed, 25 insertions(+)
>>
>> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
>> index 20b4398..cedef6b 100644
>> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
>> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
>> @@ -1215,6 +1215,30 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
>> },
>> };
>>
>> +/* ocp2scp3 */
>> +static struct omap_hwmod dra7xx_ocp2scp3_hwmod;
>> +
>> +/* l4_cfg -> ocp2scp3 */
>> +static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
>> + .master = &dra7xx_l4_cfg_hwmod,
>> + .slave = &dra7xx_ocp2scp3_hwmod,
>> + .clk = "l4_root_clk_div",
>> + .user = OCP_USER_MPU | OCP_USER_SDMA,
>> +};
>
> is it not possible to move this down in the file where all interface
> structs are defined?
yes, i'll send a v2 with this fixed as well as add .main_clk to the hwmod
like in ocp2scp1.
cheers,
-roger
>
>> +
>> +static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
>> + .name = "ocp2scp3",
>> + .class = &dra7xx_ocp2scp_hwmod_class,
>> + .clkdm_name = "l3init_clkdm",
>> + .prcm = {
>> + .omap4 = {
>> + .clkctrl_offs = DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
>> + .context_offs = DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
>> + .modulemode = MODULEMODE_HWCTRL,
>> + },
>> + },
>> +};
>> +
>> /*
>> * 'qspi' class
>> *
>> @@ -2672,6 +2696,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
>> &dra7xx_l4_per1__mmc4,
>> &dra7xx_l4_cfg__mpu,
>> &dra7xx_l4_cfg__ocp2scp1,
>> + &dra7xx_l4_cfg__ocp2scp3,
>> &dra7xx_l3_main_1__qspi,
>> &dra7xx_l4_cfg__sata,
>> &dra7xx_l4_cfg__smartreflex_core,
>>
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v2 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module
2014-06-18 12:16 ` [PATCH 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module Roger Quadros
2014-06-18 12:34 ` Rajendra Nayak
@ 2014-06-18 19:50 ` Roger Quadros
2014-07-02 11:23 ` Roger Quadros
2014-07-03 8:20 ` Rajendra Nayak
2014-06-19 5:48 ` [PATCH " Paul Walmsley
2014-06-25 17:46 ` Kishon Vijay Abraham I
3 siblings, 2 replies; 18+ messages in thread
From: Roger Quadros @ 2014-06-18 19:50 UTC (permalink / raw)
To: tony, paul
Cc: rnayak, nm, kishon, george.cherian, balbi, balajitk, nsekhar,
linux-omap, linux-kernel, Roger Quadros
This module is needed for the SATA and PCIe PHYs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Tested-by: Roger Quadros <rogerq@ti.com>
---
v2:
- added .main_clk to hwmod.
- moved interface structure to the right place.
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398..c9daee4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1215,6 +1215,21 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
},
};
+/* ocp2scp3 */
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
+ .name = "ocp2scp3",
+ .class = &dra7xx_ocp2scp_hwmod_class,
+ .clkdm_name = "l3init_clkdm",
+ .main_clk = "l4_root_clk_div",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+ .context_offs = DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_HWCTRL,
+ },
+ },
+};
+
/*
* 'qspi' class
*
@@ -2326,6 +2341,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp1 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* l4_cfg -> ocp2scp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
+ .master = &dra7xx_l4_cfg_hwmod,
+ .slave = &dra7xx_ocp2scp3_hwmod,
+ .clk = "l4_root_clk_div",
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_addr_space dra7xx_qspi_addrs[] = {
{
.pa_start = 0x4b300000,
@@ -2672,6 +2695,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_per1__mmc4,
&dra7xx_l4_cfg__mpu,
&dra7xx_l4_cfg__ocp2scp1,
+ &dra7xx_l4_cfg__ocp2scp3,
&dra7xx_l3_main_1__qspi,
&dra7xx_l4_cfg__sata,
&dra7xx_l4_cfg__smartreflex_core,
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v2 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module
2014-06-18 19:50 ` [PATCH v2 " Roger Quadros
@ 2014-07-02 11:23 ` Roger Quadros
2014-07-03 8:20 ` Rajendra Nayak
1 sibling, 0 replies; 18+ messages in thread
From: Roger Quadros @ 2014-07-02 11:23 UTC (permalink / raw)
To: tony, paul, rnayak
Cc: nm, kishon, george.cherian, balbi, balajitk, nsekhar, linux-omap,
linux-kernel
Rajendra,
On 06/18/2014 10:50 PM, Roger Quadros wrote:
> This module is needed for the SATA and PCIe PHYs.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Tested-by: Roger Quadros <rogerq@ti.com>
could you please Ack this one? Thanks.
cheers,
-roger
> ---
> v2:
> - added .main_clk to hwmod.
> - moved interface structure to the right place.
>
> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> index 20b4398..c9daee4 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> @@ -1215,6 +1215,21 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
> },
> };
>
> +/* ocp2scp3 */
> +static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
> + .name = "ocp2scp3",
> + .class = &dra7xx_ocp2scp_hwmod_class,
> + .clkdm_name = "l3init_clkdm",
> + .main_clk = "l4_root_clk_div",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_offs = DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
> + .context_offs = DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
> + .modulemode = MODULEMODE_HWCTRL,
> + },
> + },
> +};
> +
> /*
> * 'qspi' class
> *
> @@ -2326,6 +2341,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp1 = {
> .user = OCP_USER_MPU | OCP_USER_SDMA,
> };
>
> +/* l4_cfg -> ocp2scp3 */
> +static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
> + .master = &dra7xx_l4_cfg_hwmod,
> + .slave = &dra7xx_ocp2scp3_hwmod,
> + .clk = "l4_root_clk_div",
> + .user = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> static struct omap_hwmod_addr_space dra7xx_qspi_addrs[] = {
> {
> .pa_start = 0x4b300000,
> @@ -2672,6 +2695,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
> &dra7xx_l4_per1__mmc4,
> &dra7xx_l4_cfg__mpu,
> &dra7xx_l4_cfg__ocp2scp1,
> + &dra7xx_l4_cfg__ocp2scp3,
> &dra7xx_l3_main_1__qspi,
> &dra7xx_l4_cfg__sata,
> &dra7xx_l4_cfg__smartreflex_core,
>
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module
2014-06-18 19:50 ` [PATCH v2 " Roger Quadros
2014-07-02 11:23 ` Roger Quadros
@ 2014-07-03 8:20 ` Rajendra Nayak
1 sibling, 0 replies; 18+ messages in thread
From: Rajendra Nayak @ 2014-07-03 8:20 UTC (permalink / raw)
To: Roger Quadros
Cc: tony, paul, nm, kishon, george.cherian, balbi, balajitk, nsekhar,
linux-omap, linux-kernel
On Thursday 19 June 2014 01:20 AM, Roger Quadros wrote:
> This module is needed for the SATA and PCIe PHYs.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Tested-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
> ---
> v2:
> - added .main_clk to hwmod.
> - moved interface structure to the right place.
>
> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> index 20b4398..c9daee4 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> @@ -1215,6 +1215,21 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
> },
> };
>
> +/* ocp2scp3 */
> +static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
> + .name = "ocp2scp3",
> + .class = &dra7xx_ocp2scp_hwmod_class,
> + .clkdm_name = "l3init_clkdm",
> + .main_clk = "l4_root_clk_div",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_offs = DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
> + .context_offs = DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
> + .modulemode = MODULEMODE_HWCTRL,
> + },
> + },
> +};
> +
> /*
> * 'qspi' class
> *
> @@ -2326,6 +2341,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp1 = {
> .user = OCP_USER_MPU | OCP_USER_SDMA,
> };
>
> +/* l4_cfg -> ocp2scp3 */
> +static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
> + .master = &dra7xx_l4_cfg_hwmod,
> + .slave = &dra7xx_ocp2scp3_hwmod,
> + .clk = "l4_root_clk_div",
> + .user = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> static struct omap_hwmod_addr_space dra7xx_qspi_addrs[] = {
> {
> .pa_start = 0x4b300000,
> @@ -2672,6 +2695,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
> &dra7xx_l4_per1__mmc4,
> &dra7xx_l4_cfg__mpu,
> &dra7xx_l4_cfg__ocp2scp1,
> + &dra7xx_l4_cfg__ocp2scp3,
> &dra7xx_l3_main_1__qspi,
> &dra7xx_l4_cfg__sata,
> &dra7xx_l4_cfg__smartreflex_core,
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module
2014-06-18 12:16 ` [PATCH 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module Roger Quadros
2014-06-18 12:34 ` Rajendra Nayak
2014-06-18 19:50 ` [PATCH v2 " Roger Quadros
@ 2014-06-19 5:48 ` Paul Walmsley
2014-06-20 11:20 ` Sekhar Nori
2014-06-25 17:46 ` Kishon Vijay Abraham I
3 siblings, 1 reply; 18+ messages in thread
From: Paul Walmsley @ 2014-06-19 5:48 UTC (permalink / raw)
To: Roger Quadros
Cc: tony, rnayak, nm, kishon, george.cherian, balbi, balajitk,
nsekhar, linux-omap, linux-kernel
On Wed, 18 Jun 2014, Roger Quadros wrote:
> This module is needed for the SATA and PCIe PHYs.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Tested-by: Roger Quadros <rogerq@ti.com>
Is this one a fix? It looks to me like a new IP block addition.
- Paul
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module
2014-06-19 5:48 ` [PATCH " Paul Walmsley
@ 2014-06-20 11:20 ` Sekhar Nori
0 siblings, 0 replies; 18+ messages in thread
From: Sekhar Nori @ 2014-06-20 11:20 UTC (permalink / raw)
To: Paul Walmsley, Roger Quadros
Cc: tony, rnayak, nm, kishon, george.cherian, balbi, balajitk,
linux-omap, linux-kernel
On Thursday 19 June 2014 11:18 AM, Paul Walmsley wrote:
> On Wed, 18 Jun 2014, Roger Quadros wrote:
>
>> This module is needed for the SATA and PCIe PHYs.
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> Tested-by: Roger Quadros <rogerq@ti.com>
>
> Is this one a fix? It looks to me like a new IP block addition.
This is not a regression fix, but this is the only thing preventing
users from using SATA on DRA7x - the DT fragments are already there.
Since its still early -rc cycle, I am hoping enabling support for new
devices can still go in.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module
2014-06-18 12:16 ` [PATCH 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module Roger Quadros
` (2 preceding siblings ...)
2014-06-19 5:48 ` [PATCH " Paul Walmsley
@ 2014-06-25 17:46 ` Kishon Vijay Abraham I
2014-06-26 9:39 ` Roger Quadros
3 siblings, 1 reply; 18+ messages in thread
From: Kishon Vijay Abraham I @ 2014-06-25 17:46 UTC (permalink / raw)
To: Roger Quadros, tony, paul
Cc: rnayak, nm, george.cherian, balbi, balajitk, nsekhar, linux-omap,
linux-kernel
On Wednesday 18 June 2014 05:46 PM, Roger Quadros wrote:
> This module is needed for the SATA and PCIe PHYs.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Tested-by: Roger Quadros <rogerq@ti.com>
I used this patch for testing PCIe.
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> index 20b4398..cedef6b 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> @@ -1215,6 +1215,30 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
> },
> };
>
> +/* ocp2scp3 */
> +static struct omap_hwmod dra7xx_ocp2scp3_hwmod;
> +
> +/* l4_cfg -> ocp2scp3 */
> +static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
> + .master = &dra7xx_l4_cfg_hwmod,
> + .slave = &dra7xx_ocp2scp3_hwmod,
> + .clk = "l4_root_clk_div",
> + .user = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
> + .name = "ocp2scp3",
> + .class = &dra7xx_ocp2scp_hwmod_class,
> + .clkdm_name = "l3init_clkdm",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_offs = DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
> + .context_offs = DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
> + .modulemode = MODULEMODE_HWCTRL,
> + },
> + },
> +};
> +
> /*
> * 'qspi' class
> *
> @@ -2672,6 +2696,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
> &dra7xx_l4_per1__mmc4,
> &dra7xx_l4_cfg__mpu,
> &dra7xx_l4_cfg__ocp2scp1,
> + &dra7xx_l4_cfg__ocp2scp3,
> &dra7xx_l3_main_1__qspi,
> &dra7xx_l4_cfg__sata,
> &dra7xx_l4_cfg__smartreflex_core,
>
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module
2014-06-25 17:46 ` Kishon Vijay Abraham I
@ 2014-06-26 9:39 ` Roger Quadros
0 siblings, 0 replies; 18+ messages in thread
From: Roger Quadros @ 2014-06-26 9:39 UTC (permalink / raw)
To: Kishon Vijay Abraham I, tony, paul
Cc: rnayak, nm, george.cherian, balbi, balajitk, nsekhar, linux-omap,
linux-kernel
Kishon,
On 06/25/2014 08:46 PM, Kishon Vijay Abraham I wrote:
>
> On Wednesday 18 June 2014 05:46 PM, Roger Quadros wrote:
>> This module is needed for the SATA and PCIe PHYs.
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> Tested-by: Roger Quadros <rogerq@ti.com>
>
> I used this patch for testing PCIe.
> Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
There is a v2 of this patch in reply to the original patch. Could you please give your Tested-by tag on that one?
Thanks.
cheers,
-roger
>> ---
>> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 25 +++++++++++++++++++++++++
>> 1 file changed, 25 insertions(+)
>>
>> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
>> index 20b4398..cedef6b 100644
>> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
>> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
>> @@ -1215,6 +1215,30 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
>> },
>> };
>>
>> +/* ocp2scp3 */
>> +static struct omap_hwmod dra7xx_ocp2scp3_hwmod;
>> +
>> +/* l4_cfg -> ocp2scp3 */
>> +static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
>> + .master = &dra7xx_l4_cfg_hwmod,
>> + .slave = &dra7xx_ocp2scp3_hwmod,
>> + .clk = "l4_root_clk_div",
>> + .user = OCP_USER_MPU | OCP_USER_SDMA,
>> +};
>> +
>> +static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
>> + .name = "ocp2scp3",
>> + .class = &dra7xx_ocp2scp_hwmod_class,
>> + .clkdm_name = "l3init_clkdm",
>> + .prcm = {
>> + .omap4 = {
>> + .clkctrl_offs = DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
>> + .context_offs = DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
>> + .modulemode = MODULEMODE_HWCTRL,
>> + },
>> + },
>> +};
>> +
>> /*
>> * 'qspi' class
>> *
>> @@ -2672,6 +2696,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
>> &dra7xx_l4_per1__mmc4,
>> &dra7xx_l4_cfg__mpu,
>> &dra7xx_l4_cfg__ocp2scp1,
>> + &dra7xx_l4_cfg__ocp2scp3,
>> &dra7xx_l3_main_1__qspi,
>> &dra7xx_l4_cfg__sata,
>> &dra7xx_l4_cfg__smartreflex_core,
>>
^ permalink raw reply [flat|nested] 18+ messages in thread