From mboxrd@z Thu Jan 1 00:00:00 1970 From: Santosh Shilimkar Subject: RE: [PATCH 2/2] OMAP: DMA: clear interrupt status correctly Date: Tue, 30 Nov 2010 19:55:27 +0530 Message-ID: <541b3a50479779f3e814aa93d506cbdd@mail.gmail.com> References: <20101130132341.13286.25157.sendpatchset@ahunter-work.research.nokia.com> <20101130132355.13286.77389.sendpatchset@ahunter-work.research.nokia.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Return-path: Received: from na3sys009aog105.obsmtp.com ([74.125.149.75]:52691 "EHLO na3sys009aog105.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752479Ab0K3OZh (ORCPT ); Tue, 30 Nov 2010 09:25:37 -0500 Received: by mail-qw0-f48.google.com with SMTP id 9so301868qwj.21 for ; Tue, 30 Nov 2010 06:25:28 -0800 (PST) In-Reply-To: <20101130132355.13286.77389.sendpatchset@ahunter-work.research.nokia.com> Sender: linux-omap-owner@vger.kernel.org List-Id: linux-omap@vger.kernel.org To: Adrian Hunter , Tony Lindgren Cc: Manjunath Kondaiah G , linux-omap Mailing List > -----Original Message----- > From: Adrian Hunter [mailto:adrian.hunter@nokia.com] > Sent: Tuesday, November 30, 2010 6:54 PM > To: Tony Lindgren > Cc: Santosh Shilimkar; Manjunatha GK; Adrian Hunter; linux-omap Mailing > List > Subject: [PATCH 2/2] OMAP: DMA: clear interrupt status correctly > > From 85934ded48552fde84b083575ac2006f1542324b Mon Sep 17 00:00:00 2001 > From: Adrian Hunter > Date: Wed, 24 Nov 2010 13:23:21 +0200 > Subject: [PATCH 2/2] OMAP: DMA: clear interrupt status correctly > > When clearing the DMA channel, clear all status bits. > > When handling a DMA interrupt, clear only the interrupt > status bits that have been read and are passed to the > channel's interrupt handler, not every status bit. > > Signed-off-by: Adrian Hunter Acked-by: Santosh Shilimkar > --- > arch/arm/plat-omap/dma.c | 7 +++---- > 1 files changed, 3 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c > index 6158c99..3300e67 100644 > --- a/arch/arm/plat-omap/dma.c > +++ b/arch/arm/plat-omap/dma.c > @@ -49,7 +49,7 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED }; > #endif > > #define OMAP_DMA_ACTIVE 0x01 > -#define OMAP2_DMA_CSR_CLEAR_MASK 0xffe > +#define OMAP2_DMA_CSR_CLEAR_MASK 0xffffffff > > #define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec) > > @@ -2010,7 +2010,7 @@ static int omap2_dma_handle_ch(int ch) > printk(KERN_INFO "DMA misaligned error with device %d\n", > dma_chan[ch].dev_id); > > - dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(ch)); > + dma_write(status, CSR(ch)); > dma_write(1 << ch, IRQSTATUS_L0); > /* read back the register to flush the write */ > dma_read(IRQSTATUS_L0); > @@ -2030,10 +2030,9 @@ static int omap2_dma_handle_ch(int ch) > OMAP_DMA_CHAIN_INCQHEAD(chain_id); > > status = dma_read(CSR(ch)); > + dma_write(status, CSR(ch)); > } > > - dma_write(status, CSR(ch)); > - > if (likely(dma_chan[ch].callback != NULL)) > dma_chan[ch].callback(ch, status, dma_chan[ch].data); > > -- > 1.7.0.4