Linux on ARM based TI OMAP SoCs
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From: Roger Quadros <rogerq@kernel.org>
To: Siddharth Vadapalli <s-vadapalli@ti.com>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Simon Horman <horms@kernel.org>,
	linux-omap@vger.kernel.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, srk@ti.com,
	Pekka Varis <p-varis@ti.com>
Subject: Re: [PATCH net-next 1/2] net: ethernet: ti: am65-cpsw: update pri_thread_map as per IEEE802.1Q-2004
Date: Wed, 6 Nov 2024 10:51:09 +0200	[thread overview]
Message-ID: <80df24bf-961e-49ea-845c-e824d0b6e0ff@kernel.org> (raw)
In-Reply-To: <35a2550e-a422-4938-af3c-a1fb4682ac56@ti.com>



On 06/11/2024 07:22, Siddharth Vadapalli wrote:
> On Tue, Nov 05, 2024 at 04:18:10PM +0200, Roger Quadros wrote:
> 
> Hello Roger,
> 
>> IEEE802.1Q-2004 superseeds IEEE802.1D-2004. Now Priority Code Point (PCP)
> 
> nitpick: s/superseeds/supersedes
ok

> 
> Also, according to:
> https://standards.ieee.org/ieee/802.1D/3387/
> IEEE 802.1D-2004 is superseded by 802.1Q-2014, so:
> s/IEEE802.1Q-2004/IEEE802.1Q-2014/g
> 
>> 2 is no longer at a lower priority than PCP 0. PCP 1 (Background) is still
>> at a lower priority than PCP 0 (Best Effort).
>>
>> Reference:
>> IEEE802.1Q-2004, Standard for Local and metropolitan area networks
>>   Table G-2 - Traffic type acronyms
>>   Table G-3 - Defining traffic types
> 
> In IEEE802.1Q-2014, the tables are:
> Table I-2—Traffic type acronyms
> Table I-3—Defining traffic types

Thanks!

> 
>>
>> Signed-off-by: Roger Quadros <rogerq@kernel.org>
>> ---
>>  drivers/net/ethernet/ti/cpsw_ale.c | 25 ++++++++++++++-----------
>>  1 file changed, 14 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c
>> index 8d02d2b21429..7dadd95cadc5 100644
>> --- a/drivers/net/ethernet/ti/cpsw_ale.c
>> +++ b/drivers/net/ethernet/ti/cpsw_ale.c
>> @@ -1692,26 +1692,29 @@ static void cpsw_ale_policer_reset(struct cpsw_ale *ale)
>>  void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch)
>>  {
>>  	int pri, idx;
>> -	/* IEEE802.1D-2004, Standard for Local and metropolitan area networks
>> +	/* IEEE802.1Q-2004, Standard for Local and metropolitan area networks
>>  	 *    Table G-2 - Traffic type acronyms
>>  	 *    Table G-3 - Defining traffic types
>> -	 * User priority values 1 and 2 effectively communicate a lower
>> -	 * priority than 0. In the below table 0 is assigned to higher priority
>> -	 * thread than 1 and 2 wherever possible.
>> +	 * Also: https://en.wikipedia.org/wiki/IEEE_P802.1p#Priority_levels
> 
> Since links might change, it might be better to drop this and quote section
> I.4 Traffic types and priority values of IEEE802.1Q-2014 which states:
> 
> "0 is thus used both for default priority and for Best Effort, and
> Background is associated with a priority value of 1. This means that the
> value 1 effectively communicates a lower priority than 0."

I agree. Will update in v2. Thanks for review.

> 
>> +	 * Priority Code Point (PCP) value 1 (Background) communicates a lower
>> +	 * priority than 0 (Best Effort). In the below table PCP 0 is assigned
>> +	 * to a higher priority thread than PCP 1 wherever possible.
>>  	 * The below table maps which thread the user priority needs to be
>>  	 * sent to for a given number of threads (RX channels). Upper threads
>>  	 * have higher priority.
>>  	 * e.g. if number of threads is 8 then user priority 0 will map to
>> -	 * pri_thread_map[8-1][0] i.e. thread 2
>> +	 * pri_thread_map[8-1][0] i.e. thread 1
>>  	 */
>> -	int pri_thread_map[8][8] = {	{ 0, 0, 0, 0, 0, 0, 0, 0, },
>> +
>> +	int pri_thread_map[8][8] = {   /* BK,BE,EE,CA,VI,VO,IC,NC */
>> +					{ 0, 0, 0, 0, 0, 0, 0, 0, },
>>  					{ 0, 0, 0, 0, 1, 1, 1, 1, },
>>  					{ 0, 0, 0, 0, 1, 1, 2, 2, },
>> -					{ 1, 0, 0, 1, 2, 2, 3, 3, },
>> -					{ 1, 0, 0, 1, 2, 3, 4, 4, },
>> -					{ 1, 0, 0, 2, 3, 4, 5, 5, },
>> -					{ 1, 0, 0, 2, 3, 4, 5, 6, },
>> -					{ 2, 0, 1, 3, 4, 5, 6, 7, } };
>> +					{ 0, 0, 1, 1, 2, 2, 3, 3, },
>> +					{ 0, 0, 1, 1, 2, 2, 3, 4, },
>> +					{ 1, 0, 2, 2, 3, 3, 4, 5, },
>> +					{ 1, 0, 2, 3, 4, 4, 5, 6, },
>> +					{ 1, 0, 2, 3, 4, 5, 6, 7 } };
>>  
>>  	cpsw_ale_policer_reset(ale);
> 
> Regards,
> Siddharth.

-- 
cheers,
-roger

  reply	other threads:[~2024-11-06  8:51 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-05 14:18 [PATCH net-next 0/2] net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX Roger Quadros
2024-11-05 14:18 ` [PATCH net-next 1/2] net: ethernet: ti: am65-cpsw: update pri_thread_map as per IEEE802.1Q-2004 Roger Quadros
2024-11-06  5:22   ` Siddharth Vadapalli
2024-11-06  8:51     ` Roger Quadros [this message]
2024-11-05 14:18 ` [PATCH net-next 2/2] net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX Roger Quadros
2024-11-08 12:30   ` Siddharth Vadapalli
2024-11-08 12:55     ` Roger Quadros
2024-11-08 14:42       ` Siddharth Vadapalli
2024-11-09 10:31         ` Roger Quadros
2024-11-11  5:22           ` Siddharth Vadapalli

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