From: Kevin Hilman <khilman@deeprootsystems.com>
To: Tero Kristo <tero.kristo@nokia.com>
Cc: linux-omap@vger.kernel.org
Subject: Re: [PATCH 00/17] OMAP3: Base support for VDD2 DVFS
Date: Tue, 13 Jan 2009 09:13:47 -0800 [thread overview]
Message-ID: <871vv7ku2c.fsf@deeprootsystems.com> (raw)
In-Reply-To: <1231515945-10234-1-git-send-email-tero.kristo@nokia.com> (Tero Kristo's message of "Fri\, 9 Jan 2009 17\:45\:28 +0200")
Tero Kristo <tero.kristo@nokia.com> writes:
> Resending this set against the latest PM branch. This set provides base
> SDRC + SRAM + clock framework support for VDD2 DVFS control. Main reasoning
> for this set is that when VDD2 clock is changed, memory clocking changes also
> and you need to be rather careful when you are doing this.
Pulling this into PM branch for more testing.
BUT.... this series has few (if any) dependencies on other PM branch
code. I would like to se this rebased against l-o and submitted for
direct merge.
Kevin
prev parent reply other threads:[~2009-01-13 17:13 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-01-09 15:45 [PATCH 00/17] OMAP3: Base support for VDD2 DVFS Tero Kristo
2009-01-09 15:45 ` [PATCH 01/17] ARM: MMU: add a Non-cacheable Normal executable memory type Tero Kristo
2009-01-09 15:45 ` [PATCH 02/17] OMAP3 SRAM: mark OCM RAM as Non-cacheable Normal memory Tero Kristo
2009-01-09 15:45 ` [PATCH 03/17] OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpll Tero Kristo
2009-01-09 15:45 ` [PATCH 04/17] OMAP3 clock: add interconnect barriers to CORE DPLL M2 change Tero Kristo
2009-01-09 15:45 ` [PATCH 05/17] OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change Tero Kristo
2009-01-09 15:45 ` [PATCH 06/17] OMAP3 SDRC: Add 166MHz, 83MHz SDRC settings for the BeagleBoard Tero Kristo
2009-01-09 15:45 ` [PATCH 07/17] OMAP3 SDRC: initialize SDRC_POWER at boot Tero Kristo
2009-01-09 15:45 ` [PATCH 08/17] OMAP3 SRAM: renumber registers to make space for argument passing Tero Kristo
2009-01-09 15:45 ` [PATCH 09/17] OMAP3 clock: only unlock SDRC DLL if SDRC clk < 83MHz Tero Kristo
2009-01-09 15:45 ` [PATCH 10/17] OMAP3 clock: use pr_debug() rather than pr_info() in some clock change code Tero Kristo
2009-01-09 15:45 ` [PATCH 11/17] OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize Tero Kristo
2009-01-09 15:45 ` [PATCH 12/17] OMAP3 clock: initialize SDRC timings at kernel start Tero Kristo
2009-01-09 15:45 ` [PATCH 13/17] OMAP3 clock: add a short delay when lowering CORE clk rate Tero Kristo
2009-01-09 15:45 ` [PATCH 14/17] OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change Tero Kristo
2009-01-09 15:45 ` [PATCH 15/17] OMAP3 SRAM: add more comments on the SRAM code Tero Kristo
2009-01-09 15:45 ` [PATCH 16/17] OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers Tero Kristo
2009-01-09 15:45 ` [PATCH 17/17] OMAP3: Add support for DPLL3 divisor values higher than 2 Tero Kristo
2009-01-13 17:13 ` Kevin Hilman [this message]
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