[PATCH 0/5] 32k sync timer meets hwmod

[PATCH 0/5] 32k sync timer meets hwmod

[Felipe Balbi]

Hi all,

Converted 32k-sync timer to platform_driver
and now using pm_runtime and hwmod.

Tested on 3430 by me and 4430 by Tarun

If someone could test on 2430 and 2420, I would
be really glad.

Felipe Balbi (5):
  arm: omap1/2/3/4: convert 32k-sync driver to a platform_driver
  arm: omap: counter-32k: convert to pm_runtime API
  clocksource: move omap 32k timer to drivers/clocksource
  arm: omap: introduce 32k timer hwmod for omap2/3/4
  arm: omap: 32k: move to omap_device_build

 arch/arm/mach-omap1/devices.c              |   24 +++
 arch/arm/mach-omap2/clock2420_data.c       |    2 +-
 arch/arm/mach-omap2/clock2430_data.c       |    2 +-
 arch/arm/mach-omap2/clock3xxx_data.c       |    2 +-
 arch/arm/mach-omap2/devices.c              |   36 +++++
 arch/arm/mach-omap2/omap_hwmod_2420_data.c |   52 ++++++
 arch/arm/mach-omap2/omap_hwmod_2430_data.c |   52 ++++++
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |   51 ++++++
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |   61 ++++++++
 arch/arm/plat-omap/Makefile                |    2 +-
 arch/arm/plat-omap/counter_32k.c           |  183 ----------------------
 drivers/clocksource/Makefile               |    1 +
 drivers/clocksource/omap-32k.c             |  231 ++++++++++++++++++++++++++++
 13 files changed, 512 insertions(+), 187 deletions(-)
 delete mode 100644 arch/arm/plat-omap/counter_32k.c
 create mode 100644 drivers/clocksource/omap-32k.c

-- 
1.7.3.1.120.g38a18

[PATCH 1/5] arm: omap1/2/3/4: convert 32k-sync driver to a platform_driver

[Felipe Balbi]

Convert the omap32k clocksource driver into a platform_driver
and while at that, also remove the ifdeferry around the code.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap1/devices.c        |   24 ++++
 arch/arm/mach-omap2/clock2420_data.c |    2 +-
 arch/arm/mach-omap2/clock2430_data.c |    2 +-
 arch/arm/mach-omap2/clock3xxx_data.c |    2 +-
 arch/arm/mach-omap2/devices.c        |   35 +++++
 arch/arm/plat-omap/Makefile          |    2 +-
 arch/arm/plat-omap/counter-32k.c     |  253 ++++++++++++++++++++++++++++++++++
 arch/arm/plat-omap/counter_32k.c     |  183 ------------------------
 8 files changed, 316 insertions(+), 187 deletions(-)
 create mode 100644 arch/arm/plat-omap/counter-32k.c
 delete mode 100644 arch/arm/plat-omap/counter_32k.c

diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 63d68cf..0f2a7ad 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -29,6 +29,29 @@
 
 /*-------------------------------------------------------------------------*/
 
+#define OMAP16XX_TIMER_32K_BASE		0xfffbc400
+
+static struct resource omap_32k_resources[] = {
+	{
+		.start		= OMAP16XX_TIMER_32K_BASE,
+		.end		= SZ_4K,
+		.flags		= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device omap_32k_device = {
+	.name			= "omap-counter-32k",
+	.id			= -1,
+	.num_resources		= ARRAY_SIZE(omap_32k_resources),
+	.resource		= omap_32k_resources,
+};
+
+static void omap_init_32k(void)
+{
+	if (cpu_is_omap16xx())
+		(void) platform_device_register(&omap_32k_device);
+};
+
 #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
 
 #define	OMAP_RTC_BASE		0xfffb4800
@@ -266,6 +289,7 @@ static int __init omap1_init_devices(void)
 	 * in alphabetical order so they're easier to sort through.
 	 */
 
+	omap_init_32k();
 	omap_init_mbox();
 	omap_init_rtc();
 	omap_init_spi100k();
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index 21f8562..6da8fc2 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1842,7 +1842,7 @@ static struct omap_clk omap2420_clks[] = {
 	CLK(NULL,	"gpios_fck",	&gpios_fck,	CK_242X),
 	CLK("omap_wdt",	"ick",		&mpu_wdt_ick,	CK_242X),
 	CLK("omap_wdt",	"fck",		&mpu_wdt_fck,	CK_242X),
-	CLK(NULL,	"sync_32k_ick",	&sync_32k_ick,	CK_242X),
+	CLK("omap-counter-32k",	"ick",	&sync_32k_ick,	CK_242X),
 	CLK(NULL,	"wdt1_ick",	&wdt1_ick,	CK_242X),
 	CLK(NULL,	"omapctrl_ick",	&omapctrl_ick,	CK_242X),
 	CLK("omap24xxcam", "fck",	&cam_fck,	CK_242X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index e32afcb..e5142cf 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1954,7 +1954,7 @@ static struct omap_clk omap2430_clks[] = {
 	CLK(NULL,	"gpios_fck",	&gpios_fck,	CK_243X),
 	CLK("omap_wdt",	"ick",		&mpu_wdt_ick,	CK_243X),
 	CLK("omap_wdt",	"fck",		&mpu_wdt_fck,	CK_243X),
-	CLK(NULL,	"sync_32k_ick",	&sync_32k_ick,	CK_243X),
+	CLK("omap-counter-32k",	"ick",	&sync_32k_ick,	CK_243X),
 	CLK(NULL,	"wdt1_ick",	&wdt1_ick,	CK_243X),
 	CLK(NULL,	"omapctrl_ick",	&omapctrl_ick,	CK_243X),
 	CLK(NULL,	"icr_ick",	&icr_ick,	CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index d85ecd5..548fba3 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3370,7 +3370,7 @@ static struct omap_clk omap3xxx_clks[] = {
 	CLK("omap_wdt",	"ick",		&wdt2_ick,	CK_3XXX),
 	CLK(NULL,	"wdt1_ick",	&wdt1_ick,	CK_3XXX),
 	CLK(NULL,	"gpio1_ick",	&gpio1_ick,	CK_3XXX),
-	CLK(NULL,	"omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX),
+	CLK("omap-counter-32k",	"ick", &omap_32ksync_ick, CK_3XXX),
 	CLK(NULL,	"gpt12_ick",	&gpt12_ick,	CK_3XXX),
 	CLK(NULL,	"gpt1_ick",	&gpt1_ick,	CK_3XXX),
 	CLK("omap-mcbsp.2",	"prcm_fck",	&per_96m_fck,	CK_3XXX),
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index eaf3799..e64a78e 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -33,6 +33,40 @@
 #include "mux.h"
 #include "control.h"
 
+static struct resource omap_32k_resources[] = {
+	{
+		.flags		= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device omap_32k_device = {
+	.name			= "omap-counter-32k",
+	.id			= -1,
+	.num_resources		= ARRAY_SIZE(omap_32k_resources),
+	.resource		= omap_32k_resources,
+};
+
+static void omap_init_32k(void)
+{
+	if (cpu_is_omap2420()) {
+		omap_32k_resources[0].start = OMAP2420_32KSYNCT_BASE;
+		omap_32k_resources[0].end = OMAP2420_32KSYNCT_BASE + SZ_4K;
+	} else if (cpu_is_omap2430()) {
+		omap_32k_resources[0].start = OMAP2430_32KSYNCT_BASE;
+		omap_32k_resources[0].end = OMAP2430_32KSYNCT_BASE + SZ_4K;
+	} else if (cpu_is_omap34xx()) {
+		omap_32k_resources[0].start = OMAP3430_32KSYNCT_BASE;
+		omap_32k_resources[0].end = OMAP3430_32KSYNCT_BASE + SZ_4K;
+	} else if (cpu_is_omap44xx()) {
+		omap_32k_resources[0].start = OMAP4430_32KSYNCT_BASE;
+		omap_32k_resources[0].end = OMAP4430_32KSYNCT_BASE + SZ_4K;
+	} else {	/* not supported */
+		return;
+	}
+
+	(void) platform_device_register(&omap_32k_device);
+};
+
 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
 
 static struct resource cam_resources[] = {
@@ -980,6 +1014,7 @@ static int __init omap2_init_devices(void)
 	 */
 	omap_disable_wdt();
 	omap_hsmmc_reset();
+	omap_init_32k();
 	omap_init_camera();
 	omap_init_mbox();
 	omap_init_mcspi();
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index a4a1285..ff57f33 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \
-	 usb.o fb.o io.o counter_32k.o
+	 usb.o fb.o io.o counter-32k.o
 obj-m :=
 obj-n :=
 obj-  :=
diff --git a/arch/arm/plat-omap/counter-32k.c b/arch/arm/plat-omap/counter-32k.c
new file mode 100644
index 0000000..f3fcb38
--- /dev/null
+++ b/arch/arm/plat-omap/counter-32k.c
@@ -0,0 +1,253 @@
+/*
+ * counter-32k.c -- OMAP 32k Sync Timer Clocksource Driver
+ *
+ * Copyright (C) 2005-2010 Tony Lindgren <tony@atomide.com>
+ * Copyright (C) 2010 Nokia Corporation
+ * Copyright (C) 2010 Felipe Balbi <me@felipebalbi.com>
+ * Copyright (C) 2009-2010 Texas Instruments
+ * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/time.h>
+#include <linux/clocksource.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+
+struct omap_counter_32k_device {
+	struct timespec		persistent_ts;
+	struct clocksource	cs;
+	cycles_t		cycles;
+	cycles_t		last_cycles;
+
+	struct device		*dev;
+	struct clk		*ick;
+	void __iomem		*base;
+
+	/*
+	 * offset_32k holds the init time counter value. It is then subtracted
+	 * from every counter read to achieve a counter that counts time from
+	 * the kernel boot (needed for sched_clock()).
+	 */
+	u32			offset_32k __read_mostly;
+};
+
+#define to_omap_32k(cs)	(container_of(cs, struct omap_counter_32k_device, cs))
+
+static struct omap_counter_32k_device	*thecs;
+
+static inline u32 omap_counter_32k_readl(const void __iomem *base,
+		unsigned offset)
+{
+	return __raw_readl(base + offset);
+}
+
+static cycle_t omap_counter_32k_32k_read(struct clocksource *cs)
+{
+	struct omap_counter_32k_device	*omap = to_omap_32k(cs);
+
+	return omap_counter_32k_readl(omap->base, 0x10) - omap->offset_32k;
+}
+
+/*
+ * Returns current time from boot in nsecs. It's OK for this to wrap
+ * around for now, as it's just a relative time stamp.
+ */
+unsigned long long sched_clock(void)
+{
+	struct omap_counter_32k_device	*omap = thecs;
+
+	if (!omap)
+		return 0;
+
+	return clocksource_cyc2ns(omap->cs.read(&omap->cs),
+			omap->cs.mult, omap->cs.shift);
+}
+
+/**
+ * read_persistent_clock -  Return time from a persistent clock.
+ *
+ * Reads the time from a source which isn't disabled during PM, the
+ * 32k sync timer.  Convert the cycles elapsed since last read into
+ * nsecs and adds to a monotonically increasing timespec.
+ */
+void read_persistent_clock(struct timespec *ts)
+{
+	struct omap_counter_32k_device	*omap = thecs;
+	unsigned long long	nsecs;
+	cycles_t		delta;
+	struct timespec		*tsp;
+
+	if (!omap) {
+		ts->tv_sec = 0;
+		ts->tv_nsec = 0;
+		return;
+	}
+
+	tsp = &omap->persistent_ts;
+
+	omap->last_cycles = omap->cycles;
+	omap->cycles = omap->cs.read(&omap->cs);
+	delta = omap->cycles - omap->last_cycles;
+
+	nsecs = clocksource_cyc2ns(delta,
+			omap->cs.mult, omap->cs.shift);
+
+	timespec_add_ns(tsp, nsecs);
+	*ts = *tsp;
+}
+
+static int __init omap_counter_32k_probe(struct platform_device *pdev)
+{
+	struct omap_counter_32k_device		*omap;
+	struct resource			*res;
+	struct clk			*ick;
+
+	int				ret;
+
+	void __iomem			*base;
+
+	omap = kzalloc(sizeof(*omap), GFP_KERNEL);
+	if (!omap) {
+		dev_dbg(&pdev->dev, "unable to allocate memory\n");
+		ret = -ENOMEM;
+		goto err0;
+	}
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		dev_dbg(&pdev->dev, "couldn't get resource\n");
+		ret = -ENODEV;
+		goto err1;
+	}
+
+	base = ioremap(res->start, resource_size(res));
+	if (!base) {
+		dev_dbg(&pdev->dev, "ioremap failed\n");
+		ret = -ENOMEM;
+		goto err2;
+	}
+
+	ick = clk_get(&pdev->dev, "ick");
+	if (IS_ERR(ick)) {
+		dev_dbg(&pdev->dev, "couldn't get clock\n");
+		ret = PTR_ERR(ick);
+		goto err3;
+	}
+
+	ret = clk_enable(ick);
+	if (ret) {
+		dev_dbg(&pdev->dev, "couldn't enable clock\n");
+		goto err4;
+	}
+
+	omap->base	= base;
+	omap->dev	= &pdev->dev;
+	omap->ick	= ick;
+
+	omap->cs.name	= "counter-32k";
+	omap->cs.rating	= 250;
+	omap->cs.read	= omap_counter_32k_32k_read;
+	omap->cs.mask	= CLOCKSOURCE_MASK(32);
+	omap->cs.shift	= 10;
+	omap->cs.flags	= CLOCK_SOURCE_IS_CONTINUOUS;
+	omap->cs.mult	= clocksource_hz2mult(32768, omap->cs.shift);
+
+	platform_set_drvdata(pdev, omap);
+
+	ret = clocksource_register(&omap->cs);
+	if (ret) {
+		dev_dbg(&pdev->dev, "failed to register clocksource\n");
+		goto err5;
+	}
+
+	/* initialize our offset */
+	omap->offset_32k	=  omap_counter_32k_32k_read(&omap->cs);
+
+	/*
+	 * REVISIT for now we need to keep a global static pointer
+	 * to this clocksource instance. Would it make any sense
+	 * to provide a get_clocksource() to fetch the clocksource
+	 * we just registered ?
+	 */
+	thecs = omap;
+
+	return 0;
+
+err5:
+	clk_disable(ick);
+
+err4:
+	clk_put(ick);
+
+err3:
+	iounmap(base);
+
+err2:
+err1:
+	kfree(omap);
+
+err0:
+	return ret;
+}
+
+static int __exit omap_counter_32k_remove(struct platform_device *pdev)
+{
+	struct omap_counter_32k_device	*omap = platform_get_drvdata(pdev);
+
+	clocksource_unregister(&omap->cs);
+	clk_disable(omap->ick);
+	clk_put(omap->ick);
+	iounmap(omap->base);
+	kfree(omap);
+	platform_set_drvdata(pdev, NULL);
+
+	return 0;
+}
+
+static void omap_counter_32k_shutdown(struct platform_device *pdev)
+{
+	struct omap_counter_32k_device	*omap = platform_get_drvdata(pdev);
+
+	clk_disable(omap->ick);
+}
+
+static struct platform_driver omap_counter_32k_driver = {
+	.remove		= __exit_p(omap_counter_32k_remove),
+	.shutdown	= omap_counter_32k_shutdown,
+	.driver		= {
+		.name	= "omap-counter-32k",
+	},
+};
+
+static int __init omap_counter_32k_init(void)
+{
+	return platform_driver_probe(&omap_counter_32k_driver,
+			omap_counter_32k_probe);
+}
+arch_initcall(omap_counter_32k_init);
+
+static void __exit omap_counter_32k_exit(void)
+{
+	platform_driver_unregister(&omap_counter_32k_driver);
+}
+module_exit(omap_counter_32k_exit);
+
+MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
deleted file mode 100644
index 155fe43..0000000
--- a/arch/arm/plat-omap/counter_32k.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * OMAP 32ksynctimer/counter_32k-related code
- *
- * Copyright (C) 2009 Texas Instruments
- * Copyright (C) 2010 Nokia Corporation
- * Tony Lindgren <tony@atomide.com>
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * NOTE: This timer is not the same timer as the old OMAP1 MPU timer.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-
-#include <plat/common.h>
-#include <plat/board.h>
-
-#include <plat/clock.h>
-
-
-/*
- * 32KHz clocksource ... always available, on pretty most chips except
- * OMAP 730 and 1510.  Other timers could be used as clocksources, with
- * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
- * but systems won't necessarily want to spend resources that way.
- */
-
-#define OMAP16XX_TIMER_32K_SYNCHRONIZED		0xfffbc410
-
-#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
-
-#include <linux/clocksource.h>
-
-/*
- * offset_32k holds the init time counter value. It is then subtracted
- * from every counter read to achieve a counter that counts time from the
- * kernel boot (needed for sched_clock()).
- */
-static u32 offset_32k __read_mostly;
-
-#ifdef CONFIG_ARCH_OMAP16XX
-static cycle_t omap16xx_32k_read(struct clocksource *cs)
-{
-	return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
-}
-#else
-#define omap16xx_32k_read	NULL
-#endif
-
-#ifdef CONFIG_ARCH_OMAP2420
-static cycle_t omap2420_32k_read(struct clocksource *cs)
-{
-	return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
-}
-#else
-#define omap2420_32k_read	NULL
-#endif
-
-#ifdef CONFIG_ARCH_OMAP2430
-static cycle_t omap2430_32k_read(struct clocksource *cs)
-{
-	return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
-}
-#else
-#define omap2430_32k_read	NULL
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-static cycle_t omap34xx_32k_read(struct clocksource *cs)
-{
-	return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
-}
-#else
-#define omap34xx_32k_read	NULL
-#endif
-
-#ifdef CONFIG_ARCH_OMAP4
-static cycle_t omap44xx_32k_read(struct clocksource *cs)
-{
-	return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
-}
-#else
-#define omap44xx_32k_read	NULL
-#endif
-
-/*
- * Kernel assumes that sched_clock can be called early but may not have
- * things ready yet.
- */
-static cycle_t omap_32k_read_dummy(struct clocksource *cs)
-{
-	return 0;
-}
-
-static struct clocksource clocksource_32k = {
-	.name		= "32k_counter",
-	.rating		= 250,
-	.read		= omap_32k_read_dummy,
-	.mask		= CLOCKSOURCE_MASK(32),
-	.shift		= 10,
-	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
-/*
- * Returns current time from boot in nsecs. It's OK for this to wrap
- * around for now, as it's just a relative time stamp.
- */
-unsigned long long sched_clock(void)
-{
-	return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
-				  clocksource_32k.mult, clocksource_32k.shift);
-}
-
-/**
- * read_persistent_clock -  Return time from a persistent clock.
- *
- * Reads the time from a source which isn't disabled during PM, the
- * 32k sync timer.  Convert the cycles elapsed since last read into
- * nsecs and adds to a monotonically increasing timespec.
- */
-static struct timespec persistent_ts;
-static cycles_t cycles, last_cycles;
-void read_persistent_clock(struct timespec *ts)
-{
-	unsigned long long nsecs;
-	cycles_t delta;
-	struct timespec *tsp = &persistent_ts;
-
-	last_cycles = cycles;
-	cycles = clocksource_32k.read(&clocksource_32k);
-	delta = cycles - last_cycles;
-
-	nsecs = clocksource_cyc2ns(delta,
-				   clocksource_32k.mult, clocksource_32k.shift);
-
-	timespec_add_ns(tsp, nsecs);
-	*ts = *tsp;
-}
-
-static int __init omap_init_clocksource_32k(void)
-{
-	static char err[] __initdata = KERN_ERR
-			"%s: can't register clocksource!\n";
-
-	if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
-		struct clk *sync_32k_ick;
-
-		if (cpu_is_omap16xx())
-			clocksource_32k.read = omap16xx_32k_read;
-		else if (cpu_is_omap2420())
-			clocksource_32k.read = omap2420_32k_read;
-		else if (cpu_is_omap2430())
-			clocksource_32k.read = omap2430_32k_read;
-		else if (cpu_is_omap34xx())
-			clocksource_32k.read = omap34xx_32k_read;
-		else if (cpu_is_omap44xx())
-			clocksource_32k.read = omap44xx_32k_read;
-		else
-			return -ENODEV;
-
-		sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
-		if (sync_32k_ick)
-			clk_enable(sync_32k_ick);
-
-		clocksource_32k.mult = clocksource_hz2mult(32768,
-					    clocksource_32k.shift);
-
-		offset_32k = clocksource_32k.read(&clocksource_32k);
-
-		if (clocksource_register(&clocksource_32k))
-			printk(err, clocksource_32k.name);
-	}
-	return 0;
-}
-arch_initcall(omap_init_clocksource_32k);
-
-#endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
-
-- 
1.7.3.1.120.g38a18

[PATCH 2/5] arm: omap: counter-32k: convert to pm_runtime API

[Felipe Balbi]

Trivial patch removing clock framework and adding
pm_runtime API.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/plat-omap/counter-32k.c |   48 ++++++++++---------------------------
 1 files changed, 13 insertions(+), 35 deletions(-)

diff --git a/arch/arm/plat-omap/counter-32k.c b/arch/arm/plat-omap/counter-32k.c
index f3fcb38..7bfd67a 100644
--- a/arch/arm/plat-omap/counter-32k.c
+++ b/arch/arm/plat-omap/counter-32k.c
@@ -27,7 +27,7 @@
 #include <linux/time.h>
 #include <linux/clocksource.h>
 #include <linux/platform_device.h>
-#include <linux/clk.h>
+#include <linux/pm_runtime.h>
 #include <linux/err.h>
 
 struct omap_counter_32k_device {
@@ -37,7 +37,6 @@ struct omap_counter_32k_device {
 	cycles_t		last_cycles;
 
 	struct device		*dev;
-	struct clk		*ick;
 	void __iomem		*base;
 
 	/*
@@ -117,7 +116,6 @@ static int __init omap_counter_32k_probe(struct platform_device *pdev)
 {
 	struct omap_counter_32k_device		*omap;
 	struct resource			*res;
-	struct clk			*ick;
 
 	int				ret;
 
@@ -130,11 +128,18 @@ static int __init omap_counter_32k_probe(struct platform_device *pdev)
 		goto err0;
 	}
 
+	pm_runtime_enable(&pdev->dev);
+	ret = pm_runtime_get_sync(&pdev->dev);
+	if (ret) {
+		dev_dbg(&pdev->dev, "unable to enable runtime pm\n");
+		goto err1;
+	}
+
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	if (!res) {
 		dev_dbg(&pdev->dev, "couldn't get resource\n");
 		ret = -ENODEV;
-		goto err1;
+		goto err2;
 	}
 
 	base = ioremap(res->start, resource_size(res));
@@ -144,22 +149,8 @@ static int __init omap_counter_32k_probe(struct platform_device *pdev)
 		goto err2;
 	}
 
-	ick = clk_get(&pdev->dev, "ick");
-	if (IS_ERR(ick)) {
-		dev_dbg(&pdev->dev, "couldn't get clock\n");
-		ret = PTR_ERR(ick);
-		goto err3;
-	}
-
-	ret = clk_enable(ick);
-	if (ret) {
-		dev_dbg(&pdev->dev, "couldn't enable clock\n");
-		goto err4;
-	}
-
 	omap->base	= base;
 	omap->dev	= &pdev->dev;
-	omap->ick	= ick;
 
 	omap->cs.name	= "counter-32k";
 	omap->cs.rating	= 250;
@@ -174,7 +165,7 @@ static int __init omap_counter_32k_probe(struct platform_device *pdev)
 	ret = clocksource_register(&omap->cs);
 	if (ret) {
 		dev_dbg(&pdev->dev, "failed to register clocksource\n");
-		goto err5;
+		goto err3;
 	}
 
 	/* initialize our offset */
@@ -190,16 +181,12 @@ static int __init omap_counter_32k_probe(struct platform_device *pdev)
 
 	return 0;
 
-err5:
-	clk_disable(ick);
-
-err4:
-	clk_put(ick);
-
 err3:
 	iounmap(base);
 
 err2:
+	pm_runtime_put_sync(&pdev->dev);
+
 err1:
 	kfree(omap);
 
@@ -211,9 +198,8 @@ static int __exit omap_counter_32k_remove(struct platform_device *pdev)
 {
 	struct omap_counter_32k_device	*omap = platform_get_drvdata(pdev);
 
+	pm_runtime_put_sync(&pdev->dev);
 	clocksource_unregister(&omap->cs);
-	clk_disable(omap->ick);
-	clk_put(omap->ick);
 	iounmap(omap->base);
 	kfree(omap);
 	platform_set_drvdata(pdev, NULL);
@@ -221,16 +207,8 @@ static int __exit omap_counter_32k_remove(struct platform_device *pdev)
 	return 0;
 }
 
-static void omap_counter_32k_shutdown(struct platform_device *pdev)
-{
-	struct omap_counter_32k_device	*omap = platform_get_drvdata(pdev);
-
-	clk_disable(omap->ick);
-}
-
 static struct platform_driver omap_counter_32k_driver = {
 	.remove		= __exit_p(omap_counter_32k_remove),
-	.shutdown	= omap_counter_32k_shutdown,
 	.driver		= {
 		.name	= "omap-counter-32k",
 	},
-- 
1.7.3.1.120.g38a18

[PATCH 3/5] clocksource: move omap 32k timer to drivers/clocksource

[Felipe Balbi]

this is a better location for that driver. No
changes to the code otherwise.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/plat-omap/Makefile                        |    2 +-
 drivers/clocksource/Makefile                       |    1 +
 .../clocksource/omap-32k.c                         |    2 +-
 3 files changed, 3 insertions(+), 2 deletions(-)
 rename arch/arm/plat-omap/counter-32k.c => drivers/clocksource/omap-32k.c (98%)

diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index ff57f33..2a15191 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \
-	 usb.o fb.o io.o counter-32k.o
+	 usb.o fb.o io.o
 obj-m :=
 obj-n :=
 obj-  :=
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index be61ece..ccdbc16 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -1,6 +1,7 @@
 obj-$(CONFIG_ATMEL_TCB_CLKSRC)	+= tcb_clksrc.o
 obj-$(CONFIG_X86_CYCLONE_TIMER)	+= cyclone.o
 obj-$(CONFIG_X86_PM_TIMER)	+= acpi_pm.o
+obj-$(CONFIG_OMAP_32K_TIMER)	+= omap-32k.o
 obj-$(CONFIG_SCx200HR_TIMER)	+= scx200_hrt.o
 obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC)	+= cs5535-clockevt.o
 obj-$(CONFIG_SH_TIMER_CMT)	+= sh_cmt.o
diff --git a/arch/arm/plat-omap/counter-32k.c b/drivers/clocksource/omap-32k.c
similarity index 98%
rename from arch/arm/plat-omap/counter-32k.c
rename to drivers/clocksource/omap-32k.c
index 7bfd67a..5c61510 100644
--- a/arch/arm/plat-omap/counter-32k.c
+++ b/drivers/clocksource/omap-32k.c
@@ -1,5 +1,5 @@
 /*
- * counter-32k.c -- OMAP 32k Sync Timer Clocksource Driver
+ * omap-32k.c -- OMAP 32k Sync Timer Clocksource Driver
  *
  * Copyright (C) 2005-2010 Tony Lindgren <tony@atomide.com>
  * Copyright (C) 2010 Nokia Corporation
-- 
1.7.3.1.120.g38a18

[PATCH 4/5] arm: omap: introduce 32k timer hwmod for omap2/3/4

[Felipe Balbi]

Add 32k timer hwmod to the database.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_2420_data.c |   52 +++++++++++++++++++++++
 arch/arm/mach-omap2/omap_hwmod_2430_data.c |   52 +++++++++++++++++++++++
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |   51 +++++++++++++++++++++++
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |   61 ++++++++++++++++++++++++++++
 4 files changed, 216 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a1a3dd6..05b9d2a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -557,6 +557,57 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
 	.flags		= HWMOD_16BIT_REG,
 };
 
+/*
+ * 'counter' class
+ * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
+ */
+
+static struct omap_hwmod_class omap2420_counter_hwmod_class = {
+	.name = "counter",
+};
+
+/* counter_32k */
+static struct omap_hwmod omap2420_counter_32k_hwmod;
+static struct omap_hwmod_addr_space omap2420_counter_32k_addrs[] = {
+	{
+		.pa_start	= 0x48004000,
+		.pa_end		= 0x48000fff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_wkup -> counter_32k */
+static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = {
+	.master		= &omap2420_l4_wkup_hwmod,
+	.slave		= &omap2420_counter_32k_hwmod,
+	.clk		= "l4_ck",
+	.addr		= omap2420_counter_32k_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap2420_counter_32k_addrs),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* counter_32k slave ports */
+static struct omap_hwmod_ocp_if *omap2420_counter_32k_slaves[] = {
+	&omap2420_l4_wkup__counter_32k,
+};
+
+static struct omap_hwmod omap2420_counter_32k_hwmod = {
+	.name		= "counter_32k",
+	.class		= &omap2420_counter_hwmod_class,
+	.main_clk	= "sync_32k_ick",
+	.prcm = {
+		.omap2 = {
+			.prcm_reg_id = 1,
+			.module_bit = OMAP24XX_EN_GPT1_SHIFT,
+			.idlest_reg_id = 1,
+			.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
+		},
+	},
+	.slaves		= omap2420_counter_32k_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap2420_counter_32k_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
 static __initdata struct omap_hwmod *omap2420_hwmods[] = {
 	&omap2420_l3_main_hwmod,
 	&omap2420_l4_core_hwmod,
@@ -569,6 +620,7 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
 	&omap2420_uart3_hwmod,
 	&omap2420_i2c1_hwmod,
 	&omap2420_i2c2_hwmod,
+	&omap2420_counter_32k_hwmod,
 	NULL,
 };
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 7cf0d3a..96e9b12 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -569,6 +569,57 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
+/*
+ * 'counter' class
+ * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
+ */
+
+static struct omap_hwmod_class omap2430_counter_hwmod_class = {
+	.name = "counter",
+};
+
+/* counter_32k */
+static struct omap_hwmod omap2430_counter_32k_hwmod;
+static struct omap_hwmod_addr_space omap2430_counter_32k_addrs[] = {
+	{
+		.pa_start	= 0x48004000,
+		.pa_end		= 0x48000fff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_wkup -> counter_32k */
+static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = {
+	.master		= &omap2430_l4_wkup_hwmod,
+	.slave		= &omap2430_counter_32k_hwmod,
+	.clk		= "l4_ck",
+	.addr		= omap2430_counter_32k_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap2430_counter_32k_addrs),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* counter_32k slave ports */
+static struct omap_hwmod_ocp_if *omap2430_counter_32k_slaves[] = {
+	&omap2430_l4_wkup__counter_32k,
+};
+
+static struct omap_hwmod omap2430_counter_32k_hwmod = {
+	.name		= "counter_32k",
+	.class		= &omap2430_counter_hwmod_class,
+	.main_clk	= "sync_32k_ick",
+	.prcm = {
+		.omap2 = {
+			.prcm_reg_id = 1,
+			.module_bit = OMAP24XX_EN_GPT1_SHIFT,
+			.idlest_reg_id = 1,
+			.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
+		},
+	},
+	.slaves		= omap2430_counter_32k_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap2430_counter_32k_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
 static __initdata struct omap_hwmod *omap2430_hwmods[] = {
 	&omap2430_l3_main_hwmod,
 	&omap2430_l4_core_hwmod,
@@ -581,6 +632,7 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
 	&omap2430_uart3_hwmod,
 	&omap2430_i2c1_hwmod,
 	&omap2430_i2c2_hwmod,
+	&omap2430_counter_32k_hwmod,
 	NULL,
 };
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index ed6bf4a..8e8fae4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -736,6 +736,56 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
+/*
+ * 'counter' class
+ * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
+ */
+static struct omap_hwmod_class omap3xxx_counter_hwmod_class = {
+	.name = "counter",
+};
+
+/* counter_32k */
+static struct omap_hwmod omap3xxx_counter_32k_hwmod;
+static struct omap_hwmod_addr_space omap3xxx_counter_32k_addrs[] = {
+	{
+		.pa_start	= 0x48324000,
+		.pa_end		= 0x48320fff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_wkup -> counter_32k */
+static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__counter_32k = {
+	.master		= &omap3xxx_l4_wkup_hwmod,
+	.slave		= &omap3xxx_counter_32k_hwmod,
+	.clk		= "wkup_l4_ick",
+	.addr		= omap3xxx_counter_32k_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap3xxx_counter_32k_addrs),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* counter_32k slave ports */
+static struct omap_hwmod_ocp_if *omap3xxx_counter_32k_slaves[] = {
+	&omap3xxx_l4_wkup__counter_32k,
+};
+
+static struct omap_hwmod omap3xxx_counter_32k_hwmod = {
+	.name		= "counter_32k",
+	.class		= &omap3xxx_counter_hwmod_class,
+	.main_clk	= "omap_32ksync_ick",
+	.prcm = {
+		.omap2 = {
+			.prcm_reg_id = 1,
+			.module_bit = OMAP3430_EN_GPT1_SHIFT,
+			.idlest_reg_id = 1,
+			.idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT,
+		},
+	},
+	.slaves		= omap3xxx_counter_32k_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap3xxx_counter_32k_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
 static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
 	&omap3xxx_l3_main_hwmod,
 	&omap3xxx_l4_core_hwmod,
@@ -751,6 +801,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
 	&omap3xxx_i2c1_hwmod,
 	&omap3xxx_i2c2_hwmod,
 	&omap3xxx_i2c3_hwmod,
+	&omap3xxx_counter_32k_hwmod,
 	NULL,
 };
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 0d5c6eb..e86dc11 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -383,6 +383,63 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
 };
 
 /*
+ * 'counter' class
+ * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
+	.rev_offs	= 0x0000,
+	.sysc_offs	= 0x0004,
+	.sysc_flags	= SYSC_HAS_SIDLEMODE,
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+	.sysc_fields	= &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_counter_hwmod_class = {
+	.name = "counter",
+	.sysc = &omap44xx_counter_sysc,
+};
+
+/* counter_32k */
+static struct omap_hwmod omap44xx_counter_32k_hwmod;
+static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = {
+	{
+		.pa_start	= 0x4a304000,
+		.pa_end		= 0x4a30401f,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_wkup -> counter_32k */
+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = {
+	.master		= &omap44xx_l4_wkup_hwmod,
+	.slave		= &omap44xx_counter_32k_hwmod,
+	.clk		= "l4_wkup_clk_mux_ck",
+	.addr		= omap44xx_counter_32k_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_counter_32k_addrs),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* counter_32k slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = {
+	&omap44xx_l4_wkup__counter_32k,
+};
+
+static struct omap_hwmod omap44xx_counter_32k_hwmod = {
+	.name		= "counter_32k",
+	.class		= &omap44xx_counter_hwmod_class,
+	.main_clk	= "sys_32k_ck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_counter_32k_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_counter_32k_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/*
  * 'i2c' class
  * multimaster high-speed i2c controller
  */
@@ -1058,6 +1115,10 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
 	&omap44xx_l4_cfg_hwmod,
 	&omap44xx_l4_per_hwmod,
 	&omap44xx_l4_wkup_hwmod,
+
+	/* counter class */
+	&omap44xx_counter_32k_hwmod,
+
 	/* i2c class */
 	&omap44xx_i2c1_hwmod,
 	&omap44xx_i2c2_hwmod,
-- 
1.7.3.1.120.g38a18

[PATCH 5/5] arm: omap: 32k: move to omap_device_build

[Felipe Balbi]

search on hwmod database and build omap_device
on the fly.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap2/devices.c |   53 +++++++++++++++++++++--------------------
 1 files changed, 27 insertions(+), 26 deletions(-)

diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index e64a78e..2d851b9 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -33,39 +33,40 @@
 #include "mux.h"
 #include "control.h"
 
-static struct resource omap_32k_resources[] = {
+struct omap_device_pm_latency omap_32k_latency[] = {
 	{
-		.flags		= IORESOURCE_MEM,
+		.deactivate_func	= omap_device_idle_hwmods,
+		.activate_func		= omap_device_enable_hwmods,
+		.flags			= OMAP_DEVICE_LATENCY_AUTO_ADJUST,
 	},
 };
 
-static struct platform_device omap_32k_device = {
-	.name			= "omap-counter-32k",
-	.id			= -1,
-	.num_resources		= ARRAY_SIZE(omap_32k_resources),
-	.resource		= omap_32k_resources,
-};
-
-static void omap_init_32k(void)
+static int __init omap_init_32k(void)
 {
-	if (cpu_is_omap2420()) {
-		omap_32k_resources[0].start = OMAP2420_32KSYNCT_BASE;
-		omap_32k_resources[0].end = OMAP2420_32KSYNCT_BASE + SZ_4K;
-	} else if (cpu_is_omap2430()) {
-		omap_32k_resources[0].start = OMAP2430_32KSYNCT_BASE;
-		omap_32k_resources[0].end = OMAP2430_32KSYNCT_BASE + SZ_4K;
-	} else if (cpu_is_omap34xx()) {
-		omap_32k_resources[0].start = OMAP3430_32KSYNCT_BASE;
-		omap_32k_resources[0].end = OMAP3430_32KSYNCT_BASE + SZ_4K;
-	} else if (cpu_is_omap44xx()) {
-		omap_32k_resources[0].start = OMAP4430_32KSYNCT_BASE;
-		omap_32k_resources[0].end = OMAP4430_32KSYNCT_BASE + SZ_4K;
-	} else {	/* not supported */
-		return;
+	struct omap_device	*od;
+	struct omap_hwmod	*oh;
+
+	int			id = -1;
+
+	const char		*oh_name = "counter_32k";
+	const char		*dev_name = "omap-counter-32k";
+
+	if (!cpu_class_is_omap2())
+		return 0;
+
+	oh = omap_hwmod_lookup(oh_name);
+	if (!oh) {
+		pr_err("Could not lookup %s hwmod\n", oh_name);
+		return -ENODEV;
 	}
 
-	(void) platform_device_register(&omap_32k_device);
-};
+	od = omap_device_build(dev_name, id, oh, NULL, 0,
+			omap_32k_latency, ARRAY_SIZE(omap_32k_latency), 0);
+	WARN(IS_ERR(od), "Can't build omap device for %s:%s.\n",
+			dev_name, oh->name);
+
+	return 0;
+}
 
 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
 
-- 
1.7.3.1.120.g38a18

Re: [PATCH 0/5] 32k sync timer meets hwmod

[Felipe Balbi]

On Tue, Oct 19, 2010 at 04:22:11AM -0500, Balbi, Felipe wrote:
>Hi all,
>
>Converted 32k-sync timer to platform_driver
>and now using pm_runtime and hwmod.
>
>Tested on 3430 by me and 4430 by Tarun
>
>If someone could test on 2430 and 2420, I would
>be really glad.

of course, after it's tested on 2430 and 2420 I will re-send Ccing
LAKML and clksource maintainer.

-- 
balbi

Re: [PATCH 0/5] 32k sync timer meets hwmod

[Cousson, Benoit]

Hi Felipe,

Just one minor comment about the subjects.

On 10/19/2010 11:22 AM, Felipe Balbi wrote:
> Hi all,
>
> Converted 32k-sync timer to platform_driver
> and now using pm_runtime and hwmod.
>
> Tested on 3430 by me and 4430 by Tarun
>
> If someone could test on 2430 and 2420, I would
> be really glad.
>
> Felipe Balbi (5):
>    arm: omap1/2/3/4: convert 32k-sync driver to a platform_driver
>    arm: omap: counter-32k: convert to pm_runtime API
>    clocksource: move omap 32k timer to drivers/clocksource
>    arm: omap: introduce 32k timer hwmod for omap2/3/4
>    arm: omap: 32k: move to omap_device_build

32k-sync, counter-32k, 32k timer, and then 32k... That's a lot of 
different names for that IP :)

You should maybe stick to counter-32k and add a comment saying that the 
synctimer32k name was so bad, that we renamed it counter-32k.

Thanks,
Benoit

>
>   arch/arm/mach-omap1/devices.c              |   24 +++
>   arch/arm/mach-omap2/clock2420_data.c       |    2 +-
>   arch/arm/mach-omap2/clock2430_data.c       |    2 +-
>   arch/arm/mach-omap2/clock3xxx_data.c       |    2 +-
>   arch/arm/mach-omap2/devices.c              |   36 +++++
>   arch/arm/mach-omap2/omap_hwmod_2420_data.c |   52 ++++++
>   arch/arm/mach-omap2/omap_hwmod_2430_data.c |   52 ++++++
>   arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |   51 ++++++
>   arch/arm/mach-omap2/omap_hwmod_44xx_data.c |   61 ++++++++
>   arch/arm/plat-omap/Makefile                |    2 +-
>   arch/arm/plat-omap/counter_32k.c           |  183 ----------------------
>   drivers/clocksource/Makefile               |    1 +
>   drivers/clocksource/omap-32k.c             |  231 ++++++++++++++++++++++++++++
>   13 files changed, 512 insertions(+), 187 deletions(-)
>   delete mode 100644 arch/arm/plat-omap/counter_32k.c
>   create mode 100644 drivers/clocksource/omap-32k.c
>

Re: [PATCH 4/5] arm: omap: introduce 32k timer hwmod for omap2/3/4

[Cousson, Benoit]

On 10/19/2010 11:22 AM, Balbi, Felipe wrote:
> Add 32k timer hwmod to the database.
>
> Signed-off-by: Felipe Balbi<balbi@ti.com>
Could you add my sign-off as well on this one for the OMAP4 part?

Thanks,
Benoit

> ---
>   arch/arm/mach-omap2/omap_hwmod_2420_data.c |   52 +++++++++++++++++++++++
>   arch/arm/mach-omap2/omap_hwmod_2430_data.c |   52 +++++++++++++++++++++++
>   arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |   51 +++++++++++++++++++++++
>   arch/arm/mach-omap2/omap_hwmod_44xx_data.c |   61 ++++++++++++++++++++++++++++
>   4 files changed, 216 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> index a1a3dd6..05b9d2a 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> @@ -557,6 +557,57 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
>   	.flags		= HWMOD_16BIT_REG,
>   };
>
> +/*
> + * 'counter' class
> + * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
> + */
> +
> +static struct omap_hwmod_class omap2420_counter_hwmod_class = {
> +	.name = "counter",
> +};
> +
> +/* counter_32k */
> +static struct omap_hwmod omap2420_counter_32k_hwmod;
> +static struct omap_hwmod_addr_space omap2420_counter_32k_addrs[] = {
> +	{
> +		.pa_start	= 0x48004000,
> +		.pa_end		= 0x48000fff,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* l4_wkup ->  counter_32k */
> +static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = {
> +	.master		=&omap2420_l4_wkup_hwmod,
> +	.slave		=&omap2420_counter_32k_hwmod,
> +	.clk		= "l4_ck",
> +	.addr		= omap2420_counter_32k_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap2420_counter_32k_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* counter_32k slave ports */
> +static struct omap_hwmod_ocp_if *omap2420_counter_32k_slaves[] = {
> +	&omap2420_l4_wkup__counter_32k,
> +};
> +
> +static struct omap_hwmod omap2420_counter_32k_hwmod = {
> +	.name		= "counter_32k",
> +	.class		=&omap2420_counter_hwmod_class,
> +	.main_clk	= "sync_32k_ick",
> +	.prcm = {
> +		.omap2 = {
> +			.prcm_reg_id = 1,
> +			.module_bit = OMAP24XX_EN_GPT1_SHIFT,
> +			.idlest_reg_id = 1,
> +			.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
> +		},
> +	},
> +	.slaves		= omap2420_counter_32k_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap2420_counter_32k_slaves),
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
> +};
> +
>   static __initdata struct omap_hwmod *omap2420_hwmods[] = {
>   	&omap2420_l3_main_hwmod,
>   	&omap2420_l4_core_hwmod,
> @@ -569,6 +620,7 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
>   	&omap2420_uart3_hwmod,
>   	&omap2420_i2c1_hwmod,
>   	&omap2420_i2c2_hwmod,
> +	&omap2420_counter_32k_hwmod,
>   	NULL,
>   };
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> index 7cf0d3a..96e9b12 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> @@ -569,6 +569,57 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
>   	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
>   };
>
> +/*
> + * 'counter' class
> + * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
> + */
> +
> +static struct omap_hwmod_class omap2430_counter_hwmod_class = {
> +	.name = "counter",
> +};
> +
> +/* counter_32k */
> +static struct omap_hwmod omap2430_counter_32k_hwmod;
> +static struct omap_hwmod_addr_space omap2430_counter_32k_addrs[] = {
> +	{
> +		.pa_start	= 0x48004000,
> +		.pa_end		= 0x48000fff,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* l4_wkup ->  counter_32k */
> +static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = {
> +	.master		=&omap2430_l4_wkup_hwmod,
> +	.slave		=&omap2430_counter_32k_hwmod,
> +	.clk		= "l4_ck",
> +	.addr		= omap2430_counter_32k_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap2430_counter_32k_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* counter_32k slave ports */
> +static struct omap_hwmod_ocp_if *omap2430_counter_32k_slaves[] = {
> +	&omap2430_l4_wkup__counter_32k,
> +};
> +
> +static struct omap_hwmod omap2430_counter_32k_hwmod = {
> +	.name		= "counter_32k",
> +	.class		=&omap2430_counter_hwmod_class,
> +	.main_clk	= "sync_32k_ick",
> +	.prcm = {
> +		.omap2 = {
> +			.prcm_reg_id = 1,
> +			.module_bit = OMAP24XX_EN_GPT1_SHIFT,
> +			.idlest_reg_id = 1,
> +			.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
> +		},
> +	},
> +	.slaves		= omap2430_counter_32k_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap2430_counter_32k_slaves),
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
> +};
> +
>   static __initdata struct omap_hwmod *omap2430_hwmods[] = {
>   	&omap2430_l3_main_hwmod,
>   	&omap2430_l4_core_hwmod,
> @@ -581,6 +632,7 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
>   	&omap2430_uart3_hwmod,
>   	&omap2430_i2c1_hwmod,
>   	&omap2430_i2c2_hwmod,
> +	&omap2430_counter_32k_hwmod,
>   	NULL,
>   };
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> index ed6bf4a..8e8fae4 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> @@ -736,6 +736,56 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {
>   	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
>   };
>
> +/*
> + * 'counter' class
> + * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
> + */
> +static struct omap_hwmod_class omap3xxx_counter_hwmod_class = {
> +	.name = "counter",
> +};
> +
> +/* counter_32k */
> +static struct omap_hwmod omap3xxx_counter_32k_hwmod;
> +static struct omap_hwmod_addr_space omap3xxx_counter_32k_addrs[] = {
> +	{
> +		.pa_start	= 0x48324000,
> +		.pa_end		= 0x48320fff,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* l4_wkup ->  counter_32k */
> +static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__counter_32k = {
> +	.master		=&omap3xxx_l4_wkup_hwmod,
> +	.slave		=&omap3xxx_counter_32k_hwmod,
> +	.clk		= "wkup_l4_ick",
> +	.addr		= omap3xxx_counter_32k_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap3xxx_counter_32k_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* counter_32k slave ports */
> +static struct omap_hwmod_ocp_if *omap3xxx_counter_32k_slaves[] = {
> +	&omap3xxx_l4_wkup__counter_32k,
> +};
> +
> +static struct omap_hwmod omap3xxx_counter_32k_hwmod = {
> +	.name		= "counter_32k",
> +	.class		=&omap3xxx_counter_hwmod_class,
> +	.main_clk	= "omap_32ksync_ick",
> +	.prcm = {
> +		.omap2 = {
> +			.prcm_reg_id = 1,
> +			.module_bit = OMAP3430_EN_GPT1_SHIFT,
> +			.idlest_reg_id = 1,
> +			.idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT,
> +		},
> +	},
> +	.slaves		= omap3xxx_counter_32k_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap3xxx_counter_32k_slaves),
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
> +};
> +
>   static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
>   	&omap3xxx_l3_main_hwmod,
>   	&omap3xxx_l4_core_hwmod,
> @@ -751,6 +801,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
>   	&omap3xxx_i2c1_hwmod,
>   	&omap3xxx_i2c2_hwmod,
>   	&omap3xxx_i2c3_hwmod,
> +	&omap3xxx_counter_32k_hwmod,
>   	NULL,
>   };
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> index 0d5c6eb..e86dc11 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> @@ -383,6 +383,63 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
>   };
>
>   /*
> + * 'counter' class
> + * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
> + */
> +
> +static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
> +	.rev_offs	= 0x0000,
> +	.sysc_offs	= 0x0004,
> +	.sysc_flags	= SYSC_HAS_SIDLEMODE,
> +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> +	.sysc_fields	=&omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap44xx_counter_hwmod_class = {
> +	.name = "counter",
> +	.sysc =&omap44xx_counter_sysc,
> +};
> +
> +/* counter_32k */
> +static struct omap_hwmod omap44xx_counter_32k_hwmod;
> +static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = {
> +	{
> +		.pa_start	= 0x4a304000,
> +		.pa_end		= 0x4a30401f,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* l4_wkup ->  counter_32k */
> +static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = {
> +	.master		=&omap44xx_l4_wkup_hwmod,
> +	.slave		=&omap44xx_counter_32k_hwmod,
> +	.clk		= "l4_wkup_clk_mux_ck",
> +	.addr		= omap44xx_counter_32k_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap44xx_counter_32k_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* counter_32k slave ports */
> +static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = {
> +	&omap44xx_l4_wkup__counter_32k,
> +};
> +
> +static struct omap_hwmod omap44xx_counter_32k_hwmod = {
> +	.name		= "counter_32k",
> +	.class		=&omap44xx_counter_hwmod_class,
> +	.main_clk	= "sys_32k_ck",
> +	.prcm = {
> +		.omap4 = {
> +			.clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL,
> +		},
> +	},
> +	.slaves		= omap44xx_counter_32k_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap44xx_counter_32k_slaves),
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +};
> +
> +/*
>    * 'i2c' class
>    * multimaster high-speed i2c controller
>    */
> @@ -1058,6 +1115,10 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
>   	&omap44xx_l4_cfg_hwmod,
>   	&omap44xx_l4_per_hwmod,
>   	&omap44xx_l4_wkup_hwmod,
> +
> +	/* counter class */
> +	&omap44xx_counter_32k_hwmod,
> +
>   	/* i2c class */
>   	&omap44xx_i2c1_hwmod,
>   	&omap44xx_i2c2_hwmod,

RE: [PATCH 0/5] 32k sync timer meets hwmod

[DebBarma, Tarun Kanti]

> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> owner@vger.kernel.org] On Behalf Of Cousson, Benoit
> Sent: Thursday, October 21, 2010 3:00 AM
> To: Balbi, Felipe
> Cc: Tony Lindgren; Linux OMAP Mailing List
> Subject: Re: [PATCH 0/5] 32k sync timer meets hwmod
> 
> Hi Felipe,
> 
> Just one minor comment about the subjects.
> 
> On 10/19/2010 11:22 AM, Felipe Balbi wrote:
> > Hi all,
> >
> > Converted 32k-sync timer to platform_driver
> > and now using pm_runtime and hwmod.
> >
> > Tested on 3430 by me and 4430 by Tarun
> >
> > If someone could test on 2430 and 2420, I would
> > be really glad.
> >
> > Felipe Balbi (5):
> >    arm: omap1/2/3/4: convert 32k-sync driver to a platform_driver
> >    arm: omap: counter-32k: convert to pm_runtime API
> >    clocksource: move omap 32k timer to drivers/clocksource
> >    arm: omap: introduce 32k timer hwmod for omap2/3/4
> >    arm: omap: 32k: move to omap_device_build
> 
> 32k-sync, counter-32k, 32k timer, and then 32k... That's a lot of
> different names for that IP :)
> 
> You should maybe stick to counter-32k and add a comment saying that the
> synctimer32k name was so bad, that we renamed it counter-32k.
I have used counter-32k name for one of the clock source names in dmtimer.
-tarun

> 
> >
> >   arch/arm/mach-omap1/devices.c              |   24 +++
> >   arch/arm/mach-omap2/clock2420_data.c       |    2 +-
> >   arch/arm/mach-omap2/clock2430_data.c       |    2 +-
> >   arch/arm/mach-omap2/clock3xxx_data.c       |    2 +-
> >   arch/arm/mach-omap2/devices.c              |   36 +++++
> >   arch/arm/mach-omap2/omap_hwmod_2420_data.c |   52 ++++++
> >   arch/arm/mach-omap2/omap_hwmod_2430_data.c |   52 ++++++
> >   arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |   51 ++++++
> >   arch/arm/mach-omap2/omap_hwmod_44xx_data.c |   61 ++++++++
> >   arch/arm/plat-omap/Makefile                |    2 +-
> >   arch/arm/plat-omap/counter_32k.c           |  183 --------------------
> --
> >   drivers/clocksource/Makefile               |    1 +
> >   drivers/clocksource/omap-32k.c             |  231
> ++++++++++++++++++++++++++++
> >   13 files changed, 512 insertions(+), 187 deletions(-)
> >   delete mode 100644 arch/arm/plat-omap/counter_32k.c
> >   create mode 100644 drivers/clocksource/omap-32k.c
> >
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 4/5] arm: omap: introduce 32k timer hwmod for omap2/3/4

[Felipe Balbi]

On Wed, Oct 20, 2010 at 04:32:04PM -0500, Cousson, Benoit wrote:
>On 10/19/2010 11:22 AM, Balbi, Felipe wrote:
>> Add 32k timer hwmod to the database.
>>
>> Signed-off-by: Felipe Balbi<balbi@ti.com>
>Could you add my sign-off as well on this one for the OMAP4 part?

oops, my mistake, sorry for that. True, the OMAP4 part is done by
Benoit, I'll add the sign-off and re-send after I get confirmation about
2430/2420.

-- 
balbi

Re: [PATCH 2/5] arm: omap: counter-32k: convert to pm_runtime API

[Kevin Hilman]

Felipe Balbi <balbi@ti.com> writes:

> Trivial patch removing clock framework and adding
> pm_runtime API.
>
> Signed-off-by: Felipe Balbi <balbi@ti.com>

Minor nit: the runtime PM 'put' calls do not need to be the _sync
versions.  You can easily get by using the "normal" (async) versions
here.

Kevin


> ---
>  arch/arm/plat-omap/counter-32k.c |   48 ++++++++++---------------------------
>  1 files changed, 13 insertions(+), 35 deletions(-)
>
> diff --git a/arch/arm/plat-omap/counter-32k.c b/arch/arm/plat-omap/counter-32k.c
> index f3fcb38..7bfd67a 100644
> --- a/arch/arm/plat-omap/counter-32k.c
> +++ b/arch/arm/plat-omap/counter-32k.c
> @@ -27,7 +27,7 @@
>  #include <linux/time.h>
>  #include <linux/clocksource.h>
>  #include <linux/platform_device.h>
> -#include <linux/clk.h>
> +#include <linux/pm_runtime.h>
>  #include <linux/err.h>
>  
>  struct omap_counter_32k_device {
> @@ -37,7 +37,6 @@ struct omap_counter_32k_device {
>  	cycles_t		last_cycles;
>  
>  	struct device		*dev;
> -	struct clk		*ick;
>  	void __iomem		*base;
>  
>  	/*
> @@ -117,7 +116,6 @@ static int __init omap_counter_32k_probe(struct platform_device *pdev)
>  {
>  	struct omap_counter_32k_device		*omap;
>  	struct resource			*res;
> -	struct clk			*ick;
>  
>  	int				ret;
>  
> @@ -130,11 +128,18 @@ static int __init omap_counter_32k_probe(struct platform_device *pdev)
>  		goto err0;
>  	}
>  
> +	pm_runtime_enable(&pdev->dev);
> +	ret = pm_runtime_get_sync(&pdev->dev);
> +	if (ret) {
> +		dev_dbg(&pdev->dev, "unable to enable runtime pm\n");
> +		goto err1;
> +	}
> +
>  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>  	if (!res) {
>  		dev_dbg(&pdev->dev, "couldn't get resource\n");
>  		ret = -ENODEV;
> -		goto err1;
> +		goto err2;
>  	}
>  
>  	base = ioremap(res->start, resource_size(res));
> @@ -144,22 +149,8 @@ static int __init omap_counter_32k_probe(struct platform_device *pdev)
>  		goto err2;
>  	}
>  
> -	ick = clk_get(&pdev->dev, "ick");
> -	if (IS_ERR(ick)) {
> -		dev_dbg(&pdev->dev, "couldn't get clock\n");
> -		ret = PTR_ERR(ick);
> -		goto err3;
> -	}
> -
> -	ret = clk_enable(ick);
> -	if (ret) {
> -		dev_dbg(&pdev->dev, "couldn't enable clock\n");
> -		goto err4;
> -	}
> -
>  	omap->base	= base;
>  	omap->dev	= &pdev->dev;
> -	omap->ick	= ick;
>  
>  	omap->cs.name	= "counter-32k";
>  	omap->cs.rating	= 250;
> @@ -174,7 +165,7 @@ static int __init omap_counter_32k_probe(struct platform_device *pdev)
>  	ret = clocksource_register(&omap->cs);
>  	if (ret) {
>  		dev_dbg(&pdev->dev, "failed to register clocksource\n");
> -		goto err5;
> +		goto err3;
>  	}
>  
>  	/* initialize our offset */
> @@ -190,16 +181,12 @@ static int __init omap_counter_32k_probe(struct platform_device *pdev)
>  
>  	return 0;
>  
> -err5:
> -	clk_disable(ick);
> -
> -err4:
> -	clk_put(ick);
> -
>  err3:
>  	iounmap(base);
>  
>  err2:
> +	pm_runtime_put_sync(&pdev->dev);
> +
>  err1:
>  	kfree(omap);
>  
> @@ -211,9 +198,8 @@ static int __exit omap_counter_32k_remove(struct platform_device *pdev)
>  {
>  	struct omap_counter_32k_device	*omap = platform_get_drvdata(pdev);
>  
> +	pm_runtime_put_sync(&pdev->dev);
>  	clocksource_unregister(&omap->cs);
> -	clk_disable(omap->ick);
> -	clk_put(omap->ick);
>  	iounmap(omap->base);
>  	kfree(omap);
>  	platform_set_drvdata(pdev, NULL);
> @@ -221,16 +207,8 @@ static int __exit omap_counter_32k_remove(struct platform_device *pdev)
>  	return 0;
>  }
>  
> -static void omap_counter_32k_shutdown(struct platform_device *pdev)
> -{
> -	struct omap_counter_32k_device	*omap = platform_get_drvdata(pdev);
> -
> -	clk_disable(omap->ick);
> -}
> -
>  static struct platform_driver omap_counter_32k_driver = {
>  	.remove		= __exit_p(omap_counter_32k_remove),
> -	.shutdown	= omap_counter_32k_shutdown,
>  	.driver		= {
>  		.name	= "omap-counter-32k",
>  	},

Re: [PATCH 4/5] arm: omap: introduce 32k timer hwmod for omap2/3/4

[Kevin Hilman]

Felipe Balbi <balbi@ti.com> writes:

> Add 32k timer hwmod to the database.
>
> Signed-off-by: Felipe Balbi <balbi@ti.com>

Not sure how this is working correctly on OMAP2 and OMAP3.  All the
hwmods are mising the oh->prcm.omap2.module_offs field.

Without this, _wait_target_ready *should* fail, and the hwmod should not
actually be enabled.

Since this was tested to work, I guess what's happening, is because
module_offs == 0 (OCP_MOD), it's reading from the IDLEST register offset
in OCP_MOD, which is an undefined register.  On 34xx, we get lucky that
that bit is zero so omap2_cm_wait_module_ready succeeds.  On 24xx, the
polarity of the idlest bits is inversed, so this would likely fail on
OMAP2.

Either way, the right fix for this is to ensure that OMAP2/3 hwmods have
.module_offs populated correctly.

Kevin


> ---
>  arch/arm/mach-omap2/omap_hwmod_2420_data.c |   52 +++++++++++++++++++++++
>  arch/arm/mach-omap2/omap_hwmod_2430_data.c |   52 +++++++++++++++++++++++
>  arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |   51 +++++++++++++++++++++++
>  arch/arm/mach-omap2/omap_hwmod_44xx_data.c |   61 ++++++++++++++++++++++++++++
>  4 files changed, 216 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> index a1a3dd6..05b9d2a 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> @@ -557,6 +557,57 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
>  	.flags		= HWMOD_16BIT_REG,
>  };
>  
> +/*
> + * 'counter' class
> + * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
> + */
> +
> +static struct omap_hwmod_class omap2420_counter_hwmod_class = {
> +	.name = "counter",
> +};
> +
> +/* counter_32k */
> +static struct omap_hwmod omap2420_counter_32k_hwmod;
> +static struct omap_hwmod_addr_space omap2420_counter_32k_addrs[] = {
> +	{
> +		.pa_start	= 0x48004000,
> +		.pa_end		= 0x48000fff,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* l4_wkup -> counter_32k */
> +static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = {
> +	.master		= &omap2420_l4_wkup_hwmod,
> +	.slave		= &omap2420_counter_32k_hwmod,
> +	.clk		= "l4_ck",
> +	.addr		= omap2420_counter_32k_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap2420_counter_32k_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* counter_32k slave ports */
> +static struct omap_hwmod_ocp_if *omap2420_counter_32k_slaves[] = {
> +	&omap2420_l4_wkup__counter_32k,
> +};
> +
> +static struct omap_hwmod omap2420_counter_32k_hwmod = {
> +	.name		= "counter_32k",
> +	.class		= &omap2420_counter_hwmod_class,
> +	.main_clk	= "sync_32k_ick",
> +	.prcm = {
> +		.omap2 = {
> +			.prcm_reg_id = 1,
> +			.module_bit = OMAP24XX_EN_GPT1_SHIFT,
> +			.idlest_reg_id = 1,
> +			.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
> +		},
> +	},
> +	.slaves		= omap2420_counter_32k_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap2420_counter_32k_slaves),
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
> +};
> +
>  static __initdata struct omap_hwmod *omap2420_hwmods[] = {
>  	&omap2420_l3_main_hwmod,
>  	&omap2420_l4_core_hwmod,
> @@ -569,6 +620,7 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
>  	&omap2420_uart3_hwmod,
>  	&omap2420_i2c1_hwmod,
>  	&omap2420_i2c2_hwmod,
> +	&omap2420_counter_32k_hwmod,
>  	NULL,
>  };
>  
> diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> index 7cf0d3a..96e9b12 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> @@ -569,6 +569,57 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
>  	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
>  };
>  
> +/*
> + * 'counter' class
> + * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
> + */
> +
> +static struct omap_hwmod_class omap2430_counter_hwmod_class = {
> +	.name = "counter",
> +};
> +
> +/* counter_32k */
> +static struct omap_hwmod omap2430_counter_32k_hwmod;
> +static struct omap_hwmod_addr_space omap2430_counter_32k_addrs[] = {
> +	{
> +		.pa_start	= 0x48004000,
> +		.pa_end		= 0x48000fff,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* l4_wkup -> counter_32k */
> +static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = {
> +	.master		= &omap2430_l4_wkup_hwmod,
> +	.slave		= &omap2430_counter_32k_hwmod,
> +	.clk		= "l4_ck",
> +	.addr		= omap2430_counter_32k_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap2430_counter_32k_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* counter_32k slave ports */
> +static struct omap_hwmod_ocp_if *omap2430_counter_32k_slaves[] = {
> +	&omap2430_l4_wkup__counter_32k,
> +};
> +
> +static struct omap_hwmod omap2430_counter_32k_hwmod = {
> +	.name		= "counter_32k",
> +	.class		= &omap2430_counter_hwmod_class,
> +	.main_clk	= "sync_32k_ick",
> +	.prcm = {
> +		.omap2 = {
> +			.prcm_reg_id = 1,
> +			.module_bit = OMAP24XX_EN_GPT1_SHIFT,
> +			.idlest_reg_id = 1,
> +			.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
> +		},
> +	},
> +	.slaves		= omap2430_counter_32k_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap2430_counter_32k_slaves),
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
> +};
> +
>  static __initdata struct omap_hwmod *omap2430_hwmods[] = {
>  	&omap2430_l3_main_hwmod,
>  	&omap2430_l4_core_hwmod,
> @@ -581,6 +632,7 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
>  	&omap2430_uart3_hwmod,
>  	&omap2430_i2c1_hwmod,
>  	&omap2430_i2c2_hwmod,
> +	&omap2430_counter_32k_hwmod,
>  	NULL,
>  };
>  
> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> index ed6bf4a..8e8fae4 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> @@ -736,6 +736,56 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {
>  	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
>  };
>  
> +/*
> + * 'counter' class
> + * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
> + */
> +static struct omap_hwmod_class omap3xxx_counter_hwmod_class = {
> +	.name = "counter",
> +};
> +
> +/* counter_32k */
> +static struct omap_hwmod omap3xxx_counter_32k_hwmod;
> +static struct omap_hwmod_addr_space omap3xxx_counter_32k_addrs[] = {
> +	{
> +		.pa_start	= 0x48324000,
> +		.pa_end		= 0x48320fff,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* l4_wkup -> counter_32k */
> +static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__counter_32k = {
> +	.master		= &omap3xxx_l4_wkup_hwmod,
> +	.slave		= &omap3xxx_counter_32k_hwmod,
> +	.clk		= "wkup_l4_ick",
> +	.addr		= omap3xxx_counter_32k_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap3xxx_counter_32k_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* counter_32k slave ports */
> +static struct omap_hwmod_ocp_if *omap3xxx_counter_32k_slaves[] = {
> +	&omap3xxx_l4_wkup__counter_32k,
> +};
> +
> +static struct omap_hwmod omap3xxx_counter_32k_hwmod = {
> +	.name		= "counter_32k",
> +	.class		= &omap3xxx_counter_hwmod_class,
> +	.main_clk	= "omap_32ksync_ick",
> +	.prcm = {
> +		.omap2 = {
> +			.prcm_reg_id = 1,
> +			.module_bit = OMAP3430_EN_GPT1_SHIFT,
> +			.idlest_reg_id = 1,
> +			.idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT,
> +		},
> +	},
> +	.slaves		= omap3xxx_counter_32k_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap3xxx_counter_32k_slaves),
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
> +};
> +
>  static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
>  	&omap3xxx_l3_main_hwmod,
>  	&omap3xxx_l4_core_hwmod,
> @@ -751,6 +801,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
>  	&omap3xxx_i2c1_hwmod,
>  	&omap3xxx_i2c2_hwmod,
>  	&omap3xxx_i2c3_hwmod,
> +	&omap3xxx_counter_32k_hwmod,
>  	NULL,
>  };
>  
> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> index 0d5c6eb..e86dc11 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> @@ -383,6 +383,63 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
>  };
>  
>  /*
> + * 'counter' class
> + * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
> + */
> +
> +static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
> +	.rev_offs	= 0x0000,
> +	.sysc_offs	= 0x0004,
> +	.sysc_flags	= SYSC_HAS_SIDLEMODE,
> +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> +	.sysc_fields	= &omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap44xx_counter_hwmod_class = {
> +	.name = "counter",
> +	.sysc = &omap44xx_counter_sysc,
> +};
> +
> +/* counter_32k */
> +static struct omap_hwmod omap44xx_counter_32k_hwmod;
> +static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = {
> +	{
> +		.pa_start	= 0x4a304000,
> +		.pa_end		= 0x4a30401f,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* l4_wkup -> counter_32k */
> +static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = {
> +	.master		= &omap44xx_l4_wkup_hwmod,
> +	.slave		= &omap44xx_counter_32k_hwmod,
> +	.clk		= "l4_wkup_clk_mux_ck",
> +	.addr		= omap44xx_counter_32k_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap44xx_counter_32k_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* counter_32k slave ports */
> +static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = {
> +	&omap44xx_l4_wkup__counter_32k,
> +};
> +
> +static struct omap_hwmod omap44xx_counter_32k_hwmod = {
> +	.name		= "counter_32k",
> +	.class		= &omap44xx_counter_hwmod_class,
> +	.main_clk	= "sys_32k_ck",
> +	.prcm = {
> +		.omap4 = {
> +			.clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL,
> +		},
> +	},
> +	.slaves		= omap44xx_counter_32k_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap44xx_counter_32k_slaves),
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +};
> +
> +/*
>   * 'i2c' class
>   * multimaster high-speed i2c controller
>   */
> @@ -1058,6 +1115,10 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
>  	&omap44xx_l4_cfg_hwmod,
>  	&omap44xx_l4_per_hwmod,
>  	&omap44xx_l4_wkup_hwmod,
> +
> +	/* counter class */
> +	&omap44xx_counter_32k_hwmod,
> +
>  	/* i2c class */
>  	&omap44xx_i2c1_hwmod,
>  	&omap44xx_i2c2_hwmod,

Re: [PATCH 0/5] 32k sync timer meets hwmod

[Kevin Hilman]

Felipe Balbi <balbi@ti.com> writes:

> Converted 32k-sync timer to platform_driver
> and now using pm_runtime and hwmod.
>
> Tested on 3430 by me and 4430 by Tarun
>
> If someone could test on 2430 and 2420, I would
> be really glad.

Hey, don't you have a 2420 device.  There were some cool 2420-based
tablets a few years ago made by some company in Finland that you may
have heard of.  ;)

Kevin

Re: [PATCH 2/5] arm: omap: counter-32k: convert to pm_runtime API

[Felipe Balbi]

On Thu, Oct 21, 2010 at 12:46:11PM -0500, Kevin Hilman wrote:
>Felipe Balbi <balbi@ti.com> writes:
>
>> Trivial patch removing clock framework and adding
>> pm_runtime API.
>>
>> Signed-off-by: Felipe Balbi <balbi@ti.com>
>
>Minor nit: the runtime PM 'put' calls do not need to be the _sync
>versions.  You can easily get by using the "normal" (async) versions
>here.

Will change for next version, was just following what other drivers were
doing.

-- 
balbi

Re: [PATCH 4/5] arm: omap: introduce 32k timer hwmod for omap2/3/4

[Felipe Balbi]

On Thu, Oct 21, 2010 at 12:57:41PM -0500, Kevin Hilman wrote:
>Felipe Balbi <balbi@ti.com> writes:
>
>> Add 32k timer hwmod to the database.
>>
>> Signed-off-by: Felipe Balbi <balbi@ti.com>
>
>Not sure how this is working correctly on OMAP2 and OMAP3.  All the
>hwmods are mising the oh->prcm.omap2.module_offs field.
>
>Without this, _wait_target_ready *should* fail, and the hwmod should not
>actually be enabled.
>
>Since this was tested to work, I guess what's happening, is because
>module_offs == 0 (OCP_MOD), it's reading from the IDLEST register offset
>in OCP_MOD, which is an undefined register.  On 34xx, we get lucky that
>that bit is zero so omap2_cm_wait_module_ready succeeds.  On 24xx, the
>polarity of the idlest bits is inversed, so this would likely fail on
>OMAP2.
>
>Either way, the right fix for this is to ensure that OMAP2/3 hwmods have
>.module_offs populated correctly.

I'll look again but when I was reading omap3 TRM I couldn't find IDLEST
for this module, maybe I missed something.

-- 
balbi

Re: [PATCH 0/5] 32k sync timer meets hwmod

[Felipe Balbi]

On Thu, Oct 21, 2010 at 01:00:19PM -0500, Kevin Hilman wrote:
>Felipe Balbi <balbi@ti.com> writes:
>
>> Converted 32k-sync timer to platform_driver
>> and now using pm_runtime and hwmod.
>>
>> Tested on 3430 by me and 4430 by Tarun
>>
>> If someone could test on 2430 and 2420, I would
>> be really glad.
>
>Hey, don't you have a 2420 device.  There were some cool 2420-based
>tablets a few years ago made by some company in Finland that you may
>have heard of.  ;)

I have an n810 which doesn't work :-p sucks to be me :-p

-- 
balbi

Re: [PATCH 2/5] arm: omap: counter-32k: convert to pm_runtime API

[Kevin Hilman]

Felipe Balbi <balbi@ti.com> writes:

> On Thu, Oct 21, 2010 at 12:46:11PM -0500, Kevin Hilman wrote:
>>Felipe Balbi <balbi@ti.com> writes:
>>
>>> Trivial patch removing clock framework and adding
>>> pm_runtime API.
>>>
>>> Signed-off-by: Felipe Balbi <balbi@ti.com>
>>
>>Minor nit: the runtime PM 'put' calls do not need to be the _sync
>>versions.  You can easily get by using the "normal" (async) versions
>>here.
>
> Will change for next version, was just following what other drivers were
> doing.

You're right, I wasn't as picky about this before, but will be going
forward.  You're the lucky first victim. :)

Replacing clk_disable() with put_sync() is the correct functional
replacement, since clk_disable is immediate, ans so is put_sync.
However, since we have the option of a delayed disable now with runtime
PM, I think we should use it.

Kevin

Re: [PATCH 4/5] arm: omap: introduce 32k timer hwmod for omap2/3/4

[Kevin Hilman]

Felipe Balbi <balbi@ti.com> writes:

> On Thu, Oct 21, 2010 at 12:57:41PM -0500, Kevin Hilman wrote:
>>Felipe Balbi <balbi@ti.com> writes:
>>
>>> Add 32k timer hwmod to the database.
>>>
>>> Signed-off-by: Felipe Balbi <balbi@ti.com>
>>
>>Not sure how this is working correctly on OMAP2 and OMAP3.  All the
>>hwmods are mising the oh->prcm.omap2.module_offs field.
>>
>>Without this, _wait_target_ready *should* fail, and the hwmod should not
>>actually be enabled.
>>
>>Since this was tested to work, I guess what's happening, is because
>>module_offs == 0 (OCP_MOD), it's reading from the IDLEST register offset
>>in OCP_MOD, which is an undefined register.  On 34xx, we get lucky that
>>that bit is zero so omap2_cm_wait_module_ready succeeds.  On 24xx, the
>>polarity of the idlest bits is inversed, so this would likely fail on
>>OMAP2.
>>
>>Either way, the right fix for this is to ensure that OMAP2/3 hwmods have
>>.module_offs populated correctly.
>
> I'll look again but when I was reading omap3 TRM I couldn't find IDLEST
> for this module, maybe I missed something.

It's there, see bit 2 of CM_IDLEST_WKUP.

Kevin

Re: [PATCH 4/5] arm: omap: introduce 32k timer hwmod for omap2/3/4

[Kevin Hilman]

Felipe Balbi <balbi@ti.com> writes:

> Add 32k timer hwmod to the database.
>
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> ---

Looking closer at this patch, there are some other problems... 

[...]

> +static struct omap_hwmod omap2420_counter_32k_hwmod = {
> +	.name		= "counter_32k",
> +	.class		= &omap2420_counter_hwmod_class,
> +	.main_clk	= "sync_32k_ick",
> +	.prcm = {
> +		.omap2 = {
> +			.prcm_reg_id = 1,
> +			.module_bit = OMAP24XX_EN_GPT1_SHIFT,
> +			.idlest_reg_id = 1,
> +			.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
> +		},
> +	},

You're using the PRCM bits for GPT1, which is not the same as the 32k
counter.

So if this worked, it would be toggling GPT1, which is the kernel timer,
and that would be a rather bad thing.

[...]

> +static struct omap_hwmod omap2430_counter_32k_hwmod = {
> +	.name		= "counter_32k",
> +	.class		= &omap2430_counter_hwmod_class,
> +	.main_clk	= "sync_32k_ick",
> +	.prcm = {
> +		.omap2 = {
> +			.prcm_reg_id = 1,
> +			.module_bit = OMAP24XX_EN_GPT1_SHIFT,
> +			.idlest_reg_id = 1,
> +			.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
> +		},
> +	},

GPT1 again

[...]

> +static struct omap_hwmod omap3xxx_counter_32k_hwmod = {
> +	.name		= "counter_32k",
> +	.class		= &omap3xxx_counter_hwmod_class,
> +	.main_clk	= "omap_32ksync_ick",
> +	.prcm = {
> +		.omap2 = {
> +			.prcm_reg_id = 1,
> +			.module_bit = OMAP3430_EN_GPT1_SHIFT,
> +			.idlest_reg_id = 1,
> +			.idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT,
> +		},
> +	},

and again

> +	.slaves		= omap3xxx_counter_32k_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap3xxx_counter_32k_slaves),
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
> +};
> +

Kevin

Re: [PATCH 2/5] arm: omap: counter-32k: convert to pm_runtime API

[Felipe Balbi]

On Thu, Oct 21, 2010 at 03:17:47PM -0500, Kevin Hilman wrote:
>You're right, I wasn't as picky about this before, but will be going
>forward.  You're the lucky first victim. :)

someone has to be stoned first. Hmm, that does sound ambiguous.

>Replacing clk_disable() with put_sync() is the correct functional
>replacement, since clk_disable is immediate, ans so is put_sync.
>However, since we have the option of a delayed disable now with runtime
>PM, I think we should use it.

makes sense. I'll work on it during next week.

-- 
balbi

Re: [PATCH 0/5] 32k sync timer meets hwmod

[green]

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Felipe Balbi wrote at 2010-10-21 14:09 -0500:
> On Thu, Oct 21, 2010 at 01:00:19PM -0500, Kevin Hilman wrote:
> >Hey, don't you have a 2420 device.  There were some cool 2420-based
> >tablets a few years ago made by some company in Finland that you may
> >have heard of.  ;)
> 
> I have an n810 which doesn't work :-p sucks to be me :-p

Just curious, what happened to your n810?

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Re: [PATCH 0/5] 32k sync timer meets hwmod

[Felipe Balbi]

On Fri, Oct 22, 2010 at 02:01:22PM -0500, green wrote:
>Felipe Balbi wrote at 2010-10-21 14:09 -0500:
>> On Thu, Oct 21, 2010 at 01:00:19PM -0500, Kevin Hilman wrote:
>> >Hey, don't you have a 2420 device.  There were some cool 2420-based
>> >tablets a few years ago made by some company in Finland that you may
>> >have heard of.  ;)
>>
>> I have an n810 which doesn't work :-p sucks to be me :-p
>
>Just curious, what happened to your n810?

don't know actually. It just doesn't boot. Not even with the original
Nokia releases.

-- 
balbi