[PATCH 1/6] OMAP2: hwmod: Fix MMC hwmod structs for 2430

[PATCH 1/6] OMAP2: hwmod: Fix MMC hwmod structs for 2430

[Rajendra Nayak]

The existing MMC hwmod structs for 2430 are fixed based
on the changes in hwmod framework structurs.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_2430.h |   26 +++++++++++++++-----------
 1 files changed, 15 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_2430.h b/arch/arm/mach-omap2/omap_hwmod_2430.h
index 0b6ca6f..2898749 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430.h
+++ b/arch/arm/mach-omap2/omap_hwmod_2430.h
@@ -21,7 +21,7 @@
 #include <plat/cpu.h>
 #include <plat/dma.h>
 
-#include <mach/mmc.h>
+#include <plat/mmc.h>
 
 #include "cm-regbits-24xx.h"
 #include "prm-regbits-24xx.h"
@@ -87,7 +87,8 @@ static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
 	.master		= &omap2430_l4_core_hwmod,
 	.slave		= &omap2430_mmc1_hwmod,
-	.interface_clk	= { .name = "mmchs1_ick" },
+	.clkdev_dev_id	= "mmci-omap-hs.0",
+	.clkdev_con_id	= "ick",
 	.addr		= omap2430_mmc1_addr_space,
 	.addr_cnt	= ARRAY_SIZE(omap2430_mmc1_addr_space),
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
@@ -105,7 +106,8 @@ static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {
 	.master		= &omap2430_l4_core_hwmod,
 	.slave		= &omap2430_mmc2_hwmod,
-	.interface_clk	= { .name = "mmchs2_ick" },
+	.clkdev_dev_id	= "mmci-omap-hs.1",
+	.clkdev_con_id	= "ick",
 	.addr		= omap2430_mmc2_addr_space,
 	.addr_cnt	= ARRAY_SIZE(omap2430_mmc2_addr_space),
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
@@ -185,8 +187,8 @@ static struct mmc_dev_attr mmc1_dev_attr = {
 	.flags = MMC_INTERNAL_XCVR,
 };
 
-static u8 mmc1_mpu_irqs[] = {
-	INT_24XX_MMC_IRQ,
+static struct omap_hwmod_irq_info mmc1_mpu_irqs[] = {
+	{ .irq = INT_24XX_MMC_IRQ, },
 };
 
 static struct omap_hwmod_dma_info mmc1_sdma_chs[] = {
@@ -195,7 +197,7 @@ static struct omap_hwmod_dma_info mmc1_sdma_chs[] = {
 };
 
 static struct omap_hwmod_opt_clk mmc1_opt_clks[] = {
-	{ .role = "dbck", .clk = { .name = "mmchsdb1_fck" } },
+	{ .clkdev_dev_id = "mmci-omap-hs.0", .clkdev_con_id = "mmchsdb_fck" },
 };
 
 static struct omap_hwmod_ocp_if *omap2430_mmc1_slaves[] = {
@@ -210,7 +212,8 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
 	.sdma_chs_cnt	= ARRAY_SIZE(mmc1_sdma_chs),
 	.opt_clks	= mmc1_opt_clks,
 	.opt_clks_cnt	= ARRAY_SIZE(mmc1_opt_clks),
-	.main_clk	= { .name = "mmchs1_fck" },
+	.clkdev_dev_id	= "mmci-omap-hs.0",
+	.clkdev_con_id	= "fck",
 	.prcm		= {
 		.omap2 = {
 			.prcm_reg_id = 2,
@@ -230,8 +233,8 @@ static struct mmc_dev_attr mmc2_dev_attr = {
 	.flags = MMC_SUPPORTS_EXTERNAL_XCVR,
 };
 
-static u8 mmc2_mpu_irqs[] = {
-	INT_24XX_MMC2_IRQ,
+static struct omap_hwmod_irq_info mmc2_mpu_irqs[] = {
+	{ .irq = INT_24XX_MMC2_IRQ, },
 };
 
 static struct omap_hwmod_dma_info mmc2_sdma_chs[] = {
@@ -240,7 +243,7 @@ static struct omap_hwmod_dma_info mmc2_sdma_chs[] = {
 };
 
 static struct omap_hwmod_opt_clk mmc2_opt_clks[] = {
-	{ .role = "dbck", .clk = { .name = "mmchsdb2_fck" } },
+	{ .clkdev_dev_id = "mmci-omap-hs.1", .clkdev_con_id = "mmchsdb_fck" },
 };
 
 static struct omap_hwmod_ocp_if *omap2430_mmc2_slaves[] = {
@@ -255,7 +258,8 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
 	.sdma_chs_cnt	= ARRAY_SIZE(mmc2_sdma_chs),
 	.opt_clks	= mmc2_opt_clks,
 	.opt_clks_cnt	= ARRAY_SIZE(mmc2_opt_clks),
-	.main_clk	= { .name = "mmchs2_fck" },
+	.clkdev_dev_id	= "mmci-omap-hs.1",
+	.clkdev_con_id	= "fck",
 	.prcm		= {
 		.omap2 = {
 			.prcm_reg_id = 2,
-- 
1.5.4.7

[PATCH 2/6] OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430

[Rajendra Nayak]

From: Paul Walmsley <paul@pwsan.com>

Add hwmod structures for I2C controllers on OMAP2420/2430.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_2420.h |  134 +++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/omap_hwmod_2430.h |  140 ++++++++++++++++++++++++++++++++-
 2 files changed, 272 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_2420.h b/arch/arm/mach-omap2/omap_hwmod_2420.h
index a9ca1b9..4320deb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420.h
+++ b/arch/arm/mach-omap2/omap_hwmod_2420.h
@@ -20,6 +20,7 @@
 #include <mach/irqs.h>
 #include <plat/cpu.h>
 #include <plat/dma.h>
+#include <plat/i2c.h>
 
 #include "prm-regbits-24xx.h"
 
@@ -62,6 +63,8 @@ static struct omap_hwmod omap2420_l3_hwmod = {
 };
 
 static struct omap_hwmod omap2420_l4_wkup_hwmod;
+static struct omap_hwmod omap2420_i2c1_hwmod;
+static struct omap_hwmod omap2420_i2c2_hwmod;
 
 /* L4_CORE -> L4_WKUP interface */
 static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
@@ -70,6 +73,50 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
 	.user	= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+#define OMAP2_I2C1_BASE			(L4_24XX_BASE + 0x70000)
+#define OMAP2_I2C2_BASE			(L4_24XX_BASE + 0x72000)
+
+/* I2C IP block address space length (in bytes) */
+#define OMAP2_I2C_AS_LEN		128
+
+/* L4 CORE -> I2C1 interface */
+static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = {
+	{
+		.pa_start	= OMAP2_I2C1_BASE,
+		.pa_end		= OMAP2_I2C1_BASE + OMAP2_I2C_AS_LEN - 1,
+		.flags		= ADDR_TYPE_RT,
+	},
+};
+
+static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = {
+	.master		= &omap2420_l4_core_hwmod,
+	.slave		= &omap2420_i2c1_hwmod,
+	.clkdev_dev_id	= "i2c_omap.1",
+	.clkdev_con_id	= "ick",
+	.addr		= omap2420_i2c1_addr_space,
+	.addr_cnt	= ARRAY_SIZE(omap2420_i2c1_addr_space),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L4 CORE -> I2C2 interface */
+static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = {
+	{
+		.pa_start	= OMAP2_I2C2_BASE,
+		.pa_end		= OMAP2_I2C2_BASE + OMAP2_I2C_AS_LEN - 1,
+		.flags		= ADDR_TYPE_RT,
+	},
+};
+
+static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = {
+	.master		= &omap2420_l4_core_hwmod,
+	.slave		= &omap2420_i2c2_hwmod,
+	.clkdev_dev_id	= "i2c_omap.2",
+	.clkdev_con_id	= "ick",
+	.addr		= omap2420_i2c2_addr_space,
+	.addr_cnt	= ARRAY_SIZE(omap2420_i2c2_addr_space),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* Slave interfaces on the L4_CORE interconnect */
 static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
 	&omap2420_l3__l4_core,
@@ -78,6 +125,8 @@ static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
 /* Master interfaces on the L4_CORE interconnect */
 static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
 	&omap2420_l4_core__l4_wkup,
+	&omap2420_l4_core__i2c1,
+	&omap2420_l4_core__i2c2
 };
 
 /* L4 CORE */
@@ -124,11 +173,96 @@ static struct omap_hwmod omap2420_mpu_hwmod = {
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
+/* I2C common */
+static struct omap_hwmod_sysconfig i2c_if_ctrl = {
+	.rev_offs	= 0x00,
+	.sysc_offs	= 0x20,
+	.syss_offs	= 0x10,
+	.sysc_flags	= SYSC_HAS_SOFTRESET,
+};
+
+static struct omap_i2c_dev_attr i2c_dev_attr;
+
+/* I2C1 */
+
+static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
+	{ .irq = INT_24XX_I2C1_IRQ, },
+};
+
+static struct omap_hwmod_dma_info i2c1_sdma_chs[] = {
+	{ .name = "tx", .dma_ch = OMAP24XX_DMA_I2C1_TX },
+	{ .name = "rx", .dma_ch = OMAP24XX_DMA_I2C1_RX },
+};
+
+static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = {
+	&omap2420_l4_core__i2c1,
+};
+
+static struct omap_hwmod omap2420_i2c1_hwmod = {
+	.name		= "i2c1_hwmod",
+	.mpu_irqs	= i2c1_mpu_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(i2c1_mpu_irqs),
+	.sdma_chs	= i2c1_sdma_chs,
+	.sdma_chs_cnt	= ARRAY_SIZE(i2c1_sdma_chs),
+	.clkdev_dev_id	= "i2c_omap.1",
+	.clkdev_con_id	= "fck",
+	.prcm		= {
+		.omap2 = {
+			.prcm_reg_id = 1,
+			.module_bit = OMAP2420_EN_I2C1_SHIFT,
+		},
+	},
+	.slaves		= omap2420_i2c1_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap2420_i2c1_slaves),
+	.sysconfig	= &i2c_if_ctrl,
+	.dev_attr	= &i2c_dev_attr,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
+/* I2C2 */
+
+static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
+	{ .irq = INT_24XX_I2C2_IRQ, },
+};
+
+static struct omap_hwmod_dma_info i2c2_sdma_chs[] = {
+	{ .name = "tx", .dma_ch = OMAP24XX_DMA_I2C2_TX },
+	{ .name = "rx", .dma_ch = OMAP24XX_DMA_I2C2_RX },
+};
+
+static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = {
+	&omap2420_l4_core__i2c2,
+};
+
+static struct omap_hwmod omap2420_i2c2_hwmod = {
+	.name		= "i2c2_hwmod",
+	.mpu_irqs	= i2c2_mpu_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(i2c2_mpu_irqs),
+	.sdma_chs	= i2c2_sdma_chs,
+	.sdma_chs_cnt	= ARRAY_SIZE(i2c2_sdma_chs),
+	.clkdev_dev_id	= "i2c_omap.2",
+	.clkdev_con_id	= "fck",
+	.prcm		= {
+		.omap2 = {
+			.prcm_reg_id = 1,
+			.module_bit = OMAP2420_EN_I2C2_SHIFT,
+		},
+	},
+	.slaves		= omap2420_i2c2_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap2420_i2c2_slaves),
+	.sysconfig	= &i2c_if_ctrl,
+	.dev_attr	= &i2c_dev_attr,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
+
 static __initdata struct omap_hwmod *omap2420_hwmods[] = {
 	&omap2420_l3_hwmod,
 	&omap2420_l4_core_hwmod,
 	&omap2420_l4_wkup_hwmod,
 	&omap2420_mpu_hwmod,
+	&omap2420_i2c1_hwmod,
+	&omap2420_i2c2_hwmod,
 	NULL,
 };
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430.h b/arch/arm/mach-omap2/omap_hwmod_2430.h
index 2898749..97ed44b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430.h
+++ b/arch/arm/mach-omap2/omap_hwmod_2430.h
@@ -17,11 +17,11 @@
 #ifdef CONFIG_ARCH_OMAP2430
 
 #include <plat/omap_hwmod.h>
-#include <mach/irqs.h>
 #include <plat/cpu.h>
 #include <plat/dma.h>
-
+#include <plat/i2c.h>
 #include <plat/mmc.h>
+#include <mach/irqs.h>
 
 #include "cm-regbits-24xx.h"
 #include "prm-regbits-24xx.h"
@@ -67,6 +67,52 @@ static struct omap_hwmod omap2430_l3_hwmod = {
 static struct omap_hwmod omap2430_l4_wkup_hwmod;
 static struct omap_hwmod omap2430_mmc1_hwmod;
 static struct omap_hwmod omap2430_mmc2_hwmod;
+static struct omap_hwmod omap2430_i2c1_hwmod;
+static struct omap_hwmod omap2430_i2c2_hwmod;
+
+#define OMAP2_I2C1_BASE			(L4_24XX_BASE + 0x70000)
+#define OMAP2_I2C2_BASE			(L4_24XX_BASE + 0x72000)
+
+/* I2C IP block address space length (in bytes) */
+#define OMAP2_I2C_AS_LEN		128
+
+/* L4 CORE -> I2C1 interface */
+static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = {
+	{
+		.pa_start	= OMAP2_I2C1_BASE,
+		.pa_end		= OMAP2_I2C1_BASE + OMAP2_I2C_AS_LEN - 1,
+		.flags		= ADDR_TYPE_RT,
+	},
+};
+
+static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = {
+	.master		= &omap2430_l4_core_hwmod,
+	.slave		= &omap2430_i2c1_hwmod,
+	.clkdev_dev_id	= "i2c_omap.1",
+	.clkdev_con_id	= "ick",
+	.addr		= omap2430_i2c1_addr_space,
+	.addr_cnt	= ARRAY_SIZE(omap2430_i2c1_addr_space),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L4 CORE -> I2C2 interface */
+static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = {
+	{
+		.pa_start	= OMAP2_I2C2_BASE,
+		.pa_end		= OMAP2_I2C2_BASE + OMAP2_I2C_AS_LEN - 1,
+		.flags		= ADDR_TYPE_RT,
+	},
+};
+
+static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = {
+	.master		= &omap2430_l4_core_hwmod,
+	.slave		= &omap2430_i2c2_hwmod,
+	.clkdev_dev_id	= "i2c_omap.2",
+	.clkdev_con_id	= "ick",
+	.addr		= omap2430_i2c2_addr_space,
+	.addr_cnt	= ARRAY_SIZE(omap2430_i2c2_addr_space),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
 
 /* L4_CORE -> L4_WKUP interface */
 static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
@@ -273,11 +319,101 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
+/* I2C common */
+static struct omap_hwmod_sysconfig i2c_if_ctrl = {
+	.rev_offs	= 0x00,
+	.sysc_offs	= 0x20,
+	.syss_offs	= 0x10,
+	.sysc_flags	= (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+};
+
+/* I2C1 */
+
+static struct omap_i2c_dev_attr i2c1_dev_attr = {
+	.fifo_depth	= 8, /* bytes */
+};
+
+static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
+	{ .irq = INT_24XX_I2C1_IRQ, },
+};
+
+static struct omap_hwmod_dma_info i2c1_sdma_chs[] = {
+	{ .name = "tx", .dma_ch = OMAP24XX_DMA_I2C1_TX },
+	{ .name = "rx", .dma_ch = OMAP24XX_DMA_I2C1_RX },
+};
+
+static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
+	&omap2430_l4_core__i2c1,
+};
+
+static struct omap_hwmod omap2430_i2c1_hwmod = {
+	.name		= "i2c1_hwmod",
+	.mpu_irqs	= i2c1_mpu_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(i2c1_mpu_irqs),
+	.sdma_chs	= i2c1_sdma_chs,
+	.sdma_chs_cnt	= ARRAY_SIZE(i2c1_sdma_chs),
+	.clkdev_dev_id	= "i2c_omap.1",
+	.clkdev_con_id	= "fck",
+	.prcm		= {
+		.omap2 = {
+			.prcm_reg_id = 1,
+			.module_bit = OMAP2430_EN_I2CHS1_SHIFT,
+		},
+	},
+	.slaves		= omap2430_i2c1_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap2430_i2c1_slaves),
+	.sysconfig	= &i2c_if_ctrl,
+	.dev_attr	= &i2c1_dev_attr,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
+/* I2C2 */
+
+static struct omap_i2c_dev_attr i2c2_dev_attr = {
+	.fifo_depth	= 8, /* bytes */
+};
+
+static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
+	{ .irq = INT_24XX_I2C2_IRQ, },
+};
+
+static struct omap_hwmod_dma_info i2c2_sdma_chs[] = {
+	{ .name = "tx", .dma_ch = OMAP24XX_DMA_I2C2_TX },
+	{ .name = "rx", .dma_ch = OMAP24XX_DMA_I2C2_RX },
+};
+
+static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
+	&omap2430_l4_core__i2c2,
+};
+
+static struct omap_hwmod omap2430_i2c2_hwmod = {
+	.name		= "i2c2_hwmod",
+	.mpu_irqs	= i2c2_mpu_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(i2c2_mpu_irqs),
+	.sdma_chs	= i2c2_sdma_chs,
+	.sdma_chs_cnt	= ARRAY_SIZE(i2c2_sdma_chs),
+	.clkdev_dev_id	= "i2c_omap.2",
+	.clkdev_con_id	= "fck",
+	.prcm		= {
+		.omap2 = {
+			.prcm_reg_id = 1,
+			.module_bit = OMAP2430_EN_I2CHS2_SHIFT,
+		},
+	},
+	.slaves		= omap2430_i2c2_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap2430_i2c2_slaves),
+	.sysconfig	= &i2c_if_ctrl,
+	.dev_attr	= &i2c2_dev_attr,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
 static __initdata struct omap_hwmod *omap2430_hwmods[] = {
 	&omap2430_l3_hwmod,
 	&omap2430_l4_core_hwmod,
 	&omap2430_l4_wkup_hwmod,
 	&omap2430_mpu_hwmod,
+	&omap2430_i2c1_hwmod,
+	&omap2430_i2c2_hwmod,
 	NULL,
 };
 
-- 
1.5.4.7

[PATCH 3/6] OMAP3: hwmod: add I2C hwmods for OMAP3430

[Rajendra Nayak]

Add hwmod structures for I2C controllers on OMAP3430.

This patch was developed in collaboration with Paul Walmsley <paul@pwsan.com>.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
 arch/arm/mach-omap2/omap_hwmod_34xx.h     |  228 +++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prm-regbits-34xx.h    |    9 +-
 arch/arm/plat-omap/include/plat/i2c.h     |   13 ++
 arch/arm/plat-omap/include/plat/l4_3xxx.h |    7 +
 4 files changed, 254 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_34xx.h b/arch/arm/mach-omap2/omap_hwmod_34xx.h
index 88504e8..29c7921 100644
--- a/arch/arm/mach-omap2/omap_hwmod_34xx.h
+++ b/arch/arm/mach-omap2/omap_hwmod_34xx.h
@@ -21,6 +21,8 @@
 #include <plat/dma.h>
 #include <plat/serial.h>
 #include <plat/mmc.h>
+#include <plat/l4_3xxx.h>
+#include <plat/i2c.h>
 
 #include "prm-regbits-34xx.h"
 
@@ -79,6 +81,10 @@ static struct omap_hwmod omap34xx_uart3_hwmod;
 static struct omap_hwmod omap34xx_mmc1_hwmod;
 static struct omap_hwmod omap34xx_mmc2_hwmod;
 static struct omap_hwmod omap34xx_mmc3_hwmod;
+static struct omap_hwmod omap34xx_i2c1_hwmod;
+static struct omap_hwmod omap34xx_i2c2_hwmod;
+static struct omap_hwmod omap34xx_i2c3_hwmod;
+
 
 /* L4_CORE -> L4_WKUP interface */
 static struct omap_hwmod_ocp_if omap34xx_l4_core__l4_wkup = {
@@ -222,6 +228,91 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mmc3 = {
 	.flags		= OMAP_FIREWALL_L4
 };
 
+#define OMAP3_I2C1_BASE			(L4_34XX_BASE + 0x70000)
+#define OMAP3_I2C2_BASE			(L4_34XX_BASE + 0x72000)
+#define OMAP3_I2C3_BASE			(L4_34XX_BASE + 0x60000)
+
+/* I2C IP block address space length (in bytes) */
+#define OMAP2_I2C_AS_LEN		128
+
+/* L4 CORE -> I2C1 interface */
+static struct omap_hwmod_addr_space omap34xx_i2c1_addr_space[] = {
+	{
+		.pa_start	= OMAP3_I2C1_BASE,
+		.pa_end		= OMAP3_I2C1_BASE + OMAP2_I2C_AS_LEN - 1,
+		.flags		= ADDR_TYPE_RT,
+	},
+};
+
+static struct omap_hwmod_ocp_if omap34xx_l4_core__i2c1 = {
+	.master		= &omap34xx_l4_core_hwmod,
+	.slave		= &omap34xx_i2c1_hwmod,
+	.clkdev_dev_id	= "i2c_omap.1",
+	.clkdev_con_id  = "ick",
+	.addr		= omap34xx_i2c1_addr_space,
+	.addr_cnt	= ARRAY_SIZE(omap34xx_i2c1_addr_space),
+	.fw = {
+		.omap2 = {
+			.l4_fw_region  = OMAP3_L4_CORE_FW_I2C1_REGION,
+			.l4_prot_group = 7,
+		}
+	},
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+	.flags		= OMAP_FIREWALL_L4
+};
+
+/* L4 CORE -> I2C2 interface */
+static struct omap_hwmod_addr_space omap34xx_i2c2_addr_space[] = {
+	{
+		.pa_start	= OMAP3_I2C2_BASE,
+		.pa_end		= OMAP3_I2C2_BASE + OMAP2_I2C_AS_LEN - 1,
+		.flags		= ADDR_TYPE_RT,
+	},
+};
+
+static struct omap_hwmod_ocp_if omap34xx_l4_core__i2c2 = {
+	.master		= &omap34xx_l4_core_hwmod,
+	.slave		= &omap34xx_i2c2_hwmod,
+	.clkdev_dev_id	= "i2c_omap.2",
+	.clkdev_con_id  = "ick",
+	.addr		= omap34xx_i2c2_addr_space,
+	.addr_cnt	= ARRAY_SIZE(omap34xx_i2c2_addr_space),
+	.fw = {
+		.omap2 = {
+			.l4_fw_region  = OMAP3_L4_CORE_FW_I2C2_REGION,
+			.l4_prot_group = 7,
+		}
+	},
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+	.flags		= OMAP_FIREWALL_L4
+};
+
+/* L4 CORE -> I2C3 interface */
+static struct omap_hwmod_addr_space omap34xx_i2c3_addr_space[] = {
+	{
+		.pa_start	= OMAP3_I2C3_BASE,
+		.pa_end		= OMAP3_I2C3_BASE + OMAP2_I2C_AS_LEN - 1,
+		.flags		= ADDR_TYPE_RT,
+	},
+};
+
+static struct omap_hwmod_ocp_if omap34xx_l4_core__i2c3 = {
+	.master		= &omap34xx_l4_core_hwmod,
+	.slave		= &omap34xx_i2c3_hwmod,
+	.clkdev_dev_id	= "i2c_omap.3",
+	.clkdev_con_id  = "ick",
+	.addr		= omap34xx_i2c3_addr_space,
+	.addr_cnt	= ARRAY_SIZE(omap34xx_i2c3_addr_space),
+	.fw = {
+		.omap2 = {
+			.l4_fw_region  = OMAP3_L4_CORE_FW_I2C3_REGION,
+			.l4_prot_group = 7,
+		}
+	},
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+	.flags		= OMAP_FIREWALL_L4
+};
+
 /* Slave interfaces on the L4 CORE interconnect */
 /* KJH: OCP ifs where L4 CORE is the slave */
 static struct omap_hwmod_ocp_if *omap34xx_l4_core_slaves[] = {
@@ -364,6 +455,9 @@ static struct omap_hwmod_dma_info uart2_sdma_chs[] = {
 
 static struct omap_hwmod_ocp_if *omap34xx_uart2_slaves[] = {
 	&omap3_l4_core__uart2,
+	&omap34xx_l4_core__i2c1,
+	&omap34xx_l4_core__i2c2,
+	&omap34xx_l4_core__i2c3,
 };
 
 static struct omap_hwmod omap34xx_uart2_hwmod = {
@@ -569,6 +663,137 @@ static struct omap_hwmod omap34xx_mmc3_hwmod = {
 };
 
 
+/* I2C common */
+static struct omap_hwmod_sysconfig i2c_if_ctrl = {
+	.rev_offs	= 0x00,
+	.sysc_offs	= 0x20,
+	.syss_offs	= 0x10,
+	.sysc_flags	= (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
+			   SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+			   SYSC_HAS_AUTOIDLE),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+};
+
+/* I2C1 */
+
+static struct omap_i2c_dev_attr i2c1_dev_attr = {
+	.fifo_depth	= 8, /* bytes */
+};
+
+static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
+	{ .irq = INT_24XX_I2C1_IRQ, },
+};
+
+static struct omap_hwmod_dma_info i2c1_sdma_chs[] = {
+	{ .name = "tx", .dma_ch = OMAP24XX_DMA_I2C1_TX },
+	{ .name = "rx", .dma_ch = OMAP24XX_DMA_I2C1_RX },
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_i2c1_slaves[] = {
+	&omap34xx_l4_core__i2c1,
+};
+
+static struct omap_hwmod omap34xx_i2c1_hwmod = {
+	.name		= "i2c1_hwmod",
+	.mpu_irqs	= i2c1_mpu_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(i2c1_mpu_irqs),
+	.sdma_chs	= i2c1_sdma_chs,
+	.sdma_chs_cnt	= ARRAY_SIZE(i2c1_sdma_chs),
+	.clkdev_dev_id	= "i2c_omap.1",
+	.clkdev_con_id	= "fck",
+	.prcm		= {
+		.omap2 = {
+			.prcm_reg_id = 1,
+			.module_bit = OMAP3430_GRPSEL_I2C1_SHIFT,
+		},
+	},
+	.slaves		= omap34xx_i2c1_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap34xx_i2c1_slaves),
+	.sysconfig	= &i2c_if_ctrl,
+	.dev_attr	= &i2c1_dev_attr,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/* I2C2 */
+
+static struct omap_i2c_dev_attr i2c2_dev_attr = {
+	.fifo_depth	= 8, /* bytes */
+};
+
+static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
+	{ .irq = INT_24XX_I2C2_IRQ, },
+};
+
+static struct omap_hwmod_dma_info i2c2_sdma_chs[] = {
+	{ .name = "tx", .dma_ch = OMAP24XX_DMA_I2C2_TX },
+	{ .name = "rx", .dma_ch = OMAP24XX_DMA_I2C2_RX },
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_i2c2_slaves[] = {
+	&omap34xx_l4_core__i2c2,
+};
+
+static struct omap_hwmod omap34xx_i2c2_hwmod = {
+	.name		= "i2c2_hwmod",
+	.mpu_irqs	= i2c2_mpu_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(i2c2_mpu_irqs),
+	.sdma_chs	= i2c2_sdma_chs,
+	.sdma_chs_cnt	= ARRAY_SIZE(i2c2_sdma_chs),
+	.clkdev_dev_id	= "i2c_omap.2",
+	.clkdev_con_id	= "fck",
+	.prcm		= {
+		.omap2 = {
+			.prcm_reg_id = 1,
+			.module_bit = OMAP3430_GRPSEL_I2C2_SHIFT,
+		},
+	},
+	.slaves		= omap34xx_i2c2_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap34xx_i2c2_slaves),
+	.sysconfig	= &i2c_if_ctrl,
+	.dev_attr	= &i2c2_dev_attr,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/* I2C3 */
+
+static struct omap_i2c_dev_attr i2c3_dev_attr = {
+	.fifo_depth	= 64, /* bytes */
+};
+
+static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = {
+	{ .irq = INT_34XX_I2C3_IRQ, },
+};
+
+static struct omap_hwmod_dma_info i2c3_sdma_chs[] = {
+	{ .name = "tx", .dma_ch = OMAP34XX_DMA_I2C3_TX },
+	{ .name = "rx", .dma_ch = OMAP34XX_DMA_I2C3_RX },
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_i2c3_slaves[] = {
+	&omap34xx_l4_core__i2c3,
+};
+
+static struct omap_hwmod omap34xx_i2c3_hwmod = {
+	.name		= "i2c3_hwmod",
+	.mpu_irqs	= i2c3_mpu_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(i2c3_mpu_irqs),
+	.sdma_chs	= i2c3_sdma_chs,
+	.sdma_chs_cnt	= ARRAY_SIZE(i2c3_sdma_chs),
+	.clkdev_dev_id	= "i2c_omap.3",
+	.clkdev_con_id	= "fck",
+	.prcm		= {
+		.omap2 = {
+			.prcm_reg_id = 1,
+			.module_bit = OMAP3430_GRPSEL_I2C3_SHIFT,
+		},
+	},
+	.slaves		= omap34xx_i2c3_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap34xx_i2c3_slaves),
+	.sysconfig	= &i2c_if_ctrl,
+	.dev_attr	= &i2c3_dev_attr,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
 static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
 	&omap34xx_l3_hwmod,
 	&omap34xx_l4_core_hwmod,
@@ -581,6 +806,9 @@ static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
 	&omap34xx_mmc1_hwmod,
 	&omap34xx_mmc2_hwmod,
 	&omap34xx_mmc3_hwmod,
+	&omap34xx_i2c1_hwmod,
+	&omap34xx_i2c2_hwmod,
+	&omap34xx_i2c3_hwmod,
 	NULL,
 };
 
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 51db382..86e5b90 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -105,9 +105,12 @@
 #define OMAP3430_GRPSEL_MCSPI3				(1 << 20)
 #define OMAP3430_GRPSEL_MCSPI2				(1 << 19)
 #define OMAP3430_GRPSEL_MCSPI1				(1 << 18)
-#define OMAP3430_GRPSEL_I2C3				(1 << 17)
-#define OMAP3430_GRPSEL_I2C2				(1 << 16)
-#define OMAP3430_GRPSEL_I2C1				(1 << 15)
+#define OMAP3430_GRPSEL_I2C3_SHIFT			17
+#define OMAP3430_GRPSEL_I2C3_MASK			(1 << 17)
+#define OMAP3430_GRPSEL_I2C2_SHIFT			16
+#define OMAP3430_GRPSEL_I2C2_MASK			(1 << 16)
+#define OMAP3430_GRPSEL_I2C1_SHIFT			15
+#define OMAP3430_GRPSEL_I2C1_MASK			(1 << 15)
 #define OMAP3430_GRPSEL_UART2				(1 << 14)
 #define OMAP3430_GRPSEL_UART1				(1 << 13)
 #define OMAP3430_GRPSEL_GPT11				(1 << 12)
diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h
index 585d9ca..6520980 100644
--- a/arch/arm/plat-omap/include/plat/i2c.h
+++ b/arch/arm/plat-omap/include/plat/i2c.h
@@ -37,3 +37,16 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
 int omap_plat_register_i2c_bus(int bus_id, u32 clkrate,
 				 struct i2c_board_info const *info,
 				 unsigned len);
+
+/**
+ * i2c_dev_attr - OMAP I2C controller device attributes for omap_hwmod
+ * @fifo_depth: total controller FIFO size (in bytes)
+ * @flags: differences in hardware support capability
+ *
+ * @fifo_depth represents what exists on the hardware, not what is
+ * actually configured at runtime by the device driver.
+ */
+struct omap_i2c_dev_attr {
+	u8      fifo_depth;
+	u8      flags;
+};
diff --git a/arch/arm/plat-omap/include/plat/l4_3xxx.h b/arch/arm/plat-omap/include/plat/l4_3xxx.h
index 06ead5c..da16479 100644
--- a/arch/arm/plat-omap/include/plat/l4_3xxx.h
+++ b/arch/arm/plat-omap/include/plat/l4_3xxx.h
@@ -21,4 +21,11 @@
 #define OMAP3_L4_CORE_FW_MMC3_REGION				98
 #define OMAP3_L4_CORE_FW_MMC3_TA_REGION				99
 
+#define OMAP3_L4_CORE_FW_I2C1_REGION				21
+#define OMAP3_L4_CORE_FW_I2C1_TA_REGION				22
+#define OMAP3_L4_CORE_FW_I2C2_REGION				23
+#define OMAP3_L4_CORE_FW_I2C2_TA_REGION				24
+#define OMAP3_L4_CORE_FW_I2C3_REGION				73
+#define OMAP3_L4_CORE_FW_I2C3_TA_REGION				74
+
 #endif
-- 
1.5.4.7

[PATCH 4/6] OMAP: I2C: split device registration; convert OMAP2+ to omap_device

[Rajendra Nayak]

From: Paul Walmsley <paul@pwsan.com>

Split the OMAP1 and OMAP2+ platform_device build and register code.
Convert the OMAP2+ variant to use omap_device.

This patch was developed in collaboration with Rajendra Nayak
<rnayak@ti.com>.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/mach-omap1/i2c.c             |  103 +++++++++++++++++++++++
 arch/arm/mach-omap2/i2c.c             |   67 +++++++++++++++
 arch/arm/plat-omap/i2c.c              |  144 +++++++++++----------------------
 arch/arm/plat-omap/include/plat/i2c.h |   24 ++++++
 4 files changed, 240 insertions(+), 98 deletions(-)

diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c
index 1bf4735..7cff846 100644
--- a/arch/arm/mach-omap1/i2c.c
+++ b/arch/arm/mach-omap1/i2c.c
@@ -19,9 +19,112 @@
  *
  */
 
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+
 #include <plat/i2c.h>
 #include <plat/mux.h>
 #include <plat/cpu.h>
+#include <plat/irqs.h>
+
+#include "mux.h"
+
+#define OMAP1_I2C_SIZE         0x3f
+#define OMAP1_I2C_BASE         0xfffb3800
+
+static const char name[] = "i2c_omap";
+
+#define OMAP1_I2C_RESOURCE_BUILDER(base, irq)		\
+{
+	{						\
+		.start	= (base),			\
+		.end	= (base) + OMAP1_I2C_SIZE,	\
+		.flags	= IORESOURCE_MEM,		\
+	},						\
+	{						\
+		.start	= (irq),			\
+		.flags	= IORESOURCE_IRQ,		\
+	},						\
+}
+
+static struct resource i2c_resources[][2] = {
+	{ OMAP1_I2C_RESOURCE_BUILDER(OMAP1_I2C_BASE, INT_I2C) },
+};
+
+#define OMAP1_I2C_DEV_BUILDER(bus_id, res)		\
+	{						\
+		.id	= (bus_id),			\
+		.name	= name,				\
+		.num_resources	= ARRAY_SIZE(res),	\
+		.resource	= (res),		\
+	}
+
+static struct platform_device omap_i2c_devices[] = {
+	OMAP1_I2C_DEV_BUILDER(1, i2c_resources[0]),
+};
+
+#define I2C_ICLK	0
+#define I2C_FCLK	1
+static struct clk *omap_i2c_clks[ARRAY_SIZE(omap_i2c_devices)][2];
+
+static struct omap_i2c_dev_attr omap1_i2c_dev_attr;
+
+int __init omap1_i2c_nr_ports(void)
+{
+	return 1;
+}
+
+static int omap1_i2c_device_enable(struct platform_device *pdev)
+{
+	struct clk *c;
+	c = omap_i2c_clks[pdev->id - 1][I2C_ICLK];
+	if (c && !IS_ERR(c))
+		clk_enable(c);
+
+	c = omap_i2c_clks[pdev->id - 1][I2C_FCLK];
+	if (c && !IS_ERR(c))
+		clk_enable(c);
+
+	return 0;
+}
+
+static int omap1_i2c_device_idle(struct platform_device *pdev)
+{
+	struct clk *c;
+
+	c = omap_i2c_clks[pdev->id - 1][I2C_FCLK];
+	if (c && !IS_ERR(c))
+		clk_disable(c);
+
+	c = omap_i2c_clks[pdev->id - 1][I2C_ICLK];
+	if (c && !IS_ERR(c))
+		clk_disable(c);
+
+	return 0;
+}
+
+int __init omap1_i2c_add_bus(int bus_id)
+{
+	struct platform_device *pdev;
+	struct omap_i2c_platform_data *pdata;
+
+	pdev = &omap_i2c_devices[bus_id - 1];
+	pdata = omap_i2c_get_pdata(bus_id - 1);
+
+	/* idle and shutdown share the same code */
+	pdata->device_enable = omap1_i2c_device_enable;
+	pdata->device_idle = omap1_i2c_device_idle;
+	pdata->device_shutdown = omap1_i2c_device_idle;
+	pdata->dev_attr = &omap1_i2c_dev_attr;
+
+	omap_i2c_clks[bus_id - 1][I2C_ICLK] = clk_get(&pdev->dev, "ick");
+	omap_i2c_clks[bus_id - 1][I2C_FCLK] = clk_get(&pdev->dev, "fck");
+
+	return platform_device_register(pdev);
+}
 
 int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 			  struct i2c_board_info const *info,
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index 789ca8c..e773a25 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -19,12 +19,79 @@
  *
  */
 
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/err.h>
+
 #include <plat/cpu.h>
 #include <plat/i2c.h>
+#include <plat/irqs.h>
 #include <plat/mux.h>
+#include <plat/omap_hwmod.h>
+#include <plat/omap_device.h>
 
 #include "mux.h"
 
+static const char name[] = "i2c_omap";
+
+#define MAX_OMAP_I2C_HWMOD_NAME_LEN		16
+
+int __init omap2_i2c_nr_ports(void)
+{
+	int ports = 0;
+
+	if (cpu_is_omap24xx())
+		ports = 2;
+	else if (cpu_is_omap34xx() || cpu_is_omap44xx())
+		ports = 3;
+
+	return ports;
+}
+
+static struct omap_device_pm_latency omap_i2c_latency[] = {
+	[0] = {
+		.deactivate_func	= omap_device_idle_hwmods,
+		.activate_func		= omap_device_enable_hwmods,
+		.flags			= OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+	},
+};
+
+int __init omap2_i2c_add_bus(int bus_id)
+{
+	struct omap_hwmod *oh;
+	struct omap_device *od;
+	char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
+	int l, idx;
+	struct omap_i2c_platform_data *pdata;
+
+	idx = bus_id - 1;
+
+	l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN,
+		     "i2c%d_hwmod", bus_id);
+	WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
+	     "String buffer overflow in I2C%d device setup\n", bus_id);
+	oh = omap_hwmod_lookup(oh_name);
+	if (!oh) {
+		pr_err("Could not look up %s\n", oh_name);
+		return -EEXIST;
+	}
+
+	pdata = omap_i2c_get_pdata(idx);
+	pdata->dev_attr = oh->dev_attr;
+	pdata->device_enable = omap_device_enable;
+	pdata->device_idle = omap_device_idle;
+	pdata->device_shutdown = omap_device_shutdown;
+
+	od = omap_device_build(name, bus_id, oh, pdata,
+			       sizeof(struct omap_i2c_platform_data),
+			       omap_i2c_latency, ARRAY_SIZE(omap_i2c_latency));
+	WARN(IS_ERR(od), "Could not build omap_device for %s %s\n",
+	     name, oh_name);
+
+	return PTR_ERR(od);
+}
+
 int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 			  struct i2c_board_info const *info,
 			  unsigned len)
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 96d2781..7c1bb32 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -28,96 +28,20 @@
 #include <linux/i2c.h>
 #include <mach/irqs.h>
 #include <plat/mux.h>
+#include <plat/i2c.h>
 
-#define OMAP_I2C_SIZE		0x3f
-#define OMAP1_I2C_BASE		0xfffb3800
-#define OMAP2_I2C_BASE1		0x48070000
-#define OMAP2_I2C_BASE2		0x48072000
-#define OMAP2_I2C_BASE3		0x48060000
-
-static const char name[] = "i2c_omap";
-
-#define I2C_RESOURCE_BUILDER(base, irq)			\
-	{						\
-		.start	= (base),			\
-		.end	= (base) + OMAP_I2C_SIZE,	\
-		.flags	= IORESOURCE_MEM,		\
-	},						\
-	{						\
-		.start	= (irq),			\
-		.flags	= IORESOURCE_IRQ,		\
-	},
-
-static struct resource i2c_resources[][2] = {
-	{ I2C_RESOURCE_BUILDER(0, 0) },
-#if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) },
-#endif
-#if	defined(CONFIG_ARCH_OMAP3)
-	{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) },
-#endif
-};
-
-#define I2C_DEV_BUILDER(bus_id, res, data)		\
-	{						\
-		.id	= (bus_id),			\
-		.name	= name,				\
-		.num_resources	= ARRAY_SIZE(res),	\
-		.resource	= (res),		\
-		.dev		= {			\
-			.platform_data	= (data),	\
-		},					\
-	}
-
-static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
-static struct platform_device omap_i2c_devices[] = {
-	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
-#if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
-#endif
-#if	defined(CONFIG_ARCH_OMAP3)
-	I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
-#endif
-};
+/*
+ * Indicates to the OMAP platform I2C init code that the rate was set
+ * from the kernel command line
+ */
+#define OMAP_I2C_CMDLINE_SETUP		(BIT(31))
+#define OMAP_I2C_MAX_CONTROLLERS	3
 
-#define OMAP_I2C_CMDLINE_SETUP	(BIT(31))
+static struct omap_i2c_platform_data omap_i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
 
-static int __init omap_i2c_nr_ports(void)
+struct omap_i2c_platform_data * __init omap_i2c_get_pdata(int bus_id)
 {
-	int ports = 0;
-
-	if (cpu_class_is_omap1())
-		ports = 1;
-	else if (cpu_is_omap24xx())
-		ports = 2;
-	else if (cpu_is_omap34xx())
-		ports = 3;
-
-	return ports;
-}
-
-static int __init omap_i2c_add_bus(int bus_id)
-{
-	struct platform_device *pdev;
-	struct resource *res;
-	resource_size_t base, irq;
-
-	pdev = &omap_i2c_devices[bus_id - 1];
-	if (bus_id == 1) {
-		res = pdev->resource;
-		if (cpu_class_is_omap1()) {
-			base = OMAP1_I2C_BASE;
-			irq = INT_I2C;
-		} else {
-			base = OMAP2_I2C_BASE1;
-			irq = INT_24XX_I2C1_IRQ;
-		}
-		res[0].start = base;
-		res[0].end = base + OMAP_I2C_SIZE;
-		res[1].start = irq;
-	}
-
-	return platform_device_register(pdev);
+	return &omap_i2c_pdata[bus_id];
 }
 
 /**
@@ -135,13 +59,23 @@ static int __init omap_i2c_bus_setup(char *str)
 {
 	int ports;
 	int ints[3];
+	int rate;
+
+	if (cpu_class_is_omap1())
+		ports = omap1_i2c_nr_ports();
+	else if (cpu_class_is_omap2())
+		ports = omap2_i2c_nr_ports();
+	else
+		ports = 0;
 
-	ports = omap_i2c_nr_ports();
 	get_options(str, 3, ints);
 	if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
 		return 0;
-	i2c_rate[ints[1] - 1] = ints[2];
-	i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP;
+
+	rate = ints[2];
+	rate |= OMAP_I2C_CMDLINE_SETUP;
+
+	omap_i2c_pdata[ints[1] - 1].rate = rate;
 
 	return 1;
 }
@@ -155,10 +89,14 @@ static int __init omap_register_i2c_bus_cmdline(void)
 {
 	int i, err = 0;
 
-	for (i = 0; i < ARRAY_SIZE(i2c_rate); i++)
-		if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) {
-			i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP;
-			err = omap_i2c_add_bus(i + 1);
+	for (i = 0; i < ARRAY_SIZE(omap_i2c_pdata); i++)
+		if (omap_i2c_pdata[i].rate & OMAP_I2C_CMDLINE_SETUP) {
+			omap_i2c_pdata[i].rate &= ~OMAP_I2C_CMDLINE_SETUP;
+			err = -EINVAL;
+			if (cpu_class_is_omap1())
+				err = omap1_i2c_add_bus(i + 1);
+			else if (cpu_class_is_omap2())
+				err = omap2_i2c_add_bus(i + 1);
 			if (err)
 				goto out;
 		}
@@ -182,8 +120,14 @@ int __init omap_plat_register_i2c_bus(int bus_id, u32 clkrate,
 			  unsigned len)
 {
 	int err;
+	int nr_ports = 0;
+
+	if (cpu_class_is_omap1())
+		nr_ports = omap1_i2c_nr_ports();
+	else if (cpu_class_is_omap2())
+		nr_ports = omap2_i2c_nr_ports();
 
-	BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
+	BUG_ON(bus_id < 1 || bus_id > nr_ports);
 
 	if (info) {
 		err = i2c_register_board_info(bus_id, info, len);
@@ -191,9 +135,13 @@ int __init omap_plat_register_i2c_bus(int bus_id, u32 clkrate,
 			return err;
 	}
 
-	if (!i2c_rate[bus_id - 1])
-		i2c_rate[bus_id - 1] = clkrate;
-	i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP;
+	if (!omap_i2c_pdata[bus_id - 1].rate)
+		omap_i2c_pdata[bus_id - 1].rate = clkrate;
+	omap_i2c_pdata[bus_id - 1].rate &= ~OMAP_I2C_CMDLINE_SETUP;
+
+	if (cpu_class_is_omap1())
+		return omap1_i2c_add_bus(bus_id);
+	else if (cpu_class_is_omap2())
+		return omap2_i2c_add_bus(bus_id);
 
-	return omap_i2c_add_bus(bus_id);
 }
diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h
index 6520980..aeb72f8 100644
--- a/arch/arm/plat-omap/include/plat/i2c.h
+++ b/arch/arm/plat-omap/include/plat/i2c.h
@@ -20,6 +20,7 @@
  */
 
 #include <linux/i2c.h>
+#include <linux/platform_device.h>
 
 #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
 extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
@@ -50,3 +51,26 @@ struct omap_i2c_dev_attr {
 	u8      fifo_depth;
 	u8      flags;
 };
+
+/**
+ * struct omap_i2c_platform_data - OMAP I2C controller platform data
+ */
+struct omap_i2c_platform_data {
+	u32 rate;
+	struct omap_i2c_dev_attr *dev_attr;
+	void (*set_mpu_wkup_lat)(struct device *dev, int set);
+	int (*device_enable) (struct platform_device *pdev);
+	int (*device_shutdown) (struct platform_device *pdev);
+	int (*device_idle) (struct platform_device *pdev);
+};
+
+/* Prototypes for OMAP platform I2C core initialization code */
+
+struct omap_i2c_platform_data * __init omap_i2c_get_pdata(int bus_id);
+
+int __init omap1_i2c_nr_ports(void);
+int __init omap2_i2c_nr_ports(void);
+
+int __init omap1_i2c_add_bus(int bus_id);
+int __init omap2_i2c_add_bus(int bus_id);
+
-- 
1.5.4.7

[PATCH 5/6] OMAP: I2C: Convert i2c driver to use omap_device/omap_hwmod

[Rajendra Nayak]

This patch converts the i2c driver to use omap_device/omap_hwmod.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 drivers/i2c/busses/i2c-omap.c |   81 ++++++++++++++++-------------------------
 1 files changed, 32 insertions(+), 49 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 0037e31..520ac5a 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -38,6 +42,8 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
+#include <plat/i2c.h>
+
 /* I2C controller revisions */
 #define OMAP_I2C_REV_2			0x20
 
@@ -161,8 +167,6 @@ struct omap_i2c_dev {
 	struct device		*dev;
 	void __iomem		*base;		/* virtual */
 	int			irq;
-	struct clk		*iclk;		/* Interface clock */
-	struct clk		*fclk;		/* Functional clock */
 	struct completion	cmd_complete;
 	struct resource		*ioarea;
 	u32			speed;		/* Speed of bus in Khz */
@@ -197,45 +201,19 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
 	return __raw_readw(i2c_dev->base + reg);
 }
 
-static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
+static void omap_i2c_unidle(struct omap_i2c_dev *dev)
 {
-	int ret;
-
-	dev->iclk = clk_get(dev->dev, "ick");
-	if (IS_ERR(dev->iclk)) {
-		ret = PTR_ERR(dev->iclk);
-		dev->iclk = NULL;
-		return ret;
-	}
+	struct platform_device *pdev;
+	struct omap_i2c_platform_data *pdata;
 
-	dev->fclk = clk_get(dev->dev, "fck");
-	if (IS_ERR(dev->fclk)) {
-		ret = PTR_ERR(dev->fclk);
-		if (dev->iclk != NULL) {
-			clk_put(dev->iclk);
-			dev->iclk = NULL;
-		}
-		dev->fclk = NULL;
-		return ret;
-	}
-
-	return 0;
-}
+	WARN_ON(!dev->idle);
 
-static void omap_i2c_put_clocks(struct omap_i2c_dev *dev)
-{
-	clk_put(dev->fclk);
-	dev->fclk = NULL;
-	clk_put(dev->iclk);
-	dev->iclk = NULL;
-}
+	pdev = container_of(dev->dev, struct platform_device, dev);
+	pdata = pdev->dev.platform_data;
 
-static void omap_i2c_unidle(struct omap_i2c_dev *dev)
-{
-	WARN_ON(!dev->idle);
+	if (pdata->device_enable)
+		pdata->device_enable(pdev);
 
-	clk_enable(dev->iclk);
-	clk_enable(dev->fclk);
 	if (cpu_is_omap34xx()) {
 		omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
 		omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate);
@@ -258,10 +236,15 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
 
 static void omap_i2c_idle(struct omap_i2c_dev *dev)
 {
+	struct platform_device *pdev;
+	struct omap_i2c_platform_data *pdata;
 	u16 iv;
 
 	WARN_ON(dev->idle);
 
+	pdev = container_of(dev->dev, struct platform_device, dev);
+	pdata = pdev->dev.platform_data;
+
 	dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
 	omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
 	if (dev->rev < OMAP_I2C_REV_2) {
@@ -273,8 +256,8 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
 		omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
 	}
 	dev->idle = 1;
-	clk_disable(dev->fclk);
-	clk_disable(dev->iclk);
+	if (pdata->device_idle)
+		pdata->device_idle(pdev);
 }
 
 static int omap_i2c_init(struct omap_i2c_dev *dev)
@@ -284,6 +267,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
 	unsigned long fclk_rate = 12000000;
 	unsigned long timeout;
 	unsigned long internal_clk = 0;
+	struct clk *fclk;
 
 	if (dev->rev >= OMAP_I2C_REV_2) {
 		/* Disable I2C controller before soft reset */
@@ -340,7 +324,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
 		 * always returns 12MHz for the functional clock, we can
 		 * do this bit unconditionally.
 		 */
-		fclk_rate = clk_get_rate(dev->fclk);
+		fclk = clk_get(dev->dev, "fck");
+		fclk_rate = clk_get_rate(fclk);
 
 		/* TRM for 5912 says the I2C clock must be prescaled to be
 		 * between 7 - 12 MHz. The XOR input clock is typically
@@ -369,7 +354,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
 			internal_clk = 9600;
 		else
 			internal_clk = 4000;
-		fclk_rate = clk_get_rate(dev->fclk) / 1000;
+		fclk = clk_get(dev->dev, "fck");
+		fclk_rate = clk_get_rate(fclk) / 1000;
 
 		/* Compute prescaler divisor */
 		psc = fclk_rate / internal_clk;
@@ -856,6 +842,7 @@ omap_i2c_probe(struct platform_device *pdev)
 	struct i2c_adapter	*adap;
 	struct resource		*mem, *irq, *ioarea;
 	irq_handler_t isr;
+	struct omap_i2c_platform_data *pdata;
 	int r;
 	u32 speed = 0;
 
@@ -884,8 +871,10 @@ omap_i2c_probe(struct platform_device *pdev)
 		goto err_release_region;
 	}
 
-	if (pdev->dev.platform_data != NULL)
-		speed = *(u32 *)pdev->dev.platform_data;
+	pdata = pdev->dev.platform_data;
+
+	if (pdata->rate)
+		speed = pdata->rate;
 	else
 		speed = 100;	/* Defualt speed */
 
@@ -901,9 +890,6 @@ omap_i2c_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, dev);
 
-	if ((r = omap_i2c_get_clocks(dev)) != 0)
-		goto err_iounmap;
-
 	omap_i2c_unidle(dev);
 
 	dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
@@ -963,8 +949,6 @@ err_free_irq:
 err_unuse_clocks:
 	omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
 	omap_i2c_idle(dev);
-	omap_i2c_put_clocks(dev);
-err_iounmap:
 	iounmap(dev->base);
 err_free_mem:
 	platform_set_drvdata(pdev, NULL);
@@ -986,7 +970,6 @@ omap_i2c_remove(struct platform_device *pdev)
 	free_irq(dev->irq, dev);
 	i2c_del_adapter(&dev->adapter);
 	omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
-	omap_i2c_put_clocks(dev);
 	iounmap(dev->base);
 	kfree(dev);
 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-- 
1.5.4.7

[PATCH 6/6] OMAP: Fix compile break in serial with CONFIG_PM disabled

[Rajendra Nayak]

omap_h4_2420_defconfig breaks in serial because on the below issue.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/mach-omap2/serial.c |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index ac8262d..3905574 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -527,7 +527,12 @@ static ssize_t sleep_timeout_store(struct device *dev,
 DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show, sleep_timeout_store);
 #define DEV_CREATE_FILE(dev, attr) WARN_ON(device_create_file(dev, attr))
 #else
-static inline void omap_uart_idle_init(struct omap_uart_state *uart) {}
+static inline void omap_uart_idle_init(struct omap_uart_state *uart)
+{
+}
+static void omap_uart_block_sleep(struct omap_uart_state *uart)
+{
+}
 #define DEV_CREATE_FILE(dev, attr)
 #endif /* CONFIG_PM */
 
-- 
1.5.4.7

Re: [PATCH 5/6] OMAP: I2C: Convert i2c driver to use omap_device/omap_hwmod

[Kevin Hilman]

Rajendra Nayak <rnayak@ti.com> writes:

> This patch converts the i2c driver to use omap_device/omap_hwmod.
>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>

Hi Rajendra,

Rather than using omap_device functions via platform_data pointers,
can you try to do this using runtime PM?  You can use my
pm-wip/runtime branch (based on top of my pm-wip/hwmods branch.)  I
also have a pm-wip/mmc branch on top of the runtime branch that does
this for the MMC if you'd like to compare.

Basically, this patch will be the same, except for instead of

	if (pdata->device_enable)
		pdata->device_enable(pdev);

you do

	pm_runtime_get_sync(dev)
        

and instead of 

	if (pdata->device_enable)
		pdata->device_enable(pdev);

you do

	pm_runtime_put_sync(dev)

under the hood, the runtime PM core will do reference counting and
then call OMAP device when needed.

Kevin

> ---
>  drivers/i2c/busses/i2c-omap.c |   81 ++++++++++++++++-------------------------
>  1 files changed, 32 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 0037e31..520ac5a 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -38,6 +42,8 @@
>  #include <linux/clk.h>
>  #include <linux/io.h>
>  
> +#include <plat/i2c.h>
> +
>  /* I2C controller revisions */
>  #define OMAP_I2C_REV_2			0x20
>  
> @@ -161,8 +167,6 @@ struct omap_i2c_dev {
>  	struct device		*dev;
>  	void __iomem		*base;		/* virtual */
>  	int			irq;
> -	struct clk		*iclk;		/* Interface clock */
> -	struct clk		*fclk;		/* Functional clock */
>  	struct completion	cmd_complete;
>  	struct resource		*ioarea;
>  	u32			speed;		/* Speed of bus in Khz */
> @@ -197,45 +201,19 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
>  	return __raw_readw(i2c_dev->base + reg);
>  }
>  
> -static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> +static void omap_i2c_unidle(struct omap_i2c_dev *dev)
>  {
> -	int ret;
> -
> -	dev->iclk = clk_get(dev->dev, "ick");
> -	if (IS_ERR(dev->iclk)) {
> -		ret = PTR_ERR(dev->iclk);
> -		dev->iclk = NULL;
> -		return ret;
> -	}
> +	struct platform_device *pdev;
> +	struct omap_i2c_platform_data *pdata;
>  
> -	dev->fclk = clk_get(dev->dev, "fck");
> -	if (IS_ERR(dev->fclk)) {
> -		ret = PTR_ERR(dev->fclk);
> -		if (dev->iclk != NULL) {
> -			clk_put(dev->iclk);
> -			dev->iclk = NULL;
> -		}
> -		dev->fclk = NULL;
> -		return ret;
> -	}
> -
> -	return 0;
> -}
> +	WARN_ON(!dev->idle);
>  
> -static void omap_i2c_put_clocks(struct omap_i2c_dev *dev)
> -{
> -	clk_put(dev->fclk);
> -	dev->fclk = NULL;
> -	clk_put(dev->iclk);
> -	dev->iclk = NULL;
> -}
> +	pdev = container_of(dev->dev, struct platform_device, dev);
> +	pdata = pdev->dev.platform_data;
>  
> -static void omap_i2c_unidle(struct omap_i2c_dev *dev)
> -{
> -	WARN_ON(!dev->idle);
> +	if (pdata->device_enable)
> +		pdata->device_enable(pdev);
>  
> -	clk_enable(dev->iclk);
> -	clk_enable(dev->fclk);
>  	if (cpu_is_omap34xx()) {
>  		omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
>  		omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate);
> @@ -258,10 +236,15 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
>  
>  static void omap_i2c_idle(struct omap_i2c_dev *dev)
>  {
> +	struct platform_device *pdev;
> +	struct omap_i2c_platform_data *pdata;
>  	u16 iv;
>  
>  	WARN_ON(dev->idle);
>  
> +	pdev = container_of(dev->dev, struct platform_device, dev);
> +	pdata = pdev->dev.platform_data;
> +
>  	dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
>  	omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
>  	if (dev->rev < OMAP_I2C_REV_2) {
> @@ -273,8 +256,8 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
>  		omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
>  	}
>  	dev->idle = 1;
> -	clk_disable(dev->fclk);
> -	clk_disable(dev->iclk);
> +	if (pdata->device_idle)
> +		pdata->device_idle(pdev);
>  }
>  
>  static int omap_i2c_init(struct omap_i2c_dev *dev)
> @@ -284,6 +267,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
>  	unsigned long fclk_rate = 12000000;
>  	unsigned long timeout;
>  	unsigned long internal_clk = 0;
> +	struct clk *fclk;
>  
>  	if (dev->rev >= OMAP_I2C_REV_2) {
>  		/* Disable I2C controller before soft reset */
> @@ -340,7 +324,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
>  		 * always returns 12MHz for the functional clock, we can
>  		 * do this bit unconditionally.
>  		 */
> -		fclk_rate = clk_get_rate(dev->fclk);
> +		fclk = clk_get(dev->dev, "fck");
> +		fclk_rate = clk_get_rate(fclk);
>  
>  		/* TRM for 5912 says the I2C clock must be prescaled to be
>  		 * between 7 - 12 MHz. The XOR input clock is typically
> @@ -369,7 +354,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
>  			internal_clk = 9600;
>  		else
>  			internal_clk = 4000;
> -		fclk_rate = clk_get_rate(dev->fclk) / 1000;
> +		fclk = clk_get(dev->dev, "fck");
> +		fclk_rate = clk_get_rate(fclk) / 1000;
>  
>  		/* Compute prescaler divisor */
>  		psc = fclk_rate / internal_clk;
> @@ -856,6 +842,7 @@ omap_i2c_probe(struct platform_device *pdev)
>  	struct i2c_adapter	*adap;
>  	struct resource		*mem, *irq, *ioarea;
>  	irq_handler_t isr;
> +	struct omap_i2c_platform_data *pdata;
>  	int r;
>  	u32 speed = 0;
>  
> @@ -884,8 +871,10 @@ omap_i2c_probe(struct platform_device *pdev)
>  		goto err_release_region;
>  	}
>  
> -	if (pdev->dev.platform_data != NULL)
> -		speed = *(u32 *)pdev->dev.platform_data;
> +	pdata = pdev->dev.platform_data;
> +
> +	if (pdata->rate)
> +		speed = pdata->rate;
>  	else
>  		speed = 100;	/* Defualt speed */
>  
> @@ -901,9 +890,6 @@ omap_i2c_probe(struct platform_device *pdev)
>  
>  	platform_set_drvdata(pdev, dev);
>  
> -	if ((r = omap_i2c_get_clocks(dev)) != 0)
> -		goto err_iounmap;
> -
>  	omap_i2c_unidle(dev);
>  
>  	dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
> @@ -963,8 +949,6 @@ err_free_irq:
>  err_unuse_clocks:
>  	omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
>  	omap_i2c_idle(dev);
> -	omap_i2c_put_clocks(dev);
> -err_iounmap:
>  	iounmap(dev->base);
>  err_free_mem:
>  	platform_set_drvdata(pdev, NULL);
> @@ -986,7 +970,6 @@ omap_i2c_remove(struct platform_device *pdev)
>  	free_irq(dev->irq, dev);
>  	i2c_del_adapter(&dev->adapter);
>  	omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> -	omap_i2c_put_clocks(dev);
>  	iounmap(dev->base);
>  	kfree(dev);
>  	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> -- 
> 1.5.4.7
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

RE: [PATCH 5/6] OMAP: I2C: Convert i2c driver to use omap_device/omap_hwmod

[Nayak, Rajendra]

Hi Kevin, 

> -----Original Message-----
> From: Kevin Hilman [mailto:khilman@deeprootsystems.com] 
> Sent: Wednesday, February 24, 2010 1:02 AM
> To: Nayak, Rajendra
> Cc: linux-omap@vger.kernel.org
> Subject: Re: [PATCH 5/6] OMAP: I2C: Convert i2c driver to use 
> omap_device/omap_hwmod
> 
> Rajendra Nayak <rnayak@ti.com> writes:
> 
> > This patch converts the i2c driver to use omap_device/omap_hwmod.
> >
> > Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> 
> Hi Rajendra,
> 
> Rather than using omap_device functions via platform_data pointers,
> can you try to do this using runtime PM?  You can use my
> pm-wip/runtime branch (based on top of my pm-wip/hwmods branch.)  I
> also have a pm-wip/mmc branch on top of the runtime branch that does
> this for the MMC if you'd like to compare.

Ok.. I'll repost the patch using runtime PM instead of the omap_device
api's.

regards,
Rajendra

> 
> Basically, this patch will be the same, except for instead of
> 
> 	if (pdata->device_enable)
> 		pdata->device_enable(pdev);
> 
> you do
> 
> 	pm_runtime_get_sync(dev)
>         
> 
> and instead of 
> 
> 	if (pdata->device_enable)
> 		pdata->device_enable(pdev);
> 
> you do
> 
> 	pm_runtime_put_sync(dev)
> 
> under the hood, the runtime PM core will do reference counting and
> then call OMAP device when needed.
> 
> Kevin
> 
> > ---
> >  drivers/i2c/busses/i2c-omap.c |   81 
> ++++++++++++++++-------------------------
> >  1 files changed, 32 insertions(+), 49 deletions(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-omap.c 
> b/drivers/i2c/busses/i2c-omap.c
> > index 0037e31..520ac5a 100644
> > --- a/drivers/i2c/busses/i2c-omap.c
> > +++ b/drivers/i2c/busses/i2c-omap.c
> > @@ -38,6 +42,8 @@
> >  #include <linux/clk.h>
> >  #include <linux/io.h>
> >  
> > +#include <plat/i2c.h>
> > +
> >  /* I2C controller revisions */
> >  #define OMAP_I2C_REV_2			0x20
> >  
> > @@ -161,8 +167,6 @@ struct omap_i2c_dev {
> >  	struct device		*dev;
> >  	void __iomem		*base;		/* virtual */
> >  	int			irq;
> > -	struct clk		*iclk;		/* Interface clock */
> > -	struct clk		*fclk;		/* Functional clock */
> >  	struct completion	cmd_complete;
> >  	struct resource		*ioarea;
> >  	u32			speed;		/* Speed of bus 
> in Khz */
> > @@ -197,45 +201,19 @@ static inline u16 
> omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
> >  	return __raw_readw(i2c_dev->base + reg);
> >  }
> >  
> > -static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> > +static void omap_i2c_unidle(struct omap_i2c_dev *dev)
> >  {
> > -	int ret;
> > -
> > -	dev->iclk = clk_get(dev->dev, "ick");
> > -	if (IS_ERR(dev->iclk)) {
> > -		ret = PTR_ERR(dev->iclk);
> > -		dev->iclk = NULL;
> > -		return ret;
> > -	}
> > +	struct platform_device *pdev;
> > +	struct omap_i2c_platform_data *pdata;
> >  
> > -	dev->fclk = clk_get(dev->dev, "fck");
> > -	if (IS_ERR(dev->fclk)) {
> > -		ret = PTR_ERR(dev->fclk);
> > -		if (dev->iclk != NULL) {
> > -			clk_put(dev->iclk);
> > -			dev->iclk = NULL;
> > -		}
> > -		dev->fclk = NULL;
> > -		return ret;
> > -	}
> > -
> > -	return 0;
> > -}
> > +	WARN_ON(!dev->idle);
> >  
> > -static void omap_i2c_put_clocks(struct omap_i2c_dev *dev)
> > -{
> > -	clk_put(dev->fclk);
> > -	dev->fclk = NULL;
> > -	clk_put(dev->iclk);
> > -	dev->iclk = NULL;
> > -}
> > +	pdev = container_of(dev->dev, struct platform_device, dev);
> > +	pdata = pdev->dev.platform_data;
> >  
> > -static void omap_i2c_unidle(struct omap_i2c_dev *dev)
> > -{
> > -	WARN_ON(!dev->idle);
> > +	if (pdata->device_enable)
> > +		pdata->device_enable(pdev);
> >  
> > -	clk_enable(dev->iclk);
> > -	clk_enable(dev->fclk);
> >  	if (cpu_is_omap34xx()) {
> >  		omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> >  		omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, 
> dev->pscstate);
> > @@ -258,10 +236,15 @@ static void omap_i2c_unidle(struct 
> omap_i2c_dev *dev)
> >  
> >  static void omap_i2c_idle(struct omap_i2c_dev *dev)
> >  {
> > +	struct platform_device *pdev;
> > +	struct omap_i2c_platform_data *pdata;
> >  	u16 iv;
> >  
> >  	WARN_ON(dev->idle);
> >  
> > +	pdev = container_of(dev->dev, struct platform_device, dev);
> > +	pdata = pdev->dev.platform_data;
> > +
> >  	dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
> >  	omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> >  	if (dev->rev < OMAP_I2C_REV_2) {
> > @@ -273,8 +256,8 @@ static void omap_i2c_idle(struct 
> omap_i2c_dev *dev)
> >  		omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
> >  	}
> >  	dev->idle = 1;
> > -	clk_disable(dev->fclk);
> > -	clk_disable(dev->iclk);
> > +	if (pdata->device_idle)
> > +		pdata->device_idle(pdev);
> >  }
> >  
> >  static int omap_i2c_init(struct omap_i2c_dev *dev)
> > @@ -284,6 +267,7 @@ static int omap_i2c_init(struct 
> omap_i2c_dev *dev)
> >  	unsigned long fclk_rate = 12000000;
> >  	unsigned long timeout;
> >  	unsigned long internal_clk = 0;
> > +	struct clk *fclk;
> >  
> >  	if (dev->rev >= OMAP_I2C_REV_2) {
> >  		/* Disable I2C controller before soft reset */
> > @@ -340,7 +324,8 @@ static int omap_i2c_init(struct 
> omap_i2c_dev *dev)
> >  		 * always returns 12MHz for the functional clock, we can
> >  		 * do this bit unconditionally.
> >  		 */
> > -		fclk_rate = clk_get_rate(dev->fclk);
> > +		fclk = clk_get(dev->dev, "fck");
> > +		fclk_rate = clk_get_rate(fclk);
> >  
> >  		/* TRM for 5912 says the I2C clock must be 
> prescaled to be
> >  		 * between 7 - 12 MHz. The XOR input clock is typically
> > @@ -369,7 +354,8 @@ static int omap_i2c_init(struct 
> omap_i2c_dev *dev)
> >  			internal_clk = 9600;
> >  		else
> >  			internal_clk = 4000;
> > -		fclk_rate = clk_get_rate(dev->fclk) / 1000;
> > +		fclk = clk_get(dev->dev, "fck");
> > +		fclk_rate = clk_get_rate(fclk) / 1000;
> >  
> >  		/* Compute prescaler divisor */
> >  		psc = fclk_rate / internal_clk;
> > @@ -856,6 +842,7 @@ omap_i2c_probe(struct platform_device *pdev)
> >  	struct i2c_adapter	*adap;
> >  	struct resource		*mem, *irq, *ioarea;
> >  	irq_handler_t isr;
> > +	struct omap_i2c_platform_data *pdata;
> >  	int r;
> >  	u32 speed = 0;
> >  
> > @@ -884,8 +871,10 @@ omap_i2c_probe(struct platform_device *pdev)
> >  		goto err_release_region;
> >  	}
> >  
> > -	if (pdev->dev.platform_data != NULL)
> > -		speed = *(u32 *)pdev->dev.platform_data;
> > +	pdata = pdev->dev.platform_data;
> > +
> > +	if (pdata->rate)
> > +		speed = pdata->rate;
> >  	else
> >  		speed = 100;	/* Defualt speed */
> >  
> > @@ -901,9 +890,6 @@ omap_i2c_probe(struct platform_device *pdev)
> >  
> >  	platform_set_drvdata(pdev, dev);
> >  
> > -	if ((r = omap_i2c_get_clocks(dev)) != 0)
> > -		goto err_iounmap;
> > -
> >  	omap_i2c_unidle(dev);
> >  
> >  	dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
> > @@ -963,8 +949,6 @@ err_free_irq:
> >  err_unuse_clocks:
> >  	omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> >  	omap_i2c_idle(dev);
> > -	omap_i2c_put_clocks(dev);
> > -err_iounmap:
> >  	iounmap(dev->base);
> >  err_free_mem:
> >  	platform_set_drvdata(pdev, NULL);
> > @@ -986,7 +970,6 @@ omap_i2c_remove(struct platform_device *pdev)
> >  	free_irq(dev->irq, dev);
> >  	i2c_del_adapter(&dev->adapter);
> >  	omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> > -	omap_i2c_put_clocks(dev);
> >  	iounmap(dev->base);
> >  	kfree(dev);
> >  	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > -- 
> > 1.5.4.7
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe 
> linux-omap" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: [PATCH 1/6] OMAP2: hwmod: Fix MMC hwmod structs for 2430

[Kevin Hilman]

Rajendra Nayak <rnayak@ti.com> writes:

> The existing MMC hwmod structs for 2430 are fixed based
> on the changes in hwmod framework structurs.
>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>

Thanks, I'll fold this into the MMC hwmods in the pm-wip/hwmods branch.

Kevin

> ---
>  arch/arm/mach-omap2/omap_hwmod_2430.h |   26 +++++++++++++++-----------
>  1 files changed, 15 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_2430.h b/arch/arm/mach-omap2/omap_hwmod_2430.h
> index 0b6ca6f..2898749 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_2430.h
> +++ b/arch/arm/mach-omap2/omap_hwmod_2430.h
> @@ -21,7 +21,7 @@
>  #include <plat/cpu.h>
>  #include <plat/dma.h>
>  
> -#include <mach/mmc.h>
> +#include <plat/mmc.h>
>  
>  #include "cm-regbits-24xx.h"
>  #include "prm-regbits-24xx.h"
> @@ -87,7 +87,8 @@ static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
>  static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
>  	.master		= &omap2430_l4_core_hwmod,
>  	.slave		= &omap2430_mmc1_hwmod,
> -	.interface_clk	= { .name = "mmchs1_ick" },
> +	.clkdev_dev_id	= "mmci-omap-hs.0",
> +	.clkdev_con_id	= "ick",
>  	.addr		= omap2430_mmc1_addr_space,
>  	.addr_cnt	= ARRAY_SIZE(omap2430_mmc1_addr_space),
>  	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> @@ -105,7 +106,8 @@ static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
>  static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {
>  	.master		= &omap2430_l4_core_hwmod,
>  	.slave		= &omap2430_mmc2_hwmod,
> -	.interface_clk	= { .name = "mmchs2_ick" },
> +	.clkdev_dev_id	= "mmci-omap-hs.1",
> +	.clkdev_con_id	= "ick",
>  	.addr		= omap2430_mmc2_addr_space,
>  	.addr_cnt	= ARRAY_SIZE(omap2430_mmc2_addr_space),
>  	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> @@ -185,8 +187,8 @@ static struct mmc_dev_attr mmc1_dev_attr = {
>  	.flags = MMC_INTERNAL_XCVR,
>  };
>  
> -static u8 mmc1_mpu_irqs[] = {
> -	INT_24XX_MMC_IRQ,
> +static struct omap_hwmod_irq_info mmc1_mpu_irqs[] = {
> +	{ .irq = INT_24XX_MMC_IRQ, },
>  };
>  
>  static struct omap_hwmod_dma_info mmc1_sdma_chs[] = {
> @@ -195,7 +197,7 @@ static struct omap_hwmod_dma_info mmc1_sdma_chs[] = {
>  };
>  
>  static struct omap_hwmod_opt_clk mmc1_opt_clks[] = {
> -	{ .role = "dbck", .clk = { .name = "mmchsdb1_fck" } },
> +	{ .clkdev_dev_id = "mmci-omap-hs.0", .clkdev_con_id = "mmchsdb_fck" },
>  };
>  
>  static struct omap_hwmod_ocp_if *omap2430_mmc1_slaves[] = {
> @@ -210,7 +212,8 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
>  	.sdma_chs_cnt	= ARRAY_SIZE(mmc1_sdma_chs),
>  	.opt_clks	= mmc1_opt_clks,
>  	.opt_clks_cnt	= ARRAY_SIZE(mmc1_opt_clks),
> -	.main_clk	= { .name = "mmchs1_fck" },
> +	.clkdev_dev_id	= "mmci-omap-hs.0",
> +	.clkdev_con_id	= "fck",
>  	.prcm		= {
>  		.omap2 = {
>  			.prcm_reg_id = 2,
> @@ -230,8 +233,8 @@ static struct mmc_dev_attr mmc2_dev_attr = {
>  	.flags = MMC_SUPPORTS_EXTERNAL_XCVR,
>  };
>  
> -static u8 mmc2_mpu_irqs[] = {
> -	INT_24XX_MMC2_IRQ,
> +static struct omap_hwmod_irq_info mmc2_mpu_irqs[] = {
> +	{ .irq = INT_24XX_MMC2_IRQ, },
>  };
>  
>  static struct omap_hwmod_dma_info mmc2_sdma_chs[] = {
> @@ -240,7 +243,7 @@ static struct omap_hwmod_dma_info mmc2_sdma_chs[] = {
>  };
>  
>  static struct omap_hwmod_opt_clk mmc2_opt_clks[] = {
> -	{ .role = "dbck", .clk = { .name = "mmchsdb2_fck" } },
> +	{ .clkdev_dev_id = "mmci-omap-hs.1", .clkdev_con_id = "mmchsdb_fck" },
>  };
>  
>  static struct omap_hwmod_ocp_if *omap2430_mmc2_slaves[] = {
> @@ -255,7 +258,8 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
>  	.sdma_chs_cnt	= ARRAY_SIZE(mmc2_sdma_chs),
>  	.opt_clks	= mmc2_opt_clks,
>  	.opt_clks_cnt	= ARRAY_SIZE(mmc2_opt_clks),
> -	.main_clk	= { .name = "mmchs2_fck" },
> +	.clkdev_dev_id	= "mmci-omap-hs.1",
> +	.clkdev_con_id	= "fck",
>  	.prcm		= {
>  		.omap2 = {
>  			.prcm_reg_id = 2,
> -- 
> 1.5.4.7
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html