[PATCH] OMAP2/3/4: DMA: reset controller during init

[PATCH] OMAP2/3/4: DMA: reset controller during init

[Mika Westerberg]

If we are softbooting another kernel using kexec, DMA controller state is not
known when we are performing omap_init_dma(). It is possible that some DMA
channels are already active. For example after kexec we get:

<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5

To prevent any weird things happening, we perform soft reset for the controller
and disable all per channel interrupts.

Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
---
 arch/arm/plat-omap/dma.c              |   32 ++++++++++++++++++++++++++++++++
 arch/arm/plat-omap/include/plat/dma.h |    4 ++++
 2 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 1d95996..24cbb97 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2024,6 +2024,31 @@ void omap_dma_global_context_restore(void)
 
 /*----------------------------------------------------------------------------*/
 
+/**
+ * omap_dma_reset() - perform software reset for the DMA controller
+ */
+static void omap_dma_reset(void)
+{
+	u32 v;
+
+	if (cpu_class_is_omap1())
+		return;
+
+	v = dma_read(OCP_SYSCONFIG);
+	v |= 0x2; /* software reset */
+	dma_write(v, OCP_SYSCONFIG);
+
+	/* wait until reset is complete */
+	while ((dma_read(SYSSTATUS) & 0x1) == 0)
+		cpu_relax();
+
+	/* disable per channel interrupts */
+	dma_write(0, IRQENABLE_L0);
+	dma_write(0, IRQENABLE_L1);
+	dma_write(0, IRQENABLE_L2);
+	dma_write(0, IRQENABLE_L3);
+}
+
 static int __init omap_init_dma(void)
 {
 	unsigned long base;
@@ -2069,6 +2094,13 @@ static int __init omap_init_dma(void)
 		}
 	}
 
+	/*
+	 * Make sure that DMA is in reset state before doing anything else. If
+	 * we are coming from softboot (e.g kexec) DMA is probably configured so
+	 * we explicitly reset it here to get into known state.
+	 */
+	omap_dma_reset();
+
 	if (cpu_is_omap15xx()) {
 		printk(KERN_INFO "DMA support for OMAP15xx initialized\n");
 		dma_chan_count = 9;
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
index 02232ca..9a55504 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -134,6 +134,10 @@
 #define OMAP1_DMA_REVISION		0
 #define OMAP1_DMA_IRQSTATUS_L0		0
 #define OMAP1_DMA_IRQENABLE_L0		0
+#define OMAP1_DMA_IRQENABLE_L1		0
+#define OMAP1_DMA_IRQENABLE_L2		0
+#define OMAP1_DMA_IRQENABLE_L3		0
+#define OMAP1_DMA_SYSSTATUS		0
 #define OMAP1_DMA_OCP_SYSCONFIG		0
 #define OMAP_DMA4_HW_ID			0
 #define OMAP_DMA4_CAPS_0_L		0
-- 
1.5.6.5

Re: [PATCH] OMAP2/3/4: DMA: reset controller during init

[Kevin Hilman]

Mika Westerberg <ext-mika.1.westerberg@nokia.com> writes:

> If we are softbooting another kernel using kexec, DMA controller state is not
> known when we are performing omap_init_dma(). It is possible that some DMA
> channels are already active. For example after kexec we get:
>
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
>
> To prevent any weird things happening, we perform soft reset for the controller
> and disable all per channel interrupts.
>
> Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>

This is a good fix, but we get reset of DMA (and all other blocks) for
free when switching to hwmod.  Here's a good reason to convert DMA
to hwmod.

Kevin

Re: [PATCH] OMAP2/3/4: DMA: reset controller during init

[Tony Lindgren]

* Kevin Hilman <khilman@deeprootsystems.com> [100503 08:58]:
> Mika Westerberg <ext-mika.1.westerberg@nokia.com> writes:
> 
> > If we are softbooting another kernel using kexec, DMA controller state is not
> > known when we are performing omap_init_dma(). It is possible that some DMA
> > channels are already active. For example after kexec we get:
> >
> > <4>IRQ 0020 for non-allocated DMAchannel 5
> > <4>IRQ 0020 for non-allocated DMAchannel 5
> > <4>IRQ 0020 for non-allocated DMAchannel 5
> > <4>IRQ 0020 for non-allocated DMAchannel 5
> > <4>IRQ 0020 for non-allocated DMAchannel 5
> >
> > To prevent any weird things happening, we perform soft reset for the controller
> > and disable all per channel interrupts.
> >
> > Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
> 
> This is a good fix, but we get reset of DMA (and all other blocks) for
> free when switching to hwmod.  Here's a good reason to convert DMA
> to hwmod.

Hmm, do we have existing DMA hwmod patches somewhere that work on all omaps?

Tony

Re: [PATCH] OMAP2/3/4: DMA: reset controller during init

[Kevin Hilman]

Tony Lindgren <tony@atomide.com> writes:

> * Kevin Hilman <khilman@deeprootsystems.com> [100503 08:58]:
>> Mika Westerberg <ext-mika.1.westerberg@nokia.com> writes:
>> 
>> > If we are softbooting another kernel using kexec, DMA controller state is not
>> > known when we are performing omap_init_dma(). It is possible that some DMA
>> > channels are already active. For example after kexec we get:
>> >
>> > <4>IRQ 0020 for non-allocated DMAchannel 5
>> > <4>IRQ 0020 for non-allocated DMAchannel 5
>> > <4>IRQ 0020 for non-allocated DMAchannel 5
>> > <4>IRQ 0020 for non-allocated DMAchannel 5
>> > <4>IRQ 0020 for non-allocated DMAchannel 5
>> >
>> > To prevent any weird things happening, we perform soft reset for the controller
>> > and disable all per channel interrupts.
>> >
>> > Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
>> 
>> This is a good fix, but we get reset of DMA (and all other blocks) for
>> free when switching to hwmod.  Here's a good reason to convert DMA
>> to hwmod.
>
> Hmm, do we have existing DMA hwmod patches somewhere that work on all omaps?

No, that's my point. 

Rather than implement reset here (then remove it with DMA hwmods) I'd
rather just see a DMA hwmods added, and then we get reset for free.

Kevin

Re: [PATCH] OMAP2/3/4: DMA: reset controller during init

[Tony Lindgren]

* Kevin Hilman <khilman@deeprootsystems.com> [100503 10:00]:
> Tony Lindgren <tony@atomide.com> writes:
> 
> > * Kevin Hilman <khilman@deeprootsystems.com> [100503 08:58]:
> >> Mika Westerberg <ext-mika.1.westerberg@nokia.com> writes:
> >> 
> >> > If we are softbooting another kernel using kexec, DMA controller state is not
> >> > known when we are performing omap_init_dma(). It is possible that some DMA
> >> > channels are already active. For example after kexec we get:
> >> >
> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
> >> >
> >> > To prevent any weird things happening, we perform soft reset for the controller
> >> > and disable all per channel interrupts.
> >> >
> >> > Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
> >> 
> >> This is a good fix, but we get reset of DMA (and all other blocks) for
> >> free when switching to hwmod.  Here's a good reason to convert DMA
> >> to hwmod.
> >
> > Hmm, do we have existing DMA hwmod patches somewhere that work on all omaps?
> 
> No, that's my point. 
> 
> Rather than implement reset here (then remove it with DMA hwmods) I'd
> rather just see a DMA hwmods added, and then we get reset for free.

Sure. But until we have something available we should get the fix part in.

AFAIK just disabling the channel interrupt in omap_clear_dma() should
do the trick, see my other reply.

Regards,

Tony

Re: [PATCH] OMAP2/3/4: DMA: reset controller during init

[Kevin Hilman]

Tony Lindgren <tony@atomide.com> writes:

> * Kevin Hilman <khilman@deeprootsystems.com> [100503 10:00]:
>> Tony Lindgren <tony@atomide.com> writes:
>> 
>> > * Kevin Hilman <khilman@deeprootsystems.com> [100503 08:58]:
>> >> Mika Westerberg <ext-mika.1.westerberg@nokia.com> writes:
>> >> 
>> >> > If we are softbooting another kernel using kexec, DMA controller state is not
>> >> > known when we are performing omap_init_dma(). It is possible that some DMA
>> >> > channels are already active. For example after kexec we get:
>> >> >
>> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
>> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
>> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
>> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
>> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
>> >> >
>> >> > To prevent any weird things happening, we perform soft reset for the controller
>> >> > and disable all per channel interrupts.
>> >> >
>> >> > Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
>> >> 
>> >> This is a good fix, but we get reset of DMA (and all other blocks) for
>> >> free when switching to hwmod.  Here's a good reason to convert DMA
>> >> to hwmod.
>> >
>> > Hmm, do we have existing DMA hwmod patches somewhere that work on all omaps?
>> 
>> No, that's my point. 
>> 
>> Rather than implement reset here (then remove it with DMA hwmods) I'd
>> rather just see a DMA hwmods added, and then we get reset for free.
>
> Sure. But until we have something available we should get the fix part in.

which will reduce the likelyhood of anyone doing the DMA hwmods until
some sucker like me does it since nobody else will. :(

I'm just looking for more ways to motivate others to help in hwmod
conversion.

Kevin

Re: [PATCH] OMAP2/3/4: DMA: reset controller during init

[Tony Lindgren]

* Kevin Hilman <khilman@deeprootsystems.com> [100503 11:19]:
> Tony Lindgren <tony@atomide.com> writes:
> 
> > * Kevin Hilman <khilman@deeprootsystems.com> [100503 10:00]:
> >> Tony Lindgren <tony@atomide.com> writes:
> >> 
> >> > * Kevin Hilman <khilman@deeprootsystems.com> [100503 08:58]:
> >> >> Mika Westerberg <ext-mika.1.westerberg@nokia.com> writes:
> >> >> 
> >> >> > If we are softbooting another kernel using kexec, DMA controller state is not
> >> >> > known when we are performing omap_init_dma(). It is possible that some DMA
> >> >> > channels are already active. For example after kexec we get:
> >> >> >
> >> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
> >> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
> >> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
> >> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
> >> >> > <4>IRQ 0020 for non-allocated DMAchannel 5
> >> >> >
> >> >> > To prevent any weird things happening, we perform soft reset for the controller
> >> >> > and disable all per channel interrupts.
> >> >> >
> >> >> > Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
> >> >> 
> >> >> This is a good fix, but we get reset of DMA (and all other blocks) for
> >> >> free when switching to hwmod.  Here's a good reason to convert DMA
> >> >> to hwmod.
> >> >
> >> > Hmm, do we have existing DMA hwmod patches somewhere that work on all omaps?
> >> 
> >> No, that's my point. 
> >> 
> >> Rather than implement reset here (then remove it with DMA hwmods) I'd
> >> rather just see a DMA hwmods added, and then we get reset for free.
> >
> > Sure. But until we have something available we should get the fix part in.
> 
> which will reduce the likelyhood of anyone doing the DMA hwmods until
> some sucker like me does it since nobody else will. :(

Yeah I feel your pain.

Anyways, doing that hwmod change is too late for this coming merge
window if we don't have the patches ready. So we still need to fix
the problem.
 
> I'm just looking for more ways to motivate others to help in hwmod
> conversion.

Yes, and in addition to that at least plat-omap/dma.c, plat-omap/gpio.c
could use some serious clean-up.. And i2c-omap.c too.

Tony

Re: [PATCH] OMAP2/3/4: DMA: reset controller during init

[Tony Lindgren]

* Mika Westerberg <ext-mika.1.westerberg@nokia.com> [100503 05:52]:
> If we are softbooting another kernel using kexec, DMA controller state is not
> known when we are performing omap_init_dma(). It is possible that some DMA
> channels are already active. For example after kexec we get:
> 
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
> 
> To prevent any weird things happening, we perform soft reset for the controller
> and disable all per channel interrupts.
> 
> Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
> ---
>  arch/arm/plat-omap/dma.c              |   32 ++++++++++++++++++++++++++++++++
>  arch/arm/plat-omap/include/plat/dma.h |    4 ++++
>  2 files changed, 36 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
> index 1d95996..24cbb97 100644
> --- a/arch/arm/plat-omap/dma.c
> +++ b/arch/arm/plat-omap/dma.c
> @@ -2024,6 +2024,31 @@ void omap_dma_global_context_restore(void)
>  
>  /*----------------------------------------------------------------------------*/
>  
> +/**
> + * omap_dma_reset() - perform software reset for the DMA controller
> + */
> +static void omap_dma_reset(void)
> +{
> +	u32 v;
> +
> +	if (cpu_class_is_omap1())
> +		return;
> +
> +	v = dma_read(OCP_SYSCONFIG);
> +	v |= 0x2; /* software reset */
> +	dma_write(v, OCP_SYSCONFIG);
> +
> +	/* wait until reset is complete */
> +	while ((dma_read(SYSSTATUS) & 0x1) == 0)
> +		cpu_relax();

This reset part seems to be mach-omap2 specific.

> +	/* disable per channel interrupts */
> +	dma_write(0, IRQENABLE_L0);
> +	dma_write(0, IRQENABLE_L1);
> +	dma_write(0, IRQENABLE_L2);
> +	dma_write(0, IRQENABLE_L3);
> +}

For a minimal fix, how about just disable the interrupt in omap_clear_dma()?
We are already calling that from omap_init_dma().

Regards,

Tony

Re: [PATCH] OMAP2/3/4: DMA: reset controller during init

[Mika Westerberg]

On Mon, May 03, 2010 at 06:58:18PM +0200, ext Tony Lindgren wrote:
> * Mika Westerberg <ext-mika.1.westerberg@nokia.com> [100503 05:52]:
(...)
> > +/**
> > + * omap_dma_reset() - perform software reset for the DMA controller
> > + */
> > +static void omap_dma_reset(void)
> > +{
> > +	u32 v;
> > +
> > +	if (cpu_class_is_omap1())
> > +		return;
> > +
> > +	v = dma_read(OCP_SYSCONFIG);
> > +	v |= 0x2; /* software reset */
> > +	dma_write(v, OCP_SYSCONFIG);
> > +
> > +	/* wait until reset is complete */
> > +	while ((dma_read(SYSSTATUS) & 0x1) == 0)
> > +		cpu_relax();
> 
> This reset part seems to be mach-omap2 specific.
> 
> > +	/* disable per channel interrupts */
> > +	dma_write(0, IRQENABLE_L0);
> > +	dma_write(0, IRQENABLE_L1);
> > +	dma_write(0, IRQENABLE_L2);
> > +	dma_write(0, IRQENABLE_L3);
> > +}
> 
> For a minimal fix, how about just disable the interrupt in omap_clear_dma()?
> We are already calling that from omap_init_dma().

If we do it in omap_clear_dma() then omap_dma_global_context_restore() will
return with interrupts masked which probably breaks things.

How about something like following patch?

(checking cpu_class_is_omap2() below in omap_init_dma() is probably redundant
 but seems to be consitent with other code).

Thanks,
MW

>From 74389ff1de06e5adb84b978bf1d169c6d802db1b Mon Sep 17 00:00:00 2001
From: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
Date: Tue, 4 May 2010 09:32:29 +0300
Subject: [PATCH] OMAP2/3/4: DMA: disable channel interrupts in omap_init_dma()

If we are softbooting another kernel using kexec, DMA controller state is not
known when we are performing omap_init_dma(). It is possible that some DMA
channels are already active. For example after kexec we get:

<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5

To prevent any weird things happening, we disable all channel interrupts during
init.

Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
---
 arch/arm/plat-omap/dma.c |   27 +++++++++++++++++++--------
 1 files changed, 19 insertions(+), 8 deletions(-)

diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 1d95996..ad42ec3 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -709,6 +709,21 @@ static inline void omap2_enable_irq_lch(int lch)
 	spin_unlock_irqrestore(&dma_chan_lock, flags);
 }
 
+static inline void omap2_disable_irq_lch(int lch)
+{
+	u32 val;
+	unsigned long flags;
+
+	if (!cpu_class_is_omap2())
+		return;
+
+	spin_lock_irqsave(&dma_chan_lock, flags);
+	val = dma_read(IRQENABLE_L0);
+	val &= ~(1 << lch);
+	dma_write(val, IRQENABLE_L0);
+	spin_unlock_irqrestore(&dma_chan_lock, flags);
+}
+
 int omap_request_dma(int dev_id, const char *dev_name,
 		     void (*callback)(int lch, u16 ch_status, void *data),
 		     void *data, int *dma_ch_out)
@@ -807,14 +822,7 @@ void omap_free_dma(int lch)
 	}
 
 	if (cpu_class_is_omap2()) {
-		u32 val;
-
-		spin_lock_irqsave(&dma_chan_lock, flags);
-		/* Disable interrupts */
-		val = dma_read(IRQENABLE_L0);
-		val &= ~(1 << lch);
-		dma_write(val, IRQENABLE_L0);
-		spin_unlock_irqrestore(&dma_chan_lock, flags);
+		omap2_disable_irq_lch(lch);
 
 		/* Clear the CSR register and IRQ status register */
 		dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch));
@@ -2107,6 +2115,9 @@ static int __init omap_init_dma(void)
 
 	for (ch = 0; ch < dma_chan_count; ch++) {
 		omap_clear_dma(ch);
+		if (cpu_class_is_omap2())
+			omap2_disable_irq_lch(ch);
+
 		dma_chan[ch].dev_id = -1;
 		dma_chan[ch].next_lch = -1;
 
-- 
1.5.6.5

Re: [PATCH] OMAP2/3/4: DMA: reset controller during init

[Mika Westerberg]

On Tue, May 04, 2010 at 10:40:06AM +0300, Mika Westerberg wrote:
> On Mon, May 03, 2010 at 06:58:18PM +0200, ext Tony Lindgren wrote:
> > * Mika Westerberg <ext-mika.1.westerberg@nokia.com> [100503 05:52]:
> (...)
> > > +/**
> > > + * omap_dma_reset() - perform software reset for the DMA controller
> > > + */
> > > +static void omap_dma_reset(void)
> > > +{
> > > +	u32 v;
> > > +
> > > +	if (cpu_class_is_omap1())
> > > +		return;
> > > +
> > > +	v = dma_read(OCP_SYSCONFIG);
> > > +	v |= 0x2; /* software reset */
> > > +	dma_write(v, OCP_SYSCONFIG);
> > > +
> > > +	/* wait until reset is complete */
> > > +	while ((dma_read(SYSSTATUS) & 0x1) == 0)
> > > +		cpu_relax();
> > 
> > This reset part seems to be mach-omap2 specific.
> > 
> > > +	/* disable per channel interrupts */
> > > +	dma_write(0, IRQENABLE_L0);
> > > +	dma_write(0, IRQENABLE_L1);
> > > +	dma_write(0, IRQENABLE_L2);
> > > +	dma_write(0, IRQENABLE_L3);
> > > +}
> > 
> > For a minimal fix, how about just disable the interrupt in omap_clear_dma()?
> > We are already calling that from omap_init_dma().
> 
> If we do it in omap_clear_dma() then omap_dma_global_context_restore() will
> return with interrupts masked which probably breaks things.
> 
> How about something like following patch?

Tony, Kevin

Any comments on this patch?

Thanks,
MW

> 
> (checking cpu_class_is_omap2() below in omap_init_dma() is probably redundant
>  but seems to be consitent with other code).
> 
> Thanks,
> MW
> 
> >From 74389ff1de06e5adb84b978bf1d169c6d802db1b Mon Sep 17 00:00:00 2001
> From: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
> Date: Tue, 4 May 2010 09:32:29 +0300
> Subject: [PATCH] OMAP2/3/4: DMA: disable channel interrupts in omap_init_dma()
> 
> If we are softbooting another kernel using kexec, DMA controller state is not
> known when we are performing omap_init_dma(). It is possible that some DMA
> channels are already active. For example after kexec we get:
> 
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
> <4>IRQ 0020 for non-allocated DMAchannel 5
> 
> To prevent any weird things happening, we disable all channel interrupts during
> init.
> 
> Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
> ---
>  arch/arm/plat-omap/dma.c |   27 +++++++++++++++++++--------
>  1 files changed, 19 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
> index 1d95996..ad42ec3 100644
> --- a/arch/arm/plat-omap/dma.c
> +++ b/arch/arm/plat-omap/dma.c
> @@ -709,6 +709,21 @@ static inline void omap2_enable_irq_lch(int lch)
>  	spin_unlock_irqrestore(&dma_chan_lock, flags);
>  }
>  
> +static inline void omap2_disable_irq_lch(int lch)
> +{
> +	u32 val;
> +	unsigned long flags;
> +
> +	if (!cpu_class_is_omap2())
> +		return;
> +
> +	spin_lock_irqsave(&dma_chan_lock, flags);
> +	val = dma_read(IRQENABLE_L0);
> +	val &= ~(1 << lch);
> +	dma_write(val, IRQENABLE_L0);
> +	spin_unlock_irqrestore(&dma_chan_lock, flags);
> +}
> +
>  int omap_request_dma(int dev_id, const char *dev_name,
>  		     void (*callback)(int lch, u16 ch_status, void *data),
>  		     void *data, int *dma_ch_out)
> @@ -807,14 +822,7 @@ void omap_free_dma(int lch)
>  	}
>  
>  	if (cpu_class_is_omap2()) {
> -		u32 val;
> -
> -		spin_lock_irqsave(&dma_chan_lock, flags);
> -		/* Disable interrupts */
> -		val = dma_read(IRQENABLE_L0);
> -		val &= ~(1 << lch);
> -		dma_write(val, IRQENABLE_L0);
> -		spin_unlock_irqrestore(&dma_chan_lock, flags);
> +		omap2_disable_irq_lch(lch);
>  
>  		/* Clear the CSR register and IRQ status register */
>  		dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch));
> @@ -2107,6 +2115,9 @@ static int __init omap_init_dma(void)
>  
>  	for (ch = 0; ch < dma_chan_count; ch++) {
>  		omap_clear_dma(ch);
> +		if (cpu_class_is_omap2())
> +			omap2_disable_irq_lch(ch);
> +
>  		dma_chan[ch].dev_id = -1;
>  		dma_chan[ch].next_lch = -1;
>  
> -- 
> 1.5.6.5

Re: [PATCH] OMAP2/3/4: DMA: reset controller during init

[Kevin Hilman]

Mika Westerberg <ext-mika.1.westerberg@nokia.com> writes:

> On Tue, May 04, 2010 at 10:40:06AM +0300, Mika Westerberg wrote:
>> On Mon, May 03, 2010 at 06:58:18PM +0200, ext Tony Lindgren wrote:
>> > * Mika Westerberg <ext-mika.1.westerberg@nokia.com> [100503 05:52]:
>> (...)
>> > > +/**
>> > > + * omap_dma_reset() - perform software reset for the DMA controller
>> > > + */
>> > > +static void omap_dma_reset(void)
>> > > +{
>> > > +	u32 v;
>> > > +
>> > > +	if (cpu_class_is_omap1())
>> > > +		return;
>> > > +
>> > > +	v = dma_read(OCP_SYSCONFIG);
>> > > +	v |= 0x2; /* software reset */
>> > > +	dma_write(v, OCP_SYSCONFIG);
>> > > +
>> > > +	/* wait until reset is complete */
>> > > +	while ((dma_read(SYSSTATUS) & 0x1) == 0)
>> > > +		cpu_relax();
>> > 
>> > This reset part seems to be mach-omap2 specific.
>> > 
>> > > +	/* disable per channel interrupts */
>> > > +	dma_write(0, IRQENABLE_L0);
>> > > +	dma_write(0, IRQENABLE_L1);
>> > > +	dma_write(0, IRQENABLE_L2);
>> > > +	dma_write(0, IRQENABLE_L3);
>> > > +}
>> > 
>> > For a minimal fix, how about just disable the interrupt in omap_clear_dma()?
>> > We are already calling that from omap_init_dma().
>> 
>> If we do it in omap_clear_dma() then omap_dma_global_context_restore() will
>> return with interrupts masked which probably breaks things.
>> 
>> How about something like following patch?
>
> Tony, Kevin
>
> Any comments on this patch?

Looks good to me.

Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

[APPLIED] [PATCH] OMAP2/3/4: DMA: reset controller during init

[Tony Lindgren]

This patch has been applied to the linux-omap
by youw fwiendly patch wobot.

Branch in linux-omap: for-next

Initial commit ID (Likely to change): 738e377ff6c45d27695b39a67e3be876d4b5dae5

PatchWorks
http://patchwork.kernel.org/patch/96684/

Git (Likely to change, and takes a while to get mirrored)
http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=738e377ff6c45d27695b39a67e3be876d4b5dae5