* [PATCH 3/6] OMAP3: Add runtime check for OMAP35x @ 2009-08-06 10:36 Sanjeev Premi 2009-08-06 11:04 ` Tony Lindgren 0 siblings, 1 reply; 12+ messages in thread From: Sanjeev Premi @ 2009-08-06 10:36 UTC (permalink / raw) To: linux-omap; +Cc: Sanjeev Premi Added runtime check via omap2_set_globals_35xx(). Parts of this patch have been derived from an earlier earlier patch submitted by Tony Lindgren <tony@atomide.com> [1] http://marc.info/?l=linux-omap&m=123301852702797&w=2 [2] http://marc.info/?l=linux-omap&m=123334055822212&w=2 Signed-off-by: Sanjeev Premi <premi@ti.com> --- arch/arm/mach-omap2/id.c | 115 ++++++++++++++++++++++++------ arch/arm/plat-omap/common.c | 18 +++++- arch/arm/plat-omap/include/mach/common.h | 1 + arch/arm/plat-omap/include/mach/cpu.h | 64 ++++++++++++++++- 4 files changed, 173 insertions(+), 25 deletions(-) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index a98201c..06770aa 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -28,6 +28,14 @@ static struct omap_chip_id omap_chip; static unsigned int omap_revision; +/* The new OMAP35x devices have assymetric names - OMAP3505 and OMAP3517. + * It is not possible to define a common macro to identify them. + * + * A quick way is to separate them across 'generations' as below. + */ +#define OMAP35XX_G1 0x1 /* Applies to 3503, 3515, 3525 and 3530 */ +#define OMAP35XX_G2 0x2 /* Applies to 3505 and 3517 */ + unsigned int omap_rev(void) { @@ -155,12 +163,71 @@ void __init omap24xx_check_revision(void) pr_info("\n"); } +static void __init omap34xx_set_revision(u8 rev, char *rev_name) +{ + switch (rev) { + case 0: + omap_revision = OMAP3430_REV_ES2_0; + strcat(rev_name, "ES2.0"); + break; + case 2: + omap_revision = OMAP3430_REV_ES2_1; + strcat(rev_name, "ES2.1"); + break; + case 3: + omap_revision = OMAP3430_REV_ES3_0; + strcat(rev_name, "ES3.0"); + break; + case 4: + omap_revision = OMAP3430_REV_ES3_1; + strcat(rev_name, "ES3.1"); + break; + default: + /* Use the latest known revision as default */ + omap_revision = OMAP3430_REV_ES3_1; + strcat(rev_name, "Unknown revision"); + } +} + +static void __init omap35xx_set_revision(u8 rev, u8 gen, char *rev_name) +{ + omap_revision = OMAP35XX_CLASS ; + + if (gen == OMAP35XX_G1) { + switch (rev) { + case 0: /* Take care of some older boards */ + case 1: + omap_revision |= OMAP35XX_MASK_ES2_0; + strcat(rev_name, "ES2.0"); + break; + case 2: + omap_revision |= OMAP35XX_MASK_ES2_1; + strcat(rev_name, "ES2.1"); + break; + case 3: + omap_revision |= OMAP35XX_MASK_ES3_0; + strcat(rev_name, "ES3.0"); + break; + case 4: + omap_revision |= OMAP35XX_MASK_ES3_1; + strcat(rev_name, "ES3.1"); + break; + default: + /* Use the latest known revision as default */ + omap_revision |= OMAP35XX_MASK_ES3_0; + strcat(rev_name, "Unknown revision"); + } + } else { + strcat(rev_name, "ES1.0"); + } +} + void __init omap34xx_check_revision(void) { u32 cpuid, idcode; u16 hawkeye; u8 rev; - char *rev_name = "ES1.0"; + char rev_name[16] = ""; /* * We cannot access revision registers on ES1.0. @@ -184,28 +251,12 @@ void __init omap34xx_check_revision(void) rev = (idcode >> 28) & 0xff; if (hawkeye == 0xb7ae) { - switch (rev) { - case 0: - omap_revision = OMAP3430_REV_ES2_0; - rev_name = "ES2.0"; - break; - case 2: - omap_revision = OMAP3430_REV_ES2_1; - rev_name = "ES2.1"; - break; - case 3: - omap_revision = OMAP3430_REV_ES3_0; - rev_name = "ES3.0"; - break; - case 4: - omap_revision = OMAP3430_REV_ES3_1; - rev_name = "ES3.1"; - break; - default: - /* Use the latest known revision as default */ - omap_revision = OMAP3430_REV_ES3_1; - rev_name = "Unknown revision\n"; - } + if (cpu_is_omap35xx()) + omap35xx_set_revision(rev, OMAP35XX_G1, rev_name); + else + omap34xx_set_revision(rev, rev_name); + } else if (hawkeye == 0xb868) { + omap35xx_set_revision(rev, OMAP35XX_G2, rev_name); } out: @@ -241,6 +292,24 @@ void __init omap2_check_revision(void) } else if (cpu_is_omap242x()) { /* Currently only supports 2420ES2.1.1 and 2420-all */ omap_chip.oc |= CHIP_IS_OMAP2420; + } else if (cpu_is_omap35xx()) { + /* + * FIXME : Update for OMAP35XX_G2 + */ + omap_chip.oc = CHIP_IS_OMAP3430; + + switch (omap35xx_rev_mask()) + { + case OMAP35XX_MASK_ES3_0: + omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; + break; + case OMAP35XX_MASK_ES3_1: + omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; + break; + default: + /* Use ES2 as default */ + omap_chip.oc |= CHIP_IS_OMAP3430ES2; + } } else if (cpu_is_omap343x()) { omap_chip.oc = CHIP_IS_OMAP3430; if (omap_rev() == OMAP3430_REV_ES1_0) diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index ebcf006..2e956cd 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c @@ -347,7 +347,7 @@ void __init omap2_set_globals_243x(void) } #endif -#if defined(CONFIG_ARCH_OMAP3430) +#if defined(CONFIG_ARCH_OMAP3430) && !defined(CONFIG_ARCH_OMAP35XX) static struct omap_globals omap343x_globals = { .class = OMAP343X_CLASS, @@ -381,3 +381,19 @@ void __init omap2_set_globals_443x(void) } #endif +#ifdef CONFIG_ARCH_OMAP35XX +static struct omap_globals omap35xx_globals = { + .class = OMAP35XX_CLASS, + .tap = OMAP2_IO_ADDRESS(0x4830A000), + .sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), + .sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), + .ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), + .prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), + .cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), +}; + +void __init omap2_set_globals_35xx(void) +{ + __omap2_set_globals(&omap35xx_globals); +} +#endif /* CONFIG_ARCH_OMAP35XX */ diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h index fdeab42..28830f2 100644 --- a/arch/arm/plat-omap/include/mach/common.h +++ b/arch/arm/plat-omap/include/mach/common.h @@ -60,6 +60,7 @@ struct omap_globals { void omap2_set_globals_242x(void); void omap2_set_globals_243x(void); void omap2_set_globals_343x(void); +void omap2_set_globals_35xx(void); void omap2_set_globals_443x(void); /* These get called from omap2_set_globals_xxxx(), do not call these */ diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h index 285eaa3..94a5cbb 100644 --- a/arch/arm/plat-omap/include/mach/cpu.h +++ b/arch/arm/plat-omap/include/mach/cpu.h @@ -116,7 +116,7 @@ unsigned int omap_rev(void); # define OMAP_NAME omap2430 # endif #endif -#ifdef CONFIG_ARCH_OMAP3430 +#if defined(CONFIG_ARCH_OMAP3430) && !defined(CONFIG_ARCH_OMAP35XX) # ifdef OMAP_NAME # undef MULTI_OMAP2 # define MULTI_OMAP2 @@ -124,6 +124,14 @@ unsigned int omap_rev(void); # define OMAP_NAME omap3430 # endif #endif +#ifdef CONFIG_ARCH_OMAP35XX +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME omap35xx +# endif +#endif /* ifdef CONFIG_ARCH_OMAP35XX */ /* * Macros to group OMAP into cpu classes. @@ -135,6 +143,8 @@ unsigned int omap_rev(void); * cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423 * cpu_is_omap243x(): True for OMAP2430 * cpu_is_omap343x(): True for OMAP3430 + * cpu_is_omap35xx(): True for OMAP3503, OMAP3515, OMAP3525, OMAP3530, + * OMAP355, OMAP3517 */ #define GET_OMAP_CLASS (omap_rev() & 0xff) @@ -170,6 +180,7 @@ IS_OMAP_SUBCLASS(343x, 0x343) #define cpu_is_omap243x() 0 #define cpu_is_omap34xx() 0 #define cpu_is_omap343x() 0 +#define cpu_is_omap35xx() 0 #define cpu_is_omap44xx() 0 #define cpu_is_omap443x() 0 @@ -224,6 +235,10 @@ IS_OMAP_SUBCLASS(343x, 0x343) # define cpu_is_omap34xx() is_omap34xx() # define cpu_is_omap343x() is_omap343x() # endif +# if defined(CONFIG_ARCH_OMAP35XX) +# undef cpu_is_omap35xx +# define cpu_is_omap35xx() is_omap35xx() +# endif #else # if defined(CONFIG_ARCH_OMAP24XX) # undef cpu_is_omap24xx @@ -245,6 +260,10 @@ IS_OMAP_SUBCLASS(343x, 0x343) # undef cpu_is_omap343x # define cpu_is_omap343x() 1 # endif +# if defined(CONFIG_ARCH_OMAP35XX) +# undef cpu_is_omap35xx +# define cpu_is_omap35xx() 1 +# endif #endif /* @@ -264,6 +283,12 @@ IS_OMAP_SUBCLASS(343x, 0x343) * cpu_is_omap2423(): True for OMAP2423 * cpu_is_omap2430(): True for OMAP2430 * cpu_is_omap3430(): True for OMAP3430 + * cpu_is_omap3503(): True for OMAP3503 + * cpu_is_omap3515(): True for OMAP3515 + * cpu_is_omap3525(): True for OMAP3525 + * cpu_is_omap3530(): True for OMAP3530 + * cpu_is_omap3505(): True for OMAP3505 + * cpu_is_omap3517(): True for OMAP3517 */ #define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff) @@ -287,6 +312,12 @@ IS_OMAP_TYPE(2422, 0x2422) IS_OMAP_TYPE(2423, 0x2423) IS_OMAP_TYPE(2430, 0x2430) IS_OMAP_TYPE(3430, 0x3430) +IS_OMAP_TYPE(3503, 0x3503) +IS_OMAP_TYPE(3515, 0x3515) +IS_OMAP_TYPE(3525, 0x3525) +IS_OMAP_TYPE(3530, 0x3530) +IS_OMAP_TYPE(3505, 0x3505) +IS_OMAP_TYPE(3517, 0x3517) #define cpu_is_omap310() 0 #define cpu_is_omap730() 0 @@ -372,6 +403,22 @@ IS_OMAP_TYPE(3430, 0x3430) # define cpu_is_omap443x() 1 # endif +#if defined(CONFIG_ARCH_OMAP35XX) +# undef cpu_is_omap3503 +# undef cpu_is_omap3515 +# undef cpu_is_omap3525 +# undef cpu_is_omap3530 +# undef cpu_is_omap3505 +# undef cpu_is_omap3517 + +# define cpu_is_omap3503() is_omap3503() +# define cpu_is_omap3515() is_omap3515() +# define cpu_is_omap3525() is_omap3525() +# define cpu_is_omap3530() is_omap3530() +# define cpu_is_omap3505() is_omap3505() +# define cpu_is_omap3517() is_omap3517() +#endif /* if defined(CONFIG_ARCH_OMAP35XX) */ + /* Macros to detect if we have OMAP1 or OMAP2 */ #define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \ cpu_is_omap16xx()) @@ -398,6 +445,21 @@ IS_OMAP_TYPE(3430, 0x3430) #define OMAP443X_CLASS 0x44300034 +#define OMAP35XX_CLASS 0x35000035 +#define OMAP3503_MASK 0x00030000 +#define OMAP3515_MASK 0x00150000 +#define OMAP3525_MASK 0x00250000 +#define OMAP3530_MASK 0x00300000 +#define OMAP3505_MASK 0x00050000 +#define OMAP3517_MASK 0x00170000 + +#define OMAP35XX_MASK_ES2_0 0x00001000 +#define OMAP35XX_MASK_ES2_1 0x00002000 +#define OMAP35XX_MASK_ES3_0 0x00003000 +#define OMAP35XX_MASK_ES3_1 0x00004000 + +#define omap35xx_rev_mask() (omap_rev() & 0x0000F000) + /* * omap_chip bits * -- 1.6.2.2 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x 2009-08-06 10:36 [PATCH 3/6] OMAP3: Add runtime check for OMAP35x Sanjeev Premi @ 2009-08-06 11:04 ` Tony Lindgren 2009-08-06 11:34 ` Premi, Sanjeev 0 siblings, 1 reply; 12+ messages in thread From: Tony Lindgren @ 2009-08-06 11:04 UTC (permalink / raw) To: Sanjeev Premi; +Cc: linux-omap Hi, * Sanjeev Premi <premi@ti.com> [090806 13:36]: > Added runtime check via omap2_set_globals_35xx(). > > Parts of this patch have been derived from an earlier > earlier patch submitted by Tony Lindgren <tony@atomide.com> > > [1] http://marc.info/?l=linux-omap&m=123301852702797&w=2 > [2] http://marc.info/?l=linux-omap&m=123334055822212&w=2 > > Signed-off-by: Sanjeev Premi <premi@ti.com> > --- > arch/arm/mach-omap2/id.c | 115 ++++++++++++++++++++++++------ > arch/arm/plat-omap/common.c | 18 +++++- > arch/arm/plat-omap/include/mach/common.h | 1 + > arch/arm/plat-omap/include/mach/cpu.h | 64 ++++++++++++++++- > 4 files changed, 173 insertions(+), 25 deletions(-) > > diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > index a98201c..06770aa 100644 > --- a/arch/arm/mach-omap2/id.c > +++ b/arch/arm/mach-omap2/id.c > @@ -28,6 +28,14 @@ > static struct omap_chip_id omap_chip; > static unsigned int omap_revision; > > +/* The new OMAP35x devices have assymetric names - OMAP3505 and OMAP3517. > + * It is not possible to define a common macro to identify them. > + * > + * A quick way is to separate them across 'generations' as below. > + */ > +#define OMAP35XX_G1 0x1 /* Applies to 3503, 3515, 3525 and 3530 */ > +#define OMAP35XX_G2 0x2 /* Applies to 3505 and 3517 */ > + > > unsigned int omap_rev(void) > { > @@ -155,12 +163,71 @@ void __init omap24xx_check_revision(void) > pr_info("\n"); > } > > +static void __init omap34xx_set_revision(u8 rev, char *rev_name) > +{ > + switch (rev) { > + case 0: > + omap_revision = OMAP3430_REV_ES2_0; > + strcat(rev_name, "ES2.0"); > + break; > + case 2: > + omap_revision = OMAP3430_REV_ES2_1; > + strcat(rev_name, "ES2.1"); > + break; > + case 3: > + omap_revision = OMAP3430_REV_ES3_0; > + strcat(rev_name, "ES3.0"); > + break; > + case 4: > + omap_revision = OMAP3430_REV_ES3_1; > + strcat(rev_name, "ES3.1"); > + break; > + default: > + /* Use the latest known revision as default */ > + omap_revision = OMAP3430_REV_ES3_1; > + strcat(rev_name, "Unknown revision"); > + } > +} > + > +static void __init omap35xx_set_revision(u8 rev, u8 gen, char *rev_name) > +{ > + omap_revision = OMAP35XX_CLASS ; > + > + if (gen == OMAP35XX_G1) { > + switch (rev) { > + case 0: /* Take care of some older boards */ > + case 1: > + omap_revision |= OMAP35XX_MASK_ES2_0; > + strcat(rev_name, "ES2.0"); > + break; > + case 2: > + omap_revision |= OMAP35XX_MASK_ES2_1; > + strcat(rev_name, "ES2.1"); > + break; > + case 3: > + omap_revision |= OMAP35XX_MASK_ES3_0; > + strcat(rev_name, "ES3.0"); > + break; > + case 4: > + omap_revision |= OMAP35XX_MASK_ES3_1; > + strcat(rev_name, "ES3.1"); > + break; > + default: > + /* Use the latest known revision as default */ > + omap_revision |= OMAP35XX_MASK_ES3_0; > + strcat(rev_name, "Unknown revision"); > + } > + } else { > + strcat(rev_name, "ES1.0"); > + } > +} > + To me it looks like you're checking the exact same cores as we already do for 34xx. That is, (idcode >> 28) & 0xff for both 34xx and 35xx. So basically they have the same omap cores. Considering this I don't see much sense adding cpu_is_35xx() category because cpu_is_34xx() already covers these processors. Just like cpu_is_16xx() covers both 1610 and 1710. Let's just rather add more feature tests for IVA2 etc as needed, then cpu_is_35something() becomse just cpu_is_34xx() && cpu_has_iva2() or similar. > void __init omap34xx_check_revision(void) > { > u32 cpuid, idcode; > u16 hawkeye; > u8 rev; > - char *rev_name = "ES1.0"; > + char rev_name[16] = ""; > > /* > * We cannot access revision registers on ES1.0. > @@ -184,28 +251,12 @@ void __init omap34xx_check_revision(void) > rev = (idcode >> 28) & 0xff; > > if (hawkeye == 0xb7ae) { > - switch (rev) { > - case 0: > - omap_revision = OMAP3430_REV_ES2_0; > - rev_name = "ES2.0"; > - break; > - case 2: > - omap_revision = OMAP3430_REV_ES2_1; > - rev_name = "ES2.1"; > - break; > - case 3: > - omap_revision = OMAP3430_REV_ES3_0; > - rev_name = "ES3.0"; > - break; > - case 4: > - omap_revision = OMAP3430_REV_ES3_1; > - rev_name = "ES3.1"; > - break; > - default: > - /* Use the latest known revision as default */ > - omap_revision = OMAP3430_REV_ES3_1; > - rev_name = "Unknown revision\n"; > - } > + if (cpu_is_omap35xx()) > + omap35xx_set_revision(rev, OMAP35XX_G1, rev_name); > + else > + omap34xx_set_revision(rev, rev_name); > + } else if (hawkeye == 0xb868) { > + omap35xx_set_revision(rev, OMAP35XX_G2, rev_name); > } Testing for hawkeye == 0xb868 test should just be added into the current omap34xx_check_revision(). Regards, Tony ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x 2009-08-06 11:04 ` Tony Lindgren @ 2009-08-06 11:34 ` Premi, Sanjeev 2009-08-06 11:50 ` Tony Lindgren 0 siblings, 1 reply; 12+ messages in thread From: Premi, Sanjeev @ 2009-08-06 11:34 UTC (permalink / raw) To: Tony Lindgren; +Cc: linux-omap@vger.kernel.org > -----Original Message----- > From: Tony Lindgren [mailto:tony@atomide.com] > Sent: Thursday, August 06, 2009 4:34 PM > To: Premi, Sanjeev > Cc: linux-omap@vger.kernel.org > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > Hi, > > * Sanjeev Premi <premi@ti.com> [090806 13:36]: > > Added runtime check via omap2_set_globals_35xx(). > > > > Parts of this patch have been derived from an earlier > > earlier patch submitted by Tony Lindgren <tony@atomide.com> > > > > [1] http://marc.info/?l=linux-omap&m=123301852702797&w=2 > > [2] http://marc.info/?l=linux-omap&m=123334055822212&w=2 > > > > Signed-off-by: Sanjeev Premi <premi@ti.com> > > --- > > arch/arm/mach-omap2/id.c | 115 > ++++++++++++++++++++++++------ > > arch/arm/plat-omap/common.c | 18 +++++- > > arch/arm/plat-omap/include/mach/common.h | 1 + > > arch/arm/plat-omap/include/mach/cpu.h | 64 ++++++++++++++++- > > 4 files changed, 173 insertions(+), 25 deletions(-) > > > > diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > > index a98201c..06770aa 100644 > > --- a/arch/arm/mach-omap2/id.c > > +++ b/arch/arm/mach-omap2/id.c > > @@ -28,6 +28,14 @@ > > static struct omap_chip_id omap_chip; > > static unsigned int omap_revision; > > > > +/* The new OMAP35x devices have assymetric names - > OMAP3505 and OMAP3517. > > + * It is not possible to define a common macro to identify them. > > + * > > + * A quick way is to separate them across 'generations' as below. > > + */ > > +#define OMAP35XX_G1 0x1 /* Applies to 3503, > 3515, 3525 and 3530 */ > > +#define OMAP35XX_G2 0x2 /* Applies to 3505 and 3517 */ > > + > > > > unsigned int omap_rev(void) > > { > > @@ -155,12 +163,71 @@ void __init omap24xx_check_revision(void) > > pr_info("\n"); > > } > > > > +static void __init omap34xx_set_revision(u8 rev, char *rev_name) > > +{ > > + switch (rev) { > > + case 0: > > + omap_revision = OMAP3430_REV_ES2_0; > > + strcat(rev_name, "ES2.0"); > > + break; > > + case 2: > > + omap_revision = OMAP3430_REV_ES2_1; > > + strcat(rev_name, "ES2.1"); > > + break; > > + case 3: > > + omap_revision = OMAP3430_REV_ES3_0; > > + strcat(rev_name, "ES3.0"); > > + break; > > + case 4: > > + omap_revision = OMAP3430_REV_ES3_1; > > + strcat(rev_name, "ES3.1"); > > + break; > > + default: > > + /* Use the latest known revision as default */ > > + omap_revision = OMAP3430_REV_ES3_1; > > + strcat(rev_name, "Unknown revision"); > > + } > > +} > > + > > +static void __init omap35xx_set_revision(u8 rev, u8 gen, > char *rev_name) > > +{ > > + omap_revision = OMAP35XX_CLASS ; > > + > > + if (gen == OMAP35XX_G1) { > > + switch (rev) { > > + case 0: /* Take care of some older boards */ > > + case 1: > > + omap_revision |= OMAP35XX_MASK_ES2_0; > > + strcat(rev_name, "ES2.0"); > > + break; > > + case 2: > > + omap_revision |= OMAP35XX_MASK_ES2_1; > > + strcat(rev_name, "ES2.1"); > > + break; > > + case 3: > > + omap_revision |= OMAP35XX_MASK_ES3_0; > > + strcat(rev_name, "ES3.0"); > > + break; > > + case 4: > > + omap_revision |= OMAP35XX_MASK_ES3_1; > > + strcat(rev_name, "ES3.1"); > > + break; > > + default: > > + /* Use the latest known revision as default */ > > + omap_revision |= OMAP35XX_MASK_ES3_0; > > + strcat(rev_name, "Unknown revision"); > > + } > > + } else { > > + strcat(rev_name, "ES1.0"); > > + } > > +} > > + > > To me it looks like you're checking the exact same cores as > we already do > for 34xx. That is, (idcode >> 28) & 0xff for both 34xx and > 35xx. So basically > they have the same omap cores. No, the cores in OMAP3505 and OMAP3517 are very different. I have listed major differences in PATCH 2/6. These devices differ in following areas: - Power management capabilities (Only 1 power domain, 1 OPP, etc.) - EMIF4 instead of SDRC - Support for DDR2 - EMAC - USB - HECC > > Considering this I don't see much sense adding cpu_is_35xx() category > because cpu_is_34xx() already covers these processors. Just > like cpu_is_16xx() > covers both 1610 and 1710. > > Let's just rather add more feature tests for IVA2 etc as needed, then > cpu_is_35something() becomse just cpu_is_34xx() && > cpu_has_iva2() or similar. I did feel the need for these tests as well, and have an internal patch. It was in my queue for submission next. > > > > void __init omap34xx_check_revision(void) > > { > > u32 cpuid, idcode; > > u16 hawkeye; > > u8 rev; > > - char *rev_name = "ES1.0"; > > + char rev_name[16] = ""; > > > > /* > > * We cannot access revision registers on ES1.0. > > @@ -184,28 +251,12 @@ void __init omap34xx_check_revision(void) > > rev = (idcode >> 28) & 0xff; > > > > if (hawkeye == 0xb7ae) { > > - switch (rev) { > > - case 0: > > - omap_revision = OMAP3430_REV_ES2_0; > > - rev_name = "ES2.0"; > > - break; > > - case 2: > > - omap_revision = OMAP3430_REV_ES2_1; > > - rev_name = "ES2.1"; > > - break; > > - case 3: > > - omap_revision = OMAP3430_REV_ES3_0; > > - rev_name = "ES3.0"; > > - break; > > - case 4: > > - omap_revision = OMAP3430_REV_ES3_1; > > - rev_name = "ES3.1"; > > - break; > > - default: > > - /* Use the latest known revision as default */ > > - omap_revision = OMAP3430_REV_ES3_1; > > - rev_name = "Unknown revision\n"; > > - } > > + if (cpu_is_omap35xx()) > > + omap35xx_set_revision(rev, OMAP35XX_G1, > rev_name); > > + else > > + omap34xx_set_revision(rev, rev_name); > > + } else if (hawkeye == 0xb868) { > > + omap35xx_set_revision(rev, OMAP35XX_G2, rev_name); > > } > > Testing for hawkeye == 0xb868 test should just be added into > the current > omap34xx_check_revision(). > > Regards, > > Tony > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x 2009-08-06 11:34 ` Premi, Sanjeev @ 2009-08-06 11:50 ` Tony Lindgren 2009-08-06 14:11 ` Premi, Sanjeev 0 siblings, 1 reply; 12+ messages in thread From: Tony Lindgren @ 2009-08-06 11:50 UTC (permalink / raw) To: Premi, Sanjeev; +Cc: linux-omap@vger.kernel.org * Premi, Sanjeev <premi@ti.com> [090806 14:34]: > > > -----Original Message----- > > From: Tony Lindgren [mailto:tony@atomide.com] > > Sent: Thursday, August 06, 2009 4:34 PM > > To: Premi, Sanjeev > > Cc: linux-omap@vger.kernel.org > > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > > > Hi, > > > > * Sanjeev Premi <premi@ti.com> [090806 13:36]: > > > Added runtime check via omap2_set_globals_35xx(). > > > > > > Parts of this patch have been derived from an earlier > > > earlier patch submitted by Tony Lindgren <tony@atomide.com> > > > > > > [1] http://marc.info/?l=linux-omap&m=123301852702797&w=2 > > > [2] http://marc.info/?l=linux-omap&m=123334055822212&w=2 > > > > > > Signed-off-by: Sanjeev Premi <premi@ti.com> > > > --- > > > arch/arm/mach-omap2/id.c | 115 > > ++++++++++++++++++++++++------ > > > arch/arm/plat-omap/common.c | 18 +++++- > > > arch/arm/plat-omap/include/mach/common.h | 1 + > > > arch/arm/plat-omap/include/mach/cpu.h | 64 ++++++++++++++++- > > > 4 files changed, 173 insertions(+), 25 deletions(-) > > > > > > diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > > > index a98201c..06770aa 100644 > > > --- a/arch/arm/mach-omap2/id.c > > > +++ b/arch/arm/mach-omap2/id.c > > > @@ -28,6 +28,14 @@ > > > static struct omap_chip_id omap_chip; > > > static unsigned int omap_revision; > > > > > > +/* The new OMAP35x devices have assymetric names - > > OMAP3505 and OMAP3517. > > > + * It is not possible to define a common macro to identify them. > > > + * > > > + * A quick way is to separate them across 'generations' as below. > > > + */ > > > +#define OMAP35XX_G1 0x1 /* Applies to 3503, > > 3515, 3525 and 3530 */ > > > +#define OMAP35XX_G2 0x2 /* Applies to 3505 and 3517 */ > > > + > > > > > > unsigned int omap_rev(void) > > > { > > > @@ -155,12 +163,71 @@ void __init omap24xx_check_revision(void) > > > pr_info("\n"); > > > } > > > > > > +static void __init omap34xx_set_revision(u8 rev, char *rev_name) > > > +{ > > > + switch (rev) { > > > + case 0: > > > + omap_revision = OMAP3430_REV_ES2_0; > > > + strcat(rev_name, "ES2.0"); > > > + break; > > > + case 2: > > > + omap_revision = OMAP3430_REV_ES2_1; > > > + strcat(rev_name, "ES2.1"); > > > + break; > > > + case 3: > > > + omap_revision = OMAP3430_REV_ES3_0; > > > + strcat(rev_name, "ES3.0"); > > > + break; > > > + case 4: > > > + omap_revision = OMAP3430_REV_ES3_1; > > > + strcat(rev_name, "ES3.1"); > > > + break; > > > + default: > > > + /* Use the latest known revision as default */ > > > + omap_revision = OMAP3430_REV_ES3_1; > > > + strcat(rev_name, "Unknown revision"); > > > + } > > > +} > > > + > > > +static void __init omap35xx_set_revision(u8 rev, u8 gen, > > char *rev_name) > > > +{ > > > + omap_revision = OMAP35XX_CLASS ; > > > + > > > + if (gen == OMAP35XX_G1) { > > > + switch (rev) { > > > + case 0: /* Take care of some older boards */ > > > + case 1: > > > + omap_revision |= OMAP35XX_MASK_ES2_0; > > > + strcat(rev_name, "ES2.0"); > > > + break; > > > + case 2: > > > + omap_revision |= OMAP35XX_MASK_ES2_1; > > > + strcat(rev_name, "ES2.1"); > > > + break; > > > + case 3: > > > + omap_revision |= OMAP35XX_MASK_ES3_0; > > > + strcat(rev_name, "ES3.0"); > > > + break; > > > + case 4: > > > + omap_revision |= OMAP35XX_MASK_ES3_1; > > > + strcat(rev_name, "ES3.1"); > > > + break; > > > + default: > > > + /* Use the latest known revision as default */ > > > + omap_revision |= OMAP35XX_MASK_ES3_0; > > > + strcat(rev_name, "Unknown revision"); > > > + } > > > + } else { > > > + strcat(rev_name, "ES1.0"); > > > + } > > > +} > > > + > > > > To me it looks like you're checking the exact same cores as > > we already do > > for 34xx. That is, (idcode >> 28) & 0xff for both 34xx and > > 35xx. So basically > > they have the same omap cores. > > No, the cores in OMAP3505 and OMAP3517 are very different. > I have listed major differences in PATCH 2/6. > > These devices differ in following areas: > - Power management capabilities > (Only 1 power domain, 1 OPP, etc.) > - EMIF4 instead of SDRC > - Support for DDR2 > - EMAC > - USB > - HECC Sure, but from compiler flags and io point of view they can still be treated as 34xx. How about just add the individual type detection for 35xx processors, and then have something like this: #define cpu_is_omap35xx() (cpu_is_omap34xx() && (cpu_is_omap3510() || \ cpu_is_omap3520() || cpu_is_omap3530()) That should pretty much shrink this patch series down to about 50 lines or so of code. > > > > > Considering this I don't see much sense adding cpu_is_35xx() category > > because cpu_is_34xx() already covers these processors. Just > > like cpu_is_16xx() > > covers both 1610 and 1710. > > > > Let's just rather add more feature tests for IVA2 etc as needed, then > > cpu_is_35something() becomse just cpu_is_34xx() && > > cpu_has_iva2() or similar. > > I did feel the need for these tests as well, and have an internal patch. > It was in my queue for submission next. > > > > > > > > > void __init omap34xx_check_revision(void) > > > { > > > u32 cpuid, idcode; > > > u16 hawkeye; > > > u8 rev; > > > - char *rev_name = "ES1.0"; > > > + char rev_name[16] = ""; > > > > > > /* > > > * We cannot access revision registers on ES1.0. > > > @@ -184,28 +251,12 @@ void __init omap34xx_check_revision(void) > > > rev = (idcode >> 28) & 0xff; > > > > > > if (hawkeye == 0xb7ae) { > > > - switch (rev) { > > > - case 0: > > > - omap_revision = OMAP3430_REV_ES2_0; > > > - rev_name = "ES2.0"; > > > - break; > > > - case 2: > > > - omap_revision = OMAP3430_REV_ES2_1; > > > - rev_name = "ES2.1"; > > > - break; > > > - case 3: > > > - omap_revision = OMAP3430_REV_ES3_0; > > > - rev_name = "ES3.0"; > > > - break; > > > - case 4: > > > - omap_revision = OMAP3430_REV_ES3_1; > > > - rev_name = "ES3.1"; > > > - break; > > > - default: > > > - /* Use the latest known revision as default */ > > > - omap_revision = OMAP3430_REV_ES3_1; > > > - rev_name = "Unknown revision\n"; > > > - } > > > + if (cpu_is_omap35xx()) > > > + omap35xx_set_revision(rev, OMAP35XX_G1, > > rev_name); > > > + else > > > + omap34xx_set_revision(rev, rev_name); > > > + } else if (hawkeye == 0xb868) { > > > + omap35xx_set_revision(rev, OMAP35XX_G2, rev_name); > > > } > > > > Testing for hawkeye == 0xb868 test should just be added into > > the current > > omap34xx_check_revision(). > > > > Regards, > > > > Tony > > > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x 2009-08-06 11:50 ` Tony Lindgren @ 2009-08-06 14:11 ` Premi, Sanjeev 2009-08-06 14:18 ` Tony Lindgren 2009-08-06 14:55 ` Kevin Hilman 0 siblings, 2 replies; 12+ messages in thread From: Premi, Sanjeev @ 2009-08-06 14:11 UTC (permalink / raw) To: Tony Lindgren; +Cc: linux-omap@vger.kernel.org > -----Original Message----- > From: Tony Lindgren [mailto:tony@atomide.com] > Sent: Thursday, August 06, 2009 5:20 PM > To: Premi, Sanjeev > Cc: linux-omap@vger.kernel.org > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > * Premi, Sanjeev <premi@ti.com> [090806 14:34]: > > > > > -----Original Message----- > > > From: Tony Lindgren [mailto:tony@atomide.com] > > > Sent: Thursday, August 06, 2009 4:34 PM > > > To: Premi, Sanjeev > > > Cc: linux-omap@vger.kernel.org > > > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > > > > > Hi, > > > > > > * Sanjeev Premi <premi@ti.com> [090806 13:36]: > > > > Added runtime check via omap2_set_globals_35xx(). > > > > > > > > Parts of this patch have been derived from an earlier > > > > earlier patch submitted by Tony Lindgren <tony@atomide.com> > > > > > > > > [1] http://marc.info/?l=linux-omap&m=123301852702797&w=2 > > > > [2] http://marc.info/?l=linux-omap&m=123334055822212&w=2 > > > > > > > > Signed-off-by: Sanjeev Premi <premi@ti.com> > > > > --- > > > > arch/arm/mach-omap2/id.c | 115 > > > ++++++++++++++++++++++++------ > > > > arch/arm/plat-omap/common.c | 18 +++++- > > > > arch/arm/plat-omap/include/mach/common.h | 1 + > > > > arch/arm/plat-omap/include/mach/cpu.h | 64 > ++++++++++++++++- > > > > 4 files changed, 173 insertions(+), 25 deletions(-) > > > > > > > > diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > > > > index a98201c..06770aa 100644 > > > > --- a/arch/arm/mach-omap2/id.c > > > > +++ b/arch/arm/mach-omap2/id.c > > > > @@ -28,6 +28,14 @@ > > > > static struct omap_chip_id omap_chip; > > > > static unsigned int omap_revision; > > > > > > > > +/* The new OMAP35x devices have assymetric names - > > > OMAP3505 and OMAP3517. > > > > + * It is not possible to define a common macro to > identify them. > > > > + * > > > > + * A quick way is to separate them across > 'generations' as below. > > > > + */ > > > > +#define OMAP35XX_G1 0x1 /* Applies to 3503, > > > 3515, 3525 and 3530 */ > > > > +#define OMAP35XX_G2 0x2 /* Applies to 3505 and 3517 */ > > > > + > > > > > > > > unsigned int omap_rev(void) > > > > { > > > > @@ -155,12 +163,71 @@ void __init omap24xx_check_revision(void) > > > > pr_info("\n"); > > > > } > > > > > > > > +static void __init omap34xx_set_revision(u8 rev, char > *rev_name) > > > > +{ > > > > + switch (rev) { > > > > + case 0: > > > > + omap_revision = OMAP3430_REV_ES2_0; > > > > + strcat(rev_name, "ES2.0"); > > > > + break; > > > > + case 2: > > > > + omap_revision = OMAP3430_REV_ES2_1; > > > > + strcat(rev_name, "ES2.1"); > > > > + break; > > > > + case 3: > > > > + omap_revision = OMAP3430_REV_ES3_0; > > > > + strcat(rev_name, "ES3.0"); > > > > + break; > > > > + case 4: > > > > + omap_revision = OMAP3430_REV_ES3_1; > > > > + strcat(rev_name, "ES3.1"); > > > > + break; > > > > + default: > > > > + /* Use the latest known revision as default */ > > > > + omap_revision = OMAP3430_REV_ES3_1; > > > > + strcat(rev_name, "Unknown revision"); > > > > + } > > > > +} > > > > + > > > > +static void __init omap35xx_set_revision(u8 rev, u8 gen, > > > char *rev_name) > > > > +{ > > > > + omap_revision = OMAP35XX_CLASS ; > > > > + > > > > + if (gen == OMAP35XX_G1) { > > > > + switch (rev) { > > > > + case 0: /* Take care of some older boards */ > > > > + case 1: > > > > + omap_revision |= OMAP35XX_MASK_ES2_0; > > > > + strcat(rev_name, "ES2.0"); > > > > + break; > > > > + case 2: > > > > + omap_revision |= OMAP35XX_MASK_ES2_1; > > > > + strcat(rev_name, "ES2.1"); > > > > + break; > > > > + case 3: > > > > + omap_revision |= OMAP35XX_MASK_ES3_0; > > > > + strcat(rev_name, "ES3.0"); > > > > + break; > > > > + case 4: > > > > + omap_revision |= OMAP35XX_MASK_ES3_1; > > > > + strcat(rev_name, "ES3.1"); > > > > + break; > > > > + default: > > > > + /* Use the latest known > revision as default */ > > > > + omap_revision |= OMAP35XX_MASK_ES3_0; > > > > + strcat(rev_name, "Unknown revision"); > > > > + } > > > > + } else { > > > > + strcat(rev_name, "ES1.0"); > > > > + } > > > > +} > > > > + > > > > > > To me it looks like you're checking the exact same cores as > > > we already do > > > for 34xx. That is, (idcode >> 28) & 0xff for both 34xx and > > > 35xx. So basically > > > they have the same omap cores. > > > > No, the cores in OMAP3505 and OMAP3517 are very different. > > I have listed major differences in PATCH 2/6. > > > > These devices differ in following areas: > > - Power management capabilities > > (Only 1 power domain, 1 OPP, etc.) > > - EMIF4 instead of SDRC > > - Support for DDR2 > > - EMAC > > - USB > > - HECC > > Sure, but from compiler flags and io point of view they can still > be treated as 34xx. > > How about just add the individual type detection for 35xx processors, > and then have something like this: > > #define cpu_is_omap35xx() (cpu_is_omap34xx() && > (cpu_is_omap3510() || \ > cpu_is_omap3520() || > cpu_is_omap3530()) > > That should pretty much shrink this patch series down to > about 50 lines or > so of code. Okay, I will try this. Just not sure if some of the differences in OMAP3530 and OMAP3430 can be detected. Will submit a patch soon. > > > > > > > > > Considering this I don't see much sense adding > cpu_is_35xx() category > > > because cpu_is_34xx() already covers these processors. Just > > > like cpu_is_16xx() > > > covers both 1610 and 1710. > > > > > > Let's just rather add more feature tests for IVA2 etc as > needed, then > > > cpu_is_35something() becomse just cpu_is_34xx() && > > > cpu_has_iva2() or similar. > > > > I did feel the need for these tests as well, and have an > internal patch. > > It was in my queue for submission next. > > > > > > > > > > > > > > void __init omap34xx_check_revision(void) > > > > { > > > > u32 cpuid, idcode; > > > > u16 hawkeye; > > > > u8 rev; > > > > - char *rev_name = "ES1.0"; > > > > + char rev_name[16] = ""; > > > > > > > > /* > > > > * We cannot access revision registers on ES1.0. > > > > @@ -184,28 +251,12 @@ void __init omap34xx_check_revision(void) > > > > rev = (idcode >> 28) & 0xff; > > > > > > > > if (hawkeye == 0xb7ae) { > > > > - switch (rev) { > > > > - case 0: > > > > - omap_revision = OMAP3430_REV_ES2_0; > > > > - rev_name = "ES2.0"; > > > > - break; > > > > - case 2: > > > > - omap_revision = OMAP3430_REV_ES2_1; > > > > - rev_name = "ES2.1"; > > > > - break; > > > > - case 3: > > > > - omap_revision = OMAP3430_REV_ES3_0; > > > > - rev_name = "ES3.0"; > > > > - break; > > > > - case 4: > > > > - omap_revision = OMAP3430_REV_ES3_1; > > > > - rev_name = "ES3.1"; > > > > - break; > > > > - default: > > > > - /* Use the latest known > revision as default */ > > > > - omap_revision = OMAP3430_REV_ES3_1; > > > > - rev_name = "Unknown revision\n"; > > > > - } > > > > + if (cpu_is_omap35xx()) > > > > + omap35xx_set_revision(rev, OMAP35XX_G1, > > > rev_name); > > > > + else > > > > + omap34xx_set_revision(rev, rev_name); > > > > + } else if (hawkeye == 0xb868) { > > > > + omap35xx_set_revision(rev, OMAP35XX_G2, > rev_name); > > > > } > > > > > > Testing for hawkeye == 0xb868 test should just be added into > > > the current > > > omap34xx_check_revision(). > > > > > > Regards, > > > > > > Tony > > > > > > > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x 2009-08-06 14:11 ` Premi, Sanjeev @ 2009-08-06 14:18 ` Tony Lindgren 2009-08-06 14:55 ` Kevin Hilman 1 sibling, 0 replies; 12+ messages in thread From: Tony Lindgren @ 2009-08-06 14:18 UTC (permalink / raw) To: Premi, Sanjeev; +Cc: linux-omap@vger.kernel.org * Premi, Sanjeev <premi@ti.com> [090806 17:11]: > > -----Original Message----- > > From: Tony Lindgren [mailto:tony@atomide.com] > > Sent: Thursday, August 06, 2009 5:20 PM > > To: Premi, Sanjeev > > Cc: linux-omap@vger.kernel.org > > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > > > * Premi, Sanjeev <premi@ti.com> [090806 14:34]: > > > > > > > -----Original Message----- > > > > From: Tony Lindgren [mailto:tony@atomide.com] > > > > Sent: Thursday, August 06, 2009 4:34 PM > > > > To: Premi, Sanjeev > > > > Cc: linux-omap@vger.kernel.org > > > > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > > > > > > > Hi, > > > > > > > > * Sanjeev Premi <premi@ti.com> [090806 13:36]: > > > > > Added runtime check via omap2_set_globals_35xx(). > > > > > > > > > > Parts of this patch have been derived from an earlier > > > > > earlier patch submitted by Tony Lindgren <tony@atomide.com> > > > > > > > > > > [1] http://marc.info/?l=linux-omap&m=123301852702797&w=2 > > > > > [2] http://marc.info/?l=linux-omap&m=123334055822212&w=2 > > > > > > > > > > Signed-off-by: Sanjeev Premi <premi@ti.com> > > > > > --- > > > > > arch/arm/mach-omap2/id.c | 115 > > > > ++++++++++++++++++++++++------ > > > > > arch/arm/plat-omap/common.c | 18 +++++- > > > > > arch/arm/plat-omap/include/mach/common.h | 1 + > > > > > arch/arm/plat-omap/include/mach/cpu.h | 64 > > ++++++++++++++++- > > > > > 4 files changed, 173 insertions(+), 25 deletions(-) > > > > > > > > > > diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > > > > > index a98201c..06770aa 100644 > > > > > --- a/arch/arm/mach-omap2/id.c > > > > > +++ b/arch/arm/mach-omap2/id.c > > > > > @@ -28,6 +28,14 @@ > > > > > static struct omap_chip_id omap_chip; > > > > > static unsigned int omap_revision; > > > > > > > > > > +/* The new OMAP35x devices have assymetric names - > > > > OMAP3505 and OMAP3517. > > > > > + * It is not possible to define a common macro to > > identify them. > > > > > + * > > > > > + * A quick way is to separate them across > > 'generations' as below. > > > > > + */ > > > > > +#define OMAP35XX_G1 0x1 /* Applies to 3503, > > > > 3515, 3525 and 3530 */ > > > > > +#define OMAP35XX_G2 0x2 /* Applies to 3505 and 3517 */ > > > > > + > > > > > > > > > > unsigned int omap_rev(void) > > > > > { > > > > > @@ -155,12 +163,71 @@ void __init omap24xx_check_revision(void) > > > > > pr_info("\n"); > > > > > } > > > > > > > > > > +static void __init omap34xx_set_revision(u8 rev, char > > *rev_name) > > > > > +{ > > > > > + switch (rev) { > > > > > + case 0: > > > > > + omap_revision = OMAP3430_REV_ES2_0; > > > > > + strcat(rev_name, "ES2.0"); > > > > > + break; > > > > > + case 2: > > > > > + omap_revision = OMAP3430_REV_ES2_1; > > > > > + strcat(rev_name, "ES2.1"); > > > > > + break; > > > > > + case 3: > > > > > + omap_revision = OMAP3430_REV_ES3_0; > > > > > + strcat(rev_name, "ES3.0"); > > > > > + break; > > > > > + case 4: > > > > > + omap_revision = OMAP3430_REV_ES3_1; > > > > > + strcat(rev_name, "ES3.1"); > > > > > + break; > > > > > + default: > > > > > + /* Use the latest known revision as default */ > > > > > + omap_revision = OMAP3430_REV_ES3_1; > > > > > + strcat(rev_name, "Unknown revision"); > > > > > + } > > > > > +} > > > > > + > > > > > +static void __init omap35xx_set_revision(u8 rev, u8 gen, > > > > char *rev_name) > > > > > +{ > > > > > + omap_revision = OMAP35XX_CLASS ; > > > > > + > > > > > + if (gen == OMAP35XX_G1) { > > > > > + switch (rev) { > > > > > + case 0: /* Take care of some older boards */ > > > > > + case 1: > > > > > + omap_revision |= OMAP35XX_MASK_ES2_0; > > > > > + strcat(rev_name, "ES2.0"); > > > > > + break; > > > > > + case 2: > > > > > + omap_revision |= OMAP35XX_MASK_ES2_1; > > > > > + strcat(rev_name, "ES2.1"); > > > > > + break; > > > > > + case 3: > > > > > + omap_revision |= OMAP35XX_MASK_ES3_0; > > > > > + strcat(rev_name, "ES3.0"); > > > > > + break; > > > > > + case 4: > > > > > + omap_revision |= OMAP35XX_MASK_ES3_1; > > > > > + strcat(rev_name, "ES3.1"); > > > > > + break; > > > > > + default: > > > > > + /* Use the latest known > > revision as default */ > > > > > + omap_revision |= OMAP35XX_MASK_ES3_0; > > > > > + strcat(rev_name, "Unknown revision"); > > > > > + } > > > > > + } else { > > > > > + strcat(rev_name, "ES1.0"); > > > > > + } > > > > > +} > > > > > + > > > > > > > > To me it looks like you're checking the exact same cores as > > > > we already do > > > > for 34xx. That is, (idcode >> 28) & 0xff for both 34xx and > > > > 35xx. So basically > > > > they have the same omap cores. > > > > > > No, the cores in OMAP3505 and OMAP3517 are very different. > > > I have listed major differences in PATCH 2/6. > > > > > > These devices differ in following areas: > > > - Power management capabilities > > > (Only 1 power domain, 1 OPP, etc.) > > > - EMIF4 instead of SDRC > > > - Support for DDR2 > > > - EMAC > > > - USB > > > - HECC > > > > Sure, but from compiler flags and io point of view they can still > > be treated as 34xx. > > > > How about just add the individual type detection for 35xx processors, > > and then have something like this: > > > > #define cpu_is_omap35xx() (cpu_is_omap34xx() && > > (cpu_is_omap3510() || \ > > cpu_is_omap3520() || > > cpu_is_omap3530()) > > > > That should pretty much shrink this patch series down to > > about 50 lines or > > so of code. > > Okay, I will try this. Just not sure if some of the differences > in OMAP3530 and OMAP3430 can be detected. OK, let's take it from there. We really need the feature checks implemented.. > Will submit a patch soon. Thanks! Tony > > > > > > > > > > > > > > Considering this I don't see much sense adding > > cpu_is_35xx() category > > > > because cpu_is_34xx() already covers these processors. Just > > > > like cpu_is_16xx() > > > > covers both 1610 and 1710. > > > > > > > > Let's just rather add more feature tests for IVA2 etc as > > needed, then > > > > cpu_is_35something() becomse just cpu_is_34xx() && > > > > cpu_has_iva2() or similar. > > > > > > I did feel the need for these tests as well, and have an > > internal patch. > > > It was in my queue for submission next. > > > > > > > > > > > > > > > > > > > void __init omap34xx_check_revision(void) > > > > > { > > > > > u32 cpuid, idcode; > > > > > u16 hawkeye; > > > > > u8 rev; > > > > > - char *rev_name = "ES1.0"; > > > > > + char rev_name[16] = ""; > > > > > > > > > > /* > > > > > * We cannot access revision registers on ES1.0. > > > > > @@ -184,28 +251,12 @@ void __init omap34xx_check_revision(void) > > > > > rev = (idcode >> 28) & 0xff; > > > > > > > > > > if (hawkeye == 0xb7ae) { > > > > > - switch (rev) { > > > > > - case 0: > > > > > - omap_revision = OMAP3430_REV_ES2_0; > > > > > - rev_name = "ES2.0"; > > > > > - break; > > > > > - case 2: > > > > > - omap_revision = OMAP3430_REV_ES2_1; > > > > > - rev_name = "ES2.1"; > > > > > - break; > > > > > - case 3: > > > > > - omap_revision = OMAP3430_REV_ES3_0; > > > > > - rev_name = "ES3.0"; > > > > > - break; > > > > > - case 4: > > > > > - omap_revision = OMAP3430_REV_ES3_1; > > > > > - rev_name = "ES3.1"; > > > > > - break; > > > > > - default: > > > > > - /* Use the latest known > > revision as default */ > > > > > - omap_revision = OMAP3430_REV_ES3_1; > > > > > - rev_name = "Unknown revision\n"; > > > > > - } > > > > > + if (cpu_is_omap35xx()) > > > > > + omap35xx_set_revision(rev, OMAP35XX_G1, > > > > rev_name); > > > > > + else > > > > > + omap34xx_set_revision(rev, rev_name); > > > > > + } else if (hawkeye == 0xb868) { > > > > > + omap35xx_set_revision(rev, OMAP35XX_G2, > > rev_name); > > > > > } > > > > > > > > Testing for hawkeye == 0xb868 test should just be added into > > > > the current > > > > omap34xx_check_revision(). > > > > > > > > Regards, > > > > > > > > Tony > > > > > > > > > > > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x 2009-08-06 14:11 ` Premi, Sanjeev 2009-08-06 14:18 ` Tony Lindgren @ 2009-08-06 14:55 ` Kevin Hilman 2009-08-07 8:23 ` Tony Lindgren 1 sibling, 1 reply; 12+ messages in thread From: Kevin Hilman @ 2009-08-06 14:55 UTC (permalink / raw) To: Premi, Sanjeev; +Cc: Tony Lindgren, linux-omap@vger.kernel.org "Premi, Sanjeev" <premi@ti.com> writes: >> -----Original Message----- >> From: Tony Lindgren [mailto:tony@atomide.com] >> Sent: Thursday, August 06, 2009 5:20 PM >> To: Premi, Sanjeev >> Cc: linux-omap@vger.kernel.org >> Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x >> >> * Premi, Sanjeev <premi@ti.com> [090806 14:34]: >> > >> > > -----Original Message----- >> > > From: Tony Lindgren [mailto:tony@atomide.com] >> > > Sent: Thursday, August 06, 2009 4:34 PM >> > > To: Premi, Sanjeev >> > > Cc: linux-omap@vger.kernel.org >> > > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x >> > > >> > > Hi, >> > > >> > > * Sanjeev Premi <premi@ti.com> [090806 13:36]: >> > > > Added runtime check via omap2_set_globals_35xx(). >> > > > >> > > > Parts of this patch have been derived from an earlier >> > > > earlier patch submitted by Tony Lindgren <tony@atomide.com> >> > > > >> > > > [1] http://marc.info/?l=linux-omap&m=123301852702797&w=2 >> > > > [2] http://marc.info/?l=linux-omap&m=123334055822212&w=2 >> > > > >> > > > Signed-off-by: Sanjeev Premi <premi@ti.com> >> > > > --- >> > > > arch/arm/mach-omap2/id.c | 115 >> > > ++++++++++++++++++++++++------ >> > > > arch/arm/plat-omap/common.c | 18 +++++- >> > > > arch/arm/plat-omap/include/mach/common.h | 1 + >> > > > arch/arm/plat-omap/include/mach/cpu.h | 64 >> ++++++++++++++++- >> > > > 4 files changed, 173 insertions(+), 25 deletions(-) >> > > > >> > > > diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c >> > > > index a98201c..06770aa 100644 >> > > > --- a/arch/arm/mach-omap2/id.c >> > > > +++ b/arch/arm/mach-omap2/id.c >> > > > @@ -28,6 +28,14 @@ >> > > > static struct omap_chip_id omap_chip; >> > > > static unsigned int omap_revision; >> > > > >> > > > +/* The new OMAP35x devices have assymetric names - >> > > OMAP3505 and OMAP3517. >> > > > + * It is not possible to define a common macro to >> identify them. >> > > > + * >> > > > + * A quick way is to separate them across >> 'generations' as below. >> > > > + */ >> > > > +#define OMAP35XX_G1 0x1 /* Applies to 3503, >> > > 3515, 3525 and 3530 */ >> > > > +#define OMAP35XX_G2 0x2 /* Applies to 3505 and 3517 */ >> > > > + >> > > > >> > > > unsigned int omap_rev(void) >> > > > { >> > > > @@ -155,12 +163,71 @@ void __init omap24xx_check_revision(void) >> > > > pr_info("\n"); >> > > > } >> > > > >> > > > +static void __init omap34xx_set_revision(u8 rev, char >> *rev_name) >> > > > +{ >> > > > + switch (rev) { >> > > > + case 0: >> > > > + omap_revision = OMAP3430_REV_ES2_0; >> > > > + strcat(rev_name, "ES2.0"); >> > > > + break; >> > > > + case 2: >> > > > + omap_revision = OMAP3430_REV_ES2_1; >> > > > + strcat(rev_name, "ES2.1"); >> > > > + break; >> > > > + case 3: >> > > > + omap_revision = OMAP3430_REV_ES3_0; >> > > > + strcat(rev_name, "ES3.0"); >> > > > + break; >> > > > + case 4: >> > > > + omap_revision = OMAP3430_REV_ES3_1; >> > > > + strcat(rev_name, "ES3.1"); >> > > > + break; >> > > > + default: >> > > > + /* Use the latest known revision as default */ >> > > > + omap_revision = OMAP3430_REV_ES3_1; >> > > > + strcat(rev_name, "Unknown revision"); >> > > > + } >> > > > +} >> > > > + >> > > > +static void __init omap35xx_set_revision(u8 rev, u8 gen, >> > > char *rev_name) >> > > > +{ >> > > > + omap_revision = OMAP35XX_CLASS ; >> > > > + >> > > > + if (gen == OMAP35XX_G1) { >> > > > + switch (rev) { >> > > > + case 0: /* Take care of some older boards */ >> > > > + case 1: >> > > > + omap_revision |= OMAP35XX_MASK_ES2_0; >> > > > + strcat(rev_name, "ES2.0"); >> > > > + break; >> > > > + case 2: >> > > > + omap_revision |= OMAP35XX_MASK_ES2_1; >> > > > + strcat(rev_name, "ES2.1"); >> > > > + break; >> > > > + case 3: >> > > > + omap_revision |= OMAP35XX_MASK_ES3_0; >> > > > + strcat(rev_name, "ES3.0"); >> > > > + break; >> > > > + case 4: >> > > > + omap_revision |= OMAP35XX_MASK_ES3_1; >> > > > + strcat(rev_name, "ES3.1"); >> > > > + break; >> > > > + default: >> > > > + /* Use the latest known >> revision as default */ >> > > > + omap_revision |= OMAP35XX_MASK_ES3_0; >> > > > + strcat(rev_name, "Unknown revision"); >> > > > + } >> > > > + } else { >> > > > + strcat(rev_name, "ES1.0"); >> > > > + } >> > > > +} >> > > > + >> > > >> > > To me it looks like you're checking the exact same cores as >> > > we already do >> > > for 34xx. That is, (idcode >> 28) & 0xff for both 34xx and >> > > 35xx. So basically >> > > they have the same omap cores. >> > >> > No, the cores in OMAP3505 and OMAP3517 are very different. >> > I have listed major differences in PATCH 2/6. >> > >> > These devices differ in following areas: >> > - Power management capabilities >> > (Only 1 power domain, 1 OPP, etc.) >> > - EMIF4 instead of SDRC >> > - Support for DDR2 >> > - EMAC >> > - USB >> > - HECC >> >> Sure, but from compiler flags and io point of view they can still >> be treated as 34xx. >> >> How about just add the individual type detection for 35xx processors, >> and then have something like this: >> >> #define cpu_is_omap35xx() (cpu_is_omap34xx() && >> (cpu_is_omap3510() || \ >> cpu_is_omap3520() || >> cpu_is_omap3530()) >> >> That should pretty much shrink this patch series down to >> about 50 lines or >> so of code. > > Okay, I will try this. Just not sure if some of the differences > in OMAP3530 and OMAP3430 can be detected. > > Will submit a patch soon. IMO, we should not be using cpu_is_* for detecting the differences between 34xx and 35xx, but rather we could query the features like you're doing in PATCH 4/6. Adding conditionals like if (omap3_has_iva2()) ... and if (omap3_has_sgx()) ... rather than having a long list of cpu_is checks that have to be changed each time a new SoC comes out. Kevin ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x 2009-08-06 14:55 ` Kevin Hilman @ 2009-08-07 8:23 ` Tony Lindgren 2009-08-10 15:10 ` Premi, Sanjeev 0 siblings, 1 reply; 12+ messages in thread From: Tony Lindgren @ 2009-08-07 8:23 UTC (permalink / raw) To: Kevin Hilman; +Cc: Premi, Sanjeev, linux-omap@vger.kernel.org * Kevin Hilman <khilman@deeprootsystems.com> [090806 17:56]: > "Premi, Sanjeev" <premi@ti.com> writes: > > >> -----Original Message----- > >> From: Tony Lindgren [mailto:tony@atomide.com] > >> Sent: Thursday, August 06, 2009 5:20 PM > >> To: Premi, Sanjeev > >> Cc: linux-omap@vger.kernel.org > >> Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > >> > >> * Premi, Sanjeev <premi@ti.com> [090806 14:34]: > >> > > >> > > -----Original Message----- > >> > > From: Tony Lindgren [mailto:tony@atomide.com] > >> > > Sent: Thursday, August 06, 2009 4:34 PM > >> > > To: Premi, Sanjeev > >> > > Cc: linux-omap@vger.kernel.org > >> > > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > >> > > > >> > > Hi, > >> > > > >> > > * Sanjeev Premi <premi@ti.com> [090806 13:36]: > >> > > > Added runtime check via omap2_set_globals_35xx(). > >> > > > > >> > > > Parts of this patch have been derived from an earlier > >> > > > earlier patch submitted by Tony Lindgren <tony@atomide.com> > >> > > > > >> > > > [1] http://marc.info/?l=linux-omap&m=123301852702797&w=2 > >> > > > [2] http://marc.info/?l=linux-omap&m=123334055822212&w=2 > >> > > > > >> > > > Signed-off-by: Sanjeev Premi <premi@ti.com> > >> > > > --- > >> > > > arch/arm/mach-omap2/id.c | 115 > >> > > ++++++++++++++++++++++++------ > >> > > > arch/arm/plat-omap/common.c | 18 +++++- > >> > > > arch/arm/plat-omap/include/mach/common.h | 1 + > >> > > > arch/arm/plat-omap/include/mach/cpu.h | 64 > >> ++++++++++++++++- > >> > > > 4 files changed, 173 insertions(+), 25 deletions(-) > >> > > > > >> > > > diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > >> > > > index a98201c..06770aa 100644 > >> > > > --- a/arch/arm/mach-omap2/id.c > >> > > > +++ b/arch/arm/mach-omap2/id.c > >> > > > @@ -28,6 +28,14 @@ > >> > > > static struct omap_chip_id omap_chip; > >> > > > static unsigned int omap_revision; > >> > > > > >> > > > +/* The new OMAP35x devices have assymetric names - > >> > > OMAP3505 and OMAP3517. > >> > > > + * It is not possible to define a common macro to > >> identify them. > >> > > > + * > >> > > > + * A quick way is to separate them across > >> 'generations' as below. > >> > > > + */ > >> > > > +#define OMAP35XX_G1 0x1 /* Applies to 3503, > >> > > 3515, 3525 and 3530 */ > >> > > > +#define OMAP35XX_G2 0x2 /* Applies to 3505 and 3517 */ > >> > > > + > >> > > > > >> > > > unsigned int omap_rev(void) > >> > > > { > >> > > > @@ -155,12 +163,71 @@ void __init omap24xx_check_revision(void) > >> > > > pr_info("\n"); > >> > > > } > >> > > > > >> > > > +static void __init omap34xx_set_revision(u8 rev, char > >> *rev_name) > >> > > > +{ > >> > > > + switch (rev) { > >> > > > + case 0: > >> > > > + omap_revision = OMAP3430_REV_ES2_0; > >> > > > + strcat(rev_name, "ES2.0"); > >> > > > + break; > >> > > > + case 2: > >> > > > + omap_revision = OMAP3430_REV_ES2_1; > >> > > > + strcat(rev_name, "ES2.1"); > >> > > > + break; > >> > > > + case 3: > >> > > > + omap_revision = OMAP3430_REV_ES3_0; > >> > > > + strcat(rev_name, "ES3.0"); > >> > > > + break; > >> > > > + case 4: > >> > > > + omap_revision = OMAP3430_REV_ES3_1; > >> > > > + strcat(rev_name, "ES3.1"); > >> > > > + break; > >> > > > + default: > >> > > > + /* Use the latest known revision as default */ > >> > > > + omap_revision = OMAP3430_REV_ES3_1; > >> > > > + strcat(rev_name, "Unknown revision"); > >> > > > + } > >> > > > +} > >> > > > + > >> > > > +static void __init omap35xx_set_revision(u8 rev, u8 gen, > >> > > char *rev_name) > >> > > > +{ > >> > > > + omap_revision = OMAP35XX_CLASS ; > >> > > > + > >> > > > + if (gen == OMAP35XX_G1) { > >> > > > + switch (rev) { > >> > > > + case 0: /* Take care of some older boards */ > >> > > > + case 1: > >> > > > + omap_revision |= OMAP35XX_MASK_ES2_0; > >> > > > + strcat(rev_name, "ES2.0"); > >> > > > + break; > >> > > > + case 2: > >> > > > + omap_revision |= OMAP35XX_MASK_ES2_1; > >> > > > + strcat(rev_name, "ES2.1"); > >> > > > + break; > >> > > > + case 3: > >> > > > + omap_revision |= OMAP35XX_MASK_ES3_0; > >> > > > + strcat(rev_name, "ES3.0"); > >> > > > + break; > >> > > > + case 4: > >> > > > + omap_revision |= OMAP35XX_MASK_ES3_1; > >> > > > + strcat(rev_name, "ES3.1"); > >> > > > + break; > >> > > > + default: > >> > > > + /* Use the latest known > >> revision as default */ > >> > > > + omap_revision |= OMAP35XX_MASK_ES3_0; > >> > > > + strcat(rev_name, "Unknown revision"); > >> > > > + } > >> > > > + } else { > >> > > > + strcat(rev_name, "ES1.0"); > >> > > > + } > >> > > > +} > >> > > > + > >> > > > >> > > To me it looks like you're checking the exact same cores as > >> > > we already do > >> > > for 34xx. That is, (idcode >> 28) & 0xff for both 34xx and > >> > > 35xx. So basically > >> > > they have the same omap cores. > >> > > >> > No, the cores in OMAP3505 and OMAP3517 are very different. > >> > I have listed major differences in PATCH 2/6. > >> > > >> > These devices differ in following areas: > >> > - Power management capabilities > >> > (Only 1 power domain, 1 OPP, etc.) > >> > - EMIF4 instead of SDRC > >> > - Support for DDR2 > >> > - EMAC > >> > - USB > >> > - HECC > >> > >> Sure, but from compiler flags and io point of view they can still > >> be treated as 34xx. > >> > >> How about just add the individual type detection for 35xx processors, > >> and then have something like this: > >> > >> #define cpu_is_omap35xx() (cpu_is_omap34xx() && > >> (cpu_is_omap3510() || \ > >> cpu_is_omap3520() || > >> cpu_is_omap3530()) > >> > >> That should pretty much shrink this patch series down to > >> about 50 lines or > >> so of code. > > > > Okay, I will try this. Just not sure if some of the differences > > in OMAP3530 and OMAP3430 can be detected. > > > > Will submit a patch soon. > > > IMO, we should not be using cpu_is_* for detecting the differences > between 34xx and 35xx, but rather we could query the features like > you're doing in PATCH 4/6. > > Adding conditionals like > > if (omap3_has_iva2()) > ... > > and > > if (omap3_has_sgx()) > ... > > rather than having a long list of cpu_is checks that have to be changed > each time a new SoC comes out. Agreed. Tony ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x 2009-08-07 8:23 ` Tony Lindgren @ 2009-08-10 15:10 ` Premi, Sanjeev 2009-08-11 8:02 ` Tony Lindgren 0 siblings, 1 reply; 12+ messages in thread From: Premi, Sanjeev @ 2009-08-10 15:10 UTC (permalink / raw) To: Tony Lindgren, Kevin Hilman; +Cc: linux-omap@vger.kernel.org > -----Original Message----- > From: Tony Lindgren [mailto:tony@atomide.com] > Sent: Friday, August 07, 2009 1:53 PM > To: Kevin Hilman > Cc: Premi, Sanjeev; linux-omap@vger.kernel.org > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > <snip>--<snip> > > > > Adding conditionals like > > > > if (omap3_has_iva2()) > > ... > > > > and > > > > if (omap3_has_sgx()) > > ... > > > > rather than having a long list of cpu_is checks that have > to be changed > > each time a new SoC comes out. > > Agreed. > > Tony > > Tony, Kevin, Here is a work in progress patch implementing the conditionals. I am looking for your suggestions on these: 1) The detection of ES2.0 is different between OMAP3530 and OMAP3430. For 3430 ES2.0, (idcode >> 28) == 0x0 For 3530 ES2.0, (idcode >> 28) == 0x1 What can be easy way to make this distinction? 2) How do we handle the power domain differences between OMAP34x and the new OMAP3517 and OMAP05 devices. The hawkeye is different, but, would it make sense to omap_revision to be like: 0x34050034, 0x34170034 - when we reuse the 34xx class. 3) Currently, the macros like OMAP3430_REV_ES1_0 are defined to be whole numbers. I am trying to change them to something like: #define OMAP34XX_REV(type,rev) (OMAP34XX_CLASS & (type << 16) & (rev << 12)) And use as (if needed): #define OMAP3430_REV_ES3_1 OMAP34XX_REV(0x30, 0x4) #define OMAP3403_REV_ES3_1 OMAP34XX_REV(0x03, 0x4) What is your view? In fact, wouldn't it be better if we tested for si rev independent from si type? 4) These macros are, possibly, duplicating the data in omap_revision: #define CHIP_IS_OMAP3430ES3_0 (1 << 5) #define CHIP_IS_OMAP3430ES3_1 (1 << 6) But, might be used for faster checking. Is this duplication necessary? 5) Assuming that we are able to maintain current, macros, would this help in reducing the duplication? struct omap_id { u16 id; /* e.g. 0x3430, 0x3517, ... */ u8 class; /* 34x */ u8 subclass; /* 0x30, 0x03, 0x05, 0x15, 0x17 ... */ u8 rev; /* 0x10 (for ES 1.0), 0x21 (for ES2.1) etc. */ /* use nibble as decimal separator */ } I have tried many approaches, before sending this mail, so there might be few duplications in the code below. The cpu_is_35xx() macros are also incomplete for now. Best regards, Sanjeev diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index a98201c..f17d4db 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -25,9 +25,47 @@ #include <mach/control.h> #include <mach/cpu.h> +#define OMAP3_CONTROL_OMAP_STATUS 0x044c + +#define OMAP3_SGX_SHIFT 13 +#define OMAP3_SGX_MASK (3 << OMAP3_SGX_SHIFT) +#define FEAT_SGX_FULL 0 +#define FEAT_SGX_HALF 1 +#define FEAT_SGX_NONE 2 + +#define OMAP3_IVA_SHIFT 12 +#define OMAP3_IVA_MASK (1 << OMAP3_SGX_SHIFT) +#define FEAT_IVA 0 +#define FEAT_IVA_NONE 1 + +#define OMAP3_L2CACHE_SHIFT 10 +#define OMAP3_L2CACHE_MASK (3 << OMAP3_L2CACHE_SHIFT) +#define FEAT_L2CACHE_0KB 0 +#define FEAT_L2CACHE_64KB 1 +#define FEAT_L2CACHE_128KB 2 +#define FEAT_L2CACHE_256KB 3 + +#define OMAP3_ISP_SHIFT 5 +#define OMAP3_ISP_MASK (1<< OMAP3_ISP_SHIFT) +#define FEAT_ISP 0 +#define FEAT_ISP_NONE 1 + +#define OMAP3_NEON_SHIFT 4 +#define OMAP3_NEON_MASK (1<< OMAP3_NEON_SHIFT) +#define FEAT_NEON 0 +#define FEAT_NEON_NONE 1 + static struct omap_chip_id omap_chip; static unsigned int omap_revision; +struct omap_feature { + u8 avail; + u32 attrib; +}; + +static struct omap_feature feat_sgx; +static struct omap_feature feat_iva; +static struct omap_feature feat_l2cache; unsigned int omap_rev(void) { @@ -35,6 +73,24 @@ unsigned int omap_rev(void) } EXPORT_SYMBOL(omap_rev); +unsigned int omap3_has_sgx(void) +{ + return feat_sgx.avail; +} +EXPORT_SYMBOL(omap3_has_sgx); + +unsigned int omap3_has_iva(void) +{ + return feat_iva.avail; +} +EXPORT_SYMBOL(omap3_has_iva); + +unsigned int omap3_has_l2cache(void) +{ + return feat_l2cache.avail; +} +EXPORT_SYMBOL(omap3_has_l2cache); + /** * omap_chip_is - test whether currently running OMAP matches a chip type * @oc: omap_chip_t to test against @@ -155,12 +211,32 @@ void __init omap24xx_check_revision(void) pr_info("\n"); } -void __init omap34xx_check_revision(void) +void __init omap3_check_features(void) +{ + u32 status; + + status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS); + + /* Check for SGX */ + feat_sgx.attrib = ((status & OMAP3_SGX_MASK) >> OMAP3_SGX_SHIFT) ; + feat_sgx.avail = (feat_sgx.attrib == FEAT_SGX_NONE) ? 0 : 1 ; + + /* Check for IVA */ + feat_iva.attrib = ((status & OMAP3_IVA_MASK) >> OMAP3_IVA_SHIFT) ; + feat_iva.avail = (feat_iva.attrib == FEAT_IVA_NONE) ? 0 : 1 ; + + /* Check for L2 Cache */ + feat_l2cache.attrib = ((status & OMAP3_L2CACHE_MASK) >> \ + OMAP3_L2CACHE_SHIFT) ; + feat_l2cache.avail = (feat_l2cache.attrib == FEAT_L2CACHE_0KB) ? 0 : 1 ; +} + +void __init omap3_check_revision(void) { u32 cpuid, idcode; u16 hawkeye; u8 rev; - char *rev_name = "ES1.0"; + char cpu_name[16]= "", rev_name[16] = "", feat_name[32] = ""; /* * We cannot access revision registers on ES1.0. @@ -187,29 +263,50 @@ void __init omap34xx_check_revision(void) switch (rev) { case 0: omap_revision = OMAP3430_REV_ES2_0; - rev_name = "ES2.0"; + strcat (rev_name, "ES2.0"); break; case 2: omap_revision = OMAP3430_REV_ES2_1; - rev_name = "ES2.1"; + strcat (rev_name, "ES2.1"); break; case 3: omap_revision = OMAP3430_REV_ES3_0; - rev_name = "ES3.0"; + strcat (rev_name, "ES3.0"); break; case 4: omap_revision = OMAP3430_REV_ES3_1; - rev_name = "ES3.1"; + strcat (rev_name, "ES3.1"); break; default: /* Use the latest known revision as default */ omap_revision = OMAP3430_REV_ES3_1; - rev_name = "Unknown revision\n"; + strcat (rev_name, "Unknown revision"); + } + } + else if (hawkeye == 0xb868) { + if (omap3_has_sgx()) { + omap_revision = OMAP35XX_REV(0x17, 0x0); + } + else { + omap_revision = OMAP35XX_REV(0x05, 0x0); } } out: - pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name); + if (omap3_has_iva() && omap3_has_sgx()) { + strcat(cpu_name, "3430/3530"); + } + else if (omap3_has_sgx()) { + strcat(cpu_name, "3525"); + } + else if (omap3_has_iva()) { + strcat(cpu_name, "3515"); + } + else { + strcat(cpu_name, "3505"); + } + + pr_info("OMAP%s %s\n", cpu_name, rev_name); } /* @@ -223,8 +320,10 @@ void __init omap2_check_revision(void) */ if (cpu_is_omap24xx()) omap24xx_check_revision(); - else if (cpu_is_omap34xx()) - omap34xx_check_revision(); + else if (cpu_is_omap34xx()) { + omap3_check_features(); + omap3_check_revision(); + } else if (cpu_is_omap44xx()) { printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n"); return; diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h index 285eaa3..e9d6bc2 100644 --- a/arch/arm/plat-omap/include/mach/cpu.h +++ b/arch/arm/plat-omap/include/mach/cpu.h @@ -363,6 +363,23 @@ IS_OMAP_TYPE(3430, 0x3430) #if defined(CONFIG_ARCH_OMAP34XX) # undef cpu_is_omap3430 # define cpu_is_omap3430() is_omap3430() + +# undef cpu_is_omap3503 +# undef cpu_is_omap3515 +# undef cpu_is_omap3525 +# undef cpu_is_omap3530 + +# undef cpu_is_omap3505 +# undef cpu_is_omap3517 + +# define cpu_is_omap3503() (!omap3_has_iva() && !omap3_has_sgx()) +# define cpu_is_omap3515() (!omap3_has_iva() && !omap3_has_sgx()) +# define cpu_is_omap3525() (!omap3_has_iva() && !omap3_has_sgx()) +# define cpu_is_omap3530() (omap3_has_iva() && omap3_has_sgx()) +/* How to make these different from the ones above */ +# define cpu_is_omap3505() (!omap3_has_iva() && !omap3_has_sgx()) +# define cpu_is_omap3517() (!omap3_has_iva() && omap3_has_sgx()) + #endif # if defined(CONFIG_ARCH_OMAP4) @@ -396,6 +413,12 @@ IS_OMAP_TYPE(3430, 0x3430) #define OMAP3430_REV_ES3_0 0x34303034 #define OMAP3430_REV_ES3_1 0x34304034 + +#define OMAP35XX_CLASS 0x35000035 + + +#define OMAP35XX_REV(type,rev) (OMAP35XX_CLASS & (type << 16) & (rev << 12)) + #define OMAP443X_CLASS 0x44300034 /* ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x 2009-08-10 15:10 ` Premi, Sanjeev @ 2009-08-11 8:02 ` Tony Lindgren 2009-08-11 11:52 ` Premi, Sanjeev 0 siblings, 1 reply; 12+ messages in thread From: Tony Lindgren @ 2009-08-11 8:02 UTC (permalink / raw) To: Premi, Sanjeev; +Cc: Kevin Hilman, linux-omap@vger.kernel.org Hi, * Premi, Sanjeev <premi@ti.com> [090810 20:15]: > > > > -----Original Message----- > > From: Tony Lindgren [mailto:tony@atomide.com] > > Sent: Friday, August 07, 2009 1:53 PM > > To: Kevin Hilman > > Cc: Premi, Sanjeev; linux-omap@vger.kernel.org > > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > > > <snip>--<snip> > > > > > > > Adding conditionals like > > > > > > if (omap3_has_iva2()) > > > ... > > > > > > and > > > > > > if (omap3_has_sgx()) > > > ... > > > > > > rather than having a long list of cpu_is checks that have > > to be changed > > > each time a new SoC comes out. > > > > Agreed. > > > > Tony > > > > > > Tony, Kevin, > > Here is a work in progress patch implementing the conditionals. > > I am looking for your suggestions on these: > 1) The detection of ES2.0 is different between OMAP3530 and OMAP3430. > For 3430 ES2.0, (idcode >> 28) == 0x0 > For 3530 ES2.0, (idcode >> 28) == 0x1 > > What can be easy way to make this distinction? Hmm, looks like in switch (rev) case 1 is not used, so I guess you can use that? Hmm, might be worth checking if the 3530 ES2.0 is really based on the 3430 ES2.1 core though.. > 2) How do we handle the power domain differences between OMAP34x > and the new OMAP3517 and OMAP05 devices. The hawkeye is different, > but, would it make sense to omap_revision to be like: > 0x34050034, 0x34170034 - when we reuse the 34xx class. Can't you use the bits documented in cpu.h: /* * omap_rev bits: * CPU id bits (0730, 1510, 1710, 2422...) [31:16] * CPU revision (See _REV_ defined in cpu.h) [15:08] * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00] */ unsigned int omap_rev(void); Basically 0x3505??34, 0x3517??34 and so on? The cpu_is_omap34xx() is omap_rev() & 0xff. > 3) Currently, the macros like OMAP3430_REV_ES1_0 are defined to > be whole numbers. I am trying to change them to something like: > > #define OMAP34XX_REV(type,rev) (OMAP34XX_CLASS & (type << 16) & (rev << 12)) > > And use as (if needed): > > #define OMAP3430_REV_ES3_1 OMAP34XX_REV(0x30, 0x4) > > #define OMAP3403_REV_ES3_1 OMAP34XX_REV(0x03, 0x4) > > What is your view? > > In fact, wouldn't it be better if we tested for si rev independent > from si type? Well cpu_is_omap34xx() should be enough in most places, but I guess here you'd want to test for the exact revision, and just define: #define OMAP3505_REV_ES?_? 0x3505??34 > 4) These macros are, possibly, duplicating the data in omap_revision: > > #define CHIP_IS_OMAP3430ES3_0 (1 << 5) > #define CHIP_IS_OMAP3430ES3_1 (1 << 6) > > But, might be used for faster checking. Is this duplication necessary? These are currently needed for the clock framework, eventually we should unify them.. > 5) Assuming that we are able to maintain current, macros, would this > help in reducing the duplication? > > struct omap_id { > u16 id; /* e.g. 0x3430, 0x3517, ... */ > u8 class; /* 34x */ > u8 subclass; /* 0x30, 0x03, 0x05, 0x15, 0x17 ... */ > u8 rev; /* 0x10 (for ES 1.0), 0x21 (for ES2.1) etc. */ > /* use nibble as decimal separator */ > } Yeah we could do something like that as a separate patch eventually. Few more comments inlined below. > > I have tried many approaches, before sending this mail, > so there might be few duplications in the code below. > The cpu_is_35xx() macros are also incomplete for now. > > Best regards, > Sanjeev > > diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > index a98201c..f17d4db 100644 > --- a/arch/arm/mach-omap2/id.c > +++ b/arch/arm/mach-omap2/id.c > @@ -25,9 +25,47 @@ > #include <mach/control.h> > #include <mach/cpu.h> > > +#define OMAP3_CONTROL_OMAP_STATUS 0x044c > + > +#define OMAP3_SGX_SHIFT 13 > +#define OMAP3_SGX_MASK (3 << OMAP3_SGX_SHIFT) > +#define FEAT_SGX_FULL 0 > +#define FEAT_SGX_HALF 1 > +#define FEAT_SGX_NONE 2 > + > +#define OMAP3_IVA_SHIFT 12 > +#define OMAP3_IVA_MASK (1 << OMAP3_SGX_SHIFT) > +#define FEAT_IVA 0 > +#define FEAT_IVA_NONE 1 > + > +#define OMAP3_L2CACHE_SHIFT 10 > +#define OMAP3_L2CACHE_MASK (3 << OMAP3_L2CACHE_SHIFT) > +#define FEAT_L2CACHE_0KB 0 > +#define FEAT_L2CACHE_64KB 1 > +#define FEAT_L2CACHE_128KB 2 > +#define FEAT_L2CACHE_256KB 3 > + > +#define OMAP3_ISP_SHIFT 5 > +#define OMAP3_ISP_MASK (1<< OMAP3_ISP_SHIFT) > +#define FEAT_ISP 0 > +#define FEAT_ISP_NONE 1 > + > +#define OMAP3_NEON_SHIFT 4 > +#define OMAP3_NEON_MASK (1<< OMAP3_NEON_SHIFT) > +#define FEAT_NEON 0 > +#define FEAT_NEON_NONE 1 > + > static struct omap_chip_id omap_chip; > static unsigned int omap_revision; > > +struct omap_feature { > + u8 avail; > + u32 attrib; > +}; > + > +static struct omap_feature feat_sgx; > +static struct omap_feature feat_iva; > +static struct omap_feature feat_l2cache; We should probably just have static u32 omap_feat that is a bitmask for the various features. Then that could be moved to live in struct omap_id eventually. > unsigned int omap_rev(void) > { > @@ -35,6 +73,24 @@ unsigned int omap_rev(void) > } > EXPORT_SYMBOL(omap_rev); > > +unsigned int omap3_has_sgx(void) > +{ > + return feat_sgx.avail; > +} > +EXPORT_SYMBOL(omap3_has_sgx); > + > +unsigned int omap3_has_iva(void) > +{ > + return feat_iva.avail; > +} > +EXPORT_SYMBOL(omap3_has_iva); > + > +unsigned int omap3_has_l2cache(void) > +{ > + return feat_l2cache.avail; > +} > +EXPORT_SYMBOL(omap3_has_l2cache); And then these become something like return omap_feat & OMAP_HAS_IVA2. You should make the feature checking a separate patch, then the second patch becomes simple for adding support for detecting 34xx properly. Regards, Tony > + > /** > * omap_chip_is - test whether currently running OMAP matches a chip type > * @oc: omap_chip_t to test against > @@ -155,12 +211,32 @@ void __init omap24xx_check_revision(void) > pr_info("\n"); > } > > -void __init omap34xx_check_revision(void) > +void __init omap3_check_features(void) > +{ > + u32 status; > + > + status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS); > + > + /* Check for SGX */ > + feat_sgx.attrib = ((status & OMAP3_SGX_MASK) >> OMAP3_SGX_SHIFT) ; > + feat_sgx.avail = (feat_sgx.attrib == FEAT_SGX_NONE) ? 0 : 1 ; > + > + /* Check for IVA */ > + feat_iva.attrib = ((status & OMAP3_IVA_MASK) >> OMAP3_IVA_SHIFT) ; > + feat_iva.avail = (feat_iva.attrib == FEAT_IVA_NONE) ? 0 : 1 ; > + > + /* Check for L2 Cache */ > + feat_l2cache.attrib = ((status & OMAP3_L2CACHE_MASK) >> \ > + OMAP3_L2CACHE_SHIFT) ; > + feat_l2cache.avail = (feat_l2cache.attrib == FEAT_L2CACHE_0KB) ? 0 : 1 ; > +} > + > +void __init omap3_check_revision(void) > { > u32 cpuid, idcode; > u16 hawkeye; > u8 rev; > - char *rev_name = "ES1.0"; > + char cpu_name[16]= "", rev_name[16] = "", feat_name[32] = ""; > > /* > * We cannot access revision registers on ES1.0. > @@ -187,29 +263,50 @@ void __init omap34xx_check_revision(void) > switch (rev) { > case 0: > omap_revision = OMAP3430_REV_ES2_0; > - rev_name = "ES2.0"; > + strcat (rev_name, "ES2.0"); > break; > case 2: > omap_revision = OMAP3430_REV_ES2_1; > - rev_name = "ES2.1"; > + strcat (rev_name, "ES2.1"); > break; > case 3: > omap_revision = OMAP3430_REV_ES3_0; > - rev_name = "ES3.0"; > + strcat (rev_name, "ES3.0"); > break; > case 4: > omap_revision = OMAP3430_REV_ES3_1; > - rev_name = "ES3.1"; > + strcat (rev_name, "ES3.1"); > break; > default: > /* Use the latest known revision as default */ > omap_revision = OMAP3430_REV_ES3_1; > - rev_name = "Unknown revision\n"; > + strcat (rev_name, "Unknown revision"); > + } > + } > + else if (hawkeye == 0xb868) { > + if (omap3_has_sgx()) { > + omap_revision = OMAP35XX_REV(0x17, 0x0); > + } > + else { > + omap_revision = OMAP35XX_REV(0x05, 0x0); > } > } > > out: > - pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name); > + if (omap3_has_iva() && omap3_has_sgx()) { > + strcat(cpu_name, "3430/3530"); > + } > + else if (omap3_has_sgx()) { > + strcat(cpu_name, "3525"); > + } > + else if (omap3_has_iva()) { > + strcat(cpu_name, "3515"); > + } > + else { > + strcat(cpu_name, "3505"); > + } > + > + pr_info("OMAP%s %s\n", cpu_name, rev_name); > } > > /* > @@ -223,8 +320,10 @@ void __init omap2_check_revision(void) > */ > if (cpu_is_omap24xx()) > omap24xx_check_revision(); > - else if (cpu_is_omap34xx()) > - omap34xx_check_revision(); > + else if (cpu_is_omap34xx()) { > + omap3_check_features(); > + omap3_check_revision(); > + } > else if (cpu_is_omap44xx()) { > printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n"); > return; > diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h > index 285eaa3..e9d6bc2 100644 > --- a/arch/arm/plat-omap/include/mach/cpu.h > +++ b/arch/arm/plat-omap/include/mach/cpu.h > @@ -363,6 +363,23 @@ IS_OMAP_TYPE(3430, 0x3430) > #if defined(CONFIG_ARCH_OMAP34XX) > # undef cpu_is_omap3430 > # define cpu_is_omap3430() is_omap3430() > + > +# undef cpu_is_omap3503 > +# undef cpu_is_omap3515 > +# undef cpu_is_omap3525 > +# undef cpu_is_omap3530 > + > +# undef cpu_is_omap3505 > +# undef cpu_is_omap3517 > + > +# define cpu_is_omap3503() (!omap3_has_iva() && !omap3_has_sgx()) > +# define cpu_is_omap3515() (!omap3_has_iva() && !omap3_has_sgx()) > +# define cpu_is_omap3525() (!omap3_has_iva() && !omap3_has_sgx()) > +# define cpu_is_omap3530() (omap3_has_iva() && omap3_has_sgx()) > +/* How to make these different from the ones above */ > +# define cpu_is_omap3505() (!omap3_has_iva() && !omap3_has_sgx()) > +# define cpu_is_omap3517() (!omap3_has_iva() && omap3_has_sgx()) > + > #endif > > # if defined(CONFIG_ARCH_OMAP4) > @@ -396,6 +413,12 @@ IS_OMAP_TYPE(3430, 0x3430) > #define OMAP3430_REV_ES3_0 0x34303034 > #define OMAP3430_REV_ES3_1 0x34304034 > > + > +#define OMAP35XX_CLASS 0x35000035 > + > + > +#define OMAP35XX_REV(type,rev) (OMAP35XX_CLASS & (type << 16) & (rev << 12)) > + > #define OMAP443X_CLASS 0x44300034 > > /* ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x 2009-08-11 8:02 ` Tony Lindgren @ 2009-08-11 11:52 ` Premi, Sanjeev 2009-08-11 17:09 ` Premi, Sanjeev 0 siblings, 1 reply; 12+ messages in thread From: Premi, Sanjeev @ 2009-08-11 11:52 UTC (permalink / raw) To: Tony Lindgren; +Cc: Kevin Hilman, linux-omap@vger.kernel.org > -----Original Message----- > From: Tony Lindgren [mailto:tony@atomide.com] > Sent: Tuesday, August 11, 2009 1:33 PM > To: Premi, Sanjeev > Cc: Kevin Hilman; linux-omap@vger.kernel.org > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > Hi, > > * Premi, Sanjeev <premi@ti.com> [090810 20:15]: > > > > > > > -----Original Message----- > > > From: Tony Lindgren [mailto:tony@atomide.com] > > > Sent: Friday, August 07, 2009 1:53 PM > > > To: Kevin Hilman > > > Cc: Premi, Sanjeev; linux-omap@vger.kernel.org > > > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > > > > > > <snip>--<snip> > > > > > > > > > > Adding conditionals like > > > > > > > > if (omap3_has_iva2()) > > > > ... > > > > > > > > and > > > > > > > > if (omap3_has_sgx()) > > > > ... > > > > > > > > rather than having a long list of cpu_is checks that have > > > to be changed > > > > each time a new SoC comes out. > > > > > > Agreed. > > > > > > Tony > > > > > > > > > > Tony, Kevin, > > > > Here is a work in progress patch implementing the conditionals. > > > > I am looking for your suggestions on these: > > 1) The detection of ES2.0 is different between OMAP3530 and > OMAP3430. > > For 3430 ES2.0, (idcode >> 28) == 0x0 > > For 3530 ES2.0, (idcode >> 28) == 0x1 > > > > What can be easy way to make this distinction? > > Hmm, looks like in switch (rev) case 1 is not used, so I guess you > can use that? Hmm, might be worth checking if the 3530 ES2.0 is really > based on the 3430 ES2.1 core though.. > [sp] Yes, it is. > > > 2) How do we handle the power domain differences between OMAP34x > > and the new OMAP3517 and OMAP05 devices. The hawkeye is > different, > > but, would it make sense to omap_revision to be like: > > 0x34050034, 0x34170034 - when we reuse the 34xx class. > > Can't you use the bits documented in cpu.h: [sp] I was trying to use these bit only; but was trying to avoid multiple declarations for each silicon rev like this: #define OMAP3430_REV_ES1_0 0x34300034 #define OMAP3430_REV_ES2_0 0x34301034 #define OMAP3430_REV_ES2_1 0x34302034 #define OMAP3430_REV_ES3_0 0x34303034 #define OMAP3430_REV_ES3_1 0x34304034 In my earlier patches, I had tried using masks for the ES revision; but the current code uses these values in direct assignment. omap_revision = OMAP3430_REV_ES3_1; If we could use a mask for omap_revision bits, I believe we won't need to multiple definitions for each si revision for all the variants - 3505, 3517, and so on. > > /* > * omap_rev bits: > * CPU id bits (0730, 1510, 1710, 2422...) [31:16] > * CPU revision (See _REV_ defined in cpu.h) [15:08] > * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00] > */ > unsigned int omap_rev(void); > > Basically 0x3505??34, 0x3517??34 and so on? The cpu_is_omap34xx() is > omap_rev() & 0xff. > > > > 3) Currently, the macros like OMAP3430_REV_ES1_0 are defined to > > be whole numbers. I am trying to change them to something like: > > > > #define OMAP34XX_REV(type,rev) (OMAP34XX_CLASS & (type << > 16) & (rev << 12)) > > > > And use as (if needed): > > > > #define OMAP3430_REV_ES3_1 OMAP34XX_REV(0x30, 0x4) > > > > #define OMAP3403_REV_ES3_1 OMAP34XX_REV(0x03, 0x4) > > > > What is your view? > > > > In fact, wouldn't it be better if we tested for si rev > independent > > from si type? > > Well cpu_is_omap34xx() should be enough in most places, but I > guess here you'd > want to test for the exact revision, and just define: > #define OMAP3505_REV_ES?_? 0x3505??34 [sp] This is the multiplicity on definitions I am trying to avoid as same revision will be valid across OMAP3505 and OMAP3517 in this case. Holds good even for 3503, 3515, 3525 and 3530. > > > > 4) These macros are, possibly, duplicating the data in > omap_revision: > > > > #define CHIP_IS_OMAP3430ES3_0 (1 << 5) > > #define CHIP_IS_OMAP3430ES3_1 (1 << 6) > > > > But, might be used for faster checking. Is this > duplication necessary? > > These are currently needed for the clock framework, > eventually we should > unify them.. > > > > 5) Assuming that we are able to maintain current, macros, would this > > help in reducing the duplication? > > > > struct omap_id { > > u16 id; /* e.g. 0x3430, 0x3517, ... */ > > u8 class; /* 34x */ > > u8 subclass; /* 0x30, 0x03, 0x05, 0x15, 0x17 ... */ > > u8 rev; /* 0x10 (for ES 1.0), 0x21 (for > ES2.1) etc. */ > > /* use nibble as decimal separator */ > > } > > Yeah we could do something like that as a separate patch eventually. > > Few more comments inlined below. > > > > > I have tried many approaches, before sending this mail, > > so there might be few duplications in the code below. > > The cpu_is_35xx() macros are also incomplete for now. > > > > Best regards, > > Sanjeev > > > > diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > > index a98201c..f17d4db 100644 > > --- a/arch/arm/mach-omap2/id.c > > +++ b/arch/arm/mach-omap2/id.c > > @@ -25,9 +25,47 @@ > > #include <mach/control.h> > > #include <mach/cpu.h> > > > > +#define OMAP3_CONTROL_OMAP_STATUS 0x044c > > + > > +#define OMAP3_SGX_SHIFT 13 > > +#define OMAP3_SGX_MASK (3 << OMAP3_SGX_SHIFT) > > +#define FEAT_SGX_FULL 0 > > +#define FEAT_SGX_HALF 1 > > +#define FEAT_SGX_NONE 2 > > + > > +#define OMAP3_IVA_SHIFT 12 > > +#define OMAP3_IVA_MASK (1 << OMAP3_SGX_SHIFT) > > +#define FEAT_IVA 0 > > +#define FEAT_IVA_NONE 1 > > + > > +#define OMAP3_L2CACHE_SHIFT 10 > > +#define OMAP3_L2CACHE_MASK (3 << OMAP3_L2CACHE_SHIFT) > > +#define FEAT_L2CACHE_0KB 0 > > +#define FEAT_L2CACHE_64KB 1 > > +#define FEAT_L2CACHE_128KB 2 > > +#define FEAT_L2CACHE_256KB 3 > > + > > +#define OMAP3_ISP_SHIFT 5 > > +#define OMAP3_ISP_MASK (1<< OMAP3_ISP_SHIFT) > > +#define FEAT_ISP 0 > > +#define FEAT_ISP_NONE 1 > > + > > +#define OMAP3_NEON_SHIFT 4 > > +#define OMAP3_NEON_MASK (1<< OMAP3_NEON_SHIFT) > > +#define FEAT_NEON 0 > > +#define FEAT_NEON_NONE 1 > > + > > static struct omap_chip_id omap_chip; > > static unsigned int omap_revision; > > > > +struct omap_feature { > > + u8 avail; > > + u32 attrib; > > +}; > > + > > +static struct omap_feature feat_sgx; > > +static struct omap_feature feat_iva; > > +static struct omap_feature feat_l2cache; > > We should probably just have static u32 omap_feat that is a bitmask > for the various features. > > Then that could be moved to live in struct omap_id eventually. > > > > unsigned int omap_rev(void) > > { > > @@ -35,6 +73,24 @@ unsigned int omap_rev(void) > > } > > EXPORT_SYMBOL(omap_rev); > > > > +unsigned int omap3_has_sgx(void) > > +{ > > + return feat_sgx.avail; > > +} > > +EXPORT_SYMBOL(omap3_has_sgx); > > + > > +unsigned int omap3_has_iva(void) > > +{ > > + return feat_iva.avail; > > +} > > +EXPORT_SYMBOL(omap3_has_iva); > > + > > +unsigned int omap3_has_l2cache(void) > > +{ > > + return feat_l2cache.avail; > > +} > > +EXPORT_SYMBOL(omap3_has_l2cache); > > And then these become something like return omap_feat & OMAP_HAS_IVA2. > [sp] I will try to get an patch just for feature testing for review by today evening. Based on the comments, I will make formal submission tomorrow. Best regards, Sanjeev > You should make the feature checking a separate patch, then the second > patch becomes simple for adding support for detecting 34xx properly. > > Regards, > > Tony > > > > + > > /** > > * omap_chip_is - test whether currently running OMAP > matches a chip type > > * @oc: omap_chip_t to test against > > @@ -155,12 +211,32 @@ void __init omap24xx_check_revision(void) > > pr_info("\n"); > > } > > > > -void __init omap34xx_check_revision(void) > > +void __init omap3_check_features(void) > > +{ > > + u32 status; > > + > > + status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS); > > + > > + /* Check for SGX */ > > + feat_sgx.attrib = ((status & OMAP3_SGX_MASK) >> > OMAP3_SGX_SHIFT) ; > > + feat_sgx.avail = (feat_sgx.attrib == FEAT_SGX_NONE) ? 0 : 1 ; > > + > > + /* Check for IVA */ > > + feat_iva.attrib = ((status & OMAP3_IVA_MASK) >> > OMAP3_IVA_SHIFT) ; > > + feat_iva.avail = (feat_iva.attrib == FEAT_IVA_NONE) ? 0 : 1 ; > > + > > + /* Check for L2 Cache */ > > + feat_l2cache.attrib = ((status & OMAP3_L2CACHE_MASK) >> \ > > + OMAP3_L2CACHE_SHIFT) ; > > + feat_l2cache.avail = (feat_l2cache.attrib == > FEAT_L2CACHE_0KB) ? 0 : 1 ; > > +} > > + > > +void __init omap3_check_revision(void) > > { > > u32 cpuid, idcode; > > u16 hawkeye; > > u8 rev; > > - char *rev_name = "ES1.0"; > > + char cpu_name[16]= "", rev_name[16] = "", feat_name[32] = ""; > > > > /* > > * We cannot access revision registers on ES1.0. > > @@ -187,29 +263,50 @@ void __init omap34xx_check_revision(void) > > switch (rev) { > > case 0: > > omap_revision = OMAP3430_REV_ES2_0; > > - rev_name = "ES2.0"; > > + strcat (rev_name, "ES2.0"); > > break; > > case 2: > > omap_revision = OMAP3430_REV_ES2_1; > > - rev_name = "ES2.1"; > > + strcat (rev_name, "ES2.1"); > > break; > > case 3: > > omap_revision = OMAP3430_REV_ES3_0; > > - rev_name = "ES3.0"; > > + strcat (rev_name, "ES3.0"); > > break; > > case 4: > > omap_revision = OMAP3430_REV_ES3_1; > > - rev_name = "ES3.1"; > > + strcat (rev_name, "ES3.1"); > > break; > > default: > > /* Use the latest known revision as default */ > > omap_revision = OMAP3430_REV_ES3_1; > > - rev_name = "Unknown revision\n"; > > + strcat (rev_name, "Unknown revision"); > > + } > > + } > > + else if (hawkeye == 0xb868) { > > + if (omap3_has_sgx()) { > > + omap_revision = OMAP35XX_REV(0x17, 0x0); > > + } > > + else { > > + omap_revision = OMAP35XX_REV(0x05, 0x0); > > } > > } > > > > out: > > - pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name); > > + if (omap3_has_iva() && omap3_has_sgx()) { > > + strcat(cpu_name, "3430/3530"); > > + } > > + else if (omap3_has_sgx()) { > > + strcat(cpu_name, "3525"); > > + } > > + else if (omap3_has_iva()) { > > + strcat(cpu_name, "3515"); > > + } > > + else { > > + strcat(cpu_name, "3505"); > > + } > > + > > + pr_info("OMAP%s %s\n", cpu_name, rev_name); > > } > > > > /* > > @@ -223,8 +320,10 @@ void __init omap2_check_revision(void) > > */ > > if (cpu_is_omap24xx()) > > omap24xx_check_revision(); > > - else if (cpu_is_omap34xx()) > > - omap34xx_check_revision(); > > + else if (cpu_is_omap34xx()) { > > + omap3_check_features(); > > + omap3_check_revision(); > > + } > > else if (cpu_is_omap44xx()) { > > printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n"); > > return; > > diff --git a/arch/arm/plat-omap/include/mach/cpu.h > b/arch/arm/plat-omap/include/mach/cpu.h > > index 285eaa3..e9d6bc2 100644 > > --- a/arch/arm/plat-omap/include/mach/cpu.h > > +++ b/arch/arm/plat-omap/include/mach/cpu.h > > @@ -363,6 +363,23 @@ IS_OMAP_TYPE(3430, 0x3430) > > #if defined(CONFIG_ARCH_OMAP34XX) > > # undef cpu_is_omap3430 > > # define cpu_is_omap3430() is_omap3430() > > + > > +# undef cpu_is_omap3503 > > +# undef cpu_is_omap3515 > > +# undef cpu_is_omap3525 > > +# undef cpu_is_omap3530 > > + > > +# undef cpu_is_omap3505 > > +# undef cpu_is_omap3517 > > + > > +# define cpu_is_omap3503() (!omap3_has_iva() && > !omap3_has_sgx()) > > +# define cpu_is_omap3515() (!omap3_has_iva() && > !omap3_has_sgx()) > > +# define cpu_is_omap3525() (!omap3_has_iva() && > !omap3_has_sgx()) > > +# define cpu_is_omap3530() (omap3_has_iva() && > omap3_has_sgx()) > > +/* How to make these different from the ones above */ > > +# define cpu_is_omap3505() (!omap3_has_iva() && > !omap3_has_sgx()) > > +# define cpu_is_omap3517() (!omap3_has_iva() && > omap3_has_sgx()) > > + > > #endif > > > > # if defined(CONFIG_ARCH_OMAP4) > > @@ -396,6 +413,12 @@ IS_OMAP_TYPE(3430, 0x3430) > > #define OMAP3430_REV_ES3_0 0x34303034 > > #define OMAP3430_REV_ES3_1 0x34304034 > > > > + > > +#define OMAP35XX_CLASS 0x35000035 > > + > > + > > +#define OMAP35XX_REV(type,rev) (OMAP35XX_CLASS & (type > << 16) & (rev << 12)) > > + > > #define OMAP443X_CLASS 0x44300034 > > > > /* > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x 2009-08-11 11:52 ` Premi, Sanjeev @ 2009-08-11 17:09 ` Premi, Sanjeev 0 siblings, 0 replies; 12+ messages in thread From: Premi, Sanjeev @ 2009-08-11 17:09 UTC (permalink / raw) To: Premi, Sanjeev, Tony Lindgren; +Cc: Kevin Hilman, linux-omap@vger.kernel.org > -----Original Message----- > From: linux-omap-owner@vger.kernel.org > [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Premi, Sanjeev > Sent: Tuesday, August 11, 2009 5:22 PM > To: Tony Lindgren > Cc: Kevin Hilman; linux-omap@vger.kernel.org > Subject: RE: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > > -----Original Message----- > > From: Tony Lindgren [mailto:tony@atomide.com] > > Sent: Tuesday, August 11, 2009 1:33 PM > > To: Premi, Sanjeev > > Cc: Kevin Hilman; linux-omap@vger.kernel.org > > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > > > Hi, > > > > * Premi, Sanjeev <premi@ti.com> [090810 20:15]: > > > > > > > > > > -----Original Message----- > > > > From: Tony Lindgren [mailto:tony@atomide.com] > > > > Sent: Friday, August 07, 2009 1:53 PM > > > > To: Kevin Hilman > > > > Cc: Premi, Sanjeev; linux-omap@vger.kernel.org > > > > Subject: Re: [PATCH 3/6] OMAP3: Add runtime check for OMAP35x > > > > > > > > > > <snip>--<snip> > > > > > > > > > > > > > Adding conditionals like > > > > > > > > > > if (omap3_has_iva2()) > > > > > ... > > > > > > > > > > and > > > > > > > > > > if (omap3_has_sgx()) > > > > > ... > > > > > > > > > > rather than having a long list of cpu_is checks that have > > > > to be changed > > > > > each time a new SoC comes out. > > > > > > > > Agreed. > > > > > > > > Tony > > > > > > > > > > > > > > Tony, Kevin, > > > > > > Here is a work in progress patch implementing the conditionals. > > > > > > I am looking for your suggestions on these: > > > 1) The detection of ES2.0 is different between OMAP3530 and > > OMAP3430. > > > For 3430 ES2.0, (idcode >> 28) == 0x0 > > > For 3530 ES2.0, (idcode >> 28) == 0x1 > > > > > > What can be easy way to make this distinction? > > > > Hmm, looks like in switch (rev) case 1 is not used, so I guess you > > can use that? Hmm, might be worth checking if the 3530 > ES2.0 is really > > based on the 3430 ES2.1 core though.. > > > [sp] Yes, it is. > > > > > > 2) How do we handle the power domain differences between OMAP34x > > > and the new OMAP3517 and OMAP05 devices. The hawkeye is > > different, > > > but, would it make sense to omap_revision to be like: > > > 0x34050034, 0x34170034 - when we reuse the 34xx class. > > > > Can't you use the bits documented in cpu.h: > > [sp] I was trying to use these bit only; but was trying to avoid > multiple declarations for each silicon rev like this: > #define OMAP3430_REV_ES1_0 0x34300034 > #define OMAP3430_REV_ES2_0 0x34301034 > #define OMAP3430_REV_ES2_1 0x34302034 > #define OMAP3430_REV_ES3_0 0x34303034 > #define OMAP3430_REV_ES3_1 0x34304034 > > In my earlier patches, I had tried using masks for the > ES revision; > but the current code uses these values in direct assignment. > > omap_revision = OMAP3430_REV_ES3_1; > > If we could use a mask for omap_revision bits, I believe > we won't need to multiple definitions for each si revision > for all the variants - 3505, 3517, and so on. > > > > /* > > * omap_rev bits: > > * CPU id bits (0730, 1510, 1710, 2422...) [31:16] > > * CPU revision (See _REV_ defined in cpu.h) [15:08] > > * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00] > > */ > > unsigned int omap_rev(void); > > > > Basically 0x3505??34, 0x3517??34 and so on? The > cpu_is_omap34xx() is > > omap_rev() & 0xff. > > > > > > > 3) Currently, the macros like OMAP3430_REV_ES1_0 are defined to > > > be whole numbers. I am trying to change them to something like: > > > > > > #define OMAP34XX_REV(type,rev) (OMAP34XX_CLASS & (type << > > 16) & (rev << 12)) > > > > > > And use as (if needed): > > > > > > #define OMAP3430_REV_ES3_1 OMAP34XX_REV(0x30, 0x4) > > > > > > #define OMAP3403_REV_ES3_1 OMAP34XX_REV(0x03, 0x4) > > > > > > What is your view? > > > > > > In fact, wouldn't it be better if we tested for si rev > > independent > > > from si type? > > > > Well cpu_is_omap34xx() should be enough in most places, but I > > guess here you'd > > want to test for the exact revision, and just define: > > #define OMAP3505_REV_ES?_? 0x3505??34 > > [sp] This is the multiplicity on definitions I am trying to avoid > as same revision will be valid across OMAP3505 and OMAP3517 > in this case. Holds good even for 3503, 3515, 3525 and 3530. > > > > > > > > 4) These macros are, possibly, duplicating the data in > > omap_revision: > > > > > > #define CHIP_IS_OMAP3430ES3_0 (1 << 5) > > > #define CHIP_IS_OMAP3430ES3_1 (1 << 6) > > > > > > But, might be used for faster checking. Is this > > duplication necessary? > > > > These are currently needed for the clock framework, > > eventually we should > > unify them.. > > > > > > > 5) Assuming that we are able to maintain current, macros, > would this > > > help in reducing the duplication? > > > > > > struct omap_id { > > > u16 id; /* e.g. 0x3430, 0x3517, ... */ > > > u8 class; /* 34x */ > > > u8 subclass; /* 0x30, 0x03, 0x05, 0x15, 0x17 ... */ > > > u8 rev; /* 0x10 (for ES 1.0), 0x21 (for > > ES2.1) etc. */ > > > /* use nibble as decimal separator */ > > > } > > > > Yeah we could do something like that as a separate patch eventually. > > > > Few more comments inlined below. > > > > > > > > I have tried many approaches, before sending this mail, > > > so there might be few duplications in the code below. > > > The cpu_is_35xx() macros are also incomplete for now. > > > > > > Best regards, > > > Sanjeev > > > > > > diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > > > index a98201c..f17d4db 100644 > > > --- a/arch/arm/mach-omap2/id.c > > > +++ b/arch/arm/mach-omap2/id.c > > > @@ -25,9 +25,47 @@ > > > #include <mach/control.h> > > > #include <mach/cpu.h> > > > > > > +#define OMAP3_CONTROL_OMAP_STATUS 0x044c > > > + > > > +#define OMAP3_SGX_SHIFT 13 > > > +#define OMAP3_SGX_MASK (3 << OMAP3_SGX_SHIFT) > > > +#define FEAT_SGX_FULL 0 > > > +#define FEAT_SGX_HALF 1 > > > +#define FEAT_SGX_NONE 2 > > > + > > > +#define OMAP3_IVA_SHIFT 12 > > > +#define OMAP3_IVA_MASK (1 << OMAP3_SGX_SHIFT) > > > +#define FEAT_IVA 0 > > > +#define FEAT_IVA_NONE 1 > > > + > > > +#define OMAP3_L2CACHE_SHIFT 10 > > > +#define OMAP3_L2CACHE_MASK (3 << > OMAP3_L2CACHE_SHIFT) > > > +#define FEAT_L2CACHE_0KB 0 > > > +#define FEAT_L2CACHE_64KB 1 > > > +#define FEAT_L2CACHE_128KB 2 > > > +#define FEAT_L2CACHE_256KB 3 > > > + > > > +#define OMAP3_ISP_SHIFT 5 > > > +#define OMAP3_ISP_MASK (1<< OMAP3_ISP_SHIFT) > > > +#define FEAT_ISP 0 > > > +#define FEAT_ISP_NONE 1 > > > + > > > +#define OMAP3_NEON_SHIFT 4 > > > +#define OMAP3_NEON_MASK (1<< OMAP3_NEON_SHIFT) > > > +#define FEAT_NEON 0 > > > +#define FEAT_NEON_NONE 1 > > > + > > > static struct omap_chip_id omap_chip; > > > static unsigned int omap_revision; > > > > > > +struct omap_feature { > > > + u8 avail; > > > + u32 attrib; > > > +}; > > > + > > > +static struct omap_feature feat_sgx; > > > +static struct omap_feature feat_iva; > > > +static struct omap_feature feat_l2cache; > > > > We should probably just have static u32 omap_feat that is a bitmask > > for the various features. > > > > Then that could be moved to live in struct omap_id eventually. > > > > > > > unsigned int omap_rev(void) > > > { > > > @@ -35,6 +73,24 @@ unsigned int omap_rev(void) > > > } > > > EXPORT_SYMBOL(omap_rev); > > > > > > +unsigned int omap3_has_sgx(void) > > > +{ > > > + return feat_sgx.avail; > > > +} > > > +EXPORT_SYMBOL(omap3_has_sgx); > > > + > > > +unsigned int omap3_has_iva(void) > > > +{ > > > + return feat_iva.avail; > > > +} > > > +EXPORT_SYMBOL(omap3_has_iva); > > > + > > > +unsigned int omap3_has_l2cache(void) > > > +{ > > > + return feat_l2cache.avail; > > > +} > > > +EXPORT_SYMBOL(omap3_has_l2cache); > > > > And then these become something like return omap_feat & > OMAP_HAS_IVA2. > > > > [sp] I will try to get an patch just for feature testing for review by > today evening. Based on the comments, I will make formal > submission > tomorrow. > > Best regards, > Sanjeev > > > You should make the feature checking a separate patch, then > the second > > patch becomes simple for adding support for detecting 34xx properly. > > > > Regards, > > > > Tony > > > > Tony, Here are relevant sections from the feature patch for quick look: (it is not a clean patch but just to highlight changes) Best regard, Sanjeev diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index a98201c..907770d 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -25,9 +25,49 @@ #include <mach/control.h> #include <mach/cpu.h> +/* + * OMAP3 features + */ +#define OMAP3_CONTROL_OMAP_STATUS 0x044c + +#define OMAP3_SGX_SHIFT 13 +#define OMAP3_SGX_MASK (3 << OMAP3_SGX_SHIFT) +#define FEAT_SGX_FULL 0 +#define FEAT_SGX_HALF 1 +#define FEAT_SGX_NONE 2 + +#define OMAP3_IVA_SHIFT 12 +#define OMAP3_IVA_MASK (1 << OMAP3_SGX_SHIFT) +#define FEAT_IVA 0 +#define FEAT_IVA_NONE 1 + +#define OMAP3_L2CACHE_SHIFT 10 +#define OMAP3_L2CACHE_MASK (3 << OMAP3_L2CACHE_SHIFT) +#define FEAT_L2CACHE_0KB 0 +#define FEAT_L2CACHE_64KB 1 +#define FEAT_L2CACHE_128KB 2 +#define FEAT_L2CACHE_256KB 3 + +#define OMAP3_ISP_SHIFT 5 +#define OMAP3_ISP_MASK (1<< OMAP3_ISP_SHIFT) +#define FEAT_ISP 0 +#define FEAT_ISP_NONE 1 + +#define OMAP3_NEON_SHIFT 4 +#define OMAP3_NEON_MASK (1<< OMAP3_NEON_SHIFT) +#define FEAT_NEON 0 +#define FEAT_NEON_NONE 1 + + +#define OMAP_HAS_L2CACHE 1 +#define OMAP_HAS_IVA (1 << 1) +#define OMAP_HAS_SGX (1 << 2) +#define OMAP_HAS_NEON (1 << 3) +#define OMAP_HAS_ISP (1 << 4) + static struct omap_chip_id omap_chip; static unsigned int omap_revision; - +static u32 omap_features ; unsigned int omap_rev(void) { @@ -35,6 +75,37 @@ unsigned int omap_rev(void) } EXPORT_SYMBOL(omap_rev); +unsigned int omap3_has_l2cache(void) +{ + return (omap_features & OMAP_HAS_L2CACHE); +} +EXPORT_SYMBOL(omap3_has_l2cache); + +unsigned int omap3_has_sgx(void) +{ + return (omap_features & OMAP_HAS_SGX); +} +EXPORT_SYMBOL(omap3_has_sgx); + +unsigned int omap3_has_iva(void) +{ + return (omap_features & OMAP_HAS_IVA); +} +EXPORT_SYMBOL(omap3_has_iva); + +unsigned int omap3_has_neon(void) +{ + return (omap_features & OMAP_HAS_NEON); +} +EXPORT_SYMBOL(omap3_has_neon); + +unsigned int omap3_has_isp(void) +{ + return (omap_features & OMAP_HAS_ISP); +} +EXPORT_SYMBOL(omap3_has_isp); + + /** * omap_chip_is - test whether currently running OMAP matches a chip type * @oc: omap_chip_t to test against ..... And later on.... +void __init omap3_check_features(void) +{ + u32 status, temp; + + omap_features = 0; + + status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS); + + /* TBD: Make these checks as macro as SHOW_FEATURE below */ + + /* Check for L2 Cache */ + temp = ((status & OMAP3_L2CACHE_MASK) >> OMAP3_L2CACHE_SHIFT) ; + if (temp != FEAT_L2CACHE_0KB) + omap_features |= OMAP_HAS_L2CACHE; + + temp = ((status & OMAP3_IVA_MASK) >> OMAP3_IVA_SHIFT) ; + if (temp != FEAT_IVA_NONE) + omap_features |= OMAP_HAS_IVA; + + temp = ((status & OMAP3_SGX_MASK) >> OMAP3_SGX_SHIFT) ; + if (temp != FEAT_SGX_NONE) { + omap_features |= OMAP_HAS_SGX; + + temp = ((status & OMAP3_NEON_MASK) >> OMAP3_NEON_SHIFT) ; + if (temp != FEAT_NEON_NONE) { + omap_features |= OMAP_HAS_NEON; + + temp = ((status & OMAP3_ISP_MASK) >> OMAP3_ISP_SHIFT) ; + if (temp != FEAT_ISP_NONE) + omap_features |= OMAP_HAS_NEON; +} + +/* In few cases, the identification of the silicon depends upon the + * features available. So, omap3_check_features() will need to be + * called before omap3_check_revision(). + * + * If the information on the silicon, its revision and features are + * printed in the current flow, the features will be printed before + * the Si id. Ideally, it should be other way around. + * + * This function has been created only to get the prints in right order. + * Additional info eg. Size of l2cache etc can be added later as well. + * + * THIS COMMENT IS ONLY FOR EXPLANATION. WILL NOT BE ADDED IN ACTUAL PATCH + * + */ +#define SHOW_FEATURE(feat) \ + if (omap3_has_ ##feat()) { \ + pr_info (" - "#feat" : Y"); \ + } else { \ + pr_info (" - "#feat" : N"); \ + } + +void __init omap3_cpuinfo(void) +{ + pr_info("OMAP%x", (omap_revision >> 16)); + + SHOW_FEATURE(l2cache); + SHOW_FEATURE(iva); + SHOW_FEATURE(sgx); + SHOW_FEATURE(neon); + SHOW_FEATURE(isp); } ..... Further down.... @@ -223,8 +408,12 @@ void __init omap2_check_revision(void) */ if (cpu_is_omap24xx()) omap24xx_check_revision(); - else if (cpu_is_omap34xx()) - omap34xx_check_revision(); + else if (cpu_is_omap34xx()) { + omap3_check_features(); + omap3_check_revision(); + omap3_cpuinfo(); + } > > > + > > > /** > > > * omap_chip_is - test whether currently running OMAP > > matches a chip type > > > * @oc: omap_chip_t to test against > > > @@ -155,12 +211,32 @@ void __init omap24xx_check_revision(void) > > > pr_info("\n"); > > > } > > > > > > -void __init omap34xx_check_revision(void) > > > +void __init omap3_check_features(void) > > > +{ > > > + u32 status; > > > + > > > + status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS); > > > + > > > + /* Check for SGX */ > > > + feat_sgx.attrib = ((status & OMAP3_SGX_MASK) >> > > OMAP3_SGX_SHIFT) ; > > > + feat_sgx.avail = (feat_sgx.attrib == FEAT_SGX_NONE) ? 0 : 1 ; > > > + > > > + /* Check for IVA */ > > > + feat_iva.attrib = ((status & OMAP3_IVA_MASK) >> > > OMAP3_IVA_SHIFT) ; > > > + feat_iva.avail = (feat_iva.attrib == FEAT_IVA_NONE) ? 0 : 1 ; > > > + > > > + /* Check for L2 Cache */ > > > + feat_l2cache.attrib = ((status & OMAP3_L2CACHE_MASK) >> \ > > > + OMAP3_L2CACHE_SHIFT) ; > > > + feat_l2cache.avail = (feat_l2cache.attrib == > > FEAT_L2CACHE_0KB) ? 0 : 1 ; > > > +} > > > + > > > +void __init omap3_check_revision(void) > > > { > > > u32 cpuid, idcode; > > > u16 hawkeye; > > > u8 rev; > > > - char *rev_name = "ES1.0"; > > > + char cpu_name[16]= "", rev_name[16] = "", feat_name[32] = ""; > > > > > > /* > > > * We cannot access revision registers on ES1.0. > > > @@ -187,29 +263,50 @@ void __init omap34xx_check_revision(void) > > > switch (rev) { > > > case 0: > > > omap_revision = OMAP3430_REV_ES2_0; > > > - rev_name = "ES2.0"; > > > + strcat (rev_name, "ES2.0"); > > > break; > > > case 2: > > > omap_revision = OMAP3430_REV_ES2_1; > > > - rev_name = "ES2.1"; > > > + strcat (rev_name, "ES2.1"); > > > break; > > > case 3: > > > omap_revision = OMAP3430_REV_ES3_0; > > > - rev_name = "ES3.0"; > > > + strcat (rev_name, "ES3.0"); > > > break; > > > case 4: > > > omap_revision = OMAP3430_REV_ES3_1; > > > - rev_name = "ES3.1"; > > > + strcat (rev_name, "ES3.1"); > > > break; > > > default: > > > /* Use the latest known revision as default */ > > > omap_revision = OMAP3430_REV_ES3_1; > > > - rev_name = "Unknown revision\n"; > > > + strcat (rev_name, "Unknown revision"); > > > + } > > > + } > > > + else if (hawkeye == 0xb868) { > > > + if (omap3_has_sgx()) { > > > + omap_revision = OMAP35XX_REV(0x17, 0x0); > > > + } > > > + else { > > > + omap_revision = OMAP35XX_REV(0x05, 0x0); > > > } > > > } > > > > > > out: > > > - pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name); > > > + if (omap3_has_iva() && omap3_has_sgx()) { > > > + strcat(cpu_name, "3430/3530"); > > > + } > > > + else if (omap3_has_sgx()) { > > > + strcat(cpu_name, "3525"); > > > + } > > > + else if (omap3_has_iva()) { > > > + strcat(cpu_name, "3515"); > > > + } > > > + else { > > > + strcat(cpu_name, "3505"); > > > + } > > > + > > > + pr_info("OMAP%s %s\n", cpu_name, rev_name); > > > } > > > > > > /* > > > @@ -223,8 +320,10 @@ void __init omap2_check_revision(void) > > > */ > > > if (cpu_is_omap24xx()) > > > omap24xx_check_revision(); > > > - else if (cpu_is_omap34xx()) > > > - omap34xx_check_revision(); > > > + else if (cpu_is_omap34xx()) { > > > + omap3_check_features(); > > > + omap3_check_revision(); > > > + } > > > else if (cpu_is_omap44xx()) { > > > printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n"); > > > return; > > > diff --git a/arch/arm/plat-omap/include/mach/cpu.h > > b/arch/arm/plat-omap/include/mach/cpu.h > > > index 285eaa3..e9d6bc2 100644 > > > --- a/arch/arm/plat-omap/include/mach/cpu.h > > > +++ b/arch/arm/plat-omap/include/mach/cpu.h > > > @@ -363,6 +363,23 @@ IS_OMAP_TYPE(3430, 0x3430) > > > #if defined(CONFIG_ARCH_OMAP34XX) > > > # undef cpu_is_omap3430 > > > # define cpu_is_omap3430() is_omap3430() > > > + > > > +# undef cpu_is_omap3503 > > > +# undef cpu_is_omap3515 > > > +# undef cpu_is_omap3525 > > > +# undef cpu_is_omap3530 > > > + > > > +# undef cpu_is_omap3505 > > > +# undef cpu_is_omap3517 > > > + > > > +# define cpu_is_omap3503() (!omap3_has_iva() && > > !omap3_has_sgx()) > > > +# define cpu_is_omap3515() (!omap3_has_iva() && > > !omap3_has_sgx()) > > > +# define cpu_is_omap3525() (!omap3_has_iva() && > > !omap3_has_sgx()) > > > +# define cpu_is_omap3530() (omap3_has_iva() && > > omap3_has_sgx()) > > > +/* How to make these different from the ones above */ > > > +# define cpu_is_omap3505() (!omap3_has_iva() && > > !omap3_has_sgx()) > > > +# define cpu_is_omap3517() (!omap3_has_iva() && > > omap3_has_sgx()) > > > + > > > #endif > > > > > > # if defined(CONFIG_ARCH_OMAP4) > > > @@ -396,6 +413,12 @@ IS_OMAP_TYPE(3430, 0x3430) > > > #define OMAP3430_REV_ES3_0 0x34303034 > > > #define OMAP3430_REV_ES3_1 0x34304034 > > > > > > + > > > +#define OMAP35XX_CLASS 0x35000035 > > > + > > > + > > > +#define OMAP35XX_REV(type,rev) (OMAP35XX_CLASS & (type > > << 16) & (rev << 12)) > > > + > > > #define OMAP443X_CLASS 0x44300034 > > > > > > /* > > > > -- > To unsubscribe from this list: send the line "unsubscribe > linux-omap" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > > ^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2009-08-11 17:10 UTC | newest] Thread overview: 12+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2009-08-06 10:36 [PATCH 3/6] OMAP3: Add runtime check for OMAP35x Sanjeev Premi 2009-08-06 11:04 ` Tony Lindgren 2009-08-06 11:34 ` Premi, Sanjeev 2009-08-06 11:50 ` Tony Lindgren 2009-08-06 14:11 ` Premi, Sanjeev 2009-08-06 14:18 ` Tony Lindgren 2009-08-06 14:55 ` Kevin Hilman 2009-08-07 8:23 ` Tony Lindgren 2009-08-10 15:10 ` Premi, Sanjeev 2009-08-11 8:02 ` Tony Lindgren 2009-08-11 11:52 ` Premi, Sanjeev 2009-08-11 17:09 ` Premi, Sanjeev
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