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From: Kevin Hilman <khilman@deeprootsystems.com>
To: Rajendra Nayak <rnayak@ti.com>
Cc: linux-omap@vger.kernel.org
Subject: Re: [PATCH] OMAP3: PM: Fix the pwrdm_enable/disable_hdwr_sar funcs
Date: Fri, 05 Jun 2009 15:10:35 -0700	[thread overview]
Message-ID: <87hbyu72n8.fsf@deeprootsystems.com> (raw)
In-Reply-To: <1244206853-4426-1-git-send-email-rnayak@ti.com> (Rajendra Nayak's message of "Fri\,  5 Jun 2009 18\:30\:53 +0530")

Rajendra Nayak <rnayak@ti.com> writes:

> The pwrdm_enable_hdwr_sar/pwrdm_disable_hdwr_sar do not
> actually set/reset the SAVEANDRESTORE bit in the PWSTCTRL
> register but modify some other bit instead.
> This happens due to the OMAP3430ES2_SAVEANDRESTORE_SHIFT
> being defined as (1 << 4) instead of just 4.
>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>

Thanks, pushing to PM branch.

I'll wait to hear from Kalle if we can revert his previous patch
for this.

Kevin

> ---
>  arch/arm/mach-omap2/prm-regbits-34xx.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
> index 06fee29..d4ea370 100644
> --- a/arch/arm/mach-omap2/prm-regbits-34xx.h
> +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
> @@ -411,7 +411,7 @@
>  /* PM_PREPWSTST_CAM specific bits */
>  
>  /* PM_PWSTCTRL_USBHOST specific bits */
> -#define OMAP3430ES2_SAVEANDRESTORE_SHIFT		(1 << 4)
> +#define OMAP3430ES2_SAVEANDRESTORE_SHIFT		4
>  
>  /* RM_RSTST_PER specific bits */
>  
> -- 
> 1.5.4.7
>
> --
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  reply	other threads:[~2009-06-05 22:10 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-06-05 13:00 [PATCH] OMAP3: PM: Fix the pwrdm_enable/disable_hdwr_sar funcs Rajendra Nayak
2009-06-05 22:10 ` Kevin Hilman [this message]
2009-06-05 22:44   ` Paul Walmsley
2009-06-05 22:53     ` Kevin Hilman
2009-06-08  7:57       ` VS: " Jokiniemi Kalle

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