* [PATCH v3 01/11] OMAP: PM: Export the main pm debugfs directory
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
@ 2010-09-22 14:45 ` Thara Gopinath
2010-10-25 9:29 ` Cousson, Benoit
2010-09-22 14:45 ` [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath
` (10 subsequent siblings)
11 siblings, 1 reply; 56+ messages in thread
From: Thara Gopinath @ 2010-09-22 14:45 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
This patch makes generic pm_debug directory global
so that other drivers can include it and use it to create
sub-entries.
Signed-off-by: Thara Gopinath <thara@ti.com>
---
arch/arm/mach-omap2/pm-debug.c | 3 +++
arch/arm/mach-omap2/pm.h | 1 +
2 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index af00c17..390f1c6 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -42,6 +42,7 @@ u32 enable_off_mode;
u32 sleep_while_idle;
u32 wakeup_timer_seconds;
u32 wakeup_timer_milliseconds;
+struct dentry *pm_dbg_main_dir;
#define DUMP_PRM_MOD_REG(mod, reg) \
regs[reg_count].name = #mod "." #reg; \
@@ -641,6 +642,8 @@ static int __init pm_dbg_init(void)
(void) debugfs_create_file("wakeup_timer_milliseconds",
S_IRUGO | S_IWUGO, d, &wakeup_timer_milliseconds,
&pm_dbg_option_fops);
+
+ pm_dbg_main_dir = d;
pm_dbg_init_done = 1;
return 0;
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index f3ba1e6..c06cedd 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -55,6 +55,7 @@ extern int omap2_pm_debug;
#define omap2_pm_dump(mode, resume, us) do {} while (0);
#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
#define omap2_pm_debug 0
+#define pm_dbg_main_dir 0
#endif
#if defined(CONFIG_CPU_IDLE)
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH v3 01/11] OMAP: PM: Export the main pm debugfs directory
2010-09-22 14:45 ` [PATCH v3 01/11] OMAP: PM: Export the main pm debugfs directory Thara Gopinath
@ 2010-10-25 9:29 ` Cousson, Benoit
2010-10-25 9:30 ` Gopinath, Thara
0 siblings, 1 reply; 56+ messages in thread
From: Cousson, Benoit @ 2010-10-25 9:29 UTC (permalink / raw)
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org, khilman@deeprootsystems.com,
paul@pwsan.com, Sripathy, Vishwanath, Sawant, Anand
On 9/22/2010 4:45 PM, Gopinath, Thara wrote:
> This patch makes generic pm_debug directory global
> so that other drivers can include it and use it to create
> sub-entries.
That should not be needed, if we expose voltage debugfs entry in the top
level directly.
Benoit
>
> Signed-off-by: Thara Gopinath<thara@ti.com>
> ---
> arch/arm/mach-omap2/pm-debug.c | 3 +++
> arch/arm/mach-omap2/pm.h | 1 +
> 2 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
> index af00c17..390f1c6 100644
> --- a/arch/arm/mach-omap2/pm-debug.c
> +++ b/arch/arm/mach-omap2/pm-debug.c
> @@ -42,6 +42,7 @@ u32 enable_off_mode;
> u32 sleep_while_idle;
> u32 wakeup_timer_seconds;
> u32 wakeup_timer_milliseconds;
> +struct dentry *pm_dbg_main_dir;
>
> #define DUMP_PRM_MOD_REG(mod, reg) \
> regs[reg_count].name = #mod "." #reg; \
> @@ -641,6 +642,8 @@ static int __init pm_dbg_init(void)
> (void) debugfs_create_file("wakeup_timer_milliseconds",
> S_IRUGO | S_IWUGO, d,&wakeup_timer_milliseconds,
> &pm_dbg_option_fops);
> +
> + pm_dbg_main_dir = d;
> pm_dbg_init_done = 1;
>
> return 0;
> diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
> index f3ba1e6..c06cedd 100644
> --- a/arch/arm/mach-omap2/pm.h
> +++ b/arch/arm/mach-omap2/pm.h
> @@ -55,6 +55,7 @@ extern int omap2_pm_debug;
> #define omap2_pm_dump(mode, resume, us) do {} while (0);
> #define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
> #define omap2_pm_debug 0
> +#define pm_dbg_main_dir 0
> #endif
>
> #if defined(CONFIG_CPU_IDLE)
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 01/11] OMAP: PM: Export the main pm debugfs directory
2010-10-25 9:29 ` Cousson, Benoit
@ 2010-10-25 9:30 ` Gopinath, Thara
0 siblings, 0 replies; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-25 9:30 UTC (permalink / raw)
To: Cousson, Benoit
Cc: linux-omap@vger.kernel.org, khilman@deeprootsystems.com,
paul@pwsan.com, Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Cousson, Benoit
>>Sent: Monday, October 25, 2010 3:00 PM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; khilman@deeprootsystems.com; paul@pwsan.com;
>>Sripathy, Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 01/11] OMAP: PM: Export the main pm debugfs directory
>>
>>On 9/22/2010 4:45 PM, Gopinath, Thara wrote:
>>> This patch makes generic pm_debug directory global
>>> so that other drivers can include it and use it to create
>>> sub-entries.
>>
>>That should not be needed, if we expose voltage debugfs entry in the top
>>level directly.
Agreed. I am ok with exposing the voltage debugfs entry at the top level.
Regards
Thara
>>
>>Benoit
>>
>>>
>>> Signed-off-by: Thara Gopinath<thara@ti.com>
>>> ---
>>> arch/arm/mach-omap2/pm-debug.c | 3 +++
>>> arch/arm/mach-omap2/pm.h | 1 +
>>> 2 files changed, 4 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-
>>debug.c
>>> index af00c17..390f1c6 100644
>>> --- a/arch/arm/mach-omap2/pm-debug.c
>>> +++ b/arch/arm/mach-omap2/pm-debug.c
>>> @@ -42,6 +42,7 @@ u32 enable_off_mode;
>>> u32 sleep_while_idle;
>>> u32 wakeup_timer_seconds;
>>> u32 wakeup_timer_milliseconds;
>>> +struct dentry *pm_dbg_main_dir;
>>>
>>> #define DUMP_PRM_MOD_REG(mod, reg) \
>>> regs[reg_count].name = #mod "." #reg; \
>>> @@ -641,6 +642,8 @@ static int __init pm_dbg_init(void)
>>> (void) debugfs_create_file("wakeup_timer_milliseconds",
>>> S_IRUGO | S_IWUGO, d,&wakeup_timer_milliseconds,
>>> &pm_dbg_option_fops);
>>> +
>>> + pm_dbg_main_dir = d;
>>> pm_dbg_init_done = 1;
>>>
>>> return 0;
>>> diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
>>> index f3ba1e6..c06cedd 100644
>>> --- a/arch/arm/mach-omap2/pm.h
>>> +++ b/arch/arm/mach-omap2/pm.h
>>> @@ -55,6 +55,7 @@ extern int omap2_pm_debug;
>>> #define omap2_pm_dump(mode, resume, us) do {} while (0);
>>> #define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
>>> #define omap2_pm_debug 0
>>> +#define pm_dbg_main_dir 0
>>> #endif
>>>
>>> #if defined(CONFIG_CPU_IDLE)
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
2010-09-22 14:45 ` [PATCH v3 01/11] OMAP: PM: Export the main pm debugfs directory Thara Gopinath
@ 2010-09-22 14:45 ` Thara Gopinath
2010-09-29 21:21 ` Kevin Hilman
` (3 more replies)
2010-09-22 14:45 ` [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support Thara Gopinath
` (9 subsequent siblings)
11 siblings, 4 replies; 56+ messages in thread
From: Thara Gopinath @ 2010-09-22 14:45 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
This patch adds voltage driver support for OMAP3. The driver
allows configuring the voltage controller and voltage
processors during init and exports APIs to enable/disable
voltage processors, scale voltage and reset voltage.
The driver also maintains the global voltage table on a per
VDD basis which contains the various voltages supported by the
VDD along with per voltage dependent data like smartreflex
n-target value, errminlimit and voltage processor errorgain.
The driver allows scaling of VDD voltages either through
"vc bypass method" or through "vp forceupdate method" the
choice being configurable through the board file.
This patch contains code originally in linux omap pm branch
smartreflex driver. Major contributors to this driver are
Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley,
Nishant Menon, Kevin Hilman.
Signed-off-by: Thara Gopinath <thara@ti.com>
---
arch/arm/mach-omap2/Makefile | 3 +-
arch/arm/mach-omap2/voltage.c | 1117 +++++++++++++++++++++++++++++
arch/arm/plat-omap/include/plat/voltage.h | 136 ++++
3 files changed, 1255 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/voltage.c
create mode 100644 arch/arm/plat-omap/include/plat/voltage.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index a88b75a..4f74f2b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -52,7 +52,8 @@ obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o
ifeq ($(CONFIG_PM),y)
obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o pm_bus.o
-obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o pm_bus.o
+obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o voltage.o \
+ cpuidle34xx.o pm_bus.o
obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
new file mode 100644
index 0000000..49013cb
--- /dev/null
+++ b/arch/arm/mach-omap2/voltage.c
@@ -0,0 +1,1117 @@
+/*
+ * OMAP3/OMAP4 Voltage Management Routines
+ *
+ * Author: Thara Gopinath <thara@ti.com>
+ *
+ * Copyright (C) 2007 Texas Instruments, Inc.
+ * Rajendra Nayak <rnayak@ti.com>
+ * Lesly A M <x0080970@ti.com>
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Kalle Jokiniemi
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Thara Gopinath <thara@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+
+#include <plat/common.h>
+#include <plat/voltage.h>
+
+#include "prm-regbits-34xx.h"
+
+#define VP_IDLE_TIMEOUT 200
+#define VP_TRANXDONE_TIMEOUT 300
+
+/* PRM voltage module */
+static u32 volt_mod;
+
+/* Voltage processor register offsets */
+struct vp_reg_offs {
+ u8 vpconfig;
+ u8 vstepmin;
+ u8 vstepmax;
+ u8 vlimitto;
+ u8 vstatus;
+ u8 voltage;
+};
+
+/* Voltage Processor bit field values, shifts and masks */
+struct vp_reg_val {
+ /* VPx_VPCONFIG */
+ u32 vpconfig_erroroffset;
+ u16 vpconfig_errorgain;
+ u32 vpconfig_errorgain_mask;
+ u8 vpconfig_errorgain_shift;
+ u32 vpconfig_initvoltage_mask;
+ u8 vpconfig_initvoltage_shift;
+ u32 vpconfig_timeouten;
+ u32 vpconfig_initvdd;
+ u32 vpconfig_forceupdate;
+ u32 vpconfig_vpenable;
+ /* VPx_VSTEPMIN */
+ u8 vstepmin_stepmin;
+ u16 vstepmin_smpswaittimemin;
+ u8 vstepmin_stepmin_shift;
+ u8 vstepmin_smpswaittimemin_shift;
+ /* VPx_VSTEPMAX */
+ u8 vstepmax_stepmax;
+ u16 vstepmax_smpswaittimemax;
+ u8 vstepmax_stepmax_shift;
+ u8 vstepmax_smpswaittimemax_shift;
+ /* VPx_VLIMITTO */
+ u16 vlimitto_vddmin;
+ u16 vlimitto_vddmax;
+ u16 vlimitto_timeout;
+ u16 vlimitto_vddmin_shift;
+ u16 vlimitto_vddmax_shift;
+ u16 vlimitto_timeout_shift;
+ /* PRM_IRQSTATUS*/
+ u32 tranxdone_status;
+};
+
+/**
+ * omap_vdd_info - Per Voltage Domain info
+ *
+ * @volt_data : voltage table having the distinct voltages supported
+ * by the domain and other associated per voltage data.
+ * @vp_offs : structure containing the offsets for various
+ * vp registers
+ * @vp_reg : the register values, shifts, masks for various
+ * vp registers
+ * @volt_data_count : Number of distinct voltages supported by this vdd.
+ * @nominal_volt : Nominal voltage for this vdd.
+ * @curr_volt : Current voltage for this vdd;
+ * cmdval_reg : Voltage controller cmdval register.
+ * @vdd_sr_reg : The smartreflex register associated with this VDD.
+ */
+struct omap_vdd_info{
+ struct omap_volt_data *volt_data;
+ struct vp_reg_offs vp_offs;
+ struct vp_reg_val vp_reg;
+ struct voltagedomain voltdm;
+ int volt_data_count;
+ u32 nominal_volt;
+ u32 curr_volt;
+ u8 cmdval_reg;
+ u8 vdd_sr_reg;
+};
+
+static struct omap_vdd_info *vdd_info;
+/*
+ * Number of scalable voltage domains.
+ */
+static int nr_scalable_vdd;
+
+/* OMAP3 VDD sturctures */
+static struct omap_vdd_info omap3_vdd_info[] = {
+ {
+ .vp_offs = {
+ .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET,
+ .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET,
+ .vstepmax = OMAP3_PRM_VP1_VSTEPMAX_OFFSET,
+ .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET,
+ .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET,
+ .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET,
+ },
+ .voltdm = {
+ .name = "mpu",
+ },
+ },
+ {
+ .vp_offs = {
+ .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET,
+ .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET,
+ .vstepmax = OMAP3_PRM_VP2_VSTEPMAX_OFFSET,
+ .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET,
+ .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET,
+ .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET,
+ },
+ .voltdm = {
+ .name = "core",
+ },
+ },
+};
+
+#define OMAP3_NR_SCALABLE_VDD ARRAY_SIZE(omap3_vdd_info)
+
+/* TODO: OMAP4 register offsets */
+
+/*
+ * Default voltage controller settings.
+ */
+static struct omap_volt_vc_data vc_config = {
+ .clksetup = 0xff,
+ .voltsetup_time1 = 0xfff,
+ .voltsetup_time2 = 0xfff,
+ .voltoffset = 0xff,
+ .voltsetup2 = 0xff,
+ .vdd0_on = 0x30, /* 1.2v */
+ .vdd0_onlp = 0x20, /* 1.0v */
+ .vdd0_ret = 0x1e, /* 0.975v */
+ .vdd0_off = 0x00, /* 0.6v */
+ .vdd1_on = 0x2c, /* 1.15v */
+ .vdd1_onlp = 0x20, /* 1.0v */
+ .vdd1_ret = 0x1e, /* .975v */
+ .vdd1_off = 0x00, /* 0.6v */
+};
+
+/*
+ * Default PMIC Data
+ */
+static struct omap_volt_pmic_info volt_pmic_info = {
+ .slew_rate = 4000,
+ .step_size = 12500,
+};
+
+/*
+ * Structures containing OMAP3430/OMAP3630 voltage supported and various
+ * data associated with it per voltage domain basis. Smartreflex Ntarget
+ * values are left as 0 as they have to be populated by smartreflex
+ * driver after reading the efuse.
+ */
+
+/* VDD1 */
+static struct omap_volt_data omap34xx_vdd1_volt_data[] = {
+ {.volt_nominal = 975000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+ {.volt_nominal = 1075000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+ {.volt_nominal = 1200000, .sr_errminlimit = 0xF9, .vp_errgain = 0x18},
+ {.volt_nominal = 1270000, .sr_errminlimit = 0xF9, .vp_errgain = 0x18},
+ {.volt_nominal = 1350000, .sr_errminlimit = 0xF9, .vp_errgain = 0x18},
+};
+
+static struct omap_volt_data omap36xx_vdd1_volt_data[] = {
+ {.volt_nominal = 930000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+ {.volt_nominal = 1100000, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
+ {.volt_nominal = 1260000, .sr_errminlimit = 0xFA, .vp_errgain = 0x23},
+ {.volt_nominal = 1350000, .sr_errminlimit = 0xFA, .vp_errgain = 0x27},
+};
+
+/* VDD2 */
+static struct omap_volt_data omap34xx_vdd2_volt_data[] = {
+ {.volt_nominal = 975000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+ {.volt_nominal = 1050000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+ {.volt_nominal = 1150000, .sr_errminlimit = 0xF9, .vp_errgain = 0x18},
+};
+
+static struct omap_volt_data omap36xx_vdd2_volt_data[] = {
+ {.volt_nominal = 930000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+ {.volt_nominal = 1137500, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
+};
+
+
+/* By default VPFORCEUPDATE is the chosen method of voltage scaling */
+static bool voltscale_vpforceupdate = true;
+
+static inline u32 voltage_read_reg(u8 offset)
+{
+ return prm_read_mod_reg(volt_mod, offset);
+}
+
+static inline void voltage_write_reg(u8 offset, u32 value)
+{
+ prm_write_mod_reg(value, volt_mod, offset);
+}
+
+static void vp_latch_vsel(struct omap_vdd_info *vdd)
+{
+ u32 vpconfig;
+ unsigned long uvdc;
+ char vsel;
+
+ uvdc = omap_voltage_get_nom_volt(&vdd->voltdm);
+ if (!uvdc) {
+ pr_warning("%s: unable to find current voltage for vdd_%s\n",
+ __func__, vdd->voltdm.name);
+ return;
+ }
+
+ if (!volt_pmic_info.uv_to_vsel) {
+ pr_warning("%s: PMIC function to convert voltage in uV to"
+ " vsel not registered\n", __func__);
+ return;
+ }
+
+ vsel = volt_pmic_info.uv_to_vsel(uvdc);
+
+ vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
+ vpconfig &= ~(vdd->vp_reg.vpconfig_initvoltage_mask |
+ vdd->vp_reg.vpconfig_initvdd);
+ vpconfig |= vsel << vdd->vp_reg.vpconfig_initvoltage_shift;
+
+ voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
+
+ /* Trigger initVDD value copy to voltage processor */
+ voltage_write_reg(vdd->vp_offs.vpconfig,
+ (vpconfig | vdd->vp_reg.vpconfig_initvdd));
+
+ /* Clear initVDD copy trigger bit */
+ voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
+}
+
+/* OMAP3 specific voltage init functions */
+/*
+ * Intializes the voltage controller registers with the PMIC and board
+ * specific parameters and voltage setup times for OMAP3. If the board
+ * file does not populate the voltage controller parameters through
+ * omap3_pm_init_vc, default values specified in vc_config is used.
+ */
+static void __init omap3_init_voltagecontroller(void)
+{
+ voltage_write_reg(OMAP3_PRM_VC_SMPS_SA_OFFSET,
+ (OMAP3_SRI2C_SLAVE_ADDR <<
+ OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT) |
+ (OMAP3_SRI2C_SLAVE_ADDR <<
+ OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT));
+ voltage_write_reg(OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
+ (OMAP3_VDD2_SR_CONTROL_REG << OMAP3430_VOLRA1_SHIFT) |
+ (OMAP3_VDD1_SR_CONTROL_REG << OMAP3430_VOLRA0_SHIFT));
+ voltage_write_reg(OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
+ (vc_config.vdd0_on << OMAP3430_VC_CMD_ON_SHIFT) |
+ (vc_config.vdd0_onlp << OMAP3430_VC_CMD_ONLP_SHIFT) |
+ (vc_config.vdd0_ret << OMAP3430_VC_CMD_RET_SHIFT) |
+ (vc_config.vdd0_off << OMAP3430_VC_CMD_OFF_SHIFT));
+ voltage_write_reg(OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
+ (vc_config.vdd1_on << OMAP3430_VC_CMD_ON_SHIFT) |
+ (vc_config.vdd1_onlp << OMAP3430_VC_CMD_ONLP_SHIFT) |
+ (vc_config.vdd1_ret << OMAP3430_VC_CMD_RET_SHIFT) |
+ (vc_config.vdd1_off << OMAP3430_VC_CMD_OFF_SHIFT));
+ voltage_write_reg(OMAP3_PRM_VC_CH_CONF_OFFSET,
+ OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK);
+ voltage_write_reg(OMAP3_PRM_VC_I2C_CFG_OFFSET,
+ OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK);
+
+ /* Write setup times */
+ voltage_write_reg(OMAP3_PRM_CLKSETUP_OFFSET, vc_config.clksetup);
+ voltage_write_reg(OMAP3_PRM_VOLTSETUP1_OFFSET,
+ (vc_config.voltsetup_time2 <<
+ OMAP3430_SETUP_TIME2_SHIFT) |
+ (vc_config.voltsetup_time1 <<
+ OMAP3430_SETUP_TIME1_SHIFT));
+ voltage_write_reg(OMAP3_PRM_VOLTOFFSET_OFFSET, vc_config.voltoffset);
+ voltage_write_reg(OMAP3_PRM_VOLTSETUP2_OFFSET, vc_config.voltsetup2);
+}
+
+/* Sets up all the VDD related info for OMAP3 */
+static void __init omap3_vdd_data_configure(struct omap_vdd_info *vdd)
+{
+ struct clk *sys_ck;
+ u32 sys_clk_speed, timeout_val, waittime;
+
+ if (!strcmp(vdd->voltdm.name, "mpu")) {
+ if (cpu_is_omap3630()) {
+ vdd->vp_reg.vlimitto_vddmin =
+ OMAP3630_VP1_VLIMITTO_VDDMIN;
+ vdd->vp_reg.vlimitto_vddmax =
+ OMAP3630_VP1_VLIMITTO_VDDMAX;
+ vdd->volt_data = omap36xx_vdd1_volt_data;
+ vdd->volt_data_count =
+ ARRAY_SIZE(omap36xx_vdd1_volt_data);
+ } else {
+ vdd->vp_reg.vlimitto_vddmin =
+ OMAP3430_VP1_VLIMITTO_VDDMIN;
+ vdd->vp_reg.vlimitto_vddmax =
+ OMAP3430_VP1_VLIMITTO_VDDMAX;
+ vdd->volt_data = omap34xx_vdd1_volt_data;
+ vdd->volt_data_count =
+ ARRAY_SIZE(omap34xx_vdd1_volt_data);
+ }
+
+ vdd->vp_reg.tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK;
+ vdd->cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET;
+ vdd->vdd_sr_reg = OMAP3_VDD1_SR_CONTROL_REG;
+ } else if (!strcmp(vdd->voltdm.name, "core")) {
+ if (cpu_is_omap3630()) {
+ vdd->vp_reg.vlimitto_vddmin =
+ OMAP3630_VP2_VLIMITTO_VDDMIN;
+ vdd->vp_reg.vlimitto_vddmax =
+ OMAP3630_VP2_VLIMITTO_VDDMAX;
+ vdd->volt_data = omap36xx_vdd2_volt_data;
+ vdd->volt_data_count =
+ ARRAY_SIZE(omap36xx_vdd2_volt_data);
+ } else {
+ vdd->vp_reg.vlimitto_vddmin =
+ OMAP3430_VP2_VLIMITTO_VDDMIN;
+ vdd->vp_reg.vlimitto_vddmax =
+ OMAP3430_VP2_VLIMITTO_VDDMAX;
+ vdd->volt_data = omap34xx_vdd2_volt_data;
+ vdd->volt_data_count =
+ ARRAY_SIZE(omap34xx_vdd2_volt_data);
+ }
+
+ vdd->vp_reg.tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK;
+ vdd->cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET;
+ vdd->vdd_sr_reg = OMAP3_VDD2_SR_CONTROL_REG;
+ } else {
+ pr_warning("%s: vdd_%s does not exisit in OMAP3\n",
+ __func__, vdd->voltdm.name);
+ return;
+ }
+
+ /*
+ * Sys clk rate is require to calculate vp timeout value and
+ * smpswaittimemin and smpswaittimemax.
+ */
+ sys_ck = clk_get(NULL, "sys_ck");
+ if (IS_ERR(sys_ck)) {
+ pr_warning("%s: Could not get the sys clk to calculate"
+ "various vdd_%s params\n", __func__, vdd->voltdm.name);
+ return;
+ }
+ sys_clk_speed = clk_get_rate(sys_ck);
+ clk_put(sys_ck);
+ /* Divide to avoid overflow */
+ sys_clk_speed /= 1000;
+
+ /* Nominal/Reset voltage of the VDD */
+ vdd->nominal_volt = vdd->curr_volt = 1200000;
+
+ /* VPCONFIG bit fields */
+ vdd->vp_reg.vpconfig_erroroffset = (OMAP3_VP_CONFIG_ERROROFFSET <<
+ OMAP3430_ERROROFFSET_SHIFT);
+ vdd->vp_reg.vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK;
+ vdd->vp_reg.vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT;
+ vdd->vp_reg.vpconfig_initvoltage_shift = OMAP3430_INITVOLTAGE_SHIFT;
+ vdd->vp_reg.vpconfig_initvoltage_mask = OMAP3430_INITVOLTAGE_MASK;
+ vdd->vp_reg.vpconfig_timeouten = OMAP3430_TIMEOUTEN_MASK;
+ vdd->vp_reg.vpconfig_initvdd = OMAP3430_INITVDD_MASK;
+ vdd->vp_reg.vpconfig_forceupdate = OMAP3430_FORCEUPDATE_MASK;
+ vdd->vp_reg.vpconfig_vpenable = OMAP3430_VPENABLE_MASK;
+
+ /* VSTEPMIN VSTEPMAX bit fields */
+ waittime = ((volt_pmic_info.step_size / volt_pmic_info.slew_rate) *
+ sys_clk_speed) / 1000;
+ vdd->vp_reg.vstepmin_smpswaittimemin = waittime;
+ vdd->vp_reg.vstepmax_smpswaittimemax = waittime;
+ vdd->vp_reg.vstepmin_stepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN;
+ vdd->vp_reg.vstepmax_stepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX;
+ vdd->vp_reg.vstepmin_smpswaittimemin_shift =
+ OMAP3430_SMPSWAITTIMEMIN_SHIFT;
+ vdd->vp_reg.vstepmax_smpswaittimemax_shift =
+ OMAP3430_SMPSWAITTIMEMAX_SHIFT;
+ vdd->vp_reg.vstepmin_stepmin_shift = OMAP3430_VSTEPMIN_SHIFT;
+ vdd->vp_reg.vstepmax_stepmax_shift = OMAP3430_VSTEPMAX_SHIFT;
+
+ /* VLIMITTO bit fields */
+ timeout_val = (sys_clk_speed * OMAP3_VP_VLIMITTO_TIMEOUT_US) / 1000;
+ vdd->vp_reg.vlimitto_timeout = timeout_val;
+ vdd->vp_reg.vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT;
+ vdd->vp_reg.vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT;
+ vdd->vp_reg.vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT;
+}
+
+/* Generic voltage init functions */
+static void __init init_voltageprocessor(struct omap_vdd_info *vdd)
+{
+ u32 vpconfig;
+
+ vpconfig = vdd->vp_reg.vpconfig_erroroffset |
+ (vdd->vp_reg.vpconfig_errorgain <<
+ vdd->vp_reg.vpconfig_errorgain_shift) |
+ vdd->vp_reg.vpconfig_timeouten;
+
+ voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
+
+ voltage_write_reg(vdd->vp_offs.vstepmin,
+ (vdd->vp_reg.vstepmin_smpswaittimemin <<
+ vdd->vp_reg.vstepmin_smpswaittimemin_shift) |
+ (vdd->vp_reg.vstepmin_stepmin <<
+ vdd->vp_reg.vstepmin_stepmin_shift));
+
+ voltage_write_reg(vdd->vp_offs.vstepmax,
+ (vdd->vp_reg.vstepmax_smpswaittimemax <<
+ vdd->vp_reg.vstepmax_smpswaittimemax_shift) |
+ (vdd->vp_reg.vstepmax_stepmax <<
+ vdd->vp_reg.vstepmax_stepmax_shift));
+
+ voltage_write_reg(vdd->vp_offs.vlimitto,
+ (vdd->vp_reg.vlimitto_vddmax <<
+ vdd->vp_reg.vlimitto_vddmax_shift) |
+ (vdd->vp_reg.vlimitto_vddmin <<
+ vdd->vp_reg.vlimitto_vddmin_shift) |
+ (vdd->vp_reg.vlimitto_timeout <<
+ vdd->vp_reg.vlimitto_timeout_shift));
+
+ /* Set the init voltage */
+ vp_latch_vsel(vdd);
+
+ vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
+ /* Force update of voltage */
+ voltage_write_reg(vdd->vp_offs.vpconfig,
+ (vpconfig | vdd->vp_reg.vpconfig_forceupdate));
+ /* Clear force bit */
+ voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
+}
+
+static void __init vdd_data_configure(struct omap_vdd_info *vdd)
+{
+ if (cpu_is_omap34xx())
+ omap3_vdd_data_configure(vdd);
+}
+
+static void __init init_voltagecontroller(void)
+{
+ if (cpu_is_omap34xx())
+ omap3_init_voltagecontroller();
+}
+
+/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */
+static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd,
+ unsigned long target_volt)
+{
+ struct omap_volt_data *volt_data;
+ u32 vc_bypass_value, vc_cmdval, vc_valid, vc_bypass_val_reg_offs;
+ u32 vp_errgain_val, vc_cmd_on_mask;
+ u32 loop_cnt = 0, retries_cnt = 0;
+ u32 smps_steps = 0, smps_delay = 0;
+ u8 vc_data_shift, vc_slaveaddr_shift, vc_regaddr_shift;
+ u8 vc_cmd_on_shift;
+ u8 target_vsel, current_vsel, sr_i2c_slave_addr;
+
+ if (cpu_is_omap34xx()) {
+ vc_cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT;
+ vc_cmd_on_mask = OMAP3430_VC_CMD_ON_MASK;
+ vc_data_shift = OMAP3430_DATA_SHIFT;
+ vc_slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT;
+ vc_regaddr_shift = OMAP3430_REGADDR_SHIFT;
+ vc_valid = OMAP3430_VALID_MASK;
+ vc_bypass_val_reg_offs = OMAP3_PRM_VC_BYPASS_VAL_OFFSET;
+ sr_i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR;
+ } else {
+ pr_warning("%s: Voltage scaling not yet enabled for"
+ "this chip\n", __func__);
+ return -EINVAL;
+ }
+
+ /* Get volt_data corresponding to target_volt */
+ volt_data = omap_voltage_get_voltdata(&vdd->voltdm, target_volt);
+ if (IS_ERR(volt_data)) {
+ /*
+ * If a match is not found but the target voltage is
+ * is the nominal vdd voltage allow scaling
+ */
+ if (target_volt != vdd->nominal_volt) {
+ pr_warning("%s: Unable to get volt table for vdd_%s"
+ "during voltage scaling. Some really Wrong!",
+ __func__, vdd->voltdm.name);
+ return -ENODATA;
+ }
+ volt_data = NULL;
+ }
+
+ if (!volt_pmic_info.uv_to_vsel) {
+ pr_warning("%s: PMIC function to convert voltage in uV to"
+ "vsel not registered. Hence unable to scale voltage"
+ "for vdd_%s\n", __func__, vdd->voltdm.name);
+ return -ENODATA;
+ }
+
+ target_vsel = volt_pmic_info.uv_to_vsel(target_volt);
+ current_vsel = voltage_read_reg(vdd->vp_offs.voltage);
+ smps_steps = abs(target_vsel - current_vsel);
+
+ /* Setting the ON voltage to the new target voltage */
+ vc_cmdval = voltage_read_reg(vdd->cmdval_reg);
+ vc_cmdval &= ~vc_cmd_on_mask;
+ vc_cmdval |= (target_vsel << vc_cmd_on_shift);
+ voltage_write_reg(vdd->cmdval_reg, vc_cmdval);
+
+ /* Setting vp errorgain based on the voltage */
+ if (volt_data) {
+ vp_errgain_val = voltage_read_reg(vdd->vp_offs.vpconfig);
+ vdd->vp_reg.vpconfig_errorgain = volt_data->vp_errgain;
+ vp_errgain_val &= ~vdd->vp_reg.vpconfig_errorgain_mask;
+ vp_errgain_val |= vdd->vp_reg.vpconfig_errorgain <<
+ vdd->vp_reg.vpconfig_errorgain_shift;
+ voltage_write_reg(vdd->vp_offs.vpconfig, vp_errgain_val);
+ }
+
+ vc_bypass_value = (target_vsel << vc_data_shift) |
+ (vdd->vdd_sr_reg << vc_regaddr_shift) |
+ (sr_i2c_slave_addr << vc_slaveaddr_shift);
+
+ voltage_write_reg(vc_bypass_val_reg_offs, vc_bypass_value);
+
+ voltage_write_reg(vc_bypass_val_reg_offs, vc_bypass_value | vc_valid);
+ vc_bypass_value = voltage_read_reg(vc_bypass_val_reg_offs);
+
+ /*
+ * Loop till the bypass command is acknowledged from the SMPS.
+ * NOTE: This is legacy code. The loop count and retry count needs
+ * to be revisited.
+ */
+ while (!(vc_bypass_value & vc_valid)) {
+ loop_cnt++;
+
+ if (retries_cnt > 10) {
+ pr_warning("%s: Retry count exceeded\n", __func__);
+ return -ETIMEDOUT;
+ }
+
+ if (loop_cnt > 50) {
+ retries_cnt++;
+ loop_cnt = 0;
+ udelay(10);
+ }
+ vc_bypass_value = voltage_read_reg(vc_bypass_val_reg_offs);
+ }
+
+ /* SMPS slew rate / step size. 2us added as buffer. */
+ smps_delay = ((smps_steps * volt_pmic_info.step_size) /
+ volt_pmic_info.slew_rate) + 2;
+ udelay(smps_delay);
+
+ vdd->curr_volt = target_volt;
+
+ return 0;
+}
+
+/* VP force update method of voltage scaling */
+static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
+ unsigned long target_volt)
+{
+ struct omap_volt_data *volt_data;
+ u32 vc_cmd_on_mask, vc_cmdval, vpconfig;
+ u32 smps_steps = 0, smps_delay = 0;
+ int timeout = 0;
+ u8 target_vsel, current_vsel;
+ u8 vc_cmd_on_shift;
+ u8 prm_irqst_reg_offs, ocp_mod;
+
+ if (cpu_is_omap34xx()) {
+ vc_cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT;
+ vc_cmd_on_mask = OMAP3430_VC_CMD_ON_MASK;
+ prm_irqst_reg_offs = OMAP3_PRM_IRQSTATUS_MPU_OFFSET;
+ ocp_mod = OCP_MOD;
+ } else {
+ pr_warning("%s: Voltage scaling not yet enabled for"
+ "this chip\n", __func__);
+ return -EINVAL;
+ }
+
+ /* Get volt_data corresponding to the target_volt */
+ volt_data = omap_voltage_get_voltdata(&vdd->voltdm, target_volt);
+ if (IS_ERR(volt_data)) {
+ /*
+ * If a match is not found but the target voltage is
+ * is the nominal vdd voltage allow scaling
+ */
+ if (target_volt != vdd->nominal_volt) {
+ pr_warning("%s: Unable to get voltage table for vdd_%s"
+ "during voltage scaling. Some really Wrong!",
+ __func__, vdd->voltdm.name);
+ return -ENODATA;
+ }
+ volt_data = NULL;
+ }
+
+ if (!volt_pmic_info.uv_to_vsel) {
+ pr_warning("%s: PMIC function to convert voltage in uV to"
+ "vsel not registered. Hence unable to scale voltage"
+ "for vdd_%s\n", __func__, vdd->voltdm.name);
+ return -ENODATA;
+ }
+
+ target_vsel = volt_pmic_info.uv_to_vsel(target_volt);
+ current_vsel = voltage_read_reg(vdd->vp_offs.voltage);
+ smps_steps = abs(target_vsel - current_vsel);
+
+ /* Setting the ON voltage to the new target voltage */
+ vc_cmdval = voltage_read_reg(vdd->cmdval_reg);
+ vc_cmdval &= ~vc_cmd_on_mask;
+ vc_cmdval |= (target_vsel << vc_cmd_on_shift);
+ voltage_write_reg(vdd->cmdval_reg, vc_cmdval);
+
+ /* Getting vp errorgain based on the voltage */
+ if (volt_data)
+ vdd->vp_reg.vpconfig_errorgain =
+ volt_data->vp_errgain;
+
+ /*
+ * Clear all pending TransactionDone interrupt/status. Typical latency
+ * is <3us
+ */
+ while (timeout++ < VP_TRANXDONE_TIMEOUT) {
+ prm_write_mod_reg(vdd->vp_reg.tranxdone_status,
+ ocp_mod, prm_irqst_reg_offs);
+ if (!(prm_read_mod_reg(ocp_mod, prm_irqst_reg_offs) &
+ vdd->vp_reg.tranxdone_status))
+ break;
+ udelay(1);
+ }
+ if (timeout >= VP_TRANXDONE_TIMEOUT) {
+ pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
+ "Voltage change aborted", __func__, vdd->voltdm.name);
+ return -ETIMEDOUT;
+ }
+
+ /* Configure for VP-Force Update */
+ vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
+ vpconfig &= ~(vdd->vp_reg.vpconfig_initvdd |
+ vdd->vp_reg.vpconfig_forceupdate |
+ vdd->vp_reg.vpconfig_initvoltage_mask |
+ vdd->vp_reg.vpconfig_errorgain_mask);
+ vpconfig |= ((target_vsel <<
+ vdd->vp_reg.vpconfig_initvoltage_shift) |
+ (vdd->vp_reg.vpconfig_errorgain <<
+ vdd->vp_reg.vpconfig_errorgain_shift));
+ voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
+
+ /* Trigger initVDD value copy to voltage processor */
+ vpconfig |= vdd->vp_reg.vpconfig_initvdd;
+ voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
+
+ /* Force update of voltage */
+ vpconfig |= vdd->vp_reg.vpconfig_forceupdate;
+ voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
+
+ /*
+ * Wait for TransactionDone. Typical latency is <200us.
+ * Depends on SMPSWAITTIMEMIN/MAX and voltage change
+ */
+ timeout = 0;
+ omap_test_timeout((prm_read_mod_reg(ocp_mod, prm_irqst_reg_offs) &
+ vdd->vp_reg.tranxdone_status),
+ VP_TRANXDONE_TIMEOUT, timeout);
+ if (timeout >= VP_TRANXDONE_TIMEOUT)
+ pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
+ "TRANXDONE never got set after the voltage update\n",
+ __func__, vdd->voltdm.name);
+
+ /*
+ * Wait for voltage to settle with SW wait-loop.
+ * SMPS slew rate / step size. 2us added as buffer.
+ */
+ smps_delay = ((smps_steps * volt_pmic_info.step_size) /
+ volt_pmic_info.slew_rate) + 2;
+ udelay(smps_delay);
+
+ /*
+ * Disable TransactionDone interrupt , clear all status, clear
+ * control registers
+ */
+ timeout = 0;
+ while (timeout++ < VP_TRANXDONE_TIMEOUT) {
+ prm_write_mod_reg(vdd->vp_reg.tranxdone_status,
+ ocp_mod, prm_irqst_reg_offs);
+ if (!(prm_read_mod_reg(ocp_mod, prm_irqst_reg_offs) &
+ vdd->vp_reg.tranxdone_status))
+ break;
+ udelay(1);
+ }
+ if (timeout >= VP_TRANXDONE_TIMEOUT)
+ pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
+ "to clear the TRANXDONE status\n",
+ __func__, vdd->voltdm.name);
+
+ vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
+ /* Clear initVDD copy trigger bit */
+ vpconfig &= ~vdd->vp_reg.vpconfig_initvdd;;
+ voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
+ /* Clear force bit */
+ vpconfig &= ~vdd->vp_reg.vpconfig_forceupdate;
+ voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
+
+ vdd->curr_volt = target_volt;
+
+ return 0;
+}
+
+/* Public functions */
+/**
+ * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage
+ * @voltdm: pointer to the VDD for which current voltage info is needed
+ *
+ * API to get the current non-auto-compensated voltage for a VDD.
+ * Returns 0 in case of error else returns the current voltage for the VDD.
+ */
+unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm)
+{
+ struct omap_vdd_info *vdd;
+
+ if (!voltdm || IS_ERR(voltdm)) {
+ pr_warning("%s: VDD specified does not exist!\n", __func__);
+ return 0;
+ }
+
+ vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
+
+ return vdd->curr_volt;
+}
+
+/**
+ * omap_vp_get_curr_volt() - API to get the current vp voltage.
+ * @voltdm: pointer to the VDD.
+ *
+ * This API returns the current voltage for the specified voltage processor
+ */
+unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm)
+{
+ struct omap_vdd_info *vdd;
+ u8 curr_vsel;
+
+ if (!voltdm || IS_ERR(voltdm)) {
+ pr_warning("%s: VDD specified does not exist!\n", __func__);
+ return 0;
+ }
+
+ vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
+
+ curr_vsel = voltage_read_reg(vdd->vp_offs.voltage);
+
+ if (!volt_pmic_info.vsel_to_uv) {
+ pr_warning("%s: PMIC function to convert vsel to voltage"
+ "in uV not registerd\n", __func__);
+ return 0;
+ }
+
+ return volt_pmic_info.vsel_to_uv(curr_vsel);
+}
+
+/**
+ * omap_vp_enable() - API to enable a particular VP
+ * @voltdm: pointer to the VDD whose VP is to be enabled.
+ *
+ * This API enables a particular voltage processor. Needed by the smartreflex
+ * class drivers.
+ */
+void omap_vp_enable(struct voltagedomain *voltdm)
+{
+ struct omap_vdd_info *vdd;
+ u32 vpconfig;
+
+ if (!voltdm || IS_ERR(voltdm)) {
+ pr_warning("%s: VDD specified does not exist!\n", __func__);
+ return;
+ }
+
+ vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
+
+ /* If VP is already enabled, do nothing. Return */
+ if (voltage_read_reg(vdd->vp_offs.vpconfig) &
+ vdd->vp_reg.vpconfig_vpenable)
+ return;
+ /*
+ * This latching is required only if VC bypass method is used for
+ * voltage scaling during dvfs.
+ */
+ if (!voltscale_vpforceupdate)
+ vp_latch_vsel(vdd);
+
+ /* Enable VP */
+ vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
+ voltage_write_reg(vdd->vp_offs.vpconfig,
+ vpconfig | vdd->vp_reg.vpconfig_vpenable);
+}
+
+/**
+ * omap_vp_disable() - API to disable a particular VP
+ * @voltdm: pointer to the VDD whose VP is to be disabled.
+ *
+ * This API disables a particular voltage processor. Needed by the smartreflex
+ * class drivers.
+ */
+void omap_vp_disable(struct voltagedomain *voltdm)
+{
+ struct omap_vdd_info *vdd;
+ u32 vpconfig;
+ int timeout;
+
+ if (!voltdm || IS_ERR(voltdm)) {
+ pr_warning("%s: VDD specified does not exist!\n", __func__);
+ return;
+ }
+
+ vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
+
+ /* If VP is already disabled, do nothing. Return */
+ if (!(voltage_read_reg(vdd->vp_offs.vpconfig) &
+ vdd->vp_reg.vpconfig_vpenable)) {
+ pr_warning("%s: Trying to disable VP for vdd_%s when"
+ "it is already disabled\n", __func__, voltdm->name);
+ return;
+ }
+
+ /* Disable VP */
+ vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
+ vpconfig &= ~vdd->vp_reg.vpconfig_vpenable;
+ voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
+
+ /*
+ * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
+ */
+ omap_test_timeout((voltage_read_reg(vdd->vp_offs.vstatus)),
+ VP_IDLE_TIMEOUT, timeout);
+
+ if (timeout >= VP_IDLE_TIMEOUT)
+ pr_warning("%s: vdd_%s idle timedout\n",
+ __func__, voltdm->name);
+ return;
+}
+
+/**
+ * omap_voltage_scale_vdd() - API to scale voltage of a particular
+ * voltage domain.
+ * @voltdm: pointer to the VDD which is to be scaled.
+ * @target_volt: The target voltage of the voltage domain
+ *
+ * This API should be called by the kernel to do the voltage scaling
+ * for a particular voltage domain during dvfs or any other situation.
+ */
+int omap_voltage_scale_vdd(struct voltagedomain *voltdm,
+ unsigned long target_volt)
+{
+ struct omap_vdd_info *vdd;
+
+ if (!voltdm || IS_ERR(voltdm)) {
+ pr_warning("%s: VDD specified does not exist!\n", __func__);
+ return -EINVAL;
+ }
+
+ vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
+
+ if (voltscale_vpforceupdate)
+ return vp_forceupdate_scale_voltage(vdd, target_volt);
+ else
+ return vc_bypass_scale_voltage(vdd, target_volt);
+}
+
+
+
+/**
+ * omap_voltage_reset() - Resets the voltage of a particular voltage domain
+ * to that of the current OPP.
+ * @voltdm: pointer to the VDD whose voltage is to be reset.
+ *
+ * This API finds out the correct voltage the voltage domain is supposed
+ * to be at and resets the voltage to that level. Should be used expecially
+ * while disabling any voltage compensation modules.
+ */
+void omap_voltage_reset(struct voltagedomain *voltdm)
+{
+ unsigned long target_uvdc;
+
+ if (!voltdm || IS_ERR(voltdm)) {
+ pr_warning("%s: VDD specified does not exist!\n", __func__);
+ return;
+ }
+
+ target_uvdc = omap_voltage_get_nom_volt(voltdm);
+ if (!target_uvdc) {
+ pr_err("%s: unable to find current voltage for vdd_%s\n",
+ __func__, voltdm->name);
+ return;
+ }
+
+ omap_voltage_scale_vdd(voltdm, target_uvdc);
+}
+
+/**
+ * omap_change_voltscale_method() - API to change the voltage scaling method.
+ * @voltscale_method: the method to be used for voltage scaling.
+ *
+ * This API can be used by the board files to change the method of voltage
+ * scaling between vpforceupdate and vcbypass. The parameter values are
+ * defined in voltage.h
+ */
+void omap_change_voltscale_method(int voltscale_method)
+{
+ switch (voltscale_method) {
+ case VOLTSCALE_VPFORCEUPDATE:
+ voltscale_vpforceupdate = true;
+ return;
+ case VOLTSCALE_VCBYPASS:
+ voltscale_vpforceupdate = false;
+ return;
+ default:
+ pr_warning("%s: Trying to change the method of voltage scaling"
+ "to an unsupported one!\n", __func__);
+ }
+}
+
+/**
+ * omap_voltage_init_vc() - polpulates vc_config with values specified in
+ * board file
+ * @setup_vc: the structure with various vc parameters
+ *
+ * Updates vc_config with the voltage setup times and other parameters as
+ * specified in setup_vc. vc_config is later used in init_voltagecontroller
+ * to initialize the voltage controller registers. Board files should call
+ * this function with the correct volatge settings corresponding
+ * the particular PMIC and chip.
+ */
+void __init omap_voltage_init_vc(struct omap_volt_vc_data *setup_vc)
+{
+ if (!setup_vc)
+ return;
+
+ vc_config.clksetup = setup_vc->clksetup;
+ vc_config.voltsetup_time1 = setup_vc->voltsetup_time1;
+ vc_config.voltsetup_time2 = setup_vc->voltsetup_time2;
+ vc_config.voltoffset = setup_vc->voltoffset;
+ vc_config.voltsetup2 = setup_vc->voltsetup2;
+ vc_config.vdd0_on = setup_vc->vdd0_on;
+ vc_config.vdd0_onlp = setup_vc->vdd0_onlp;
+ vc_config.vdd0_ret = setup_vc->vdd0_ret;
+ vc_config.vdd0_off = setup_vc->vdd0_off;
+ vc_config.vdd1_on = setup_vc->vdd1_on;
+ vc_config.vdd1_onlp = setup_vc->vdd1_onlp;
+ vc_config.vdd1_ret = setup_vc->vdd1_ret;
+ vc_config.vdd1_off = setup_vc->vdd1_off;
+}
+
+/**
+ * omap_voltage_get_volttable() - API to get the voltage table associated with a
+ * particular voltage domain.
+ * @voltdm: pointer to the VDD for which the voltage table is required
+ * @volt_data: the voltage table for the particular vdd which is to be
+ * populated by this API
+ *
+ * This API populates the voltage table associated with a VDD into the
+ * passed parameter pointer. Returns the count of distinct voltages
+ * supported by this vdd.
+ *
+ */
+int omap_voltage_get_volttable(struct voltagedomain *voltdm,
+ struct omap_volt_data **volt_data)
+{
+ struct omap_vdd_info *vdd;
+
+ if (!voltdm || IS_ERR(voltdm)) {
+ pr_warning("%s: VDD specified does not exist!\n", __func__);
+ return 0;
+ }
+
+ vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
+
+ *volt_data = vdd->volt_data;
+ return vdd->volt_data_count;
+}
+
+/**
+ * omap_voltage_get_voltdata() - API to get the voltage table entry for a
+ * particular voltage
+ * @voltdm: pointer to the VDD whose voltage table has to be searched
+ * @volt: the voltage to be searched in the voltage table
+ *
+ * This API searches through the voltage table for the required voltage
+ * domain and tries to find a matching entry for the passed voltage volt.
+ * If a matching entry is found volt_data is populated with that entry.
+ * This API searches only through the non-compensated voltages int the
+ * voltage table.
+ * Returns pointer to the voltage table entry corresponding to volt on
+ * sucess. Returns -ENODATA if no voltage table exisits for the passed voltage
+ * domain or if there is no matching entry.
+ */
+struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
+ unsigned long volt)
+{
+ struct omap_vdd_info *vdd;
+ int i;
+
+ if (!voltdm || IS_ERR(voltdm)) {
+ pr_warning("%s: VDD specified does not exist!\n", __func__);
+ return ERR_PTR(-EINVAL);
+ }
+
+ vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
+
+ if (!vdd->volt_data) {
+ pr_warning("%s: voltage table does not exist for vdd_%s\n",
+ __func__, voltdm->name);
+ return ERR_PTR(-ENODATA);
+ }
+
+ for (i = 0; i < vdd->volt_data_count; i++) {
+ if (vdd->volt_data[i].volt_nominal == volt)
+ return &vdd->volt_data[i];
+ }
+
+ pr_notice("%s: Unable to match the current voltage with the voltage"
+ "table for vdd_%s\n", __func__, voltdm->name);
+
+ return ERR_PTR(-ENODATA);
+}
+
+/**
+ * omap_voltage_register_pmic() - API to register PMIC specific data
+ * @pmic_info: the structure containing pmic info
+ *
+ * This API is to be called by the borad file to specify the pmic specific
+ * info as present in omap_volt_pmic_info structure. A default pmic info
+ * table is maintained in the driver volt_pmic_info. If the board file do
+ * not override the default table using this API, the default values wiil
+ * be used in the driver.
+ */
+void omap_voltage_register_pmic(struct omap_volt_pmic_info *pmic_info)
+{
+ volt_pmic_info.slew_rate = pmic_info->slew_rate;
+ volt_pmic_info.step_size = pmic_info->step_size;
+ volt_pmic_info.vsel_to_uv = pmic_info->vsel_to_uv;
+ volt_pmic_info.uv_to_vsel = pmic_info->uv_to_vsel;
+}
+
+/**
+ * omap_voltage_domain_get() - API to get the voltage domain pointer
+ * @name: Name of the voltage domain
+ *
+ * This API looks up in the global vdd_info struct for the
+ * existence of voltage domain <name>. If it exists, the API returns
+ * a pointer to the voltage domain structure corresponding to the
+ * VDD<name>. Else retuns error pointer.
+ */
+struct voltagedomain *omap_voltage_domain_get(char *name)
+{
+ int i;
+
+ if (!vdd_info) {
+ pr_err("%s: Voltage driver init not yet happened.Faulting!\n",
+ __func__);
+ return ERR_PTR(-EINVAL);
+ }
+
+ if (!name) {
+ pr_err("%s: No name to get the votage domain!\n", __func__);
+ return ERR_PTR(-EINVAL);
+ }
+
+ for (i = 0; i < nr_scalable_vdd; i++) {
+ if (!(strcmp(name, vdd_info[i].voltdm.name)))
+ return &vdd_info[i].voltdm;
+ }
+
+ return ERR_PTR(-EINVAL);
+}
+
+/**
+ * omap_voltage_init : Volatage init API which does VP and VC init.
+ */
+static int __init omap_voltage_init(void)
+{
+ int i;
+
+ if (cpu_is_omap34xx()) {
+ volt_mod = OMAP3430_GR_MOD;
+ vdd_info = omap3_vdd_info;
+ nr_scalable_vdd = OMAP3_NR_SCALABLE_VDD;
+ } else {
+ pr_warning("%s: voltage driver support not added\n", __func__);
+ return 0;
+ }
+
+ init_voltagecontroller();
+ for (i = 0; i < nr_scalable_vdd; i++) {
+ vdd_data_configure(&vdd_info[i]);
+ init_voltageprocessor(&vdd_info[i]);
+ }
+ return 0;
+}
+core_initcall(omap_voltage_init);
diff --git a/arch/arm/plat-omap/include/plat/voltage.h b/arch/arm/plat-omap/include/plat/voltage.h
new file mode 100644
index 0000000..99836a1
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/voltage.h
@@ -0,0 +1,136 @@
+/*
+ * OMAP Voltage Management Routines
+ *
+ * Author: Thara Gopinath <thara@ti.com>
+ *
+ * Copyright (C) 2009 Texas Instruments, Inc.
+ * Thara Gopinath <thara@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
+#define __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
+
+#define VOLTSCALE_VPFORCEUPDATE 1
+#define VOLTSCALE_VCBYPASS 2
+
+/* Voltage SR Parameters for OMAP3*/
+#define OMAP3_SRI2C_SLAVE_ADDR 0x12
+#define OMAP3_VDD1_SR_CONTROL_REG 0x00
+#define OMAP3_VDD2_SR_CONTROL_REG 0x01
+
+/*
+ * Omap3 VP register specific values. Maybe these need to come from
+ * board file or PMIC data structure
+ */
+#define OMAP3_VP_CONFIG_ERROROFFSET 0x00
+#define OMAP3_VP_VSTEPMIN_SMPSWAITTIMEMIN 0x3C
+#define OMAP3_VP_VSTEPMIN_VSTEPMIN 0x1
+#define OMAP3_VP_VSTEPMAX_SMPSWAITTIMEMAX 0x3C
+#define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04
+#define OMAP3_VP_VLIMITTO_TIMEOUT_US 0x200
+
+/*
+ * Omap3430 specific VP register values. Maybe these need to come from
+ * board file or PMIC data structure
+ */
+#define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14
+#define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42
+#define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2C
+#define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18
+
+/*
+ * Omap3630 specific VP register values. Maybe these need to come from
+ * board file or PMIC data structure
+ */
+#define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18
+#define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3C
+#define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18
+#define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30
+
+/* TODO OMAP4 VP register values if the same file is used for OMAP4*/
+
+/**
+ * voltagedomain - omap voltage domain global structure
+ * @name : Name of the voltage domain which can be used as a unique
+ * identifier.
+ */
+struct voltagedomain {
+ char *name;
+};
+
+/**
+ * omap_volt_data - Omap voltage specific data.
+ * @voltage_nominal : The possible voltage value in uV
+ * @sr_nvalue : Smartreflex N target value at voltage <voltage>
+ * @sr_errminlimit : Error min limit value for smartreflex. This value
+ * differs at differnet opp and thus is linked
+ * with voltage.
+ * @vp_errorgain : Error gain value for the voltage processor. This
+ * field also differs according to the voltage/opp.
+ */
+struct omap_volt_data {
+ u32 volt_nominal;
+ u32 sr_nvalue;
+ u8 sr_errminlimit;
+ u8 vp_errgain;
+};
+
+/**
+ * omap_volt_pmic_info - PMIC specific data required by the voltage driver.
+ * @slew_rate : PMIC slew rate (in uv/us)
+ * @step_size : PMIC voltage step size (in uv)
+ * @vsel_to_uv : PMIC API to convert vsel value to actual voltage in uV.
+ * @uv_to_vsel : PMIC API to convert voltage in uV to vsel value.
+ */
+struct omap_volt_pmic_info {
+ int slew_rate;
+ int step_size;
+ unsigned long (*vsel_to_uv) (const u8 vsel);
+ u8 (*uv_to_vsel) (unsigned long uV);
+};
+
+/* Various voltage controller related info */
+struct omap_volt_vc_data {
+ u16 clksetup;
+ u16 voltsetup_time1;
+ u16 voltsetup_time2;
+ u16 voltoffset;
+ u16 voltsetup2;
+ /* PRM_VC_CMD_VAL_0 specific bits */
+ u16 vdd0_on;
+ u16 vdd0_onlp;
+ u16 vdd0_ret;
+ u16 vdd0_off;
+ /* PRM_VC_CMD_VAL_1 specific bits */
+ u16 vdd1_on;
+ u16 vdd1_onlp;
+ u16 vdd1_ret;
+ u16 vdd1_off;
+};
+
+struct voltagedomain *omap_voltage_domain_get(char *name);
+unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm);
+void omap_vp_enable(struct voltagedomain *voltdm);
+void omap_vp_disable(struct voltagedomain *voltdm);
+int omap_voltage_scale_vdd(struct voltagedomain *voltdm,
+ unsigned long target_volt);
+void omap_voltage_reset(struct voltagedomain *voltdm);
+int omap_voltage_get_volttable(struct voltagedomain *voltdm,
+ struct omap_volt_data **volt_data);
+struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
+ unsigned long volt);
+void omap_voltage_register_pmic(struct omap_volt_pmic_info *pmic_info);
+unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm);
+#ifdef CONFIG_PM
+void omap_voltage_init_vc(struct omap_volt_vc_data *setup_vc);
+void omap_change_voltscale_method(int voltscale_method);
+#else
+static inline void omap_voltage_init_vc(struct omap_volt_vc_data *setup_vc) {}
+static inline void omap_change_voltscale_method(int voltscale_method) {}
+#endif
+
+#endif
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3
2010-09-22 14:45 ` [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath
@ 2010-09-29 21:21 ` Kevin Hilman
2010-09-30 0:27 ` Kevin Hilman
` (2 subsequent siblings)
3 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2010-09-29 21:21 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Thara Gopinath <thara@ti.com> writes:
> This patch adds voltage driver support for OMAP3. The driver
> allows configuring the voltage controller and voltage
> processors during init and exports APIs to enable/disable
> voltage processors, scale voltage and reset voltage.
> The driver also maintains the global voltage table on a per
> VDD basis which contains the various voltages supported by the
> VDD along with per voltage dependent data like smartreflex
> n-target value, errminlimit and voltage processor errorgain.
> The driver allows scaling of VDD voltages either through
> "vc bypass method" or through "vp forceupdate method" the
> choice being configurable through the board file.
>
> This patch contains code originally in linux omap pm branch
> smartreflex driver. Major contributors to this driver are
> Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley,
> Nishant Menon, Kevin Hilman.
>
> Signed-off-by: Thara Gopinath <thara@ti.com>
[...]
> +static void __init vdd_data_configure(struct omap_vdd_info *vdd)
> +{
> + if (cpu_is_omap34xx())
> + omap3_vdd_data_configure(vdd);
> +}
> +
> +static void __init init_voltagecontroller(void)
> +{
> + if (cpu_is_omap34xx())
> + omap3_init_voltagecontroller();
> +}
Drop these two functions...
[...]
> +/**
> + * omap_voltage_init : Volatage init API which does VP and VC init.
> + */
> +static int __init omap_voltage_init(void)
> +{
> + int i;
...and setup function pointers in these cpu_is checks. Something like
the below (not even compile tested.)
void (*vdd_data_configure)(void);
void (*init_voltageprocessor)(void);
> +
> + if (cpu_is_omap34xx()) {
> + volt_mod = OMAP3430_GR_MOD;
> + vdd_info = omap3_vdd_info;
> + nr_scalable_vdd = OMAP3_NR_SCALABLE_VDD;
vdd_data_configure = omap3_vdd_data_configure;
init_voltageprocessor = omap3_init_voltageprocessor;
> + } else {
> + pr_warning("%s: voltage driver support not added\n", __func__);
> + return 0;
> + }
> + init_voltagecontroller();
> + for (i = 0; i < nr_scalable_vdd; i++) {
> + vdd_data_configure(&vdd_info[i]);
> + init_voltageprocessor(&vdd_info[i]);
> + }
> + return 0;
> +}
> +core_initcall(omap_voltage_init);
We really want to minimize the cpu_is_* checks, and ideally they should
only be present in the first __init function.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3
2010-09-22 14:45 ` [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath
2010-09-29 21:21 ` Kevin Hilman
@ 2010-09-30 0:27 ` Kevin Hilman
[not found] ` <87bp7gm3dq.fsf@deeprootsystems.com>
2010-10-14 18:05 ` Kevin Hilman
3 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2010-09-30 0:27 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Thara Gopinath <thara@ti.com> writes:
> This patch adds voltage driver support for OMAP3. The driver
> allows configuring the voltage controller and voltage
> processors during init and exports APIs to enable/disable
> voltage processors, scale voltage and reset voltage.
> The driver also maintains the global voltage table on a per
> VDD basis which contains the various voltages supported by the
> VDD along with per voltage dependent data like smartreflex
> n-target value, errminlimit and voltage processor errorgain.
> The driver allows scaling of VDD voltages either through
> "vc bypass method" or through "vp forceupdate method" the
> choice being configurable through the board file.
>
> This patch contains code originally in linux omap pm branch
> smartreflex driver. Major contributors to this driver are
> Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley,
> Nishant Menon, Kevin Hilman.
>
> Signed-off-by: Thara Gopinath <thara@ti.com>
[...]
> +static void vp_latch_vsel(struct omap_vdd_info *vdd)
> +{
> + u32 vpconfig;
> + unsigned long uvdc;
> + char vsel;
> +
> + uvdc = omap_voltage_get_nom_volt(&vdd->voltdm);
> + if (!uvdc) {
> + pr_warning("%s: unable to find current voltage for vdd_%s\n",
> + __func__, vdd->voltdm.name);
> + return;
> + }
> +
> + if (!volt_pmic_info.uv_to_vsel) {
> + pr_warning("%s: PMIC function to convert voltage in uV to"
> + " vsel not registered\n", __func__);
> + return;
> + }
Should return an error condition to the caller here...
> + vsel = volt_pmic_info.uv_to_vsel(uvdc);
> +
> + vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
> + vpconfig &= ~(vdd->vp_reg.vpconfig_initvoltage_mask |
> + vdd->vp_reg.vpconfig_initvdd);
> + vpconfig |= vsel << vdd->vp_reg.vpconfig_initvoltage_shift;
> +
> + voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
> +
> + /* Trigger initVDD value copy to voltage processor */
> + voltage_write_reg(vdd->vp_offs.vpconfig,
> + (vpconfig | vdd->vp_reg.vpconfig_initvdd));
> +
> + /* Clear initVDD copy trigger bit */
> + voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
> +}
[...]
> +static void __init init_voltageprocessor(struct omap_vdd_info *vdd)
> +{
> + u32 vpconfig;
> +
> + vpconfig = vdd->vp_reg.vpconfig_erroroffset |
> + (vdd->vp_reg.vpconfig_errorgain <<
> + vdd->vp_reg.vpconfig_errorgain_shift) |
> + vdd->vp_reg.vpconfig_timeouten;
> +
> + voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
> +
> + voltage_write_reg(vdd->vp_offs.vstepmin,
> + (vdd->vp_reg.vstepmin_smpswaittimemin <<
> + vdd->vp_reg.vstepmin_smpswaittimemin_shift) |
> + (vdd->vp_reg.vstepmin_stepmin <<
> + vdd->vp_reg.vstepmin_stepmin_shift));
> +
> + voltage_write_reg(vdd->vp_offs.vstepmax,
> + (vdd->vp_reg.vstepmax_smpswaittimemax <<
> + vdd->vp_reg.vstepmax_smpswaittimemax_shift) |
> + (vdd->vp_reg.vstepmax_stepmax <<
> + vdd->vp_reg.vstepmax_stepmax_shift));
> +
> + voltage_write_reg(vdd->vp_offs.vlimitto,
> + (vdd->vp_reg.vlimitto_vddmax <<
> + vdd->vp_reg.vlimitto_vddmax_shift) |
> + (vdd->vp_reg.vlimitto_vddmin <<
> + vdd->vp_reg.vlimitto_vddmin_shift) |
> + (vdd->vp_reg.vlimitto_timeout <<
> + vdd->vp_reg.vlimitto_timeout_shift));
> +
> + /* Set the init voltage */
> + vp_latch_vsel(vdd);
On OMAP4/panda, the boot hangs after this.
Since there is no PMIC registered, this call returns early but there is
no error checking done. I think the init needs a little more error
checking and graceful failure, especially when there is no PMIC present.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread[parent not found: <87bp7gm3dq.fsf@deeprootsystems.com>]
* Re: [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3
[not found] ` <87bp7gm3dq.fsf@deeprootsystems.com>
@ 2010-09-30 17:39 ` Paul Walmsley
2010-10-15 13:47 ` Cousson, Benoit
0 siblings, 1 reply; 56+ messages in thread
From: Paul Walmsley @ 2010-09-30 17:39 UTC (permalink / raw)
To: b-cousson, Thara Gopinath; +Cc: Kevin Hilman, linux-omap, vishwanath.bs, sawant
[-- Attachment #1: Type: TEXT/PLAIN, Size: 1289 bytes --]
Hi Benoît, Thara,
On Wed, 29 Sep 2010, Kevin Hilman wrote:
> Also, I'm still seeing this on boot:
>
> omap_hwmod: sr1_fck: missing clockdomain for sr1_fck.
> omap_hwmod: sr2_fck: missing clockdomain for sr2_fck.
>
> We need a final solution for this problem as a prerequisite for this
> series as well.
I guess we need to figure out the appropriate clockdomains for sr1_fck and
sr2_fck.
Probably the strictly correct thing to do, vis-a-vis the hardware, is to
place them into their own SmartReflex clockdomain/powerdomain. But the
PRCM doesn't export separate control registers for those, and as I
understand it, that clockdomain/powerdomain follows the CORE
clockdomains/powerdomain.
Another option would be to place them into the WKUP clockdomain. The
source of these functional clocks in SR_ALWON_FCLK which in turn is
generated by the PRM from SYS_CLK. But that won't increment the CORE
clockdomains' use-counter when the SR functional clocks are running, which
seems desirable if the SmartReflex clockdomain/powerdomain really does
follow CORE.
So it seems to me that the best thing to do might be to place these clocks
into the CORE_L4 clockdomain. But perhaps you might have a different
view?
regards,
- Paul
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3
2010-09-30 17:39 ` Paul Walmsley
@ 2010-10-15 13:47 ` Cousson, Benoit
0 siblings, 0 replies; 56+ messages in thread
From: Cousson, Benoit @ 2010-10-15 13:47 UTC (permalink / raw)
To: Paul Walmsley
Cc: Gopinath, Thara, Kevin Hilman, linux-omap@vger.kernel.org,
Sripathy, Vishwanath, Sawant, Anand
Hi Paul,
On 9/30/2010 7:39 PM, Paul Walmsley wrote:
> Hi Benoît, Thara,
>
> On Wed, 29 Sep 2010, Kevin Hilman wrote:
>
>> Also, I'm still seeing this on boot:
>>
>> omap_hwmod: sr1_fck: missing clockdomain for sr1_fck.
>> omap_hwmod: sr2_fck: missing clockdomain for sr2_fck.
>>
>> We need a final solution for this problem as a prerequisite for this
>> series as well.
>
> I guess we need to figure out the appropriate clockdomains for sr1_fck and
> sr2_fck.
>
> Probably the strictly correct thing to do, vis-a-vis the hardware, is to
> place them into their own SmartReflex clockdomain/powerdomain. But the
> PRCM doesn't export separate control registers for those, and as I
> understand it, that clockdomain/powerdomain follows the CORE
> clockdomains/powerdomain.
More or less. In theory the smartreflex power domain goes to OFF only
when the device goes to OFF. In device RET the SR power domain is still
active. That's why the FCLK is marked as always ON.
> Another option would be to place them into the WKUP clockdomain. The
> source of these functional clocks in SR_ALWON_FCLK which in turn is
> generated by the PRM from SYS_CLK. But that won't increment the CORE
> clockdomains' use-counter when the SR functional clocks are running, which
> seems desirable if the SmartReflex clockdomain/powerdomain really does
> follow CORE.
>
> So it seems to me that the best thing to do might be to place these clocks
> into the CORE_L4 clockdomain. But perhaps you might have a different
> view?
That's should be the proper place, but after several discussion with
Vincent then Leo, it appears that the gating of the CORE_L4 interface
clock is triggered by a transition of the WKUP clock domain to idle...
Yeah, that's a mess... that IP does not follow any PRCM standard :-)
Originally I thought the SR_EN bits were located in the wkup register
because Vincent was too lazy to create a new register for these 2 bits :-).
But in fact because of that hidden dependency with the wkup, it is
almost normal to put these bits there.
Bottom-line is that we should tie them to the "wkup_clkdm".
Another important point we already discussed a little bit, but that will
require more thoughts, is that the clock domain definition is first:
quite fuzzy and then does not belong do the clock itself, but to the
modules that are sharing the same interface clock.
It means that some clocks will not belong to any clock domains, and this
is fine.
On OMAP4, that definition is clearly tied to the modules, and thus
should be an hwmod attribute more than a clock node attribute.
Regards,
Benoit
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3
2010-09-22 14:45 ` [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath
` (2 preceding siblings ...)
[not found] ` <87bp7gm3dq.fsf@deeprootsystems.com>
@ 2010-10-14 18:05 ` Kevin Hilman
2010-10-22 14:23 ` Gopinath, Thara
3 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-10-14 18:05 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
On Wed, 2010-09-22 at 20:15 +0530, Thara Gopinath wrote:
> This patch adds voltage driver support for OMAP3. The driver
> allows configuring the voltage controller and voltage
> processors during init and exports APIs to enable/disable
> voltage processors, scale voltage and reset voltage.
> The driver also maintains the global voltage table on a per
> VDD basis which contains the various voltages supported by the
> VDD along with per voltage dependent data like smartreflex
> n-target value, errminlimit and voltage processor errorgain.
> The driver allows scaling of VDD voltages either through
> "vc bypass method" or through "vp forceupdate method" the
> choice being configurable through the board file.
>
> This patch contains code originally in linux omap pm branch
> smartreflex driver. Major contributors to this driver are
> Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley,
> Nishant Menon, Kevin Hilman.
>
> Signed-off-by: Thara Gopinath <thara@ti.com>
[...]
> +/*
> + * Omap3630 specific VP register values. Maybe these need to come from
> + * board file or PMIC data structure
> + */
> +#define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18
> +#define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3C
> +#define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18
> +#define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30
> +
> +/* TODO OMAP4 VP register values if the same file is used for OMAP4*/
> +
> +/**
> + * voltagedomain - omap voltage domain global structure
> + * @name : Name of the voltage domain which can be used as a unique
> + * identifier.
> + */
> +struct voltagedomain {
> + char *name;
> +};
Minor: to keep the voltagedomain stuff somewhat separate from the rest
of the voltage layer API, I suggest putting the voltage domain APIs
here:
struct voltagedomain *omap_voltage_domain_get(char *name);
However, I think this function shoul be called _lookup instead of _get
to continue the naming conventions of the powerdomain and clockdomain
code.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3
2010-10-14 18:05 ` Kevin Hilman
@ 2010-10-22 14:23 ` Gopinath, Thara
2010-10-22 16:18 ` Kevin Hilman
0 siblings, 1 reply; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-22 14:23 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
>>owner@vger.kernel.org] On Behalf Of Kevin Hilman
>>Sent: Thursday, October 14, 2010 11:35 PM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for
>>OMAP3
>>
>>On Wed, 2010-09-22 at 20:15 +0530, Thara Gopinath wrote:
>>> This patch adds voltage driver support for OMAP3. The driver
>>> allows configuring the voltage controller and voltage
>>> processors during init and exports APIs to enable/disable
>>> voltage processors, scale voltage and reset voltage.
>>> The driver also maintains the global voltage table on a per
>>> VDD basis which contains the various voltages supported by the
>>> VDD along with per voltage dependent data like smartreflex
>>> n-target value, errminlimit and voltage processor errorgain.
>>> The driver allows scaling of VDD voltages either through
>>> "vc bypass method" or through "vp forceupdate method" the
>>> choice being configurable through the board file.
>>>
>>> This patch contains code originally in linux omap pm branch
>>> smartreflex driver. Major contributors to this driver are
>>> Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley,
>>> Nishant Menon, Kevin Hilman.
>>>
>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>
>>[...]
>>
>>> +/*
>>> + * Omap3630 specific VP register values. Maybe these need to come from
>>> + * board file or PMIC data structure
>>> + */
>>> +#define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18
>>> +#define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3C
>>> +#define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18
>>> +#define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30
>>> +
>>> +/* TODO OMAP4 VP register values if the same file is used for OMAP4*/
>>> +
>>> +/**
>>> + * voltagedomain - omap voltage domain global structure
>>> + * @name : Name of the voltage domain which can be used as a unique
>>> + * identifier.
>>> + */
>>> +struct voltagedomain {
>>> + char *name;
>>> +};
>>
>>Minor: to keep the voltagedomain stuff somewhat separate from the rest
>>of the voltage layer API, I suggest putting the voltage domain APIs
>>here:
>>
>>struct voltagedomain *omap_voltage_domain_get(char *name);
You mean just move up the signature, right? I do not think the entire API can be moved here as it uses some static data structures in voltage.c
>>
>>However, I think this function shoul be called _lookup instead of _get
>>to continue the naming conventions of the powerdomain and clockdomain
>>code.
I will rename the API.
Regards
Thara
>>
>>Kevin
>>
>>
>>--
>>To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>>the body of a message to majordomo@vger.kernel.org
>>More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3
2010-10-22 14:23 ` Gopinath, Thara
@ 2010-10-22 16:18 ` Kevin Hilman
0 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2010-10-22 16:18 UTC (permalink / raw)
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
"Gopinath, Thara" <thara@ti.com> writes:
>>>On Wed, 2010-09-22 at 20:15 +0530, Thara Gopinath wrote:
>>>> This patch adds voltage driver support for OMAP3. The driver
>>>> allows configuring the voltage controller and voltage
>>>> processors during init and exports APIs to enable/disable
>>>> voltage processors, scale voltage and reset voltage.
>>>> The driver also maintains the global voltage table on a per
>>>> VDD basis which contains the various voltages supported by the
>>>> VDD along with per voltage dependent data like smartreflex
>>>> n-target value, errminlimit and voltage processor errorgain.
>>>> The driver allows scaling of VDD voltages either through
>>>> "vc bypass method" or through "vp forceupdate method" the
>>>> choice being configurable through the board file.
>>>>
>>>> This patch contains code originally in linux omap pm branch
>>>> smartreflex driver. Major contributors to this driver are
>>>> Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley,
>>>> Nishant Menon, Kevin Hilman.
>>>>
>>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>>
>>>[...]
>>>
>>>> +/*
>>>> + * Omap3630 specific VP register values. Maybe these need to come from
>>>> + * board file or PMIC data structure
>>>> + */
>>>> +#define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18
>>>> +#define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3C
>>>> +#define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18
>>>> +#define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30
>>>> +
>>>> +/* TODO OMAP4 VP register values if the same file is used for OMAP4*/
>>>> +
>>>> +/**
>>>> + * voltagedomain - omap voltage domain global structure
>>>> + * @name : Name of the voltage domain which can be used as a unique
>>>> + * identifier.
>>>> + */
>>>> +struct voltagedomain {
>>>> + char *name;
>>>> +};
>>>
>>>Minor: to keep the voltagedomain stuff somewhat separate from the rest
>>>of the voltage layer API, I suggest putting the voltage domain APIs
>>>here:
>>>
>>>struct voltagedomain *omap_voltage_domain_get(char *name);
>
> You mean just move up the signature, right?
Right.
> I do not think the entire API can be moved here as it uses some static
> data structures in voltage.c
Agreed.
>>>
>>>However, I think this function shoul be called _lookup instead of _get
>>>to continue the naming conventions of the powerdomain and clockdomain
>>>code.
>
> I will rename the API.
>
Thanks,
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support.
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
2010-09-22 14:45 ` [PATCH v3 01/11] OMAP: PM: Export the main pm debugfs directory Thara Gopinath
2010-09-22 14:45 ` [PATCH v3 02/11] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath
@ 2010-09-22 14:45 ` Thara Gopinath
2010-09-28 23:30 ` Kevin Hilman
2010-10-14 0:04 ` Kevin Hilman
2010-09-22 14:45 ` [PATCH v3 04/11] OMAP3: PM: Adding smartreflex device file Thara Gopinath
` (8 subsequent siblings)
11 siblings, 2 replies; 56+ messages in thread
From: Thara Gopinath @ 2010-09-22 14:45 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
SmartReflex modules do adaptive voltage control for real-time
voltage adjustments. With Smartreflex the power supply voltage
can be adapted to the silicon performance(manufacturing process,
temperature induced performance, age induced performance etc).
There are differnet classes of smartreflex implementation.
Class-0: Manufacturing Test Calibration
Class-1: Boot-Time Software Calibration
Class-2: Continuous Software Calibration
Class-3: Continuous Hardware Calibration
Class-4: Fully Integrated Power Management
OMAP3 has two smartreflex modules one associated with VDD1 and the
other associated with VDD2.
This patch adds support for smartreflex driver. The driver is designed
for Class-1 , Class-2 and Class-3 support and is a platform driver.
Smartreflex driver can be enabled through a Kconfig option
"SmartReflex support" under "System type"->"TI OMAP implementations" menu.
Smartreflex autocompensation feature can be enabled runtime through
a debug fs option.
To enable smartreflex autocompensation feature
echo 1 > /debugfs/pm_debug/smartreflex/sr_<X>/autocomp
To disable smartreflex autocompensation feature
echo 0 > /debugfs/pm_debug/smartreflex/sr_<X>/autocomp
where X can be mpu, core , iva etc.
This patch contains code originally in linux omap pm branch.
Major contributors to this driver are
Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley,
Nishant Menon, Kevin Hilman.
Signed-off-by: Thara Gopinath <thara@ti.com>
---
arch/arm/mach-omap2/Makefile | 1 +
arch/arm/mach-omap2/smartreflex.c | 1003 +++++++++++++++++++++++++
arch/arm/plat-omap/Kconfig | 32 +
arch/arm/plat-omap/include/plat/smartreflex.h | 277 +++++++
4 files changed, 1313 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/smartreflex.c
create mode 100644 arch/arm/plat-omap/include/plat/smartreflex.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 4f74f2b..8dd32a7 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o voltage.o \
cpuidle34xx.o pm_bus.o
obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
+obj-$(CONFIG_OMAP_SMARTREFLEX) += smartreflex.o
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
new file mode 100644
index 0000000..7fc3138
--- /dev/null
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -0,0 +1,1003 @@
+/*
+ * OMAP SmartReflex Voltage Control
+ *
+ * Author: Thara Gopinath <thara@ti.com>
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Thara Gopinath <thara@ti.com>
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Kalle Jokiniemi
+ *
+ * Copyright (C) 2007 Texas Instruments, Inc.
+ * Lesly A M <x0080970@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/debugfs.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/pm_runtime.h>
+
+#include <plat/omap_device.h>
+#include <plat/common.h>
+#include <plat/smartreflex.h>
+
+#include "pm.h"
+
+#define SMARTREFLEX_NAME_LEN 16
+#define SR_DISABLE_TIMEOUT 200
+
+struct dentry *sr_dbg_dir;
+
+struct omap_sr {
+ int srid;
+ bool sr_enable;
+ bool autocomp_active;
+ int ip_type;
+ u32 clk_length;
+ u32 err_weight;
+ u32 err_minlimit;
+ u32 err_maxlimit;
+ u32 accum_data;
+ u32 senn_avgweight;
+ u32 senp_avgweight;
+ unsigned int irq;
+ void __iomem *base;
+ struct platform_device *pdev;
+ struct list_head node;
+ struct voltagedomain *voltdm;
+};
+
+/* sr_list contains all the instances of smartreflex module */
+static LIST_HEAD(sr_list);
+
+static struct omap_smartreflex_class_data *sr_class;
+static struct omap_smartreflex_pmic_data *sr_pmic_data;
+
+static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
+{
+ __raw_writel(value, (sr->base + offset));
+}
+
+static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
+ u32 value)
+{
+ u32 reg_val;
+ u32 errconfig_offs, errconfig_mask;
+
+ reg_val = __raw_readl(sr->base + offset);
+ reg_val &= ~mask;
+
+ /*
+ * Smartreflex error config register is special as it contains
+ * certain status bits which if written a 1 into means a clear
+ * of those bits. So in order to make sure no accidental write of
+ * 1 happens to those status bits, do a clear of them in the read
+ * value. Now if there is an actual reguest to write to these bits
+ * they will be set in the nex step.
+ */
+ if (sr->ip_type == SR_TYPE_V1) {
+ errconfig_offs = ERRCONFIG_V1;
+ errconfig_mask = ERRCONFIG_STATUS_V1_MASK;
+ } else if (sr->ip_type == SR_TYPE_V2) {
+ errconfig_offs = ERRCONFIG_V2;
+ errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2;
+ }
+
+ if (offset == errconfig_offs)
+ reg_val &= ~errconfig_mask;
+
+ reg_val |= value;
+
+ __raw_writel(reg_val, (sr->base + offset));
+}
+
+static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
+{
+ return __raw_readl(sr->base + offset);
+}
+
+static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
+{
+ struct omap_sr *sr_info;
+
+ if (!voltdm) {
+ pr_err("%s: Null voltage domain passed!\n", __func__);
+ return ERR_PTR(-EINVAL);
+ }
+
+ list_for_each_entry(sr_info, &sr_list, node) {
+ if (voltdm == sr_info->voltdm)
+ return sr_info;
+ }
+
+ return ERR_PTR(-ENODATA);
+}
+
+static irqreturn_t sr_omap_isr(int irq, void *data)
+{
+ struct omap_sr *sr_info = (struct omap_sr *)data;
+ u32 status = 0;
+
+ if (sr_info->ip_type == SR_TYPE_V1) {
+ /* Read the status bits */
+ status = sr_read_reg(sr_info, ERRCONFIG_V1);
+
+ /* Clear them by writing back */
+ sr_write_reg(sr_info, ERRCONFIG_V1, status);
+ } else if (sr_info->ip_type == SR_TYPE_V2) {
+ /* Read the status bits */
+ sr_read_reg(sr_info, IRQSTATUS);
+
+ /* Clear them by writing back */
+ sr_write_reg(sr_info, IRQSTATUS, status);
+ }
+
+ /* Call the class driver notify function if registered*/
+ if (sr_class->class_type == SR_CLASS2 && sr_class->notify)
+ sr_class->notify(sr_info->voltdm, status);
+
+ return IRQ_HANDLED;
+}
+
+static void sr_set_clk_length(struct omap_sr *sr)
+{
+ struct clk *sys_ck;
+ u32 sys_clk_speed;
+
+ sys_ck = clk_get(NULL, "sys_ck");
+ if (IS_ERR(sys_ck)) {
+ dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n",
+ __func__);
+ return;
+ }
+ sys_clk_speed = clk_get_rate(sys_ck);
+ clk_put(sys_ck);
+
+ switch (sys_clk_speed) {
+ case 12000000:
+ sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
+ break;
+ case 13000000:
+ sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
+ break;
+ case 19200000:
+ sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
+ break;
+ case 26000000:
+ sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
+ break;
+ case 38400000:
+ sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
+ break;
+ default:
+ dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n",
+ __func__, sys_clk_speed);
+ break;
+ }
+}
+
+static void sr_set_regfields(struct omap_sr *sr)
+{
+ /*
+ * For time being these values are defined in smartreflex.h
+ * and populated during init. May be they can be moved to board
+ * file or pmic specific data structure. In that case these structure
+ * fields will have to be populated using the pdata or pmic structure.
+ */
+ if (cpu_is_omap34xx()) {
+ sr->err_weight = OMAP3430_SR_ERRWEIGHT;
+ sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
+ sr->accum_data = OMAP3430_SR_ACCUMDATA;
+ if (!(strcmp(sr->voltdm->name, "mpu"))) {
+ sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
+ sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
+ } else {
+ sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
+ sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
+ }
+ }
+ /* TODO: 3630 and Omap4 specific bit field values */
+}
+
+static void sr_start_vddautocomp(struct omap_sr *sr)
+{
+ if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
+ dev_warn(&sr->pdev->dev,
+ "%s: smartreflex class driver not registered\n",
+ __func__);
+ return;
+ }
+
+ if (!sr_class->enable(sr->voltdm))
+ sr->autocomp_active = true;
+}
+
+static void sr_stop_vddautocomp(struct omap_sr *sr)
+{
+ if (!sr_class || !(sr_class->disable)) {
+ dev_warn(&sr->pdev->dev,
+ "%s: smartreflex class driver not registered\n",
+ __func__);
+ return;
+ }
+
+ if (sr->autocomp_active) {
+ sr_class->disable(sr->voltdm, 1);
+ sr->autocomp_active = false;
+ }
+}
+
+/*
+ * This function handles the intializations which have to be done
+ * only when both sr device and class driver regiter has
+ * completed. This will be attempted to be called from both sr class
+ * driver register and sr device intializtion API's. Only one call
+ * will ultimately succeed.
+ *
+ * Currenly this function registers interrrupt handler for a particular SR
+ * if smartreflex class driver is already registered and has
+ * requested for interrupts and the SR interrupt line in present.
+ */
+static int sr_late_init(struct omap_sr *sr_info)
+{
+ char *name;
+ struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
+ int ret = 0;
+
+ if (sr_class->class_type == SR_CLASS2 &&
+ sr_class->notify_flags && sr_info->irq) {
+
+ name = kzalloc(SMARTREFLEX_NAME_LEN + 1, GFP_KERNEL);
+ strcpy(name, "sr_");
+ strcat(name, sr_info->voltdm->name);
+ ret = request_irq(sr_info->irq, sr_omap_isr,
+ IRQF_DISABLED, name, (void *)sr_info);
+ if (ret) {
+ struct resource *mem;
+
+ iounmap(sr_info->base);
+ mem = platform_get_resource(sr_info->pdev,
+ IORESOURCE_MEM, 0);
+ release_mem_region(mem->start, resource_size(mem));
+ list_del(&sr_info->node);
+ dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
+ "interrupt handler. Smartreflex will"
+ "not function as desired\n", __func__);
+
+ kfree(sr_info);
+ return ret;
+ }
+ }
+
+ if (pdata && pdata->enable_on_init)
+ sr_start_vddautocomp(sr_info);
+
+ return ret;
+}
+
+static void sr_v1_disable(struct omap_sr *sr)
+{
+ int timeout = 0;
+
+ /* Enable MCUDisableAcknowledge interrupt */
+ sr_modify_reg(sr, ERRCONFIG_V1,
+ ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
+
+ /* SRCONFIG - disable SR */
+ sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
+
+ /* Disable all other SR interrupts and clear the status */
+ sr_modify_reg(sr, ERRCONFIG_V1,
+ (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
+ ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
+ (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
+ ERRCONFIG_MCUBOUNDINTST |
+ ERRCONFIG_VPBOUNDINTST_V1));
+
+ /*
+ * Wait for SR to be disabled.
+ * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
+ */
+ omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
+ ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
+ timeout);
+
+ if (timeout >= SR_DISABLE_TIMEOUT)
+ dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
+ __func__);
+
+ /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
+ sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
+ ERRCONFIG_MCUDISACKINTST);
+}
+
+static void sr_v2_disable(struct omap_sr *sr)
+{
+ int timeout = 0;
+
+ /* Enable MCUDisableAcknowledge interrupt */
+ sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
+
+ /* SRCONFIG - disable SR */
+ sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
+
+ /* Disable all other SR interrupts and clear the status */
+ sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
+ ERRCONFIG_VPBOUNDINTST_V2);
+ sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
+ IRQENABLE_MCUVALIDINT |
+ IRQENABLE_MCUBOUNDSINT));
+ sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
+ IRQSTATUS_MCVALIDINT |
+ IRQSTATUS_MCBOUNDSINT));
+
+ /*
+ * Wait for SR to be disabled.
+ * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
+ */
+ omap_test_timeout((sr_read_reg(sr, IRQSTATUS) &
+ IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
+ timeout);
+
+ if (timeout >= SR_DISABLE_TIMEOUT)
+ dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
+ __func__);
+
+ /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
+ sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
+ sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
+}
+
+/* Public Functions */
+
+/**
+ * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the
+ * error generator module.
+ * @voltdm: VDD pointer to which the SR module to be configured belongs to.
+ *
+ * This API is to be called from the smartreflex class driver to
+ * configure the error generator module inside the smartreflex module.
+ * SR settings if using the ERROR module inside Smartreflex.
+ * SR CLASS 3 by default uses only the ERROR module where as
+ * SR CLASS 2 can choose between ERROR module and MINMAXAVG
+ * module. Returns 0 on success and error value in case of failure.
+ */
+int sr_configure_errgen(struct voltagedomain *voltdm)
+{
+ u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en;
+ u32 vpboundint_st, senp_en = 0, senn_en = 0;
+ u8 senp_shift, senn_shift;
+ struct omap_sr *sr = _sr_lookup(voltdm);
+ struct omap_sr_data *pdata;
+
+ if (IS_ERR(sr)) {
+ pr_warning("%s: omap_sr struct for sr_%s not found\n",
+ __func__, voltdm->name);
+ return -EINVAL;
+ }
+
+ pdata = sr->pdev->dev.platform_data;
+
+ if (!sr->clk_length)
+ sr_set_clk_length(sr);
+
+ if (pdata) {
+ senp_en = pdata->senp_mod;
+ senn_en = pdata->senn_mod;
+ } else {
+ dev_warn(&sr->pdev->dev, "%s: Missing pdata\n", __func__);
+ }
+
+ sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
+ SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
+
+ if (sr->ip_type == SR_TYPE_V1) {
+ sr_config |= SRCONFIG_DELAYCTRL;
+ senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
+ senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
+ errconfig_offs = ERRCONFIG_V1;
+ vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
+ vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
+ } else if (sr->ip_type == SR_TYPE_V2) {
+ senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
+ senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
+ errconfig_offs = ERRCONFIG_V2;
+ vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
+ vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
+ } else {
+ dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
+ "module without specifying the ip\n", __func__);
+ return -EINVAL;
+ }
+
+ sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
+ sr_write_reg(sr, SRCONFIG, sr_config);
+ sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
+ (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
+ (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
+ sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
+ SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
+ sr_errconfig);
+
+ /* Enabling the interrupts if the ERROR module is used */
+ sr_modify_reg(sr, errconfig_offs,
+ vpboundint_en, (vpboundint_en | vpboundint_st));
+
+ return 0;
+}
+
+/**
+ * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the
+ * minmaxavg module.
+ * @voltdm: VDD pointer to which the SR module to be configured belongs to.
+ *
+ * This API is to be called from the smartreflex class driver to
+ * configure the minmaxavg module inside the smartreflex module.
+ * SR settings if using the ERROR module inside Smartreflex.
+ * SR CLASS 3 by default uses only the ERROR module where as
+ * SR CLASS 2 can choose between ERROR module and MINMAXAVG
+ * module. Returns 0 on success and error value in case of failure.
+ */
+int sr_configure_minmax(struct voltagedomain *voltdm)
+{
+ u32 sr_config, sr_avgwt;
+ u32 senp_en = 0, senn_en = 0;
+ u8 senp_shift, senn_shift;
+ struct omap_sr *sr = _sr_lookup(voltdm);
+ struct omap_sr_data *pdata;
+
+ if (IS_ERR(sr)) {
+ pr_warning("%s: omap_sr struct for sr_%s not found\n",
+ __func__, voltdm->name);
+ return -EINVAL;
+ }
+
+ pdata = sr->pdev->dev.platform_data;
+
+ if (!sr->clk_length)
+ sr_set_clk_length(sr);
+
+ if (pdata) {
+ senp_en = pdata->senp_mod;
+ senn_en = pdata->senn_mod;
+ } else {
+ dev_warn(&sr->pdev->dev, "%s: Missing pdata\n", __func__);
+ }
+
+ sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
+ SRCONFIG_SENENABLE |
+ (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
+
+ if (sr->ip_type == SR_TYPE_V1) {
+ sr_config |= SRCONFIG_DELAYCTRL;
+ senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
+ senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
+ } else if (sr->ip_type == SR_TYPE_V2) {
+ senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
+ senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
+ } else {
+ dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
+ "module without specifying the ip\n", __func__);
+ return -EINVAL;
+ }
+
+ sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
+ sr_write_reg(sr, SRCONFIG, sr_config);
+ sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
+ (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
+ sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
+
+ /*
+ * Enabling the interrupts if MINMAXAVG module is used.
+ * TODO: check if all the interrupts are mandatory
+ */
+ if (sr->ip_type == SR_TYPE_V1) {
+ sr_modify_reg(sr, ERRCONFIG_V1,
+ (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
+ ERRCONFIG_MCUBOUNDINTEN),
+ (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
+ ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
+ ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
+ } else if (sr->ip_type == SR_TYPE_V2) {
+ sr_write_reg(sr, IRQSTATUS,
+ IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
+ IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
+ sr_write_reg(sr, IRQENABLE_SET,
+ IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
+ IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
+ }
+
+ return 0;
+}
+
+/**
+ * sr_enable() - Enables the smartreflex module.
+ * @voltdm: VDD pointer to which the SR module to be configured belongs to.
+ * @volt: The voltage at which the Voltage domain associated with
+ * the smartreflex module is operating at.
+ * This is required only to program the correct Ntarget value.
+ *
+ * This API is to be called from the smartreflex class driver to
+ * enable a smartreflex module. Returns 0 on success. Returns error
+ * value if the voltage passed is wrong or if ntarget value is wrong.
+ */
+int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
+{
+ u32 nvalue_reciprocal;
+ struct omap_volt_data *volt_data;
+ struct omap_sr *sr = _sr_lookup(voltdm);
+ int ret;
+
+ if (IS_ERR(sr)) {
+ pr_warning("%s: omap_sr struct for sr_%s not found\n",
+ __func__, voltdm->name);
+ return -EINVAL;
+ }
+
+ volt_data = omap_voltage_get_voltdata(voltdm, volt);
+
+ if (IS_ERR(volt_data)) {
+ dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
+ " for nominal voltage %ld\n", __func__, volt);
+ return -ENODATA;
+ }
+
+ nvalue_reciprocal = volt_data->sr_nvalue;
+
+ if (!nvalue_reciprocal) {
+ dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n",
+ __func__, volt);
+ return -ENODATA;
+ }
+
+ /* errminlimit is opp dependent and hence linked to voltage */
+ sr->err_minlimit = volt_data->sr_errminlimit;
+
+ /* Enable the clocks */
+ if (!sr->sr_enable) {
+ pm_runtime_get_sync(&sr->pdev->dev);
+ sr->sr_enable = true;
+ }
+
+ /* Check if SR is already enabled. If yes do nothing */
+ if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
+ return 0;
+
+ /* Configure SR */
+ ret = sr_class->configure(voltdm);
+ if (ret)
+ return ret;
+
+ sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal);
+
+ /* SRCONFIG - enable SR */
+ sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
+ return 0;
+}
+
+/**
+ * sr_disable() - Disables the smartreflex module.
+ * @voltdm: VDD pointer to which the SR module to be configured belongs to.
+ *
+ * This API is to be called from the smartreflex class driver to
+ * disable a smartreflex module.
+ */
+void sr_disable(struct voltagedomain *voltdm)
+{
+ struct omap_sr *sr = _sr_lookup(voltdm);
+
+ if (IS_ERR(sr)) {
+ pr_warning("%s: omap_sr struct for sr_%s not found\n",
+ __func__, voltdm->name);
+ return;
+ }
+
+ /* Check if SR clocks are already disabled. If yes do nothing */
+ if (!sr->sr_enable)
+ return;
+
+ /* Check if SR is already disabled. If yes just disable the clocks */
+ if (!(sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE))
+ goto disable_clocks;
+
+ if (sr->ip_type == SR_TYPE_V1)
+ sr_v1_disable(sr);
+ else if (sr->ip_type == SR_TYPE_V2)
+ sr_v2_disable(sr);
+
+disable_clocks:
+ pm_runtime_put_sync(&sr->pdev->dev);
+ sr->sr_enable = false;
+}
+
+/**
+ * sr_register_class() - API to register a smartreflex class parameters.
+ * @class_data: The structure containing various sr class specific data.
+ *
+ * This API is to be called by the smartreflex class driver to register itself
+ * with the smartreflex driver during init. Returns 0 on success else the
+ * error value.
+ */
+int sr_register_class(struct omap_smartreflex_class_data *class_data)
+{
+ struct omap_sr *sr_info;
+
+ if (!class_data) {
+ pr_warning("%s:, Smartreflex class data passed is NULL\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ if (sr_class) {
+ pr_warning("%s: Smartreflex class driver already registered\n",
+ __func__);
+ return -EBUSY;
+ }
+
+ sr_class = class_data;
+
+ /*
+ * Call into late init to do intializations that require
+ * both sr driver and sr class driver to be initiallized.
+ */
+ list_for_each_entry(sr_info, &sr_list, node)
+ sr_late_init(sr_info);
+
+ return 0;
+}
+
+/**
+ * omap_sr_enable() - API to enable SR clocks and to call into the
+ * registered smartreflex class enable API.
+ * @voltdm: VDD pointer to which the SR module to be configured belongs to.
+ *
+ * This API is to be called from the kernel in order to enable
+ * a particular smartreflex module. This API will do the initial
+ * configurations to turn on the smartreflex module and in turn call
+ * into the registered smartreflex class enable API.
+ */
+void omap_sr_enable(struct voltagedomain *voltdm)
+{
+ struct omap_sr *sr = _sr_lookup(voltdm);
+
+ if (IS_ERR(sr)) {
+ pr_warning("%s: omap_sr struct for sr_%s not found\n",
+ __func__, voltdm->name);
+ return;
+ }
+
+ if (!sr->autocomp_active)
+ return;
+
+ if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
+ dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
+ "registered\n", __func__);
+ return;
+ }
+
+ sr_class->enable(voltdm);
+}
+
+/**
+ * omap_sr_disable() - API to disable SR without resetting the voltage
+ * processor voltage
+ * @voltdm: VDD pointer to which the SR module to be configured belongs to.
+ *
+ * This API is to be called from the kernel in order to disable
+ * a particular smartreflex module. This API will in turn call
+ * into the registered smartreflex class disable API. This API will tell
+ * the smartreflex class disable not to reset the VP voltage after
+ * disabling smartreflex.
+ */
+void omap_sr_disable(struct voltagedomain *voltdm)
+{
+ struct omap_sr *sr = _sr_lookup(voltdm);
+
+ if (IS_ERR(sr)) {
+ pr_warning("%s: omap_sr struct for sr_%s not found\n",
+ __func__, voltdm->name);
+ return;
+ }
+
+ if (!sr->autocomp_active)
+ return;
+
+ if (!sr_class || !(sr_class->disable)) {
+ dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
+ "registered\n", __func__);
+ return;
+ }
+
+ sr_class->disable(voltdm, 0);
+}
+
+/**
+ * omap_sr_disable_reset_volt() - API to disable SR and reset the
+ * voltage processor voltage
+ * @voltdm: VDD pointer to which the SR module to be configured belongs to.
+ *
+ * This API is to be called from the kernel in order to disable
+ * a particular smartreflex module. This API will in turn call
+ * into the registered smartreflex class disable API. This API will tell
+ * the smartreflex class disable to reset the VP voltage after
+ * disabling smartreflex.
+ */
+void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
+{
+ struct omap_sr *sr = _sr_lookup(voltdm);
+
+ if (IS_ERR(sr)) {
+ pr_warning("%s: omap_sr struct for sr_%s not found\n",
+ __func__, voltdm->name);
+ return;
+ }
+
+ if (!sr->autocomp_active)
+ return;
+
+ if (!sr_class || !(sr_class->disable)) {
+ dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
+ "registered\n", __func__);
+ return;
+ }
+
+ sr_class->disable(voltdm, 1);
+}
+
+/**
+ * omap_sr_register_pmic() - API to register pmic specific info.
+ * @pmic_data: The structure containing pmic specific data.
+ *
+ * This API is to be called from the PMIC specific code to register with
+ * smartreflex driver pmic specific info. Currently the only info required
+ * is the smartreflex init on the PMIC side.
+ */
+void omap_sr_register_pmic(struct omap_smartreflex_pmic_data *pmic_data)
+{
+ if (!pmic_data) {
+ pr_warning("%s: Trying to register NULL PMIC data structure"
+ "with smartreflex\n", __func__);
+ return;
+ }
+
+ sr_pmic_data = pmic_data;
+}
+
+/* PM Debug Fs enteries to enable disable smartreflex. */
+static int omap_sr_autocomp_show(void *data, u64 *val)
+{
+ struct omap_sr *sr_info = (struct omap_sr *) data;
+
+ if (!sr_info) {
+ pr_warning("%s: omap_sr struct for sr_%s not found\n",
+ __func__, sr_info->voltdm->name);
+ return -EINVAL;
+ }
+
+ *val = sr_info->autocomp_active;
+
+ return 0;
+}
+
+static int omap_sr_autocomp_store(void *data, u64 val)
+{
+ struct omap_sr *sr_info = (struct omap_sr *) data;
+
+ if (!sr_info) {
+ pr_warning("%s: omap_sr struct for sr_%s not found\n",
+ __func__, sr_info->voltdm->name);
+ return -EINVAL;
+ }
+
+ /* Sanity check */
+ if (val && (val != 1)) {
+ pr_warning("%s: Invalid argument %lld\n", __func__, val);
+ return -EINVAL;
+ }
+
+ if (!val)
+ sr_stop_vddautocomp(sr_info);
+ else
+ sr_start_vddautocomp(sr_info);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
+ omap_sr_autocomp_store, "%llu\n");
+
+static int __init omap_smartreflex_probe(struct platform_device *pdev)
+{
+ struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
+ struct omap_device *odev = to_omap_device(pdev);
+ struct omap_sr_data *pdata = pdev->dev.platform_data;
+ struct resource *mem, *irq;
+ struct dentry *dbg_dir;
+ char *name;
+ int ret = 0;
+
+ if (!sr_info) {
+ dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ if (!pdata) {
+ dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
+ return -EINVAL;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem) {
+ dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
+ ret = -ENODEV;
+ goto err_free_devinfo;
+ }
+
+ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+
+ pm_runtime_enable(&pdev->dev);
+
+ sr_info->pdev = pdev;
+ sr_info->srid = pdev->id;
+ sr_info->voltdm = pdata->voltdm;
+ sr_info->autocomp_active = false;
+ sr_info->ip_type = odev->hwmods[0]->class->rev;
+ sr_info->base = ioremap(mem->start, resource_size(mem));
+ if (!sr_info->base) {
+ dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
+ ret = -ENOMEM;
+ goto err_release_region;
+ }
+
+ if (irq)
+ sr_info->irq = irq->start;
+
+ sr_set_clk_length(sr_info);
+ sr_set_regfields(sr_info);
+
+ list_add(&sr_info->node, &sr_list);
+
+ /*
+ * Call into late init to do intializations that require
+ * both sr driver and sr class driver to be initiallized.
+ */
+ if (sr_class) {
+ ret = sr_late_init(sr_info);
+ if (ret) {
+ pr_warning("%s: Error in SR late init\n", __func__);
+ return ret;
+ }
+ }
+
+ dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
+
+ /*
+ * If the Smartreflex main debugfs directory is not created, do
+ * not try to create rest of the debugfs entries.
+ */
+ if (!sr_dbg_dir)
+ return ret;
+
+ name = kzalloc(SMARTREFLEX_NAME_LEN + 1, GFP_KERNEL);
+ if (!name) {
+ dev_err(&pdev->dev, "%s: Unable to allocate name for"
+ "debufs entry", __func__);
+ return ret;
+ }
+
+ /* Create the debug fs enteries */
+ strcpy(name, "sr_");
+ strcat(name, sr_info->voltdm->name);
+
+ dbg_dir = debugfs_create_dir(name, sr_dbg_dir);
+ if (IS_ERR(dbg_dir)) {
+ dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
+ __func__);
+ return ret;
+ }
+
+ (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir,
+ (void *)sr_info, &pm_sr_fops);
+
+ return ret;
+
+err_release_region:
+ release_mem_region(mem->start, resource_size(mem));
+err_free_devinfo:
+ kfree(sr_info);
+
+ return ret;
+}
+
+static int __devexit omap_smartreflex_remove(struct platform_device *pdev)
+{
+ struct omap_sr_data *pdata = pdev->dev.platform_data;
+ struct omap_sr *sr_info;
+ struct resource *mem;
+
+ if (!pdata) {
+ dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
+ return -EINVAL;
+ }
+
+ sr_info = _sr_lookup(pdata->voltdm);
+ if (!sr_info) {
+ dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ /* Disable Autocompensation if enabled before removing the module */
+ if (sr_info->autocomp_active)
+ sr_stop_vddautocomp(sr_info);
+
+ list_del(&sr_info->node);
+ iounmap(sr_info->base);
+ kfree(sr_info);
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ release_mem_region(mem->start, resource_size(mem));
+
+ return 0;
+}
+
+static struct platform_driver smartreflex_driver = {
+ .remove = omap_smartreflex_remove,
+ .driver = {
+ .name = "smartreflex",
+ },
+};
+
+static int __init sr_init(void)
+{
+ int ret = 0;
+
+ /*
+ * sr_init is a late init. If by then a pmic specific API is not
+ * registered either there is no need for anything to be done on
+ * the PMIC side or somebody has forgotten to register a PMIC
+ * handler. Warn for the second condition.
+ */
+ if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
+ sr_pmic_data->sr_pmic_init();
+ else
+ pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
+
+ if (pm_dbg_main_dir) {
+ struct dentry *d;
+
+ d = debugfs_create_dir("smartreflex", pm_dbg_main_dir);
+ if (!IS_ERR(d))
+ sr_dbg_dir = d;
+ }
+
+ ret = platform_driver_probe(&smartreflex_driver,
+ omap_smartreflex_probe);
+ if (ret) {
+ pr_err("%s: platform driver register failed for SR\n",
+ __func__);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void __exit sr_exit(void)
+{
+ platform_driver_unregister(&smartreflex_driver);
+}
+late_initcall(sr_init);
+module_exit(sr_exit);
+
+MODULE_DESCRIPTION("OMAP SMARTREFLEX DRIVER");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:" DRIVER_NAME);
+MODULE_AUTHOR("Texas Instruments Inc");
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index e39a417..8056349 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -35,6 +35,38 @@ config OMAP_DEBUG_LEDS
depends on OMAP_DEBUG_DEVICES
default y if LEDS
+config OMAP_SMARTREFLEX
+ bool "SmartReflex support"
+ depends on ARCH_OMAP3 && PM
+ help
+ Say Y if you want to enable SmartReflex.
+
+ SmartReflex can perform continuous dynamic voltage
+ scaling around the nominal operating point voltage
+ according to silicon characteristics and operating
+ conditions. Enabling SmartReflex reduces power
+ consumption.
+
+ Please note, that by default SmartReflex is only
+ initialized. To enable the automatic voltage
+ compensation for VDD1 and VDD2, user must write 1 to
+ /debug/pm_debug/Smartreflex/SR<X>/autocomp,
+ where X is 1 or 2 for OMAP3
+
+config OMAP_SMARTREFLEX_TESTING
+ bool "Smartreflex testing support"
+ depends on OMAP_SMARTREFLEX
+ default n
+ help
+ Say Y if you want to enable SmartReflex testing with SW hardcoded
+ NVALUES intead of E-fuse NVALUES set in factory silicon testing.
+
+ In some devices the E-fuse values have not been set, even though
+ SmartReflex modules are included. Using these hardcoded values set
+ in software, one can test the SmartReflex features without E-fuse.
+
+ WARNING: Enabling this option may cause your device to hang!
+
config OMAP_RESET_CLOCKS
bool "Reset unused clocks during boot"
depends on ARCH_OMAP
diff --git a/arch/arm/plat-omap/include/plat/smartreflex.h b/arch/arm/plat-omap/include/plat/smartreflex.h
new file mode 100644
index 0000000..1ad03ea
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/smartreflex.h
@@ -0,0 +1,277 @@
+/*
+ * OMAP Smartreflex Defines and Routines
+ *
+ * Author: Thara Gopinath <thara@ti.com>
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Thara Gopinath <thara@ti.com>
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Kalle Jokiniemi
+ *
+ * Copyright (C) 2007 Texas Instruments, Inc.
+ * Lesly A M <x0080970@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARM_OMAP_SMARTREFLEX_H
+#define __ASM_ARM_OMAP_SMARTREFLEX_H
+
+#include <linux/platform_device.h>
+#include <plat/voltage.h>
+
+#ifdef CONFIG_PM_DEBUG
+extern struct dentry *pm_dbg_main_dir;
+extern struct dentry *sr_dbg_dir;
+#endif
+
+/*
+ * Different Smartreflex IPs version. The v1 is the 65nm version used in
+ * OMAP3430. The v2 is the update for the 45nm version of the IP
+ * used in OMAP3630 and OMAP4430
+ */
+#define SR_TYPE_V1 1
+#define SR_TYPE_V2 2
+
+/* SMART REFLEX REG ADDRESS OFFSET */
+#define SRCONFIG 0x00
+#define SRSTATUS 0x04
+#define SENVAL 0x08
+#define SENMIN 0x0C
+#define SENMAX 0x10
+#define SENAVG 0x14
+#define AVGWEIGHT 0x18
+#define NVALUERECIPROCAL 0x1c
+#define SENERROR_V1 0x20
+#define ERRCONFIG_V1 0x24
+#define IRQ_EOI 0x20
+#define IRQSTATUS_RAW 0x24
+#define IRQSTATUS 0x28
+#define IRQENABLE_SET 0x2C
+#define IRQENABLE_CLR 0x30
+#define SENERROR_V2 0x34
+#define ERRCONFIG_V2 0x38
+
+/* Bit/Shift Positions */
+
+/* SRCONFIG */
+#define SRCONFIG_ACCUMDATA_SHIFT 22
+#define SRCONFIG_SRCLKLENGTH_SHIFT 12
+#define SRCONFIG_SENNENABLE_V1_SHIFT 5
+#define SRCONFIG_SENPENABLE_V1_SHIFT 3
+#define SRCONFIG_SENNENABLE_V2_SHIFT 1
+#define SRCONFIG_SENPENABLE_V2_SHIFT 0
+#define SRCONFIG_CLKCTRL_SHIFT 0
+
+#define SRCONFIG_ACCUMDATA_MASK (0x3ff << 22)
+
+#define SRCONFIG_SRENABLE BIT(11)
+#define SRCONFIG_SENENABLE BIT(10)
+#define SRCONFIG_ERRGEN_EN BIT(9)
+#define SRCONFIG_MINMAXAVG_EN BIT(8)
+#define SRCONFIG_DELAYCTRL BIT(2)
+
+/* AVGWEIGHT */
+#define AVGWEIGHT_SENPAVGWEIGHT_SHIFT 2
+#define AVGWEIGHT_SENNAVGWEIGHT_SHIFT 0
+
+/* NVALUERECIPROCAL */
+#define NVALUERECIPROCAL_SENPGAIN_SHIFT 20
+#define NVALUERECIPROCAL_SENNGAIN_SHIFT 16
+#define NVALUERECIPROCAL_RNSENP_SHIFT 8
+#define NVALUERECIPROCAL_RNSENN_SHIFT 0
+
+/* ERRCONFIG */
+#define ERRCONFIG_ERRWEIGHT_SHIFT 16
+#define ERRCONFIG_ERRMAXLIMIT_SHIFT 8
+#define ERRCONFIG_ERRMINLIMIT_SHIFT 0
+
+#define SR_ERRWEIGHT_MASK (0x07 << 16)
+#define SR_ERRMAXLIMIT_MASK (0xff << 8)
+#define SR_ERRMINLIMIT_MASK (0xff << 0)
+
+#define ERRCONFIG_VPBOUNDINTEN_V1 BIT(31)
+#define ERRCONFIG_VPBOUNDINTST_V1 BIT(30)
+#define ERRCONFIG_MCUACCUMINTEN BIT(29)
+#define ERRCONFIG_MCUACCUMINTST BIT(28)
+#define ERRCONFIG_MCUVALIDINTEN BIT(27)
+#define ERRCONFIG_MCUVALIDINTST BIT(26)
+#define ERRCONFIG_MCUBOUNDINTEN BIT(25)
+#define ERRCONFIG_MCUBOUNDINTST BIT(24)
+#define ERRCONFIG_MCUDISACKINTEN BIT(23)
+#define ERRCONFIG_VPBOUNDINTST_V2 BIT(23)
+#define ERRCONFIG_MCUDISACKINTST BIT(22)
+#define ERRCONFIG_VPBOUNDINTEN_V2 BIT(22)
+
+#define ERRCONFIG_STATUS_V1_MASK (ERRCONFIG_VPBOUNDINTST_V1 | \
+ ERRCONFIG_MCUACCUMINTST | \
+ ERRCONFIG_MCUVALIDINTST | \
+ ERRCONFIG_MCUBOUNDINTST | \
+ ERRCONFIG_MCUDISACKINTST)
+/* IRQSTATUS */
+#define IRQSTATUS_MCUACCUMINT BIT(3)
+#define IRQSTATUS_MCVALIDINT BIT(2)
+#define IRQSTATUS_MCBOUNDSINT BIT(1)
+#define IRQSTATUS_MCUDISABLEACKINT BIT(0)
+
+/* IRQENABLE_SET and IRQENABLE_CLEAR */
+#define IRQENABLE_MCUACCUMINT BIT(3)
+#define IRQENABLE_MCUVALIDINT BIT(2)
+#define IRQENABLE_MCUBOUNDSINT BIT(1)
+#define IRQENABLE_MCUDISABLEACKINT BIT(0)
+
+/* Common Bit values */
+
+#define SRCLKLENGTH_12MHZ_SYSCLK 0x3c
+#define SRCLKLENGTH_13MHZ_SYSCLK 0x41
+#define SRCLKLENGTH_19MHZ_SYSCLK 0x60
+#define SRCLKLENGTH_26MHZ_SYSCLK 0x82
+#define SRCLKLENGTH_38MHZ_SYSCLK 0xC0
+
+/*
+ * 3430 specific values. Maybe these should be passed from board file or
+ * pmic structures.
+ */
+#define OMAP3430_SR_ACCUMDATA 0x1f4
+
+#define OMAP3430_SR1_SENPAVGWEIGHT 0x03
+#define OMAP3430_SR1_SENNAVGWEIGHT 0x03
+
+#define OMAP3430_SR2_SENPAVGWEIGHT 0x01
+#define OMAP3430_SR2_SENNAVGWEIGHT 0x01
+
+#define OMAP3430_SR_ERRWEIGHT 0x04
+#define OMAP3430_SR_ERRMAXLIMIT 0x02
+
+/* TODO:3630/OMAP4 values if it has to come from this file */
+
+/**
+ * omap_smartreflex_dev_data - Smartreflex device specific data
+ *
+ * @volts_supported : Number of distinct voltages possible for the VDD
+ * associated with this smartreflex module.
+ * @efuse_sr_control : The regisrter offset of control_fuse_sr efuse
+ * register from which sennenable and senpenable values
+ * are obtained.
+ * @sennenable_shift : The shift in the control_fuse_sr register for
+ * obtaining the sennenable value for this smartreflex
+ * module.
+ * @senpenable_shift : The shift in the control_fuse_sr register for
+ * obtaining the senpenable value for this smartreflex
+ * module.
+ * @efuse_nvalues_offs : Array of efuse offsets from which ntarget values can
+ * be retrieved. Number of efuse offsets in this arrray
+ * is equal to the volts_supported value ie one efuse
+ * register per supported voltage.
+ * @test_sennenable : SENNENABLE test value
+ * @test_senpenable : SENPENABLE test value.
+ * @test_nvalues : Array of test ntarget values.
+ * @vdd_name : Name of the voltage domain associated with this
+ * Smartreflex device.
+ * @volt_data : Voltage table associated with this smartreflex module
+ */
+struct omap_sr_dev_data {
+ int volts_supported;
+ u32 efuse_sr_control;
+ u32 sennenable_shift;
+ u32 senpenable_shift;
+ u32 *efuse_nvalues_offs;
+ u32 test_sennenable;
+ u32 test_senpenable;
+ u32 *test_nvalues;
+ char *vdd_name;
+ struct omap_volt_data *volt_data;
+};
+
+/**
+ * omap_smartreflex_pmic_data : Strucutre to be populated by pmic code to pass
+ * pmic specific info to smartreflex driver
+ *
+ * @sr_pmic_init - API to initialize smartreflex on the PMIC side.
+ */
+struct omap_smartreflex_pmic_data {
+ void (*sr_pmic_init) (void);
+};
+
+#ifdef CONFIG_OMAP_SMARTREFLEX
+/*
+ * The smart reflex driver supports CLASS1 CLASS2 and CLASS3 SR.
+ * The smartreflex class driver should pass the class type.
+ * Should be used to populate the class_type field of the
+ * omap_smartreflex_class_data structure.
+ */
+#define SR_CLASS1 0x1
+#define SR_CLASS2 0x2
+#define SR_CLASS3 0x3
+
+/**
+ * omap_smartreflex_class_data : Structure to be populated by
+ * Smartreflex class driver with corresponding class enable disable API's
+ *
+ * @enable - API to enable a particular class smaartreflex.
+ * @disable - API to disable a particular class smartreflex.
+ * @configure - API to configure a particular class smartreflex.
+ * @notify - API to notify the class driver about an event in SR. Not needed
+ * for class3.
+ * @notify_flags - specify the events to be notified to the class driver
+ * @class_type - specify which smartreflex class. Can be used by the SR driver
+ * to take any class based decisions.
+ */
+struct omap_smartreflex_class_data {
+ int (*enable)(struct voltagedomain *voltdm);
+ int (*disable)(struct voltagedomain *voltdm, int is_volt_reset);
+ int (*configure)(struct voltagedomain *voltdm);
+ int (*notify)(struct voltagedomain *voltdm, u32 status);
+ u8 notify_flags;
+ u8 class_type;
+};
+
+/**
+ * omap_smartreflex_data - Smartreflex platform data
+ *
+ * @senp_mod : SENPENABLE value for the sr
+ * @senn_mod : SENNENABLE value for sr
+ * @sr_nvalue : array of n target values for sr
+ * @enable_on_init : whether this sr module needs to enabled at
+ * boot up or not.
+ * @voltdm : Pointer to the voltage domain associated with the SR
+ */
+struct omap_sr_data {
+ u32 senp_mod;
+ u32 senn_mod;
+ bool enable_on_init;
+ struct voltagedomain *voltdm;
+};
+
+/*
+ * Smartreflex module enable/disable interface.
+ * NOTE: if smartreflex is not enabled from sysfs, these functions will not
+ * do anything.
+ */
+void omap_sr_enable(struct voltagedomain *voltdm);
+void omap_sr_disable(struct voltagedomain *voltdm);
+void omap_sr_disable_reset_volt(struct voltagedomain *voltdm);
+
+/* API to register the pmic specific data with the smartreflex driver. */
+void omap_sr_register_pmic(struct omap_smartreflex_pmic_data *pmic_data);
+
+/* Smartreflex driver hooks to be called from Smartreflex class driver */
+int sr_enable(struct voltagedomain *voltdm, unsigned long volt);
+void sr_disable(struct voltagedomain *voltdm);
+int sr_configure_errgen(struct voltagedomain *voltdm);
+int sr_configure_minmax(struct voltagedomain *voltdm);
+
+/* API to register the smartreflex class driver with the smartreflex driver */
+int sr_register_class(struct omap_smartreflex_class_data *class_data);
+#else
+static inline void omap_sr_enable(struct voltagedomain *voltdm) {}
+static inline void omap_sr_disable(struct voltagedomain *voltdm) {}
+static inline void omap_sr_disable_reset_volt(
+ struct voltagedomain *voltdm) {}
+static inline void omap_sr_register_pmic(
+ struct omap_smartreflex_pmic_data *pmic_data) {}
+#endif
+#endif
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support.
2010-09-22 14:45 ` [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support Thara Gopinath
@ 2010-09-28 23:30 ` Kevin Hilman
2010-09-29 14:41 ` Gopinath, Thara
2010-10-14 0:04 ` Kevin Hilman
1 sibling, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-09-28 23:30 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Thara Gopinath <thara@ti.com> writes:
> SmartReflex modules do adaptive voltage control for real-time
> voltage adjustments. With Smartreflex the power supply voltage
> can be adapted to the silicon performance(manufacturing process,
> temperature induced performance, age induced performance etc).
>
> There are differnet classes of smartreflex implementation.
> Class-0: Manufacturing Test Calibration
> Class-1: Boot-Time Software Calibration
> Class-2: Continuous Software Calibration
> Class-3: Continuous Hardware Calibration
> Class-4: Fully Integrated Power Management
>
> OMAP3 has two smartreflex modules one associated with VDD1 and the
> other associated with VDD2.
> This patch adds support for smartreflex driver. The driver is designed
> for Class-1 , Class-2 and Class-3 support and is a platform driver.
> Smartreflex driver can be enabled through a Kconfig option
> "SmartReflex support" under "System type"->"TI OMAP implementations" menu.
>
> Smartreflex autocompensation feature can be enabled runtime through
> a debug fs option.
> To enable smartreflex autocompensation feature
> echo 1 > /debugfs/pm_debug/smartreflex/sr_<X>/autocomp
> To disable smartreflex autocompensation feature
> echo 0 > /debugfs/pm_debug/smartreflex/sr_<X>/autocomp
>
> where X can be mpu, core , iva etc.
>
[...]
> +static void sr_set_regfields(struct omap_sr *sr)
> +{
> + /*
> + * For time being these values are defined in smartreflex.h
> + * and populated during init. May be they can be moved to board
> + * file or pmic specific data structure. In that case these structure
> + * fields will have to be populated using the pdata or pmic structure.
> + */
> + if (cpu_is_omap34xx()) {
> + sr->err_weight = OMAP3430_SR_ERRWEIGHT;
> + sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
> + sr->accum_data = OMAP3430_SR_ACCUMDATA;
> + if (!(strcmp(sr->voltdm->name, "mpu"))) {
> + sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
> + sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
> + } else {
> + sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
> + sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
> + }
> + }
> + /* TODO: 3630 and Omap4 specific bit field values */
This comment is still present even after the OMAP4 series is applied.
[...]
> +/*
> + * 3430 specific values. Maybe these should be passed from board file or
> + * pmic structures.
> + */
> +#define OMAP3430_SR_ACCUMDATA 0x1f4
> +
> +#define OMAP3430_SR1_SENPAVGWEIGHT 0x03
> +#define OMAP3430_SR1_SENNAVGWEIGHT 0x03
> +
> +#define OMAP3430_SR2_SENPAVGWEIGHT 0x01
> +#define OMAP3430_SR2_SENNAVGWEIGHT 0x01
> +
> +#define OMAP3430_SR_ERRWEIGHT 0x04
> +#define OMAP3430_SR_ERRMAXLIMIT 0x02
> +
> +/* TODO:3630/OMAP4 values if it has to come from this file */
ditto
It's best to just not put these kind of things into the code in the
first place, they tend to be forgotten and stale quickly.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support.
2010-09-28 23:30 ` Kevin Hilman
@ 2010-09-29 14:41 ` Gopinath, Thara
0 siblings, 0 replies; 56+ messages in thread
From: Gopinath, Thara @ 2010-09-29 14:41 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>Sent: Wednesday, September 29, 2010 5:01 AM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support.
>>
>>Thara Gopinath <thara@ti.com> writes:
>>
>>> SmartReflex modules do adaptive voltage control for real-time
>>> voltage adjustments. With Smartreflex the power supply voltage
>>> can be adapted to the silicon performance(manufacturing process,
>>> temperature induced performance, age induced performance etc).
>>>
>>> There are differnet classes of smartreflex implementation.
>>> Class-0: Manufacturing Test Calibration
>>> Class-1: Boot-Time Software Calibration
>>> Class-2: Continuous Software Calibration
>>> Class-3: Continuous Hardware Calibration
>>> Class-4: Fully Integrated Power Management
>>>
>>> OMAP3 has two smartreflex modules one associated with VDD1 and the
>>> other associated with VDD2.
>>> This patch adds support for smartreflex driver. The driver is designed
>>> for Class-1 , Class-2 and Class-3 support and is a platform driver.
>>> Smartreflex driver can be enabled through a Kconfig option
>>> "SmartReflex support" under "System type"->"TI OMAP implementations" menu.
>>>
>>> Smartreflex autocompensation feature can be enabled runtime through
>>> a debug fs option.
>>> To enable smartreflex autocompensation feature
>>> echo 1 > /debugfs/pm_debug/smartreflex/sr_<X>/autocomp
>>> To disable smartreflex autocompensation feature
>>> echo 0 > /debugfs/pm_debug/smartreflex/sr_<X>/autocomp
>>>
>>> where X can be mpu, core , iva etc.
>>>
>>
>>[...]
>>
>>> +static void sr_set_regfields(struct omap_sr *sr)
>>> +{
>>> + /*
>>> + * For time being these values are defined in smartreflex.h
>>> + * and populated during init. May be they can be moved to board
>>> + * file or pmic specific data structure. In that case these structure
>>> + * fields will have to be populated using the pdata or pmic structure.
>>> + */
>>> + if (cpu_is_omap34xx()) {
>>> + sr->err_weight = OMAP3430_SR_ERRWEIGHT;
>>> + sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
>>> + sr->accum_data = OMAP3430_SR_ACCUMDATA;
>>> + if (!(strcmp(sr->voltdm->name, "mpu"))) {
>>> + sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
>>> + sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
>>> + } else {
>>> + sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
>>> + sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
>>> + }
>>> + }
>>> + /* TODO: 3630 and Omap4 specific bit field values */
>>
>>This comment is still present even after the OMAP4 series is applied.
>>
>>[...]
>>
>>> +/*
>>> + * 3430 specific values. Maybe these should be passed from board file or
>>> + * pmic structures.
>>> + */
>>> +#define OMAP3430_SR_ACCUMDATA 0x1f4
>>> +
>>> +#define OMAP3430_SR1_SENPAVGWEIGHT 0x03
>>> +#define OMAP3430_SR1_SENNAVGWEIGHT 0x03
>>> +
>>> +#define OMAP3430_SR2_SENPAVGWEIGHT 0x01
>>> +#define OMAP3430_SR2_SENNAVGWEIGHT 0x01
>>> +
>>> +#define OMAP3430_SR_ERRWEIGHT 0x04
>>> +#define OMAP3430_SR_ERRMAXLIMIT 0x02
>>> +
>>> +/* TODO:3630/OMAP4 values if it has to come from this file */
>>
>>ditto
>>
>>It's best to just not put these kind of things into the code in the
>>first place, they tend to be forgotten and stale quickly.
Will fix this and post V4.
>>
>>Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support.
2010-09-22 14:45 ` [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support Thara Gopinath
2010-09-28 23:30 ` Kevin Hilman
@ 2010-10-14 0:04 ` Kevin Hilman
2010-10-22 14:21 ` Gopinath, Thara
1 sibling, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-10-14 0:04 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Thara Gopinath <thara@ti.com> writes:
> SmartReflex modules do adaptive voltage control for real-time
> voltage adjustments. With Smartreflex the power supply voltage
> can be adapted to the silicon performance(manufacturing process,
> temperature induced performance, age induced performance etc).
>
> There are differnet classes of smartreflex implementation.
> Class-0: Manufacturing Test Calibration
> Class-1: Boot-Time Software Calibration
> Class-2: Continuous Software Calibration
> Class-3: Continuous Hardware Calibration
> Class-4: Fully Integrated Power Management
>
> OMAP3 has two smartreflex modules one associated with VDD1 and the
> other associated with VDD2.
s/VDD1/MPU/
s/VDD2/CORE/
> This patch adds support for smartreflex driver. The driver is designed
> for Class-1 , Class-2 and Class-3 support and is a platform driver.
> Smartreflex driver can be enabled through a Kconfig option
> "SmartReflex support" under "System type"->"TI OMAP implementations" menu.
>
> Smartreflex autocompensation feature can be enabled runtime through
> a debug fs option.
> To enable smartreflex autocompensation feature
> echo 1 > /debugfs/pm_debug/smartreflex/sr_<X>/autocomp
> To disable smartreflex autocompensation feature
> echo 0 > /debugfs/pm_debug/smartreflex/sr_<X>/autocomp
>
> where X can be mpu, core , iva etc.
>
> This patch contains code originally in linux omap pm branch.
> Major contributors to this driver are
> Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley,
> Nishant Menon, Kevin Hilman.
>
> Signed-off-by: Thara Gopinath <thara@ti.com>
> ---
> arch/arm/mach-omap2/Makefile | 1 +
> arch/arm/mach-omap2/smartreflex.c | 1003 +++++++++++++++++++++++++
> arch/arm/plat-omap/Kconfig | 32 +
> arch/arm/plat-omap/include/plat/smartreflex.h | 277 +++++++
> 4 files changed, 1313 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/mach-omap2/smartreflex.c
> create mode 100644 arch/arm/plat-omap/include/plat/smartreflex.h
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index 4f74f2b..8dd32a7 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -56,6 +56,7 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o voltage.o \
> cpuidle34xx.o pm_bus.o
> obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
> obj-$(CONFIG_PM_DEBUG) += pm-debug.o
> +obj-$(CONFIG_OMAP_SMARTREFLEX) += smartreflex.o
>
> AFLAGS_sleep24xx.o :=-Wa,-march=armv6
> AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
> diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
> new file mode 100644
> index 0000000..7fc3138
> --- /dev/null
> +++ b/arch/arm/mach-omap2/smartreflex.c
> @@ -0,0 +1,1003 @@
> +/*
> + * OMAP SmartReflex Voltage Control
> + *
> + * Author: Thara Gopinath <thara@ti.com>
> + *
> + * Copyright (C) 2010 Texas Instruments, Inc.
> + * Thara Gopinath <thara@ti.com>
> + *
> + * Copyright (C) 2008 Nokia Corporation
> + * Kalle Jokiniemi
> + *
> + * Copyright (C) 2007 Texas Instruments, Inc.
> + * Lesly A M <x0080970@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/interrupt.h>
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/debugfs.h>
> +#include <linux/delay.h>
> +#include <linux/slab.h>
> +#include <linux/pm_runtime.h>
> +
> +#include <plat/omap_device.h>
> +#include <plat/common.h>
> +#include <plat/smartreflex.h>
> +
> +#include "pm.h"
> +
> +#define SMARTREFLEX_NAME_LEN 16
> +#define SR_DISABLE_TIMEOUT 200
> +
> +struct dentry *sr_dbg_dir;
> +
> +struct omap_sr {
> + int srid;
> + bool sr_enable;
sr_enabled is a better name
> + bool autocomp_active;
> + int ip_type;
> + u32 clk_length;
> + u32 err_weight;
> + u32 err_minlimit;
> + u32 err_maxlimit;
> + u32 accum_data;
> + u32 senn_avgweight;
> + u32 senp_avgweight;
> + unsigned int irq;
> + void __iomem *base;
> + struct platform_device *pdev;
> + struct list_head node;
> + struct voltagedomain *voltdm;
> +};
> +
> +/* sr_list contains all the instances of smartreflex module */
> +static LIST_HEAD(sr_list);
> +
> +static struct omap_smartreflex_class_data *sr_class;
> +static struct omap_smartreflex_pmic_data *sr_pmic_data;
> +
> +static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
> +{
> + __raw_writel(value, (sr->base + offset));
> +}
> +
> +static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
> + u32 value)
> +{
> + u32 reg_val;
> + u32 errconfig_offs, errconfig_mask;
> +
> + reg_val = __raw_readl(sr->base + offset);
> + reg_val &= ~mask;
> +
> + /*
> + * Smartreflex error config register is special as it contains
> + * certain status bits which if written a 1 into means a clear
> + * of those bits. So in order to make sure no accidental write of
> + * 1 happens to those status bits, do a clear of them in the read
> + * value. Now if there is an actual reguest to write to these bits
> + * they will be set in the nex step.
s/nex/next/
that being said, it's not clear what "the next step" is in this context.
There is only one write.
This should be rephrased to say (something like) it doesn't rewrite
values in these bits if they are currently set, but does allow the
caller to write those bits.
> + */
> + if (sr->ip_type == SR_TYPE_V1) {
> + errconfig_offs = ERRCONFIG_V1;
> + errconfig_mask = ERRCONFIG_STATUS_V1_MASK;
> + } else if (sr->ip_type == SR_TYPE_V2) {
> + errconfig_offs = ERRCONFIG_V2;
> + errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2;
> + }
> +
> + if (offset == errconfig_offs)
> + reg_val &= ~errconfig_mask;
> +
> + reg_val |= value;
> +
> + __raw_writel(reg_val, (sr->base + offset));
> +}
> +
> +static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
> +{
> + return __raw_readl(sr->base + offset);
> +}
> +
> +static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
> +{
> + struct omap_sr *sr_info;
> +
> + if (!voltdm) {
> + pr_err("%s: Null voltage domain passed!\n", __func__);
> + return ERR_PTR(-EINVAL);
> + }
> +
> + list_for_each_entry(sr_info, &sr_list, node) {
> + if (voltdm == sr_info->voltdm)
> + return sr_info;
> + }
> +
> + return ERR_PTR(-ENODATA);
> +}
>
> +static irqreturn_t sr_omap_isr(int irq, void *data)
Please rename to sr_interrupt
> +{
> + struct omap_sr *sr_info = (struct omap_sr *)data;
> + u32 status = 0;
> +
> + if (sr_info->ip_type == SR_TYPE_V1) {
> + /* Read the status bits */
> + status = sr_read_reg(sr_info, ERRCONFIG_V1);
> +
> + /* Clear them by writing back */
> + sr_write_reg(sr_info, ERRCONFIG_V1, status);
Shouldn't you be using sr_modify_reg for ERRCONFIG_V1?
> + } else if (sr_info->ip_type == SR_TYPE_V2) {
> + /* Read the status bits */
> + sr_read_reg(sr_info, IRQSTATUS);
> +
> + /* Clear them by writing back */
> + sr_write_reg(sr_info, IRQSTATUS, status);
> + }
Might as well use it for both.
> +
> + /* Call the class driver notify function if registered*/
This comment does not add anything the code doesn't make clear, and
is not fully correct: it has to be registered, and be class 2.
IMO, you can just remove comments like this that aren't be
> + if (sr_class->class_type == SR_CLASS2 && sr_class->notify)
> + sr_class->notify(sr_info->voltdm, status);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static void sr_set_clk_length(struct omap_sr *sr)
> +{
> + struct clk *sys_ck;
> + u32 sys_clk_speed;
> +
> + sys_ck = clk_get(NULL, "sys_ck");
> + if (IS_ERR(sys_ck)) {
> + dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n",
> + __func__);
> + return;
> + }
> + sys_clk_speed = clk_get_rate(sys_ck);
> + clk_put(sys_ck);
> +
> + switch (sys_clk_speed) {
> + case 12000000:
> + sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
> + break;
> + case 13000000:
> + sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
> + break;
> + case 19200000:
> + sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
> + break;
> + case 26000000:
> + sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
> + break;
> + case 38400000:
> + sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
> + break;
> + default:
> + dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n",
> + __func__, sys_clk_speed);
> + break;
> + }
> +}
> +
> +static void sr_set_regfields(struct omap_sr *sr)
> +{
> + /*
> + * For time being these values are defined in smartreflex.h
> + * and populated during init. May be they can be moved to board
> + * file or pmic specific data structure. In that case these structure
> + * fields will have to be populated using the pdata or pmic structure.
> + */
> + if (cpu_is_omap34xx()) {
> + sr->err_weight = OMAP3430_SR_ERRWEIGHT;
> + sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
> + sr->accum_data = OMAP3430_SR_ACCUMDATA;
> + if (!(strcmp(sr->voltdm->name, "mpu"))) {
> + sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
> + sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
> + } else {
> + sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
> + sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
> + }
> + }
> + /* TODO: 3630 and Omap4 specific bit field values */
> +}
> +
> +static void sr_start_vddautocomp(struct omap_sr *sr)
> +{
> + if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
> + dev_warn(&sr->pdev->dev,
> + "%s: smartreflex class driver not registered\n",
> + __func__);
> + return;
> + }
> +
> + if (!sr_class->enable(sr->voltdm))
> + sr->autocomp_active = true;
> +}
> +
> +static void sr_stop_vddautocomp(struct omap_sr *sr)
> +{
> + if (!sr_class || !(sr_class->disable)) {
> + dev_warn(&sr->pdev->dev,
> + "%s: smartreflex class driver not registered\n",
> + __func__);
> + return;
> + }
> +
> + if (sr->autocomp_active) {
> + sr_class->disable(sr->voltdm, 1);
> + sr->autocomp_active = false;
> + }
> +}
> +
> +/*
> + * This function handles the intializations which have to be done
> + * only when both sr device and class driver regiter has
> + * completed. This will be attempted to be called from both sr class
> + * driver register and sr device intializtion API's. Only one call
> + * will ultimately succeed.
> + *
> + * Currenly this function registers interrrupt handler for a particular SR
> + * if smartreflex class driver is already registered and has
> + * requested for interrupts and the SR interrupt line in present.
> + */
> +static int sr_late_init(struct omap_sr *sr_info)
> +{
> + char *name;
> + struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
> + int ret = 0;
> +
> + if (sr_class->class_type == SR_CLASS2 &&
> + sr_class->notify_flags && sr_info->irq) {
> +
> + name = kzalloc(SMARTREFLEX_NAME_LEN + 1, GFP_KERNEL);
> + strcpy(name, "sr_");
> + strcat(name, sr_info->voltdm->name);
> + ret = request_irq(sr_info->irq, sr_omap_isr,
> + IRQF_DISABLED, name, (void *)sr_info);
Why does this have to be IRQF_DISABLED? This capability will be
disappearing from the kernel soon.
Because there are no current users, I cannot tell, but I suspect this
could be use request_threaded_irq. If not, please justify.
> + if (ret) {
goto error;
> + struct resource *mem;
> +
> + iounmap(sr_info->base);
> + mem = platform_get_resource(sr_info->pdev,
> + IORESOURCE_MEM, 0);
> + release_mem_region(mem->start, resource_size(mem));
> + list_del(&sr_info->node);
> + dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
> + "interrupt handler. Smartreflex will"
> + "not function as desired\n", __func__);
> +
> + kfree(sr_info);
> + return ret;
> + }
and move this after the return...
> + }
> +
> + if (pdata && pdata->enable_on_init)
> + sr_start_vddautocomp(sr_info);
> +
> + return ret;
error:
(here.)
> +}
> +
> +static void sr_v1_disable(struct omap_sr *sr)
> +{
> + int timeout = 0;
> +
> + /* Enable MCUDisableAcknowledge interrupt */
> + sr_modify_reg(sr, ERRCONFIG_V1,
> + ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
> +
> + /* SRCONFIG - disable SR */
> + sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
> +
> + /* Disable all other SR interrupts and clear the status */
> + sr_modify_reg(sr, ERRCONFIG_V1,
> + (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
> + ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
> + (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
> + ERRCONFIG_MCUBOUNDINTST |
> + ERRCONFIG_VPBOUNDINTST_V1));
> +
> + /*
> + * Wait for SR to be disabled.
> + * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
> + */
> + omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
> + ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
> + timeout);
> +
> + if (timeout >= SR_DISABLE_TIMEOUT)
> + dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
> + __func__);
> +
> + /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
> + sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
> + ERRCONFIG_MCUDISACKINTST);
> +}
> +
> +static void sr_v2_disable(struct omap_sr *sr)
> +{
> + int timeout = 0;
> +
> + /* Enable MCUDisableAcknowledge interrupt */
> + sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
> +
> + /* SRCONFIG - disable SR */
> + sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
> +
> + /* Disable all other SR interrupts and clear the status */
> + sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
> + ERRCONFIG_VPBOUNDINTST_V2);
> + sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
> + IRQENABLE_MCUVALIDINT |
> + IRQENABLE_MCUBOUNDSINT));
> + sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
> + IRQSTATUS_MCVALIDINT |
> + IRQSTATUS_MCBOUNDSINT));
> +
> + /*
> + * Wait for SR to be disabled.
> + * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
> + */
> + omap_test_timeout((sr_read_reg(sr, IRQSTATUS) &
> + IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
> + timeout);
> +
> + if (timeout >= SR_DISABLE_TIMEOUT)
> + dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
> + __func__);
> +
> + /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
> + sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
> + sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
> +}
> +
> +/* Public Functions */
> +
> +/**
> + * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the
> + * error generator module.
> + * @voltdm: VDD pointer to which the SR module to be configured belongs to.
> + *
> + * This API is to be called from the smartreflex class driver to
> + * configure the error generator module inside the smartreflex module.
> + * SR settings if using the ERROR module inside Smartreflex.
> + * SR CLASS 3 by default uses only the ERROR module where as
> + * SR CLASS 2 can choose between ERROR module and MINMAXAVG
> + * module. Returns 0 on success and error value in case of failure.
> + */
> +int sr_configure_errgen(struct voltagedomain *voltdm)
> +{
> + u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en;
> + u32 vpboundint_st, senp_en = 0, senn_en = 0;
> + u8 senp_shift, senn_shift;
> + struct omap_sr *sr = _sr_lookup(voltdm);
> + struct omap_sr_data *pdata;
> +
> + if (IS_ERR(sr)) {
> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
> + __func__, voltdm->name);
> + return -EINVAL;
> + }
> +
> + pdata = sr->pdev->dev.platform_data;
> +
> + if (!sr->clk_length)
> + sr_set_clk_length(sr);
> +
> + if (pdata) {
> + senp_en = pdata->senp_mod;
> + senn_en = pdata->senn_mod;
> + } else {
> + dev_warn(&sr->pdev->dev, "%s: Missing pdata\n", __func__);
This is more of an error condition, and should probably return here with
an error. Otherwise undefined values are used below.
> + }
> +
> + sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
> + SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
> +
> + if (sr->ip_type == SR_TYPE_V1) {
> + sr_config |= SRCONFIG_DELAYCTRL;
> + senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
> + senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
> + errconfig_offs = ERRCONFIG_V1;
> + vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
> + vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
> + } else if (sr->ip_type == SR_TYPE_V2) {
> + senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
> + senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
> + errconfig_offs = ERRCONFIG_V2;
> + vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
> + vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
> + } else {
> + dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
> + "module without specifying the ip\n", __func__);
> + return -EINVAL;
> + }
> +
> + sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
> + sr_write_reg(sr, SRCONFIG, sr_config);
> + sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
> + (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
> + (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
> + sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
> + SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
> + sr_errconfig);
> +
> + /* Enabling the interrupts if the ERROR module is used */
> + sr_modify_reg(sr, errconfig_offs,
> + vpboundint_en, (vpboundint_en | vpboundint_st));
> +
> + return 0;
> +}
> +
> +/**
> + * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the
> + * minmaxavg module.
> + * @voltdm: VDD pointer to which the SR module to be configured belongs to.
> + *
> + * This API is to be called from the smartreflex class driver to
> + * configure the minmaxavg module inside the smartreflex module.
> + * SR settings if using the ERROR module inside Smartreflex.
> + * SR CLASS 3 by default uses only the ERROR module where as
> + * SR CLASS 2 can choose between ERROR module and MINMAXAVG
> + * module. Returns 0 on success and error value in case of failure.
> + */
> +int sr_configure_minmax(struct voltagedomain *voltdm)
> +{
> + u32 sr_config, sr_avgwt;
> + u32 senp_en = 0, senn_en = 0;
> + u8 senp_shift, senn_shift;
> + struct omap_sr *sr = _sr_lookup(voltdm);
> + struct omap_sr_data *pdata;
> +
> + if (IS_ERR(sr)) {
> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
> + __func__, voltdm->name);
> + return -EINVAL;
> + }
> +
> + pdata = sr->pdev->dev.platform_data;
> +
> + if (!sr->clk_length)
> + sr_set_clk_length(sr);
> +
> + if (pdata) {
> + senp_en = pdata->senp_mod;
> + senn_en = pdata->senn_mod;
> + } else {
> + dev_warn(&sr->pdev->dev, "%s: Missing pdata\n", __func__);
same as above
> + }
> +
> + sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
> + SRCONFIG_SENENABLE |
> + (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
> +
> + if (sr->ip_type == SR_TYPE_V1) {
> + sr_config |= SRCONFIG_DELAYCTRL;
> + senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
> + senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
> + } else if (sr->ip_type == SR_TYPE_V2) {
> + senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
> + senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
> + } else {
> + dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
> + "module without specifying the ip\n", __func__);
> + return -EINVAL;
> + }
> +
> + sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
> + sr_write_reg(sr, SRCONFIG, sr_config);
> + sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
> + (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
> + sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
> +
> + /*
> + * Enabling the interrupts if MINMAXAVG module is used.
> + * TODO: check if all the interrupts are mandatory
> + */
> + if (sr->ip_type == SR_TYPE_V1) {
> + sr_modify_reg(sr, ERRCONFIG_V1,
> + (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
> + ERRCONFIG_MCUBOUNDINTEN),
> + (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
> + ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
> + ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
> + } else if (sr->ip_type == SR_TYPE_V2) {
> + sr_write_reg(sr, IRQSTATUS,
> + IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
> + IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
> + sr_write_reg(sr, IRQENABLE_SET,
> + IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
> + IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
> + }
> +
> + return 0;
> +}
> +
> +/**
> + * sr_enable() - Enables the smartreflex module.
> + * @voltdm: VDD pointer to which the SR module to be configured belongs to.
> + * @volt: The voltage at which the Voltage domain associated with
> + * the smartreflex module is operating at.
> + * This is required only to program the correct Ntarget value.
> + *
> + * This API is to be called from the smartreflex class driver to
> + * enable a smartreflex module. Returns 0 on success. Returns error
> + * value if the voltage passed is wrong or if ntarget value is wrong.
> + */
> +int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
> +{
> + u32 nvalue_reciprocal;
> + struct omap_volt_data *volt_data;
> + struct omap_sr *sr = _sr_lookup(voltdm);
> + int ret;
> +
> + if (IS_ERR(sr)) {
> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
> + __func__, voltdm->name);
> + return -EINVAL;
> + }
> +
> + volt_data = omap_voltage_get_voltdata(voltdm, volt);
> +
> + if (IS_ERR(volt_data)) {
> + dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
> + " for nominal voltage %ld\n", __func__, volt);
> + return -ENODATA;
> + }
> +
> + nvalue_reciprocal = volt_data->sr_nvalue;
> +
> + if (!nvalue_reciprocal) {
> + dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n",
> + __func__, volt);
> + return -ENODATA;
> + }
> +
> + /* errminlimit is opp dependent and hence linked to voltage */
> + sr->err_minlimit = volt_data->sr_errminlimit;
> +
> + /* Enable the clocks */
not just clocs are enabled by pm_runtime_get(). Again, probably just
removing the comment is better.
> + if (!sr->sr_enable) {
> + pm_runtime_get_sync(&sr->pdev->dev);
> + sr->sr_enable = true;
> + }
But, I'm not sure why you need this sr_enabled flag. Here, you could
just do pm_runtime_get_sync() and rely on the usecounting done in the
runtime PM core...
> + /* Check if SR is already enabled. If yes do nothing */
> + if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
> + return 0;
> +
> + /* Configure SR */
> + ret = sr_class->configure(voltdm);
> + if (ret)
> + return ret;
> +
> + sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal);
> +
> + /* SRCONFIG - enable SR */
> + sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
> + return 0;
> +}
> +
> +/**
> + * sr_disable() - Disables the smartreflex module.
> + * @voltdm: VDD pointer to which the SR module to be configured belongs to.
> + *
> + * This API is to be called from the smartreflex class driver to
> + * disable a smartreflex module.
> + */
> +void sr_disable(struct voltagedomain *voltdm)
> +{
> + struct omap_sr *sr = _sr_lookup(voltdm);
> +
> + if (IS_ERR(sr)) {
> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
> + __func__, voltdm->name);
> + return;
> + }
> +
> + /* Check if SR clocks are already disabled. If yes do nothing */
> + if (!sr->sr_enable)
...and here you just check pm_runtime_is_suspended()
> + return;
> +
> + /* Check if SR is already disabled. If yes just disable the clocks */
> + if (!(sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE))
> + goto disable_clocks;
drop the goto and just indent the next block
> +
> + if (sr->ip_type == SR_TYPE_V1)
> + sr_v1_disable(sr);
> + else if (sr->ip_type == SR_TYPE_V2)
> + sr_v2_disable(sr);
> +
> +disable_clocks:
> + pm_runtime_put_sync(&sr->pdev->dev);
> + sr->sr_enable = false;
> +}
> +
> +/**
> + * sr_register_class() - API to register a smartreflex class parameters.
> + * @class_data: The structure containing various sr class specific data.
> + *
> + * This API is to be called by the smartreflex class driver to register itself
> + * with the smartreflex driver during init. Returns 0 on success else the
> + * error value.
> + */
> +int sr_register_class(struct omap_smartreflex_class_data *class_data)
> +{
> + struct omap_sr *sr_info;
> +
> + if (!class_data) {
> + pr_warning("%s:, Smartreflex class data passed is NULL\n",
> + __func__);
> + return -EINVAL;
> + }
> +
> + if (sr_class) {
> + pr_warning("%s: Smartreflex class driver already registered\n",
> + __func__);
> + return -EBUSY;
> + }
> +
> + sr_class = class_data;
> +
> + /*
> + * Call into late init to do intializations that require
> + * both sr driver and sr class driver to be initiallized.
> + */
> + list_for_each_entry(sr_info, &sr_list, node)
> + sr_late_init(sr_info);
> +
> + return 0;
> +}
> +
> +/**
> + * omap_sr_enable() - API to enable SR clocks and to call into the
> + * registered smartreflex class enable API.
> + * @voltdm: VDD pointer to which the SR module to be configured belongs to.
> + *
> + * This API is to be called from the kernel in order to enable
> + * a particular smartreflex module. This API will do the initial
> + * configurations to turn on the smartreflex module and in turn call
> + * into the registered smartreflex class enable API.
> + */
> +void omap_sr_enable(struct voltagedomain *voltdm)
> +{
> + struct omap_sr *sr = _sr_lookup(voltdm);
> +
> + if (IS_ERR(sr)) {
> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
> + __func__, voltdm->name);
> + return;
> + }
> +
> + if (!sr->autocomp_active)
> + return;
> +
> + if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
> + dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
> + "registered\n", __func__);
> + return;
> + }
> +
> + sr_class->enable(voltdm);
> +}
> +
> +/**
> + * omap_sr_disable() - API to disable SR without resetting the voltage
> + * processor voltage
> + * @voltdm: VDD pointer to which the SR module to be configured belongs to.
> + *
> + * This API is to be called from the kernel in order to disable
> + * a particular smartreflex module. This API will in turn call
> + * into the registered smartreflex class disable API. This API will tell
> + * the smartreflex class disable not to reset the VP voltage after
> + * disabling smartreflex.
> + */
> +void omap_sr_disable(struct voltagedomain *voltdm)
> +{
> + struct omap_sr *sr = _sr_lookup(voltdm);
> +
> + if (IS_ERR(sr)) {
> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
> + __func__, voltdm->name);
> + return;
> + }
> +
> + if (!sr->autocomp_active)
> + return;
> +
> + if (!sr_class || !(sr_class->disable)) {
> + dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
> + "registered\n", __func__);
> + return;
> + }
> +
> + sr_class->disable(voltdm, 0);
> +}
> +
> +/**
> + * omap_sr_disable_reset_volt() - API to disable SR and reset the
> + * voltage processor voltage
> + * @voltdm: VDD pointer to which the SR module to be configured belongs to.
> + *
> + * This API is to be called from the kernel in order to disable
> + * a particular smartreflex module. This API will in turn call
> + * into the registered smartreflex class disable API. This API will tell
> + * the smartreflex class disable to reset the VP voltage after
> + * disabling smartreflex.
> + */
> +void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
> +{
> + struct omap_sr *sr = _sr_lookup(voltdm);
> +
> + if (IS_ERR(sr)) {
> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
> + __func__, voltdm->name);
> + return;
> + }
> +
> + if (!sr->autocomp_active)
> + return;
> +
> + if (!sr_class || !(sr_class->disable)) {
> + dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
> + "registered\n", __func__);
> + return;
> + }
> +
> + sr_class->disable(voltdm, 1);
> +}
> +
> +/**
> + * omap_sr_register_pmic() - API to register pmic specific info.
> + * @pmic_data: The structure containing pmic specific data.
> + *
> + * This API is to be called from the PMIC specific code to register with
> + * smartreflex driver pmic specific info. Currently the only info required
> + * is the smartreflex init on the PMIC side.
> + */
> +void omap_sr_register_pmic(struct omap_smartreflex_pmic_data *pmic_data)
> +{
> + if (!pmic_data) {
> + pr_warning("%s: Trying to register NULL PMIC data structure"
> + "with smartreflex\n", __func__);
> + return;
> + }
> +
> + sr_pmic_data = pmic_data;
> +}
> +
> +/* PM Debug Fs enteries to enable disable smartreflex. */
> +static int omap_sr_autocomp_show(void *data, u64 *val)
> +{
> + struct omap_sr *sr_info = (struct omap_sr *) data;
> +
> + if (!sr_info) {
> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
> + __func__, sr_info->voltdm->name);
> + return -EINVAL;
> + }
> +
> + *val = sr_info->autocomp_active;
> +
> + return 0;
> +}
> +
> +static int omap_sr_autocomp_store(void *data, u64 val)
> +{
> + struct omap_sr *sr_info = (struct omap_sr *) data;
> +
> + if (!sr_info) {
> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
> + __func__, sr_info->voltdm->name);
> + return -EINVAL;
> + }
> +
> + /* Sanity check */
> + if (val && (val != 1)) {
> + pr_warning("%s: Invalid argument %lld\n", __func__, val);
> + return -EINVAL;
> + }
> +
> + if (!val)
> + sr_stop_vddautocomp(sr_info);
> + else
> + sr_start_vddautocomp(sr_info);
> +
> + return 0;
> +}
> +
> +DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
> + omap_sr_autocomp_store, "%llu\n");
> +
> +static int __init omap_smartreflex_probe(struct platform_device *pdev)
> +{
> + struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
> + struct omap_device *odev = to_omap_device(pdev);
> + struct omap_sr_data *pdata = pdev->dev.platform_data;
> + struct resource *mem, *irq;
> + struct dentry *dbg_dir;
> + char *name;
> + int ret = 0;
> +
> + if (!sr_info) {
> + dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
> + __func__);
> + return -ENOMEM;
> + }
> +
> + if (!pdata) {
> + dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
> + return -EINVAL;
> + }
> +
> + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!mem) {
> + dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
> + ret = -ENODEV;
> + goto err_free_devinfo;
> + }
> +
> + irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> +
> + pm_runtime_enable(&pdev->dev);
> +
> + sr_info->pdev = pdev;
> + sr_info->srid = pdev->id;
> + sr_info->voltdm = pdata->voltdm;
> + sr_info->autocomp_active = false;
> + sr_info->ip_type = odev->hwmods[0]->class->rev;
> + sr_info->base = ioremap(mem->start, resource_size(mem));
> + if (!sr_info->base) {
> + dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
> + ret = -ENOMEM;
> + goto err_release_region;
> + }
> +
> + if (irq)
> + sr_info->irq = irq->start;
> +
> + sr_set_clk_length(sr_info);
> + sr_set_regfields(sr_info);
> +
> + list_add(&sr_info->node, &sr_list);
> +
> + /*
> + * Call into late init to do intializations that require
> + * both sr driver and sr class driver to be initiallized.
> + */
> + if (sr_class) {
> + ret = sr_late_init(sr_info);
> + if (ret) {
> + pr_warning("%s: Error in SR late init\n", __func__);
> + return ret;
> + }
> + }
> +
> + dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
> +
> + /*
> + * If the Smartreflex main debugfs directory is not created, do
> + * not try to create rest of the debugfs entries.
> + */
> + if (!sr_dbg_dir)
> + return ret;
> +
> + name = kzalloc(SMARTREFLEX_NAME_LEN + 1, GFP_KERNEL);
> + if (!name) {
> + dev_err(&pdev->dev, "%s: Unable to allocate name for"
> + "debufs entry", __func__);
> + return ret;
what will 'ret' be here?
> + }
> +
> + /* Create the debug fs enteries */
> + strcpy(name, "sr_");
> + strcat(name, sr_info->voltdm->name);
> +
> + dbg_dir = debugfs_create_dir(name, sr_dbg_dir);
> + if (IS_ERR(dbg_dir)) {
> + dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
> + __func__);
> + return ret;
or here?
> + }
> +
> + (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir,
> + (void *)sr_info, &pm_sr_fops);
> +
> + return ret;
> +
> +err_release_region:
> + release_mem_region(mem->start, resource_size(mem));
> +err_free_devinfo:
> + kfree(sr_info);
> +
> + return ret;
> +}
> +
> +static int __devexit omap_smartreflex_remove(struct platform_device *pdev)
as an internal function, to be consistent with other naming, this should
be sr_remove.
> +{
> + struct omap_sr_data *pdata = pdev->dev.platform_data;
> + struct omap_sr *sr_info;
> + struct resource *mem;
> +
> + if (!pdata) {
> + dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
> + return -EINVAL;
> + }
> +
> + sr_info = _sr_lookup(pdata->voltdm);
> + if (!sr_info) {
> + dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
> + __func__);
> + return -EINVAL;
> + }
> +
> + /* Disable Autocompensation if enabled before removing the module */
surperfluous comment
> + if (sr_info->autocomp_active)
> + sr_stop_vddautocomp(sr_info);
> +
> + list_del(&sr_info->node);
> + iounmap(sr_info->base);
> + kfree(sr_info);
> + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + release_mem_region(mem->start, resource_size(mem));
> +
> + return 0;
> +}
> +
> +static struct platform_driver smartreflex_driver = {
> + .remove = omap_smartreflex_remove,
> + .driver = {
> + .name = "smartreflex",
> + },
> +};
> +
> +static int __init sr_init(void)
> +{
> + int ret = 0;
> +
> + /*
> + * sr_init is a late init. If by then a pmic specific API is not
> + * registered either there is no need for anything to be done on
> + * the PMIC side or somebody has forgotten to register a PMIC
> + * handler. Warn for the second condition.
> + */
> + if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
> + sr_pmic_data->sr_pmic_init();
> + else
> + pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
> +
> + if (pm_dbg_main_dir) {
> + struct dentry *d;
> +
> + d = debugfs_create_dir("smartreflex", pm_dbg_main_dir);
> + if (!IS_ERR(d))
> + sr_dbg_dir = d;
> + }
> +
> + ret = platform_driver_probe(&smartreflex_driver,
> + omap_smartreflex_probe);
> + if (ret) {
> + pr_err("%s: platform driver register failed for SR\n",
> + __func__);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static void __exit sr_exit(void)
> +{
> + platform_driver_unregister(&smartreflex_driver);
> +}
> +late_initcall(sr_init);
> +module_exit(sr_exit);
> +
> +MODULE_DESCRIPTION("OMAP SMARTREFLEX DRIVER");
"OMAP SmartReflex driver"
> +MODULE_LICENSE("GPL");
> +MODULE_ALIAS("platform:" DRIVER_NAME);
> +MODULE_AUTHOR("Texas Instruments Inc");
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index e39a417..8056349 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -35,6 +35,38 @@ config OMAP_DEBUG_LEDS
> depends on OMAP_DEBUG_DEVICES
> default y if LEDS
>
> +config OMAP_SMARTREFLEX
> + bool "SmartReflex support"
> + depends on ARCH_OMAP3 && PM
> + help
> + Say Y if you want to enable SmartReflex.
> +
> + SmartReflex can perform continuous dynamic voltage
> + scaling around the nominal operating point voltage
> + according to silicon characteristics and operating
> + conditions. Enabling SmartReflex reduces power
> + consumption.
> +
> + Please note, that by default SmartReflex is only
> + initialized. To enable the automatic voltage
> + compensation for VDD1 and VDD2, user must write 1 to
s/VDD1/MPU/
s/VDD2/CORE/
> + /debug/pm_debug/Smartreflex/SR<X>/autocomp,
> + where X is 1 or 2 for OMAP3
Not fully true, on some SoCs (ES3.1) it's also enabled by default.
> +config OMAP_SMARTREFLEX_TESTING
> + bool "Smartreflex testing support"
> + depends on OMAP_SMARTREFLEX
> + default n
> + help
> + Say Y if you want to enable SmartReflex testing with SW hardcoded
> + NVALUES intead of E-fuse NVALUES set in factory silicon testing.
> +
> + In some devices the E-fuse values have not been set, even though
> + SmartReflex modules are included. Using these hardcoded values set
> + in software, one can test the SmartReflex features without E-fuse.
> +
> + WARNING: Enabling this option may cause your device to hang!
> +
> config OMAP_RESET_CLOCKS
> bool "Reset unused clocks during boot"
> depends on ARCH_OMAP
> diff --git a/arch/arm/plat-omap/include/plat/smartreflex.h b/arch/arm/plat-omap/include/plat/smartreflex.h
> new file mode 100644
> index 0000000..1ad03ea
> --- /dev/null
> +++ b/arch/arm/plat-omap/include/plat/smartreflex.h
> @@ -0,0 +1,277 @@
> +/*
> + * OMAP Smartreflex Defines and Routines
> + *
> + * Author: Thara Gopinath <thara@ti.com>
> + *
> + * Copyright (C) 2010 Texas Instruments, Inc.
> + * Thara Gopinath <thara@ti.com>
> + *
> + * Copyright (C) 2008 Nokia Corporation
> + * Kalle Jokiniemi
> + *
> + * Copyright (C) 2007 Texas Instruments, Inc.
> + * Lesly A M <x0080970@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef __ASM_ARM_OMAP_SMARTREFLEX_H
> +#define __ASM_ARM_OMAP_SMARTREFLEX_H
> +
> +#include <linux/platform_device.h>
> +#include <plat/voltage.h>
> +
> +#ifdef CONFIG_PM_DEBUG
> +extern struct dentry *pm_dbg_main_dir;
> +extern struct dentry *sr_dbg_dir;
> +#endif
> +
> +/*
> + * Different Smartreflex IPs version. The v1 is the 65nm version used in
> + * OMAP3430. The v2 is the update for the 45nm version of the IP
> + * used in OMAP3630 and OMAP4430
> + */
> +#define SR_TYPE_V1 1
> +#define SR_TYPE_V2 2
> +
> +/* SMART REFLEX REG ADDRESS OFFSET */
> +#define SRCONFIG 0x00
> +#define SRSTATUS 0x04
> +#define SENVAL 0x08
> +#define SENMIN 0x0C
> +#define SENMAX 0x10
> +#define SENAVG 0x14
> +#define AVGWEIGHT 0x18
> +#define NVALUERECIPROCAL 0x1c
> +#define SENERROR_V1 0x20
> +#define ERRCONFIG_V1 0x24
> +#define IRQ_EOI 0x20
> +#define IRQSTATUS_RAW 0x24
> +#define IRQSTATUS 0x28
> +#define IRQENABLE_SET 0x2C
> +#define IRQENABLE_CLR 0x30
> +#define SENERROR_V2 0x34
> +#define ERRCONFIG_V2 0x38
> +
> +/* Bit/Shift Positions */
> +
> +/* SRCONFIG */
> +#define SRCONFIG_ACCUMDATA_SHIFT 22
> +#define SRCONFIG_SRCLKLENGTH_SHIFT 12
> +#define SRCONFIG_SENNENABLE_V1_SHIFT 5
> +#define SRCONFIG_SENPENABLE_V1_SHIFT 3
> +#define SRCONFIG_SENNENABLE_V2_SHIFT 1
> +#define SRCONFIG_SENPENABLE_V2_SHIFT 0
> +#define SRCONFIG_CLKCTRL_SHIFT 0
> +
> +#define SRCONFIG_ACCUMDATA_MASK (0x3ff << 22)
> +
> +#define SRCONFIG_SRENABLE BIT(11)
> +#define SRCONFIG_SENENABLE BIT(10)
> +#define SRCONFIG_ERRGEN_EN BIT(9)
> +#define SRCONFIG_MINMAXAVG_EN BIT(8)
> +#define SRCONFIG_DELAYCTRL BIT(2)
> +
> +/* AVGWEIGHT */
> +#define AVGWEIGHT_SENPAVGWEIGHT_SHIFT 2
> +#define AVGWEIGHT_SENNAVGWEIGHT_SHIFT 0
> +
> +/* NVALUERECIPROCAL */
> +#define NVALUERECIPROCAL_SENPGAIN_SHIFT 20
> +#define NVALUERECIPROCAL_SENNGAIN_SHIFT 16
> +#define NVALUERECIPROCAL_RNSENP_SHIFT 8
> +#define NVALUERECIPROCAL_RNSENN_SHIFT 0
> +
> +/* ERRCONFIG */
> +#define ERRCONFIG_ERRWEIGHT_SHIFT 16
> +#define ERRCONFIG_ERRMAXLIMIT_SHIFT 8
> +#define ERRCONFIG_ERRMINLIMIT_SHIFT 0
> +
> +#define SR_ERRWEIGHT_MASK (0x07 << 16)
> +#define SR_ERRMAXLIMIT_MASK (0xff << 8)
> +#define SR_ERRMINLIMIT_MASK (0xff << 0)
> +
> +#define ERRCONFIG_VPBOUNDINTEN_V1 BIT(31)
> +#define ERRCONFIG_VPBOUNDINTST_V1 BIT(30)
> +#define ERRCONFIG_MCUACCUMINTEN BIT(29)
> +#define ERRCONFIG_MCUACCUMINTST BIT(28)
> +#define ERRCONFIG_MCUVALIDINTEN BIT(27)
> +#define ERRCONFIG_MCUVALIDINTST BIT(26)
> +#define ERRCONFIG_MCUBOUNDINTEN BIT(25)
> +#define ERRCONFIG_MCUBOUNDINTST BIT(24)
> +#define ERRCONFIG_MCUDISACKINTEN BIT(23)
> +#define ERRCONFIG_VPBOUNDINTST_V2 BIT(23)
> +#define ERRCONFIG_MCUDISACKINTST BIT(22)
> +#define ERRCONFIG_VPBOUNDINTEN_V2 BIT(22)
> +
> +#define ERRCONFIG_STATUS_V1_MASK (ERRCONFIG_VPBOUNDINTST_V1 | \
> + ERRCONFIG_MCUACCUMINTST | \
> + ERRCONFIG_MCUVALIDINTST | \
> + ERRCONFIG_MCUBOUNDINTST | \
> + ERRCONFIG_MCUDISACKINTST)
> +/* IRQSTATUS */
> +#define IRQSTATUS_MCUACCUMINT BIT(3)
> +#define IRQSTATUS_MCVALIDINT BIT(2)
> +#define IRQSTATUS_MCBOUNDSINT BIT(1)
> +#define IRQSTATUS_MCUDISABLEACKINT BIT(0)
> +
> +/* IRQENABLE_SET and IRQENABLE_CLEAR */
> +#define IRQENABLE_MCUACCUMINT BIT(3)
> +#define IRQENABLE_MCUVALIDINT BIT(2)
> +#define IRQENABLE_MCUBOUNDSINT BIT(1)
> +#define IRQENABLE_MCUDISABLEACKINT BIT(0)
> +
> +/* Common Bit values */
> +
> +#define SRCLKLENGTH_12MHZ_SYSCLK 0x3c
> +#define SRCLKLENGTH_13MHZ_SYSCLK 0x41
> +#define SRCLKLENGTH_19MHZ_SYSCLK 0x60
> +#define SRCLKLENGTH_26MHZ_SYSCLK 0x82
> +#define SRCLKLENGTH_38MHZ_SYSCLK 0xC0
> +
> +/*
> + * 3430 specific values. Maybe these should be passed from board file or
> + * pmic structures.
> + */
> +#define OMAP3430_SR_ACCUMDATA 0x1f4
> +
> +#define OMAP3430_SR1_SENPAVGWEIGHT 0x03
> +#define OMAP3430_SR1_SENNAVGWEIGHT 0x03
> +
> +#define OMAP3430_SR2_SENPAVGWEIGHT 0x01
> +#define OMAP3430_SR2_SENNAVGWEIGHT 0x01
> +
> +#define OMAP3430_SR_ERRWEIGHT 0x04
> +#define OMAP3430_SR_ERRMAXLIMIT 0x02
> +
> +/* TODO:3630/OMAP4 values if it has to come from this file */
> +
> +/**
> + * omap_smartreflex_dev_data - Smartreflex device specific data
omap_sr..
> + * @volts_supported : Number of distinct voltages possible for the VDD
> + * associated with this smartreflex module.
> + * @efuse_sr_control : The regisrter offset of control_fuse_sr efuse
> + * register from which sennenable and senpenable values
> + * are obtained.
> + * @sennenable_shift : The shift in the control_fuse_sr register for
> + * obtaining the sennenable value for this smartreflex
> + * module.
> + * @senpenable_shift : The shift in the control_fuse_sr register for
> + * obtaining the senpenable value for this smartreflex
> + * module.
> + * @efuse_nvalues_offs : Array of efuse offsets from which ntarget values can
> + * be retrieved. Number of efuse offsets in this arrray
> + * is equal to the volts_supported value ie one efuse
> + * register per supported voltage.
> + * @test_sennenable : SENNENABLE test value
> + * @test_senpenable : SENPENABLE test value.
> + * @test_nvalues : Array of test ntarget values.
> + * @vdd_name : Name of the voltage domain associated with this
> + * Smartreflex device.
> + * @volt_data : Voltage table associated with this smartreflex module
> + */
> +struct omap_sr_dev_data {
> + int volts_supported;
> + u32 efuse_sr_control;
> + u32 sennenable_shift;
> + u32 senpenable_shift;
> + u32 *efuse_nvalues_offs;
> + u32 test_sennenable;
> + u32 test_senpenable;
> + u32 *test_nvalues;
> + char *vdd_name;
> + struct omap_volt_data *volt_data;
> +};
> +
> +/**
> + * omap_smartreflex_pmic_data : Strucutre to be populated by pmic code to pass
> + * pmic specific info to smartreflex driver
> + *
> + * @sr_pmic_init - API to initialize smartreflex on the PMIC side.
> + */
> +struct omap_smartreflex_pmic_data {
omap_sr..
> + void (*sr_pmic_init) (void);
> +};
> +
> +#ifdef CONFIG_OMAP_SMARTREFLEX
> +/*
> + * The smart reflex driver supports CLASS1 CLASS2 and CLASS3 SR.
> + * The smartreflex class driver should pass the class type.
> + * Should be used to populate the class_type field of the
> + * omap_smartreflex_class_data structure.
> + */
> +#define SR_CLASS1 0x1
> +#define SR_CLASS2 0x2
> +#define SR_CLASS3 0x3
> +
> +/**
> + * omap_smartreflex_class_data : Structure to be populated by
omap_sr...
> + * Smartreflex class driver with corresponding class enable disable API's
> + *
> + * @enable - API to enable a particular class smaartreflex.
> + * @disable - API to disable a particular class smartreflex.
> + * @configure - API to configure a particular class smartreflex.
> + * @notify - API to notify the class driver about an event in SR. Not needed
> + * for class3.
> + * @notify_flags - specify the events to be notified to the class driver
> + * @class_type - specify which smartreflex class. Can be used by the SR driver
> + * to take any class based decisions.
> + */
> +struct omap_smartreflex_class_data {
omap_sr
> + int (*enable)(struct voltagedomain *voltdm);
> + int (*disable)(struct voltagedomain *voltdm, int is_volt_reset);
> + int (*configure)(struct voltagedomain *voltdm);
> + int (*notify)(struct voltagedomain *voltdm, u32 status);
> + u8 notify_flags;
> + u8 class_type;
> +};
> +
> +/**
> + * omap_smartreflex_data - Smartreflex platform data
omap_sr
> + * @senp_mod : SENPENABLE value for the sr
> + * @senn_mod : SENNENABLE value for sr
> + * @sr_nvalue : array of n target values for sr
> + * @enable_on_init : whether this sr module needs to enabled at
> + * boot up or not.
> + * @voltdm : Pointer to the voltage domain associated with the SR
> + */
> +struct omap_sr_data {
> + u32 senp_mod;
> + u32 senn_mod;
> + bool enable_on_init;
> + struct voltagedomain *voltdm;
> +};
> +
> +/*
> + * Smartreflex module enable/disable interface.
> + * NOTE: if smartreflex is not enabled from sysfs, these functions will not
> + * do anything.
> + */
The 'NOTE' comment isn't quite accurate (and probably not needed here.)
The 'enable_on_init' flag is another way besides sysfs for these
functions to be activated.
This enable_on_init flag (also settable by board files) should probably
be mentioned in the changelog too where you mention how SR can be
enabled.
> +void omap_sr_enable(struct voltagedomain *voltdm);
> +void omap_sr_disable(struct voltagedomain *voltdm);
> +void omap_sr_disable_reset_volt(struct voltagedomain *voltdm);
> +
> +/* API to register the pmic specific data with the smartreflex driver. */
> +void omap_sr_register_pmic(struct omap_smartreflex_pmic_data *pmic_data);
> +
> +/* Smartreflex driver hooks to be called from Smartreflex class driver */
> +int sr_enable(struct voltagedomain *voltdm, unsigned long volt);
> +void sr_disable(struct voltagedomain *voltdm);
> +int sr_configure_errgen(struct voltagedomain *voltdm);
> +int sr_configure_minmax(struct voltagedomain *voltdm);
> +
> +/* API to register the smartreflex class driver with the smartreflex driver */
> +int sr_register_class(struct omap_smartreflex_class_data *class_data);
> +#else
> +static inline void omap_sr_enable(struct voltagedomain *voltdm) {}
> +static inline void omap_sr_disable(struct voltagedomain *voltdm) {}
> +static inline void omap_sr_disable_reset_volt(
> + struct voltagedomain *voltdm) {}
> +static inline void omap_sr_register_pmic(
> + struct omap_smartreflex_pmic_data *pmic_data) {}
> +#endif
> +#endif
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support.
2010-10-14 0:04 ` Kevin Hilman
@ 2010-10-22 14:21 ` Gopinath, Thara
2010-10-22 16:17 ` Kevin Hilman
2010-10-25 11:12 ` Grazvydas Ignotas
0 siblings, 2 replies; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-22 14:21 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>Sent: Thursday, October 14, 2010 5:34 AM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support.
>>
>>Thara Gopinath <thara@ti.com> writes:
>>
>>> SmartReflex modules do adaptive voltage control for real-time
>>> voltage adjustments. With Smartreflex the power supply voltage
>>> can be adapted to the silicon performance(manufacturing process,
>>> temperature induced performance, age induced performance etc).
>>>
>>> There are differnet classes of smartreflex implementation.
>>> Class-0: Manufacturing Test Calibration
>>> Class-1: Boot-Time Software Calibration
>>> Class-2: Continuous Software Calibration
>>> Class-3: Continuous Hardware Calibration
>>> Class-4: Fully Integrated Power Management
>>>
>>> OMAP3 has two smartreflex modules one associated with VDD1 and the
>>> other associated with VDD2.
>>
>>s/VDD1/MPU/
>>s/VDD2/CORE/
Will correct.
>>
>>> This patch adds support for smartreflex driver. The driver is designed
>>> for Class-1 , Class-2 and Class-3 support and is a platform driver.
>>> Smartreflex driver can be enabled through a Kconfig option
>>> "SmartReflex support" under "System type"->"TI OMAP implementations" menu.
>>>
>>> Smartreflex autocompensation feature can be enabled runtime through
>>> a debug fs option.
>>> To enable smartreflex autocompensation feature
>>> echo 1 > /debugfs/pm_debug/smartreflex/sr_<X>/autocomp
>>> To disable smartreflex autocompensation feature
>>> echo 0 > /debugfs/pm_debug/smartreflex/sr_<X>/autocomp
>>>
>>> where X can be mpu, core , iva etc.
>>>
>>> This patch contains code originally in linux omap pm branch.
>>> Major contributors to this driver are
>>> Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley,
>>> Nishant Menon, Kevin Hilman.
>>>
>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>> ---
>>> arch/arm/mach-omap2/Makefile | 1 +
>>> arch/arm/mach-omap2/smartreflex.c | 1003
>>+++++++++++++++++++++++++
>>> arch/arm/plat-omap/Kconfig | 32 +
>>> arch/arm/plat-omap/include/plat/smartreflex.h | 277 +++++++
>>> 4 files changed, 1313 insertions(+), 0 deletions(-)
>>> create mode 100644 arch/arm/mach-omap2/smartreflex.c
>>> create mode 100644 arch/arm/plat-omap/include/plat/smartreflex.h
>>>
>>> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
>>> index 4f74f2b..8dd32a7 100644
>>> --- a/arch/arm/mach-omap2/Makefile
>>> +++ b/arch/arm/mach-omap2/Makefile
>>> @@ -56,6 +56,7 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o
>>voltage.o \
>>> cpuidle34xx.o pm_bus.o
>>> obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
>>> obj-$(CONFIG_PM_DEBUG) += pm-debug.o
>>> +obj-$(CONFIG_OMAP_SMARTREFLEX) += smartreflex.o
>>>
>>> AFLAGS_sleep24xx.o :=-Wa,-march=armv6
>>> AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
>>> diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-
>>omap2/smartreflex.c
>>> new file mode 100644
>>> index 0000000..7fc3138
>>> --- /dev/null
>>> +++ b/arch/arm/mach-omap2/smartreflex.c
>>> @@ -0,0 +1,1003 @@
>>> +/*
>>> + * OMAP SmartReflex Voltage Control
>>> + *
>>> + * Author: Thara Gopinath <thara@ti.com>
>>> + *
>>> + * Copyright (C) 2010 Texas Instruments, Inc.
>>> + * Thara Gopinath <thara@ti.com>
>>> + *
>>> + * Copyright (C) 2008 Nokia Corporation
>>> + * Kalle Jokiniemi
>>> + *
>>> + * Copyright (C) 2007 Texas Instruments, Inc.
>>> + * Lesly A M <x0080970@ti.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> + */
>>> +
>>> +#include <linux/interrupt.h>
>>> +#include <linux/clk.h>
>>> +#include <linux/io.h>
>>> +#include <linux/debugfs.h>
>>> +#include <linux/delay.h>
>>> +#include <linux/slab.h>
>>> +#include <linux/pm_runtime.h>
>>> +
>>> +#include <plat/omap_device.h>
>>> +#include <plat/common.h>
>>> +#include <plat/smartreflex.h>
>>> +
>>> +#include "pm.h"
>>> +
>>> +#define SMARTREFLEX_NAME_LEN 16
>>> +#define SR_DISABLE_TIMEOUT 200
>>> +
>>> +struct dentry *sr_dbg_dir;
>>> +
>>> +struct omap_sr {
>>> + int srid;
>>> + bool sr_enable;
>>
>>sr_enabled is a better name
Ok.
>>
>>> + bool autocomp_active;
>>> + int ip_type;
>>> + u32 clk_length;
>>> + u32 err_weight;
>>> + u32 err_minlimit;
>>> + u32 err_maxlimit;
>>> + u32 accum_data;
>>> + u32 senn_avgweight;
>>> + u32 senp_avgweight;
>>> + unsigned int irq;
>>> + void __iomem *base;
>>> + struct platform_device *pdev;
>>> + struct list_head node;
>>> + struct voltagedomain *voltdm;
>>> +};
>>> +
>>> +/* sr_list contains all the instances of smartreflex module */
>>> +static LIST_HEAD(sr_list);
>>> +
>>> +static struct omap_smartreflex_class_data *sr_class;
>>> +static struct omap_smartreflex_pmic_data *sr_pmic_data;
>>> +
>>> +static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32
>>value)
>>> +{
>>> + __raw_writel(value, (sr->base + offset));
>>> +}
>>> +
>>> +static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32
>>mask,
>>> + u32 value)
>>> +{
>>> + u32 reg_val;
>>> + u32 errconfig_offs, errconfig_mask;
>>> +
>>> + reg_val = __raw_readl(sr->base + offset);
>>> + reg_val &= ~mask;
>>> +
>>> + /*
>>> + * Smartreflex error config register is special as it contains
>>> + * certain status bits which if written a 1 into means a clear
>>> + * of those bits. So in order to make sure no accidental write of
>>> + * 1 happens to those status bits, do a clear of them in the read
>>> + * value. Now if there is an actual reguest to write to these bits
>>> + * they will be set in the nex step.
>>
>>s/nex/next/
typo.. will correct
>>
>>that being said, it's not clear what "the next step" is in this context.
>>There is only one write.
>>
>>This should be rephrased to say (something like) it doesn't rewrite
>>values in these bits if they are currently set, but does allow the
>>caller to write those bits.
I will rephrase this.
>>
>>> + */
>>> + if (sr->ip_type == SR_TYPE_V1) {
>>> + errconfig_offs = ERRCONFIG_V1;
>>> + errconfig_mask = ERRCONFIG_STATUS_V1_MASK;
>>> + } else if (sr->ip_type == SR_TYPE_V2) {
>>> + errconfig_offs = ERRCONFIG_V2;
>>> + errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2;
>>> + }
>>> +
>>> + if (offset == errconfig_offs)
>>> + reg_val &= ~errconfig_mask;
>>> +
>>> + reg_val |= value;
>>> +
>>> + __raw_writel(reg_val, (sr->base + offset));
>>> +}
>>> +
>>> +static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
>>> +{
>>> + return __raw_readl(sr->base + offset);
>>> +}
>>> +
>>> +static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
>>> +{
>>> + struct omap_sr *sr_info;
>>> +
>>> + if (!voltdm) {
>>> + pr_err("%s: Null voltage domain passed!\n", __func__);
>>> + return ERR_PTR(-EINVAL);
>>> + }
>>> +
>>> + list_for_each_entry(sr_info, &sr_list, node) {
>>> + if (voltdm == sr_info->voltdm)
>>> + return sr_info;
>>> + }
>>> +
>>> + return ERR_PTR(-ENODATA);
>>> +}
>>>
>>> +static irqreturn_t sr_omap_isr(int irq, void *data)
>>
>>Please rename to sr_interrupt
Will do.
>>
>>> +{
>>> + struct omap_sr *sr_info = (struct omap_sr *)data;
>>> + u32 status = 0;
>>> +
>>> + if (sr_info->ip_type == SR_TYPE_V1) {
>>> + /* Read the status bits */
>>> + status = sr_read_reg(sr_info, ERRCONFIG_V1);
>>> +
>>> + /* Clear them by writing back */
>>> + sr_write_reg(sr_info, ERRCONFIG_V1, status);
>>
>>Shouldn't you be using sr_modify_reg for ERRCONFIG_V1?
Nope. I am doing a read followed by writing the same value back. No need of using modify
>>
>>> + } else if (sr_info->ip_type == SR_TYPE_V2) {
>>> + /* Read the status bits */
>>> + sr_read_reg(sr_info, IRQSTATUS);
>>> +
>>> + /* Clear them by writing back */
>>> + sr_write_reg(sr_info, IRQSTATUS, status);
>>> + }
>>
>>Might as well use it for both.
>>
>>> +
>>> + /* Call the class driver notify function if registered*/
>>
>>This comment does not add anything the code doesn't make clear, and
>>is not fully correct: it has to be registered, and be class 2.
>>
>>IMO, you can just remove comments like this that aren't be
Will remove this comment
>>
>>> + if (sr_class->class_type == SR_CLASS2 && sr_class->notify)
>>> + sr_class->notify(sr_info->voltdm, status);
>>> +
>>> + return IRQ_HANDLED;
>>> +}
>>> +
>>> +static void sr_set_clk_length(struct omap_sr *sr)
>>> +{
>>> + struct clk *sys_ck;
>>> + u32 sys_clk_speed;
>>> +
>>> + sys_ck = clk_get(NULL, "sys_ck");
>>> + if (IS_ERR(sys_ck)) {
>>> + dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n",
>>> + __func__);
>>> + return;
>>> + }
>>> + sys_clk_speed = clk_get_rate(sys_ck);
>>> + clk_put(sys_ck);
>>> +
>>> + switch (sys_clk_speed) {
>>> + case 12000000:
>>> + sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
>>> + break;
>>> + case 13000000:
>>> + sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
>>> + break;
>>> + case 19200000:
>>> + sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
>>> + break;
>>> + case 26000000:
>>> + sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
>>> + break;
>>> + case 38400000:
>>> + sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
>>> + break;
>>> + default:
>>> + dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n",
>>> + __func__, sys_clk_speed);
>>> + break;
>>> + }
>>> +}
>>> +
>>> +static void sr_set_regfields(struct omap_sr *sr)
>>> +{
>>> + /*
>>> + * For time being these values are defined in smartreflex.h
>>> + * and populated during init. May be they can be moved to board
>>> + * file or pmic specific data structure. In that case these structure
>>> + * fields will have to be populated using the pdata or pmic structure.
>>> + */
>>> + if (cpu_is_omap34xx()) {
>>> + sr->err_weight = OMAP3430_SR_ERRWEIGHT;
>>> + sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
>>> + sr->accum_data = OMAP3430_SR_ACCUMDATA;
>>> + if (!(strcmp(sr->voltdm->name, "mpu"))) {
>>> + sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
>>> + sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
>>> + } else {
>>> + sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
>>> + sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
>>> + }
>>> + }
>>> + /* TODO: 3630 and Omap4 specific bit field values */
>>> +}
>>> +
>>> +static void sr_start_vddautocomp(struct omap_sr *sr)
>>> +{
>>> + if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
>>> + dev_warn(&sr->pdev->dev,
>>> + "%s: smartreflex class driver not registered\n",
>>> + __func__);
>>> + return;
>>> + }
>>> +
>>> + if (!sr_class->enable(sr->voltdm))
>>> + sr->autocomp_active = true;
>>> +}
>>> +
>>> +static void sr_stop_vddautocomp(struct omap_sr *sr)
>>> +{
>>> + if (!sr_class || !(sr_class->disable)) {
>>> + dev_warn(&sr->pdev->dev,
>>> + "%s: smartreflex class driver not registered\n",
>>> + __func__);
>>> + return;
>>> + }
>>> +
>>> + if (sr->autocomp_active) {
>>> + sr_class->disable(sr->voltdm, 1);
>>> + sr->autocomp_active = false;
>>> + }
>>> +}
>>> +
>>> +/*
>>> + * This function handles the intializations which have to be done
>>> + * only when both sr device and class driver regiter has
>>> + * completed. This will be attempted to be called from both sr class
>>> + * driver register and sr device intializtion API's. Only one call
>>> + * will ultimately succeed.
>>> + *
>>> + * Currenly this function registers interrrupt handler for a particular SR
>>> + * if smartreflex class driver is already registered and has
>>> + * requested for interrupts and the SR interrupt line in present.
>>> + */
>>> +static int sr_late_init(struct omap_sr *sr_info)
>>> +{
>>> + char *name;
>>> + struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
>>> + int ret = 0;
>>> +
>>> + if (sr_class->class_type == SR_CLASS2 &&
>>> + sr_class->notify_flags && sr_info->irq) {
>>> +
>>> + name = kzalloc(SMARTREFLEX_NAME_LEN + 1, GFP_KERNEL);
>>> + strcpy(name, "sr_");
>>> + strcat(name, sr_info->voltdm->name);
>>> + ret = request_irq(sr_info->irq, sr_omap_isr,
>>> + IRQF_DISABLED, name, (void *)sr_info);
>>
>>Why does this have to be IRQF_DISABLED? This capability will be
>>disappearing from the kernel soon.
>>
>>Because there are no current users, I cannot tell, but I suspect this
>>could be use request_threaded_irq. If not, please justify.
Why should this be request_threaded_irq?? I have to check to learn the differnces.
>>
>>> + if (ret) {
>>
>> goto error;
>>
>>> + struct resource *mem;
>>> +
>>> + iounmap(sr_info->base);
>>> + mem = platform_get_resource(sr_info->pdev,
>>> + IORESOURCE_MEM, 0);
>>> + release_mem_region(mem->start, resource_size(mem));
>>> + list_del(&sr_info->node);
>>> + dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
>>> + "interrupt handler. Smartreflex will"
>>> + "not function as desired\n", __func__);
>>> +
>>> + kfree(sr_info);
>>> + return ret;
>>> + }
>>
>>and move this after the return...
I did not understand this comment.
>>
>>> + }
>>> +
>>> + if (pdata && pdata->enable_on_init)
>>> + sr_start_vddautocomp(sr_info);
>>> +
>>> + return ret;
>>
>>error:
>>
>>(here.)
>>
>>> +}
>>> +
>>> +static void sr_v1_disable(struct omap_sr *sr)
>>> +{
>>> + int timeout = 0;
>>> +
>>> + /* Enable MCUDisableAcknowledge interrupt */
>>> + sr_modify_reg(sr, ERRCONFIG_V1,
>>> + ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
>>> +
>>> + /* SRCONFIG - disable SR */
>>> + sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
>>> +
>>> + /* Disable all other SR interrupts and clear the status */
>>> + sr_modify_reg(sr, ERRCONFIG_V1,
>>> + (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
>>> + ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
>>> + (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
>>> + ERRCONFIG_MCUBOUNDINTST |
>>> + ERRCONFIG_VPBOUNDINTST_V1));
>>> +
>>> + /*
>>> + * Wait for SR to be disabled.
>>> + * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
>>> + */
>>> + omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
>>> + ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
>>> + timeout);
>>> +
>>> + if (timeout >= SR_DISABLE_TIMEOUT)
>>> + dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
>>> + __func__);
>>> +
>>> + /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
>>> + sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
>>> + ERRCONFIG_MCUDISACKINTST);
>>> +}
>>> +
>>> +static void sr_v2_disable(struct omap_sr *sr)
>>> +{
>>> + int timeout = 0;
>>> +
>>> + /* Enable MCUDisableAcknowledge interrupt */
>>> + sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
>>> +
>>> + /* SRCONFIG - disable SR */
>>> + sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
>>> +
>>> + /* Disable all other SR interrupts and clear the status */
>>> + sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
>>> + ERRCONFIG_VPBOUNDINTST_V2);
>>> + sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
>>> + IRQENABLE_MCUVALIDINT |
>>> + IRQENABLE_MCUBOUNDSINT));
>>> + sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
>>> + IRQSTATUS_MCVALIDINT |
>>> + IRQSTATUS_MCBOUNDSINT));
>>> +
>>> + /*
>>> + * Wait for SR to be disabled.
>>> + * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
>>> + */
>>> + omap_test_timeout((sr_read_reg(sr, IRQSTATUS) &
>>> + IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
>>> + timeout);
>>> +
>>> + if (timeout >= SR_DISABLE_TIMEOUT)
>>> + dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
>>> + __func__);
>>> +
>>> + /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
>>> + sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
>>> + sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
>>> +}
>>> +
>>> +/* Public Functions */
>>> +
>>> +/**
>>> + * sr_configure_errgen() - Configures the smrtreflex to perform AVS using
>>the
>>> + * error generator module.
>>> + * @voltdm: VDD pointer to which the SR module to be configured belongs
>>to.
>>> + *
>>> + * This API is to be called from the smartreflex class driver to
>>> + * configure the error generator module inside the smartreflex module.
>>> + * SR settings if using the ERROR module inside Smartreflex.
>>> + * SR CLASS 3 by default uses only the ERROR module where as
>>> + * SR CLASS 2 can choose between ERROR module and MINMAXAVG
>>> + * module. Returns 0 on success and error value in case of failure.
>>> + */
>>> +int sr_configure_errgen(struct voltagedomain *voltdm)
>>> +{
>>> + u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en;
>>> + u32 vpboundint_st, senp_en = 0, senn_en = 0;
>>> + u8 senp_shift, senn_shift;
>>> + struct omap_sr *sr = _sr_lookup(voltdm);
>>> + struct omap_sr_data *pdata;
>>> +
>>> + if (IS_ERR(sr)) {
>>> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
>>> + __func__, voltdm->name);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + pdata = sr->pdev->dev.platform_data;
>>> +
>>> + if (!sr->clk_length)
>>> + sr_set_clk_length(sr);
>>> +
>>> + if (pdata) {
>>> + senp_en = pdata->senp_mod;
>>> + senn_en = pdata->senn_mod;
>>> + } else {
>>> + dev_warn(&sr->pdev->dev, "%s: Missing pdata\n", __func__);
>>
>>This is more of an error condition, and should probably return here with
>>an error. Otherwise undefined values are used below.
Ok. Will return.
>>
>>> + }
>>> +
>>> + sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
>>> + SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
>>> +
>>> + if (sr->ip_type == SR_TYPE_V1) {
>>> + sr_config |= SRCONFIG_DELAYCTRL;
>>> + senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
>>> + senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
>>> + errconfig_offs = ERRCONFIG_V1;
>>> + vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
>>> + vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
>>> + } else if (sr->ip_type == SR_TYPE_V2) {
>>> + senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
>>> + senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
>>> + errconfig_offs = ERRCONFIG_V2;
>>> + vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
>>> + vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
>>> + } else {
>>> + dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
>>> + "module without specifying the ip\n", __func__);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
>>> + sr_write_reg(sr, SRCONFIG, sr_config);
>>> + sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
>>> + (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
>>> + (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
>>> + sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
>>> + SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
>>> + sr_errconfig);
>>> +
>>> + /* Enabling the interrupts if the ERROR module is used */
>>> + sr_modify_reg(sr, errconfig_offs,
>>> + vpboundint_en, (vpboundint_en | vpboundint_st));
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +/**
>>> + * sr_configure_minmax() - Configures the smrtreflex to perform AVS using
>>the
>>> + * minmaxavg module.
>>> + * @voltdm: VDD pointer to which the SR module to be configured belongs
>>to.
>>> + *
>>> + * This API is to be called from the smartreflex class driver to
>>> + * configure the minmaxavg module inside the smartreflex module.
>>> + * SR settings if using the ERROR module inside Smartreflex.
>>> + * SR CLASS 3 by default uses only the ERROR module where as
>>> + * SR CLASS 2 can choose between ERROR module and MINMAXAVG
>>> + * module. Returns 0 on success and error value in case of failure.
>>> + */
>>> +int sr_configure_minmax(struct voltagedomain *voltdm)
>>> +{
>>> + u32 sr_config, sr_avgwt;
>>> + u32 senp_en = 0, senn_en = 0;
>>> + u8 senp_shift, senn_shift;
>>> + struct omap_sr *sr = _sr_lookup(voltdm);
>>> + struct omap_sr_data *pdata;
>>> +
>>> + if (IS_ERR(sr)) {
>>> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
>>> + __func__, voltdm->name);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + pdata = sr->pdev->dev.platform_data;
>>> +
>>> + if (!sr->clk_length)
>>> + sr_set_clk_length(sr);
>>> +
>>> + if (pdata) {
>>> + senp_en = pdata->senp_mod;
>>> + senn_en = pdata->senn_mod;
>>> + } else {
>>> + dev_warn(&sr->pdev->dev, "%s: Missing pdata\n", __func__);
>>
>>same as above
Will do the necessary
>>
>>> + }
>>> +
>>> + sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
>>> + SRCONFIG_SENENABLE |
>>> + (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
>>> +
>>> + if (sr->ip_type == SR_TYPE_V1) {
>>> + sr_config |= SRCONFIG_DELAYCTRL;
>>> + senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
>>> + senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
>>> + } else if (sr->ip_type == SR_TYPE_V2) {
>>> + senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
>>> + senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
>>> + } else {
>>> + dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
>>> + "module without specifying the ip\n", __func__);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
>>> + sr_write_reg(sr, SRCONFIG, sr_config);
>>> + sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
>>> + (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
>>> + sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
>>> +
>>> + /*
>>> + * Enabling the interrupts if MINMAXAVG module is used.
>>> + * TODO: check if all the interrupts are mandatory
>>> + */
>>> + if (sr->ip_type == SR_TYPE_V1) {
>>> + sr_modify_reg(sr, ERRCONFIG_V1,
>>> + (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
>>> + ERRCONFIG_MCUBOUNDINTEN),
>>> + (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
>>> + ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
>>> + ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
>>> + } else if (sr->ip_type == SR_TYPE_V2) {
>>> + sr_write_reg(sr, IRQSTATUS,
>>> + IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
>>> + IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
>>> + sr_write_reg(sr, IRQENABLE_SET,
>>> + IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
>>> + IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +/**
>>> + * sr_enable() - Enables the smartreflex module.
>>> + * @voltdm: VDD pointer to which the SR module to be configured belongs
>>to.
>>> + * @volt: The voltage at which the Voltage domain associated with
>>> + * the smartreflex module is operating at.
>>> + * This is required only to program the correct Ntarget value.
>>> + *
>>> + * This API is to be called from the smartreflex class driver to
>>> + * enable a smartreflex module. Returns 0 on success. Returns error
>>> + * value if the voltage passed is wrong or if ntarget value is wrong.
>>> + */
>>> +int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
>>> +{
>>> + u32 nvalue_reciprocal;
>>> + struct omap_volt_data *volt_data;
>>> + struct omap_sr *sr = _sr_lookup(voltdm);
>>> + int ret;
>>> +
>>> + if (IS_ERR(sr)) {
>>> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
>>> + __func__, voltdm->name);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + volt_data = omap_voltage_get_voltdata(voltdm, volt);
>>> +
>>> + if (IS_ERR(volt_data)) {
>>> + dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
>>> + " for nominal voltage %ld\n", __func__, volt);
>>> + return -ENODATA;
>>> + }
>>> +
>>> + nvalue_reciprocal = volt_data->sr_nvalue;
>>> +
>>> + if (!nvalue_reciprocal) {
>>> + dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n",
>>> + __func__, volt);
>>> + return -ENODATA;
>>> + }
>>> +
>>> + /* errminlimit is opp dependent and hence linked to voltage */
>>> + sr->err_minlimit = volt_data->sr_errminlimit;
>>> +
>>> + /* Enable the clocks */
>>
>>not just clocs are enabled by pm_runtime_get(). Again, probably just
>>removing the comment is better.
Will remove
>>
>>> + if (!sr->sr_enable) {
>>> + pm_runtime_get_sync(&sr->pdev->dev);
>>> + sr->sr_enable = true;
>>> + }
>>
>>But, I'm not sure why you need this sr_enabled flag. Here, you could
>>just do pm_runtime_get_sync() and rely on the usecounting done in the
>>runtime PM core...
sr_enable flag is used in sr_disable() API to check if we really need to disable sr or not.
>>
>>> + /* Check if SR is already enabled. If yes do nothing */
>>> + if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
>>> + return 0;
>>> +
>>> + /* Configure SR */
>>> + ret = sr_class->configure(voltdm);
>>> + if (ret)
>>> + return ret;
>>> +
>>> + sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal);
>>> +
>>> + /* SRCONFIG - enable SR */
>>> + sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
>>> + return 0;
>>> +}
>>> +
>>> +/**
>>> + * sr_disable() - Disables the smartreflex module.
>>> + * @voltdm: VDD pointer to which the SR module to be configured belongs
>>to.
>>> + *
>>> + * This API is to be called from the smartreflex class driver to
>>> + * disable a smartreflex module.
>>> + */
>>> +void sr_disable(struct voltagedomain *voltdm)
>>> +{
>>> + struct omap_sr *sr = _sr_lookup(voltdm);
>>> +
>>> + if (IS_ERR(sr)) {
>>> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
>>> + __func__, voltdm->name);
>>> + return;
>>> + }
>>> +
>>> + /* Check if SR clocks are already disabled. If yes do nothing */
>>> + if (!sr->sr_enable)
>>
>>...and here you just check pm_runtime_is_suspended()
mmmm.. I will give this a try.
>>
>>> + return;
>>> +
>>> + /* Check if SR is already disabled. If yes just disable the clocks */
>>> + if (!(sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE))
>>> + goto disable_clocks;
>>
>>drop the goto and just indent the next block
Ok will do.
>>
>>> +
>>> + if (sr->ip_type == SR_TYPE_V1)
>>> + sr_v1_disable(sr);
>>> + else if (sr->ip_type == SR_TYPE_V2)
>>> + sr_v2_disable(sr);
>>> +
>>> +disable_clocks:
>>> + pm_runtime_put_sync(&sr->pdev->dev);
>>> + sr->sr_enable = false;
>>> +}
>>> +
>>> +/**
>>> + * sr_register_class() - API to register a smartreflex class parameters.
>>> + * @class_data: The structure containing various sr class specific
>>data.
>>> + *
>>> + * This API is to be called by the smartreflex class driver to register
>>itself
>>> + * with the smartreflex driver during init. Returns 0 on success else the
>>> + * error value.
>>> + */
>>> +int sr_register_class(struct omap_smartreflex_class_data *class_data)
>>> +{
>>> + struct omap_sr *sr_info;
>>> +
>>> + if (!class_data) {
>>> + pr_warning("%s:, Smartreflex class data passed is NULL\n",
>>> + __func__);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + if (sr_class) {
>>> + pr_warning("%s: Smartreflex class driver already registered\n",
>>> + __func__);
>>> + return -EBUSY;
>>> + }
>>> +
>>> + sr_class = class_data;
>>> +
>>> + /*
>>> + * Call into late init to do intializations that require
>>> + * both sr driver and sr class driver to be initiallized.
>>> + */
>>> + list_for_each_entry(sr_info, &sr_list, node)
>>> + sr_late_init(sr_info);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +/**
>>> + * omap_sr_enable() - API to enable SR clocks and to call into the
>>> + * registered smartreflex class enable API.
>>> + * @voltdm: VDD pointer to which the SR module to be configured belongs
>>to.
>>> + *
>>> + * This API is to be called from the kernel in order to enable
>>> + * a particular smartreflex module. This API will do the initial
>>> + * configurations to turn on the smartreflex module and in turn call
>>> + * into the registered smartreflex class enable API.
>>> + */
>>> +void omap_sr_enable(struct voltagedomain *voltdm)
>>> +{
>>> + struct omap_sr *sr = _sr_lookup(voltdm);
>>> +
>>> + if (IS_ERR(sr)) {
>>> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
>>> + __func__, voltdm->name);
>>> + return;
>>> + }
>>> +
>>> + if (!sr->autocomp_active)
>>> + return;
>>> +
>>> + if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
>>> + dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
>>> + "registered\n", __func__);
>>> + return;
>>> + }
>>> +
>>> + sr_class->enable(voltdm);
>>> +}
>>> +
>>> +/**
>>> + * omap_sr_disable() - API to disable SR without resetting the voltage
>>> + * processor voltage
>>> + * @voltdm: VDD pointer to which the SR module to be configured belongs
>>to.
>>> + *
>>> + * This API is to be called from the kernel in order to disable
>>> + * a particular smartreflex module. This API will in turn call
>>> + * into the registered smartreflex class disable API. This API will tell
>>> + * the smartreflex class disable not to reset the VP voltage after
>>> + * disabling smartreflex.
>>> + */
>>> +void omap_sr_disable(struct voltagedomain *voltdm)
>>> +{
>>> + struct omap_sr *sr = _sr_lookup(voltdm);
>>> +
>>> + if (IS_ERR(sr)) {
>>> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
>>> + __func__, voltdm->name);
>>> + return;
>>> + }
>>> +
>>> + if (!sr->autocomp_active)
>>> + return;
>>> +
>>> + if (!sr_class || !(sr_class->disable)) {
>>> + dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
>>> + "registered\n", __func__);
>>> + return;
>>> + }
>>> +
>>> + sr_class->disable(voltdm, 0);
>>> +}
>>> +
>>> +/**
>>> + * omap_sr_disable_reset_volt() - API to disable SR and reset the
>>> + * voltage processor voltage
>>> + * @voltdm: VDD pointer to which the SR module to be configured belongs
>>to.
>>> + *
>>> + * This API is to be called from the kernel in order to disable
>>> + * a particular smartreflex module. This API will in turn call
>>> + * into the registered smartreflex class disable API. This API will tell
>>> + * the smartreflex class disable to reset the VP voltage after
>>> + * disabling smartreflex.
>>> + */
>>> +void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
>>> +{
>>> + struct omap_sr *sr = _sr_lookup(voltdm);
>>> +
>>> + if (IS_ERR(sr)) {
>>> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
>>> + __func__, voltdm->name);
>>> + return;
>>> + }
>>> +
>>> + if (!sr->autocomp_active)
>>> + return;
>>> +
>>> + if (!sr_class || !(sr_class->disable)) {
>>> + dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
>>> + "registered\n", __func__);
>>> + return;
>>> + }
>>> +
>>> + sr_class->disable(voltdm, 1);
>>> +}
>>> +
>>> +/**
>>> + * omap_sr_register_pmic() - API to register pmic specific info.
>>> + * @pmic_data: The structure containing pmic specific data.
>>> + *
>>> + * This API is to be called from the PMIC specific code to register with
>>> + * smartreflex driver pmic specific info. Currently the only info required
>>> + * is the smartreflex init on the PMIC side.
>>> + */
>>> +void omap_sr_register_pmic(struct omap_smartreflex_pmic_data *pmic_data)
>>> +{
>>> + if (!pmic_data) {
>>> + pr_warning("%s: Trying to register NULL PMIC data structure"
>>> + "with smartreflex\n", __func__);
>>> + return;
>>> + }
>>> +
>>> + sr_pmic_data = pmic_data;
>>> +}
>>> +
>>> +/* PM Debug Fs enteries to enable disable smartreflex. */
>>> +static int omap_sr_autocomp_show(void *data, u64 *val)
>>> +{
>>> + struct omap_sr *sr_info = (struct omap_sr *) data;
>>> +
>>> + if (!sr_info) {
>>> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
>>> + __func__, sr_info->voltdm->name);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + *val = sr_info->autocomp_active;
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static int omap_sr_autocomp_store(void *data, u64 val)
>>> +{
>>> + struct omap_sr *sr_info = (struct omap_sr *) data;
>>> +
>>> + if (!sr_info) {
>>> + pr_warning("%s: omap_sr struct for sr_%s not found\n",
>>> + __func__, sr_info->voltdm->name);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + /* Sanity check */
>>> + if (val && (val != 1)) {
>>> + pr_warning("%s: Invalid argument %lld\n", __func__, val);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + if (!val)
>>> + sr_stop_vddautocomp(sr_info);
>>> + else
>>> + sr_start_vddautocomp(sr_info);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
>>> + omap_sr_autocomp_store, "%llu\n");
>>> +
>>> +static int __init omap_smartreflex_probe(struct platform_device *pdev)
>>> +{
>>> + struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
>>> + struct omap_device *odev = to_omap_device(pdev);
>>> + struct omap_sr_data *pdata = pdev->dev.platform_data;
>>> + struct resource *mem, *irq;
>>> + struct dentry *dbg_dir;
>>> + char *name;
>>> + int ret = 0;
>>> +
>>> + if (!sr_info) {
>>> + dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
>>> + __func__);
>>> + return -ENOMEM;
>>> + }
>>> +
>>> + if (!pdata) {
>>> + dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>> + if (!mem) {
>>> + dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
>>> + ret = -ENODEV;
>>> + goto err_free_devinfo;
>>> + }
>>> +
>>> + irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
>>> +
>>> + pm_runtime_enable(&pdev->dev);
>>> +
>>> + sr_info->pdev = pdev;
>>> + sr_info->srid = pdev->id;
>>> + sr_info->voltdm = pdata->voltdm;
>>> + sr_info->autocomp_active = false;
>>> + sr_info->ip_type = odev->hwmods[0]->class->rev;
>>> + sr_info->base = ioremap(mem->start, resource_size(mem));
>>> + if (!sr_info->base) {
>>> + dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
>>> + ret = -ENOMEM;
>>> + goto err_release_region;
>>> + }
>>> +
>>> + if (irq)
>>> + sr_info->irq = irq->start;
>>> +
>>> + sr_set_clk_length(sr_info);
>>> + sr_set_regfields(sr_info);
>>> +
>>> + list_add(&sr_info->node, &sr_list);
>>> +
>>> + /*
>>> + * Call into late init to do intializations that require
>>> + * both sr driver and sr class driver to be initiallized.
>>> + */
>>> + if (sr_class) {
>>> + ret = sr_late_init(sr_info);
>>> + if (ret) {
>>> + pr_warning("%s: Error in SR late init\n", __func__);
>>> + return ret;
>>> + }
>>> + }
>>> +
>>> + dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
>>> +
>>> + /*
>>> + * If the Smartreflex main debugfs directory is not created, do
>>> + * not try to create rest of the debugfs entries.
>>> + */
>>> + if (!sr_dbg_dir)
>>> + return ret;
>>> +
>>> + name = kzalloc(SMARTREFLEX_NAME_LEN + 1, GFP_KERNEL);
>>> + if (!name) {
>>> + dev_err(&pdev->dev, "%s: Unable to allocate name for"
>>> + "debufs entry", __func__);
>>> + return ret;
>>
>>what will 'ret' be here?
Will correct this.
>>
>>> + }
>>> +
>>> + /* Create the debug fs enteries */
>>> + strcpy(name, "sr_");
>>> + strcat(name, sr_info->voltdm->name);
>>> +
>>> + dbg_dir = debugfs_create_dir(name, sr_dbg_dir);
>>> + if (IS_ERR(dbg_dir)) {
>>> + dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
>>> + __func__);
>>> + return ret;
>>
>>or here?
Will correct this.
>>
>>> + }
>>> +
>>> + (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir,
>>> + (void *)sr_info, &pm_sr_fops);
>>> +
>>> + return ret;
>>> +
>>> +err_release_region:
>>> + release_mem_region(mem->start, resource_size(mem));
>>> +err_free_devinfo:
>>> + kfree(sr_info);
>>> +
>>> + return ret;
>>> +}
>>> +
>>> +static int __devexit omap_smartreflex_remove(struct platform_device *pdev)
>>
>>as an internal function, to be consistent with other naming, this should
>>be sr_remove.
It is omap_smartreflex_probe and remove. Do you prefer omap_sr_probe and omap_sr_remove?
>>
>>> +{
>>> + struct omap_sr_data *pdata = pdev->dev.platform_data;
>>> + struct omap_sr *sr_info;
>>> + struct resource *mem;
>>> +
>>> + if (!pdata) {
>>> + dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + sr_info = _sr_lookup(pdata->voltdm);
>>> + if (!sr_info) {
>>> + dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
>>> + __func__);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + /* Disable Autocompensation if enabled before removing the module */
>>
>>surperfluous comment
Ok. Will remove.
>>
>>> + if (sr_info->autocomp_active)
>>> + sr_stop_vddautocomp(sr_info);
>>> +
>>> + list_del(&sr_info->node);
>>> + iounmap(sr_info->base);
>>> + kfree(sr_info);
>>> + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>> + release_mem_region(mem->start, resource_size(mem));
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static struct platform_driver smartreflex_driver = {
>>> + .remove = omap_smartreflex_remove,
>>> + .driver = {
>>> + .name = "smartreflex",
>>> + },
>>> +};
>>> +
>>> +static int __init sr_init(void)
>>> +{
>>> + int ret = 0;
>>> +
>>> + /*
>>> + * sr_init is a late init. If by then a pmic specific API is not
>>> + * registered either there is no need for anything to be done on
>>> + * the PMIC side or somebody has forgotten to register a PMIC
>>> + * handler. Warn for the second condition.
>>> + */
>>> + if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
>>> + sr_pmic_data->sr_pmic_init();
>>> + else
>>> + pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
>>> +
>>> + if (pm_dbg_main_dir) {
>>> + struct dentry *d;
>>> +
>>> + d = debugfs_create_dir("smartreflex", pm_dbg_main_dir);
>>> + if (!IS_ERR(d))
>>> + sr_dbg_dir = d;
>>> + }
>>> +
>>> + ret = platform_driver_probe(&smartreflex_driver,
>>> + omap_smartreflex_probe);
>>> + if (ret) {
>>> + pr_err("%s: platform driver register failed for SR\n",
>>> + __func__);
>>> + return ret;
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static void __exit sr_exit(void)
>>> +{
>>> + platform_driver_unregister(&smartreflex_driver);
>>> +}
>>> +late_initcall(sr_init);
>>> +module_exit(sr_exit);
>>> +
>>> +MODULE_DESCRIPTION("OMAP SMARTREFLEX DRIVER");
>>
>>"OMAP SmartReflex driver"
Ok.. Will Correct
>>
>>> +MODULE_LICENSE("GPL");
>>> +MODULE_ALIAS("platform:" DRIVER_NAME);
>>> +MODULE_AUTHOR("Texas Instruments Inc");
>>> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
>>> index e39a417..8056349 100644
>>> --- a/arch/arm/plat-omap/Kconfig
>>> +++ b/arch/arm/plat-omap/Kconfig
>>> @@ -35,6 +35,38 @@ config OMAP_DEBUG_LEDS
>>> depends on OMAP_DEBUG_DEVICES
>>> default y if LEDS
>>>
>>> +config OMAP_SMARTREFLEX
>>> + bool "SmartReflex support"
>>> + depends on ARCH_OMAP3 && PM
>>> + help
>>> + Say Y if you want to enable SmartReflex.
>>> +
>>> + SmartReflex can perform continuous dynamic voltage
>>> + scaling around the nominal operating point voltage
>>> + according to silicon characteristics and operating
>>> + conditions. Enabling SmartReflex reduces power
>>> + consumption.
>>> +
>>> + Please note, that by default SmartReflex is only
>>> + initialized. To enable the automatic voltage
>>> + compensation for VDD1 and VDD2, user must write 1 to
>>
>>s/VDD1/MPU/
>>s/VDD2/CORE/
Will correct
>>
>>> + /debug/pm_debug/Smartreflex/SR<X>/autocomp,
>>> + where X is 1 or 2 for OMAP3
>>
>>Not fully true, on some SoCs (ES3.1) it's also enabled by default.
mmm.. Will update the commment
>>
>>> +config OMAP_SMARTREFLEX_TESTING
>>> + bool "Smartreflex testing support"
>>> + depends on OMAP_SMARTREFLEX
>>> + default n
>>> + help
>>> + Say Y if you want to enable SmartReflex testing with SW hardcoded
>>> + NVALUES intead of E-fuse NVALUES set in factory silicon testing.
>>> +
>>> + In some devices the E-fuse values have not been set, even though
>>> + SmartReflex modules are included. Using these hardcoded values set
>>> + in software, one can test the SmartReflex features without E-fuse.
>>> +
>>> + WARNING: Enabling this option may cause your device to hang!
>>> +
>>> config OMAP_RESET_CLOCKS
>>> bool "Reset unused clocks during boot"
>>> depends on ARCH_OMAP
>>> diff --git a/arch/arm/plat-omap/include/plat/smartreflex.h b/arch/arm/plat-
>>omap/include/plat/smartreflex.h
>>> new file mode 100644
>>> index 0000000..1ad03ea
>>> --- /dev/null
>>> +++ b/arch/arm/plat-omap/include/plat/smartreflex.h
>>> @@ -0,0 +1,277 @@
>>> +/*
>>> + * OMAP Smartreflex Defines and Routines
>>> + *
>>> + * Author: Thara Gopinath <thara@ti.com>
>>> + *
>>> + * Copyright (C) 2010 Texas Instruments, Inc.
>>> + * Thara Gopinath <thara@ti.com>
>>> + *
>>> + * Copyright (C) 2008 Nokia Corporation
>>> + * Kalle Jokiniemi
>>> + *
>>> + * Copyright (C) 2007 Texas Instruments, Inc.
>>> + * Lesly A M <x0080970@ti.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> + */
>>> +
>>> +#ifndef __ASM_ARM_OMAP_SMARTREFLEX_H
>>> +#define __ASM_ARM_OMAP_SMARTREFLEX_H
>>> +
>>> +#include <linux/platform_device.h>
>>> +#include <plat/voltage.h>
>>> +
>>> +#ifdef CONFIG_PM_DEBUG
>>> +extern struct dentry *pm_dbg_main_dir;
>>> +extern struct dentry *sr_dbg_dir;
>>> +#endif
>>> +
>>> +/*
>>> + * Different Smartreflex IPs version. The v1 is the 65nm version used in
>>> + * OMAP3430. The v2 is the update for the 45nm version of the IP
>>> + * used in OMAP3630 and OMAP4430
>>> + */
>>> +#define SR_TYPE_V1 1
>>> +#define SR_TYPE_V2 2
>>> +
>>> +/* SMART REFLEX REG ADDRESS OFFSET */
>>> +#define SRCONFIG 0x00
>>> +#define SRSTATUS 0x04
>>> +#define SENVAL 0x08
>>> +#define SENMIN 0x0C
>>> +#define SENMAX 0x10
>>> +#define SENAVG 0x14
>>> +#define AVGWEIGHT 0x18
>>> +#define NVALUERECIPROCAL 0x1c
>>> +#define SENERROR_V1 0x20
>>> +#define ERRCONFIG_V1 0x24
>>> +#define IRQ_EOI 0x20
>>> +#define IRQSTATUS_RAW 0x24
>>> +#define IRQSTATUS 0x28
>>> +#define IRQENABLE_SET 0x2C
>>> +#define IRQENABLE_CLR 0x30
>>> +#define SENERROR_V2 0x34
>>> +#define ERRCONFIG_V2 0x38
>>> +
>>> +/* Bit/Shift Positions */
>>> +
>>> +/* SRCONFIG */
>>> +#define SRCONFIG_ACCUMDATA_SHIFT 22
>>> +#define SRCONFIG_SRCLKLENGTH_SHIFT 12
>>> +#define SRCONFIG_SENNENABLE_V1_SHIFT 5
>>> +#define SRCONFIG_SENPENABLE_V1_SHIFT 3
>>> +#define SRCONFIG_SENNENABLE_V2_SHIFT 1
>>> +#define SRCONFIG_SENPENABLE_V2_SHIFT 0
>>> +#define SRCONFIG_CLKCTRL_SHIFT 0
>>> +
>>> +#define SRCONFIG_ACCUMDATA_MASK (0x3ff << 22)
>>> +
>>> +#define SRCONFIG_SRENABLE BIT(11)
>>> +#define SRCONFIG_SENENABLE BIT(10)
>>> +#define SRCONFIG_ERRGEN_EN BIT(9)
>>> +#define SRCONFIG_MINMAXAVG_EN BIT(8)
>>> +#define SRCONFIG_DELAYCTRL BIT(2)
>>> +
>>> +/* AVGWEIGHT */
>>> +#define AVGWEIGHT_SENPAVGWEIGHT_SHIFT 2
>>> +#define AVGWEIGHT_SENNAVGWEIGHT_SHIFT 0
>>> +
>>> +/* NVALUERECIPROCAL */
>>> +#define NVALUERECIPROCAL_SENPGAIN_SHIFT 20
>>> +#define NVALUERECIPROCAL_SENNGAIN_SHIFT 16
>>> +#define NVALUERECIPROCAL_RNSENP_SHIFT 8
>>> +#define NVALUERECIPROCAL_RNSENN_SHIFT 0
>>> +
>>> +/* ERRCONFIG */
>>> +#define ERRCONFIG_ERRWEIGHT_SHIFT 16
>>> +#define ERRCONFIG_ERRMAXLIMIT_SHIFT 8
>>> +#define ERRCONFIG_ERRMINLIMIT_SHIFT 0
>>> +
>>> +#define SR_ERRWEIGHT_MASK (0x07 << 16)
>>> +#define SR_ERRMAXLIMIT_MASK (0xff << 8)
>>> +#define SR_ERRMINLIMIT_MASK (0xff << 0)
>>> +
>>> +#define ERRCONFIG_VPBOUNDINTEN_V1 BIT(31)
>>> +#define ERRCONFIG_VPBOUNDINTST_V1 BIT(30)
>>> +#define ERRCONFIG_MCUACCUMINTEN BIT(29)
>>> +#define ERRCONFIG_MCUACCUMINTST BIT(28)
>>> +#define ERRCONFIG_MCUVALIDINTEN BIT(27)
>>> +#define ERRCONFIG_MCUVALIDINTST BIT(26)
>>> +#define ERRCONFIG_MCUBOUNDINTEN BIT(25)
>>> +#define ERRCONFIG_MCUBOUNDINTST BIT(24)
>>> +#define ERRCONFIG_MCUDISACKINTEN BIT(23)
>>> +#define ERRCONFIG_VPBOUNDINTST_V2 BIT(23)
>>> +#define ERRCONFIG_MCUDISACKINTST BIT(22)
>>> +#define ERRCONFIG_VPBOUNDINTEN_V2 BIT(22)
>>> +
>>> +#define ERRCONFIG_STATUS_V1_MASK (ERRCONFIG_VPBOUNDINTST_V1 | \
>>> + ERRCONFIG_MCUACCUMINTST | \
>>> + ERRCONFIG_MCUVALIDINTST | \
>>> + ERRCONFIG_MCUBOUNDINTST | \
>>> + ERRCONFIG_MCUDISACKINTST)
>>> +/* IRQSTATUS */
>>> +#define IRQSTATUS_MCUACCUMINT BIT(3)
>>> +#define IRQSTATUS_MCVALIDINT BIT(2)
>>> +#define IRQSTATUS_MCBOUNDSINT BIT(1)
>>> +#define IRQSTATUS_MCUDISABLEACKINT BIT(0)
>>> +
>>> +/* IRQENABLE_SET and IRQENABLE_CLEAR */
>>> +#define IRQENABLE_MCUACCUMINT BIT(3)
>>> +#define IRQENABLE_MCUVALIDINT BIT(2)
>>> +#define IRQENABLE_MCUBOUNDSINT BIT(1)
>>> +#define IRQENABLE_MCUDISABLEACKINT BIT(0)
>>> +
>>> +/* Common Bit values */
>>> +
>>> +#define SRCLKLENGTH_12MHZ_SYSCLK 0x3c
>>> +#define SRCLKLENGTH_13MHZ_SYSCLK 0x41
>>> +#define SRCLKLENGTH_19MHZ_SYSCLK 0x60
>>> +#define SRCLKLENGTH_26MHZ_SYSCLK 0x82
>>> +#define SRCLKLENGTH_38MHZ_SYSCLK 0xC0
>>> +
>>> +/*
>>> + * 3430 specific values. Maybe these should be passed from board file or
>>> + * pmic structures.
>>> + */
>>> +#define OMAP3430_SR_ACCUMDATA 0x1f4
>>> +
>>> +#define OMAP3430_SR1_SENPAVGWEIGHT 0x03
>>> +#define OMAP3430_SR1_SENNAVGWEIGHT 0x03
>>> +
>>> +#define OMAP3430_SR2_SENPAVGWEIGHT 0x01
>>> +#define OMAP3430_SR2_SENNAVGWEIGHT 0x01
>>> +
>>> +#define OMAP3430_SR_ERRWEIGHT 0x04
>>> +#define OMAP3430_SR_ERRMAXLIMIT 0x02
>>> +
>>> +/* TODO:3630/OMAP4 values if it has to come from this file */
>>> +
>>> +/**
>>> + * omap_smartreflex_dev_data - Smartreflex device specific data
>>
>>omap_sr..
Will correct
>>
>>> + * @volts_supported : Number of distinct voltages possible for the VDD
>>> + * associated with this smartreflex module.
>>> + * @efuse_sr_control : The regisrter offset of control_fuse_sr efuse
>>> + * register from which sennenable and senpenable values
>>> + * are obtained.
>>> + * @sennenable_shift : The shift in the control_fuse_sr register for
>>> + * obtaining the sennenable value for this smartreflex
>>> + * module.
>>> + * @senpenable_shift : The shift in the control_fuse_sr register for
>>> + * obtaining the senpenable value for this smartreflex
>>> + * module.
>>> + * @efuse_nvalues_offs : Array of efuse offsets from which ntarget
>>values can
>>> + * be retrieved. Number of efuse offsets in this arrray
>>> + * is equal to the volts_supported value ie one efuse
>>> + * register per supported voltage.
>>> + * @test_sennenable : SENNENABLE test value
>>> + * @test_senpenable : SENPENABLE test value.
>>> + * @test_nvalues : Array of test ntarget values.
>>> + * @vdd_name : Name of the voltage domain associated with this
>>> + * Smartreflex device.
>>> + * @volt_data : Voltage table associated with this smartreflex
>>module
>>> + */
>>> +struct omap_sr_dev_data {
>>> + int volts_supported;
>>> + u32 efuse_sr_control;
>>> + u32 sennenable_shift;
>>> + u32 senpenable_shift;
>>> + u32 *efuse_nvalues_offs;
>>> + u32 test_sennenable;
>>> + u32 test_senpenable;
>>> + u32 *test_nvalues;
>>> + char *vdd_name;
>>> + struct omap_volt_data *volt_data;
>>> +};
>>> +
>>> +/**
>>> + * omap_smartreflex_pmic_data : Strucutre to be populated by pmic code to
>>pass
>>> + * pmic specific info to smartreflex driver
>>> + *
>>> + * @sr_pmic_init - API to initialize smartreflex on the PMIC side.
>>> + */
>>> +struct omap_smartreflex_pmic_data {
>>
>>omap_sr..
Will correct.
>>
>>> + void (*sr_pmic_init) (void);
>>> +};
>>> +
>>> +#ifdef CONFIG_OMAP_SMARTREFLEX
>>> +/*
>>> + * The smart reflex driver supports CLASS1 CLASS2 and CLASS3 SR.
>>> + * The smartreflex class driver should pass the class type.
>>> + * Should be used to populate the class_type field of the
>>> + * omap_smartreflex_class_data structure.
>>> + */
>>> +#define SR_CLASS1 0x1
>>> +#define SR_CLASS2 0x2
>>> +#define SR_CLASS3 0x3
>>> +
>>> +/**
>>> + * omap_smartreflex_class_data : Structure to be populated by
>>
>>omap_sr...
Will correct.
>>
>>> + * Smartreflex class driver with corresponding class enable disable API's
>>> + *
>>> + * @enable - API to enable a particular class smaartreflex.
>>> + * @disable - API to disable a particular class smartreflex.
>>> + * @configure - API to configure a particular class smartreflex.
>>> + * @notify - API to notify the class driver about an event in SR. Not
>>needed
>>> + * for class3.
>>> + * @notify_flags - specify the events to be notified to the class driver
>>> + * @class_type - specify which smartreflex class. Can be used by the SR
>>driver
>>> + * to take any class based decisions.
>>> + */
>>> +struct omap_smartreflex_class_data {
>>
>>omap_sr
>>
>>> + int (*enable)(struct voltagedomain *voltdm);
>>> + int (*disable)(struct voltagedomain *voltdm, int is_volt_reset);
>>> + int (*configure)(struct voltagedomain *voltdm);
>>> + int (*notify)(struct voltagedomain *voltdm, u32 status);
>>> + u8 notify_flags;
>>> + u8 class_type;
>>> +};
>>> +
>>> +/**
>>> + * omap_smartreflex_data - Smartreflex platform data
>>
>>omap_sr
Will correct
>>
>>> + * @senp_mod : SENPENABLE value for the sr
>>> + * @senn_mod : SENNENABLE value for sr
>>> + * @sr_nvalue : array of n target values for sr
>>> + * @enable_on_init : whether this sr module needs to enabled at
>>> + * boot up or not.
>>> + * @voltdm : Pointer to the voltage domain associated with the
>>SR
>>> + */
>>> +struct omap_sr_data {
>>> + u32 senp_mod;
>>> + u32 senn_mod;
>>> + bool enable_on_init;
>>> + struct voltagedomain *voltdm;
>>> +};
>>> +
>>> +/*
>>> + * Smartreflex module enable/disable interface.
>>> + * NOTE: if smartreflex is not enabled from sysfs, these functions will
>>not
>>> + * do anything.
>>> + */
>>
>>The 'NOTE' comment isn't quite accurate (and probably not needed here.)
>>The 'enable_on_init' flag is another way besides sysfs for these
>>functions to be activated.
>>
>>This enable_on_init flag (also settable by board files) should probably
>>be mentioned in the changelog too where you mention how SR can be
>>enabled.
Will do this
>>
>>> +void omap_sr_enable(struct voltagedomain *voltdm);
>>> +void omap_sr_disable(struct voltagedomain *voltdm);
>>> +void omap_sr_disable_reset_volt(struct voltagedomain *voltdm);
>>> +
>>> +/* API to register the pmic specific data with the smartreflex driver. */
>>> +void omap_sr_register_pmic(struct omap_smartreflex_pmic_data *pmic_data);
>>> +
>>> +/* Smartreflex driver hooks to be called from Smartreflex class driver */
>>> +int sr_enable(struct voltagedomain *voltdm, unsigned long volt);
>>> +void sr_disable(struct voltagedomain *voltdm);
>>> +int sr_configure_errgen(struct voltagedomain *voltdm);
>>> +int sr_configure_minmax(struct voltagedomain *voltdm);
>>> +
>>> +/* API to register the smartreflex class driver with the smartreflex
>>driver */
>>> +int sr_register_class(struct omap_smartreflex_class_data *class_data);
>>> +#else
>>> +static inline void omap_sr_enable(struct voltagedomain *voltdm) {}
>>> +static inline void omap_sr_disable(struct voltagedomain *voltdm) {}
>>> +static inline void omap_sr_disable_reset_volt(
>>> + struct voltagedomain *voltdm) {}
>>> +static inline void omap_sr_register_pmic(
>>> + struct omap_smartreflex_pmic_data *pmic_data) {}
>>> +#endif
>>> +#endif
>>
>>Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support.
2010-10-22 14:21 ` Gopinath, Thara
@ 2010-10-22 16:17 ` Kevin Hilman
2010-10-25 11:12 ` Grazvydas Ignotas
1 sibling, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2010-10-22 16:17 UTC (permalink / raw)
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
"Gopinath, Thara" <thara@ti.com> writes:
[...]
>>>> +static int __devexit omap_smartreflex_remove(struct platform_device *pdev)
>>>
>>>as an internal function, to be consistent with other naming, this should
>>>be sr_remove.
>
> It is omap_smartreflex_probe and remove. Do you prefer omap_sr_probe
> and omap_sr_remove?
Yes
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support.
2010-10-22 14:21 ` Gopinath, Thara
2010-10-22 16:17 ` Kevin Hilman
@ 2010-10-25 11:12 ` Grazvydas Ignotas
1 sibling, 0 replies; 56+ messages in thread
From: Grazvydas Ignotas @ 2010-10-25 11:12 UTC (permalink / raw)
To: Gopinath, Thara
Cc: Kevin Hilman, linux-omap@vger.kernel.org, paul@pwsan.com,
Cousson, Benoit, Sripathy, Vishwanath, Sawant, Anand
>>>Thara Gopinath <thara@ti.com> writes:
>>>
>>>> + if (ret) {
>>>
>>> goto error;
>>>
>>>> + struct resource *mem;
>>>> +
>>>> + iounmap(sr_info->base);
>>>> + mem = platform_get_resource(sr_info->pdev,
>>>> + IORESOURCE_MEM, 0);
>>>> + release_mem_region(mem->start, resource_size(mem));
>>>> + list_del(&sr_info->node);
>>>> + dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
>>>> + "interrupt handler. Smartreflex will"
>>>> + "not function as desired\n", __func__);
>>>> +
>>>> + kfree(sr_info);
>>>> + return ret;
>>>> + }
>>>
>>>and move this after the return...
>
> I did not understand this comment.
I guess he meant to move error handling to the end of function, and
jump there with goto.
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH v3 04/11] OMAP3: PM: Adding smartreflex device file.
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
` (2 preceding siblings ...)
2010-09-22 14:45 ` [PATCH v3 03/11] OMAP3: PM: Adding smartreflex driver support Thara Gopinath
@ 2010-09-22 14:45 ` Thara Gopinath
2010-10-14 19:29 ` Kevin Hilman
2010-09-22 14:45 ` [PATCH v3 05/11] OMAP3: PM: Adding smartreflex hwmod data Thara Gopinath
` (7 subsequent siblings)
11 siblings, 1 reply; 56+ messages in thread
From: Thara Gopinath @ 2010-09-22 14:45 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
This patch adds support for device registration of various
smartreflex module present in the system. This patch introduces
the platform data for smartreflex devices which include
the efused and test n-target vaules, module enable/disable
pointers and a parameter to indicate whether smartreflex
autocompensation needs to be enabled on init or not.
Currently auocompensation is enabled on init by default
for OMAP3430 ES3.1 chip.
Signed-off-by: Thara Gopinath <thara@ti.com>
---
arch/arm/mach-omap2/Makefile | 2 +-
arch/arm/mach-omap2/sr_device.c | 174 +++++++++++++++++++++++++++++++++++++++
2 files changed, 175 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/sr_device.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 8dd32a7..abc377a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -56,7 +56,7 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o voltage.o \
cpuidle34xx.o pm_bus.o
obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
-obj-$(CONFIG_OMAP_SMARTREFLEX) += smartreflex.o
+obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
new file mode 100644
index 0000000..606da59
--- /dev/null
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -0,0 +1,174 @@
+/*
+ * OMAP3/OMAP4 smartreflex device file
+ *
+ * Author: Thara Gopinath <thara@ti.com>
+ *
+ * Based originally on code from smartreflex.c
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Thara Gopinath <thara@ti.com>
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Kalle Jokiniemi
+ *
+ * Copyright (C) 2007 Texas Instruments, Inc.
+ * Lesly A M <x0080970@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/err.h>
+#include <linux/slab.h>
+
+#include <plat/control.h>
+#include <plat/omap_device.h>
+#include <plat/smartreflex.h>
+#include <plat/voltage.h>
+
+static struct omap_device_pm_latency omap_sr_latency[] = {
+ {
+ .deactivate_func = omap_device_idle_hwmods,
+ .activate_func = omap_device_enable_hwmods,
+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST
+ },
+};
+
+#ifdef OMAP_SMARTREFLEX_TESTING
+/*
+ * Hard coded nvalues for testing purposes for OMAP3430,
+ * may cause device to hang!
+ */
+static void __init sr_set_nvalues(struct omap_sr_dev_data *dev_data,
+ struct omap_sr_data *sr_data)
+{
+ int i;
+
+ if (!dev_data || !dev_data->volts_supported ||
+ !dev_data->volt_data || !dev_data->test_nvalues) {
+ pr_warning("%s: Bad parameters! dev_data = %x,"
+ "dev_data->volts_supported = %x,"
+ "dev_data->volt_data = %x,"
+ "dev_data->test_nvalues = %x\n", __func__,
+ (unsigned int)dev_data, dev_data->volts_supported,
+ (unsigned int)dev_data->volt_data,
+ (unsigned int)dev_data->test_nvalues);
+ return;
+ }
+
+ sr_data->senn_mod = dev_data->test_sennenable;
+ sr_data->senp_mod = dev_data->test_senpenable;
+ for (i = 0; i < dev_data->volts_supported; i++)
+ dev_data->volt_data[i].sr_nvalue = dev_data->test_nvalues[i];
+}
+#else
+/* Read EFUSE values from control registers for OMAP3430 */
+static void __init sr_set_nvalues(struct omap_sr_dev_data *dev_data,
+ struct omap_sr_data *sr_data)
+{
+ int i;
+
+ if (!dev_data || !dev_data->volts_supported || !dev_data->volt_data ||
+ !dev_data->efuse_nvalues_offs) {
+ pr_warning("%s: Bad parameters! dev_data = %x,"
+ "dev_data->volts_supported = %x,"
+ "dev_data->volt_data = %x,"
+ "dev_data->efuse_nvalues_offs = %x\n", __func__,
+ (unsigned int)dev_data, dev_data->volts_supported,
+ (unsigned int)dev_data->volt_data,
+ (unsigned int)dev_data->efuse_nvalues_offs);
+ return;
+ }
+
+ /*
+ * From OMAP3630 onwards there are no efuse registers for senn_mod
+ * and senp_mod. They have to be 0x1 by default.
+ */
+ if (!dev_data->efuse_sr_control) {
+ sr_data->senn_mod = 0x1;
+ sr_data->senp_mod = 0x1;
+ } else {
+ sr_data->senn_mod =
+ ((omap_ctrl_readl(dev_data->efuse_sr_control) &
+ (0x3 << dev_data->sennenable_shift)) >>
+ dev_data->sennenable_shift);
+ sr_data->senp_mod =
+ ((omap_ctrl_readl(dev_data->efuse_sr_control) &
+ (0x3 << dev_data->senpenable_shift)) >>
+ dev_data->senpenable_shift);
+ }
+
+ for (i = 0; i < dev_data->volts_supported; i++)
+ dev_data->volt_data[i].sr_nvalue = omap_ctrl_readl(
+ dev_data->efuse_nvalues_offs[i]);
+}
+#endif
+
+static int sr_dev_init(struct omap_hwmod *oh, void *user)
+{
+ struct omap_sr_data *sr_data;
+ struct omap_sr_dev_data *sr_dev_data;
+ struct omap_device *od;
+ char *name = "smartreflex";
+ static int i;
+
+ sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
+ if (!sr_data) {
+ pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n",
+ __func__, oh->name);
+ return -ENOMEM;
+ }
+
+ sr_dev_data = (struct omap_sr_dev_data *)oh->dev_attr;
+ if (unlikely(!sr_dev_data)) {
+ pr_err("%s: dev atrribute is NULL\n", __func__);
+ goto exit;
+ }
+
+ /*
+ * OMAP3430 ES3.1 chips by default come with Efuse burnt
+ * with parameters required for full functionality of
+ * smartreflex AVS feature like ntarget values , sennenable
+ * and senpenable. So enable the SR AVS feature during boot up
+ * itself if it is a OMAP3430 ES3.1 chip.
+ */
+ sr_data->enable_on_init = false;
+ if (cpu_is_omap343x()) {
+ if (omap_rev() == OMAP3430_REV_ES3_1)
+ sr_data->enable_on_init = true;
+ }
+
+ sr_data->voltdm = omap_voltage_domain_get(sr_dev_data->vdd_name);
+ if (IS_ERR(sr_data->voltdm)) {
+ pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
+ __func__, sr_dev_data->vdd_name);
+ goto exit;
+ }
+
+ sr_dev_data->volts_supported = omap_voltage_get_volttable(
+ sr_data->voltdm, &sr_dev_data->volt_data);
+ if (!sr_dev_data->volts_supported) {
+ pr_warning("%s: No Voltage table registerd fo VDD%d."
+ "Something really wrong\n\n", __func__, i + 1);
+ goto exit;
+ }
+
+ sr_set_nvalues(sr_dev_data, sr_data);
+
+ od = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
+ omap_sr_latency,
+ ARRAY_SIZE(omap_sr_latency), 0);
+ if (IS_ERR(od))
+ pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
+ __func__, name, oh->name);
+exit:
+ i++;
+ kfree(sr_data);
+ return 0;
+}
+
+static int __init omap_devinit_smartreflex(void)
+{
+ return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
+}
+device_initcall(omap_devinit_smartreflex);
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH v3 04/11] OMAP3: PM: Adding smartreflex device file.
2010-09-22 14:45 ` [PATCH v3 04/11] OMAP3: PM: Adding smartreflex device file Thara Gopinath
@ 2010-10-14 19:29 ` Kevin Hilman
2010-10-22 14:36 ` Gopinath, Thara
0 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-10-14 19:29 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
On Wed, 2010-09-22 at 20:15 +0530, Thara Gopinath wrote:
> This patch adds support for device registration of various
> smartreflex module present in the system. This patch introduces
> the platform data for smartreflex devices which include
> the efused and test n-target vaules, module enable/disable
> pointers and a parameter to indicate whether smartreflex
> autocompensation needs to be enabled on init or not.
> Currently auocompensation is enabled on init by default
> for OMAP3430 ES3.1 chip.
>
> Signed-off-by: Thara Gopinath <thara@ti.com>
> ---
> arch/arm/mach-omap2/Makefile | 2 +-
> arch/arm/mach-omap2/sr_device.c | 174 +++++++++++++++++++++++++++++++++++++++
> 2 files changed, 175 insertions(+), 1 deletions(-)
> create mode 100644 arch/arm/mach-omap2/sr_device.c
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index 8dd32a7..abc377a 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -56,7 +56,7 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o voltage.o \
> cpuidle34xx.o pm_bus.o
> obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
> obj-$(CONFIG_PM_DEBUG) += pm-debug.o
> -obj-$(CONFIG_OMAP_SMARTREFLEX) += smartreflex.o
> +obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
>
> AFLAGS_sleep24xx.o :=-Wa,-march=armv6
> AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
> diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
> new file mode 100644
> index 0000000..606da59
> --- /dev/null
> +++ b/arch/arm/mach-omap2/sr_device.c
> @@ -0,0 +1,174 @@
> +/*
> + * OMAP3/OMAP4 smartreflex device file
> + *
> + * Author: Thara Gopinath <thara@ti.com>
> + *
> + * Based originally on code from smartreflex.c
> + * Copyright (C) 2010 Texas Instruments, Inc.
> + * Thara Gopinath <thara@ti.com>
> + *
> + * Copyright (C) 2008 Nokia Corporation
> + * Kalle Jokiniemi
> + *
> + * Copyright (C) 2007 Texas Instruments, Inc.
> + * Lesly A M <x0080970@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/err.h>
> +#include <linux/slab.h>
> +
> +#include <plat/control.h>
> +#include <plat/omap_device.h>
> +#include <plat/smartreflex.h>
> +#include <plat/voltage.h>
> +
> +static struct omap_device_pm_latency omap_sr_latency[] = {
> + {
> + .deactivate_func = omap_device_idle_hwmods,
> + .activate_func = omap_device_enable_hwmods,
> + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST
> + },
> +};
> +
> +#ifdef OMAP_SMARTREFLEX_TESTING
> +/*
> + * Hard coded nvalues for testing purposes for OMAP3430,
> + * may cause device to hang!
> + */
> +static void __init sr_set_nvalues(struct omap_sr_dev_data *dev_data,
> + struct omap_sr_data *sr_data)
> +{
> + int i;
> +
> + if (!dev_data || !dev_data->volts_supported ||
> + !dev_data->volt_data || !dev_data->test_nvalues) {
> + pr_warning("%s: Bad parameters! dev_data = %x,"
> + "dev_data->volts_supported = %x,"
> + "dev_data->volt_data = %x,"
> + "dev_data->test_nvalues = %x\n", __func__,
> + (unsigned int)dev_data, dev_data->volts_supported,
> + (unsigned int)dev_data->volt_data,
> + (unsigned int)dev_data->test_nvalues);
> + return;
> + }
> +
> + sr_data->senn_mod = dev_data->test_sennenable;
> + sr_data->senp_mod = dev_data->test_senpenable;
> + for (i = 0; i < dev_data->volts_supported; i++)
> + dev_data->volt_data[i].sr_nvalue = dev_data->test_nvalues[i];
> +}
> +#else
> +/* Read EFUSE values from control registers for OMAP3430 */
> +static void __init sr_set_nvalues(struct omap_sr_dev_data *dev_data,
> + struct omap_sr_data *sr_data)
> +{
> + int i;
> +
> + if (!dev_data || !dev_data->volts_supported || !dev_data->volt_data ||
> + !dev_data->efuse_nvalues_offs) {
> + pr_warning("%s: Bad parameters! dev_data = %x,"
> + "dev_data->volts_supported = %x,"
> + "dev_data->volt_data = %x,"
> + "dev_data->efuse_nvalues_offs = %x\n", __func__,
> + (unsigned int)dev_data, dev_data->volts_supported,
> + (unsigned int)dev_data->volt_data,
> + (unsigned int)dev_data->efuse_nvalues_offs);
> + return;
> + }
> +
> + /*
> + * From OMAP3630 onwards there are no efuse registers for senn_mod
> + * and senp_mod. They have to be 0x1 by default.
> + */
> + if (!dev_data->efuse_sr_control) {
> + sr_data->senn_mod = 0x1;
> + sr_data->senp_mod = 0x1;
> + } else {
> + sr_data->senn_mod =
> + ((omap_ctrl_readl(dev_data->efuse_sr_control) &
> + (0x3 << dev_data->sennenable_shift)) >>
> + dev_data->sennenable_shift);
> + sr_data->senp_mod =
> + ((omap_ctrl_readl(dev_data->efuse_sr_control) &
> + (0x3 << dev_data->senpenable_shift)) >>
> + dev_data->senpenable_shift);
> + }
For readbility, can you do the ctrl_read on one line, then the
mask/shift on a separate line, e.g.:
sr_data->senn_mod = omap_ctrl_readl...
sr_data->senn_mod &= ....
> + for (i = 0; i < dev_data->volts_supported; i++)
> + dev_data->volt_data[i].sr_nvalue = omap_ctrl_readl(
> + dev_data->efuse_nvalues_offs[i]);
The wrapping here affects readability. It would be better to do this in
two lines:
v = omap_ctrl_readl...
dev_data-... = v;
Similar readability problem this part of OMAP4 series.
> +}
> +#endif
> +
> +static int sr_dev_init(struct omap_hwmod *oh, void *user)
> +{
> + struct omap_sr_data *sr_data;
> + struct omap_sr_dev_data *sr_dev_data;
> + struct omap_device *od;
> + char *name = "smartreflex";
> + static int i;
> +
> + sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
> + if (!sr_data) {
> + pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n",
> + __func__, oh->name);
> + return -ENOMEM;
> + }
> +
> + sr_dev_data = (struct omap_sr_dev_data *)oh->dev_attr;
> + if (unlikely(!sr_dev_data)) {
> + pr_err("%s: dev atrribute is NULL\n", __func__);
> + goto exit;
> + }
> +
> + /*
> + * OMAP3430 ES3.1 chips by default come with Efuse burnt
> + * with parameters required for full functionality of
> + * smartreflex AVS feature like ntarget values , sennenable
> + * and senpenable. So enable the SR AVS feature during boot up
> + * itself if it is a OMAP3430 ES3.1 chip.
> + */
> + sr_data->enable_on_init = false;
> + if (cpu_is_omap343x()) {
> + if (omap_rev() == OMAP3430_REV_ES3_1)
> + sr_data->enable_on_init = true;
> + }
The braces are not needed here.
> + sr_data->voltdm = omap_voltage_domain_get(sr_dev_data->vdd_name);
> + if (IS_ERR(sr_data->voltdm)) {
> + pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
> + __func__, sr_dev_data->vdd_name);
> + goto exit;
> + }
> +
> + sr_dev_data->volts_supported = omap_voltage_get_volttable(
> + sr_data->voltdm, &sr_dev_data->volt_data);
>
> + if (!sr_dev_data->volts_supported) {
> + pr_warning("%s: No Voltage table registerd fo VDD%d."
> + "Something really wrong\n\n", __func__, i + 1);
> + goto exit;
> + }
> +
> + sr_set_nvalues(sr_dev_data, sr_data);
First question: why does this N-value init need to be done in the device
init? It seems better to be a part of the SR driver probe.
Second, this section took me quite some time to understand, as it seems
to blur the lines of device and driver but also how it interacts with
the voltage layer.
sr_set_nvalues() is directly manipulating structures that are internal
to the voltage layer. It also makes assumptions about the ordering of
volt_data structs in the voltage layer.
Strictly speaking neither the sr_nvalue or sr_errminlimit fields of
volt_data are not used at all in the voltage layer, but only in the SR
layer, so ideally they should really stay in the SR layer.
I think what is needed here is a cleaner way for the SR layer to connect
the N-values to a voltage. The current method of manipulating voltage
layer structs inside the SR layer is not acceptable. Since the n-values
are fixed in HW (per SoC), what I suggest is simply having a field like
'efuse_id' or something in volt_data. Then, the smart reflex layer can
lookup and index all the efuse values during probe, and when sr_enable
is called, it looks up the nvalue based on efuse_id.
I assume that the sr_errminlimit could also be set based on efuse_id,
and therefore remain contained within the SR layer, but I'm not sure I
like that idea any better than keeping it inside volt_data. For now,
I'll let you make the call on errminlimit, but I really want to see the
N-value stuff isolated in the SR layer.
Kevin
> + od = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
> + omap_sr_latency,
> + ARRAY_SIZE(omap_sr_latency), 0);
> + if (IS_ERR(od))
> + pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
> + __func__, name, oh->name);
> +exit:
> + i++;
> + kfree(sr_data);
> + return 0;
> +}
> +
> +static int __init omap_devinit_smartreflex(void)
> +{
> + return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
> +}
> +device_initcall(omap_devinit_smartreflex);
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 04/11] OMAP3: PM: Adding smartreflex device file.
2010-10-14 19:29 ` Kevin Hilman
@ 2010-10-22 14:36 ` Gopinath, Thara
2010-10-22 16:32 ` Kevin Hilman
0 siblings, 1 reply; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-22 14:36 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
>>owner@vger.kernel.org] On Behalf Of Kevin Hilman
>>Sent: Friday, October 15, 2010 12:59 AM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 04/11] OMAP3: PM: Adding smartreflex device file.
>>
>>On Wed, 2010-09-22 at 20:15 +0530, Thara Gopinath wrote:
>>> This patch adds support for device registration of various
>>> smartreflex module present in the system. This patch introduces
>>> the platform data for smartreflex devices which include
>>> the efused and test n-target vaules, module enable/disable
>>> pointers and a parameter to indicate whether smartreflex
>>> autocompensation needs to be enabled on init or not.
>>> Currently auocompensation is enabled on init by default
>>> for OMAP3430 ES3.1 chip.
>>>
>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>> ---
>>> arch/arm/mach-omap2/Makefile | 2 +-
>>> arch/arm/mach-omap2/sr_device.c | 174
>>+++++++++++++++++++++++++++++++++++++++
>>> 2 files changed, 175 insertions(+), 1 deletions(-)
>>> create mode 100644 arch/arm/mach-omap2/sr_device.c
>>>
>>> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
>>> index 8dd32a7..abc377a 100644
>>> --- a/arch/arm/mach-omap2/Makefile
>>> +++ b/arch/arm/mach-omap2/Makefile
>>> @@ -56,7 +56,7 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o
>>voltage.o \
>>> cpuidle34xx.o pm_bus.o
>>> obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
>>> obj-$(CONFIG_PM_DEBUG) += pm-debug.o
>>> -obj-$(CONFIG_OMAP_SMARTREFLEX) += smartreflex.o
>>> +obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
>>>
>>> AFLAGS_sleep24xx.o :=-Wa,-march=armv6
>>> AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
>>> diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-
>>omap2/sr_device.c
>>> new file mode 100644
>>> index 0000000..606da59
>>> --- /dev/null
>>> +++ b/arch/arm/mach-omap2/sr_device.c
>>> @@ -0,0 +1,174 @@
>>> +/*
>>> + * OMAP3/OMAP4 smartreflex device file
>>> + *
>>> + * Author: Thara Gopinath <thara@ti.com>
>>> + *
>>> + * Based originally on code from smartreflex.c
>>> + * Copyright (C) 2010 Texas Instruments, Inc.
>>> + * Thara Gopinath <thara@ti.com>
>>> + *
>>> + * Copyright (C) 2008 Nokia Corporation
>>> + * Kalle Jokiniemi
>>> + *
>>> + * Copyright (C) 2007 Texas Instruments, Inc.
>>> + * Lesly A M <x0080970@ti.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> + */
>>> +
>>> +#include <linux/err.h>
>>> +#include <linux/slab.h>
>>> +
>>> +#include <plat/control.h>
>>> +#include <plat/omap_device.h>
>>> +#include <plat/smartreflex.h>
>>> +#include <plat/voltage.h>
>>> +
>>> +static struct omap_device_pm_latency omap_sr_latency[] = {
>>> + {
>>> + .deactivate_func = omap_device_idle_hwmods,
>>> + .activate_func = omap_device_enable_hwmods,
>>> + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST
>>> + },
>>> +};
>>> +
>>> +#ifdef OMAP_SMARTREFLEX_TESTING
>>> +/*
>>> + * Hard coded nvalues for testing purposes for OMAP3430,
>>> + * may cause device to hang!
>>> + */
>>> +static void __init sr_set_nvalues(struct omap_sr_dev_data *dev_data,
>>> + struct omap_sr_data *sr_data)
>>> +{
>>> + int i;
>>> +
>>> + if (!dev_data || !dev_data->volts_supported ||
>>> + !dev_data->volt_data || !dev_data->test_nvalues) {
>>> + pr_warning("%s: Bad parameters! dev_data = %x,"
>>> + "dev_data->volts_supported = %x,"
>>> + "dev_data->volt_data = %x,"
>>> + "dev_data->test_nvalues = %x\n", __func__,
>>> + (unsigned int)dev_data, dev_data->volts_supported,
>>> + (unsigned int)dev_data->volt_data,
>>> + (unsigned int)dev_data->test_nvalues);
>>> + return;
>>> + }
>>> +
>>> + sr_data->senn_mod = dev_data->test_sennenable;
>>> + sr_data->senp_mod = dev_data->test_senpenable;
>>> + for (i = 0; i < dev_data->volts_supported; i++)
>>> + dev_data->volt_data[i].sr_nvalue = dev_data->test_nvalues[i];
>>> +}
>>> +#else
>>> +/* Read EFUSE values from control registers for OMAP3430 */
>>> +static void __init sr_set_nvalues(struct omap_sr_dev_data *dev_data,
>>> + struct omap_sr_data *sr_data)
>>> +{
>>> + int i;
>>> +
>>> + if (!dev_data || !dev_data->volts_supported || !dev_data->volt_data ||
>>> + !dev_data->efuse_nvalues_offs) {
>>> + pr_warning("%s: Bad parameters! dev_data = %x,"
>>> + "dev_data->volts_supported = %x,"
>>> + "dev_data->volt_data = %x,"
>>> + "dev_data->efuse_nvalues_offs = %x\n", __func__,
>>> + (unsigned int)dev_data, dev_data->volts_supported,
>>> + (unsigned int)dev_data->volt_data,
>>> + (unsigned int)dev_data->efuse_nvalues_offs);
>>> + return;
>>> + }
>>> +
>>> + /*
>>> + * From OMAP3630 onwards there are no efuse registers for senn_mod
>>> + * and senp_mod. They have to be 0x1 by default.
>>> + */
>>> + if (!dev_data->efuse_sr_control) {
>>> + sr_data->senn_mod = 0x1;
>>> + sr_data->senp_mod = 0x1;
>>> + } else {
>>> + sr_data->senn_mod =
>>> + ((omap_ctrl_readl(dev_data->efuse_sr_control) &
>>> + (0x3 << dev_data->sennenable_shift)) >>
>>> + dev_data->sennenable_shift);
>>> + sr_data->senp_mod =
>>> + ((omap_ctrl_readl(dev_data->efuse_sr_control) &
>>> + (0x3 << dev_data->senpenable_shift)) >>
>>> + dev_data->senpenable_shift);
>>> + }
>>
>>For readbility, can you do the ctrl_read on one line, then the
>>mask/shift on a separate line, e.g.:
>>
>> sr_data->senn_mod = omap_ctrl_readl...
>> sr_data->senn_mod &= ....
>>
>>> + for (i = 0; i < dev_data->volts_supported; i++)
>>> + dev_data->volt_data[i].sr_nvalue = omap_ctrl_readl(
>>> + dev_data->efuse_nvalues_offs[i]);
>>
>>The wrapping here affects readability. It would be better to do this in
>>two lines:
>>
>> v = omap_ctrl_readl...
>> dev_data-... = v;
>>
>>Similar readability problem this part of OMAP4 series.
Will do.
>>
>>> +}
>>> +#endif
>>> +
>>> +static int sr_dev_init(struct omap_hwmod *oh, void *user)
>>> +{
>>> + struct omap_sr_data *sr_data;
>>> + struct omap_sr_dev_data *sr_dev_data;
>>> + struct omap_device *od;
>>> + char *name = "smartreflex";
>>> + static int i;
>>> +
>>> + sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
>>> + if (!sr_data) {
>>> + pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n",
>>> + __func__, oh->name);
>>> + return -ENOMEM;
>>> + }
>>> +
>>> + sr_dev_data = (struct omap_sr_dev_data *)oh->dev_attr;
>>> + if (unlikely(!sr_dev_data)) {
>>> + pr_err("%s: dev atrribute is NULL\n", __func__);
>>> + goto exit;
>>> + }
>>> +
>>> + /*
>>> + * OMAP3430 ES3.1 chips by default come with Efuse burnt
>>> + * with parameters required for full functionality of
>>> + * smartreflex AVS feature like ntarget values , sennenable
>>> + * and senpenable. So enable the SR AVS feature during boot up
>>> + * itself if it is a OMAP3430 ES3.1 chip.
>>> + */
>>> + sr_data->enable_on_init = false;
>>> + if (cpu_is_omap343x()) {
>>> + if (omap_rev() == OMAP3430_REV_ES3_1)
>>> + sr_data->enable_on_init = true;
>>> + }
>>
>>The braces are not needed here.
Ok
>>
>>> + sr_data->voltdm = omap_voltage_domain_get(sr_dev_data->vdd_name);
>>> + if (IS_ERR(sr_data->voltdm)) {
>>> + pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
>>> + __func__, sr_dev_data->vdd_name);
>>> + goto exit;
>>> + }
>>> +
>>> + sr_dev_data->volts_supported = omap_voltage_get_volttable(
>>> + sr_data->voltdm, &sr_dev_data->volt_data);
>>>
>>> + if (!sr_dev_data->volts_supported) {
>>> + pr_warning("%s: No Voltage table registerd fo VDD%d."
>>> + "Something really wrong\n\n", __func__, i + 1);
>>> + goto exit;
>>> + }
>>> +
>>> + sr_set_nvalues(sr_dev_data, sr_data);
>>
>>First question: why does this N-value init need to be done in the device
>>init? It seems better to be a part of the SR driver probe.
OMAP3 and OMAP4 has different ways of reading the efuse registers. I would like it to be in device file so that we can have the necessary checks. The driver should not be bothered about getting of the n-values.
>>
>>Second, this section took me quite some time to understand, as it seems
>>to blur the lines of device and driver but also how it interacts with
>>the voltage layer.
>>
>>sr_set_nvalues() is directly manipulating structures that are internal
>>to the voltage layer. It also makes assumptions about the ordering of
>>volt_data structs in the voltage layer.
>>
>>Strictly speaking neither the sr_nvalue or sr_errminlimit fields of
>>volt_data are not used at all in the voltage layer, but only in the SR
>>layer, so ideally they should really stay in the SR layer.
>>
>>I think what is needed here is a cleaner way for the SR layer to connect
>>the N-values to a voltage. The current method of manipulating voltage
>>layer structs inside the SR layer is not acceptable. Since the n-values
>>are fixed in HW (per SoC), what I suggest is simply having a field like
>>'efuse_id' or something in volt_data. Then, the smart reflex layer can
>>lookup and index all the efuse values during probe, and when sr_enable
>>is called, it looks up the nvalue based on efuse_id.
>>
>>I assume that the sr_errminlimit could also be set based on efuse_id,
>>and therefore remain contained within the SR layer, but I'm not sure I
>>like that idea any better than keeping it inside volt_data. For now,
>>I'll let you make the call on errminlimit, but I really want to see the
>>N-value stuff isolated in the SR layer.
I do not understand your proposal here? What kind of variable is efuse-id??
>>
>>Kevin
>>
>>> + od = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
>>> + omap_sr_latency,
>>> + ARRAY_SIZE(omap_sr_latency), 0);
>>> + if (IS_ERR(od))
>>> + pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
>>> + __func__, name, oh->name);
>>> +exit:
>>> + i++;
>>> + kfree(sr_data);
>>> + return 0;
>>> +}
>>> +
>>> +static int __init omap_devinit_smartreflex(void)
>>> +{
>>> + return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
>>> +}
>>> +device_initcall(omap_devinit_smartreflex);
>>
>>
>>--
>>To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>>the body of a message to majordomo@vger.kernel.org
>>More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH v3 04/11] OMAP3: PM: Adding smartreflex device file.
2010-10-22 14:36 ` Gopinath, Thara
@ 2010-10-22 16:32 ` Kevin Hilman
2010-10-23 10:55 ` Gopinath, Thara
0 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-10-22 16:32 UTC (permalink / raw)
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
"Gopinath, Thara" <thara@ti.com> writes:
>>>On Wed, 2010-09-22 at 20:15 +0530, Thara Gopinath wrote:
>>>> This patch adds support for device registration of various
>>>> smartreflex module present in the system. This patch introduces
>>>> the platform data for smartreflex devices which include
>>>> the efused and test n-target vaules, module enable/disable
>>>> pointers and a parameter to indicate whether smartreflex
>>>> autocompensation needs to be enabled on init or not.
>>>> Currently auocompensation is enabled on init by default
>>>> for OMAP3430 ES3.1 chip.
>>>>
>>>> Signed-off-by: Thara Gopinath <thara@ti.com>
[...]
>>>> + sr_data->voltdm = omap_voltage_domain_get(sr_dev_data->vdd_name);
>>>> + if (IS_ERR(sr_data->voltdm)) {
>>>> + pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
>>>> + __func__, sr_dev_data->vdd_name);
>>>> + goto exit;
>>>> + }
>>>> +
>>>> + sr_dev_data->volts_supported = omap_voltage_get_volttable(
>>>> + sr_data->voltdm, &sr_dev_data->volt_data);
>>>>
>>>> + if (!sr_dev_data->volts_supported) {
>>>> + pr_warning("%s: No Voltage table registerd fo VDD%d."
>>>> + "Something really wrong\n\n", __func__, i + 1);
>>>> + goto exit;
>>>> + }
>>>> +
>>>> + sr_set_nvalues(sr_dev_data, sr_data);
>>>
>>>First question: why does this N-value init need to be done in the device
>>>init? It seems better to be a part of the SR driver probe.
>
> OMAP3 and OMAP4 has different ways of reading the efuse registers. I
> would like it to be in device file so that we can have the necessary
> checks. The driver should not be bothered about getting of the
> n-values.
Bothered? The driver's job is to probe the HW. The device code
can tell the driver where the N-values are located (register offsets,
via platform_data), but IMO, should not be reading the values from HW.
>>>
>>>Second, this section took me quite some time to understand, as it seems
>>>to blur the lines of device and driver but also how it interacts with
>>>the voltage layer.
>>>
>>>sr_set_nvalues() is directly manipulating structures that are internal
>>>to the voltage layer. It also makes assumptions about the ordering of
>>>volt_data structs in the voltage layer.
>>>
>>>Strictly speaking neither the sr_nvalue or sr_errminlimit fields of
>>>volt_data are not used at all in the voltage layer, but only in the SR
>>>layer, so ideally they should really stay in the SR layer.
>>>
>>>I think what is needed here is a cleaner way for the SR layer to connect
>>>the N-values to a voltage. The current method of manipulating voltage
>>>layer structs inside the SR layer is not acceptable. Since the n-values
>>>are fixed in HW (per SoC), what I suggest is simply having a field like
>>>'efuse_id' or something in volt_data. Then, the smart reflex layer can
>>>lookup and index all the efuse values during probe, and when sr_enable
>>>is called, it looks up the nvalue based on efuse_id.
>>>
>>>I assume that the sr_errminlimit could also be set based on efuse_id,
>>>and therefore remain contained within the SR layer, but I'm not sure I
>>>like that idea any better than keeping it inside volt_data. For now,
>>>I'll let you make the call on errminlimit, but I really want to see the
>>>N-value stuff isolated in the SR layer.
>
> I do not understand your proposal here? What kind of variable is efuse-id??
>
Sorry, it was kind of rambling. I'll try again...
Currently, omap_volt_data (in the voltage layer) includes SR N-value
field:
struct omap_volt_data {
u32 volt_nominal;
u32 sr_nvalue;
u8 sr_errminlimit;
u8 vp_errgain;
};
but sr_nvalue is not used in the voltage layer at all.
This choice has led to the SR device init code having to populate
internal structures of the voltage layer. That is what I don't like.
(I have a similar problem with the presence of sr_errminlimit in the
omap_volt_data, because it's not used in the voltage layer either.)
So my suggestion was to remove the sr_nvalue field and replace it with
something like an efuse_id field. Since n-values are directly connected
with HW registers, this is a simple mapping.
This way, the voltage layer does not know about the exact N-value
(because it doesn't care), ll the voltage layer needs to know is
which efuse to use for this voltage.
As for implementation, in the SR driver, probe could read the N-values
from HW into a table. The enable/disable functiosn can look up the
N-values from the table using the efuse_id from volt_data.
Did I explain any better this time?
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 04/11] OMAP3: PM: Adding smartreflex device file.
2010-10-22 16:32 ` Kevin Hilman
@ 2010-10-23 10:55 ` Gopinath, Thara
2010-11-10 18:55 ` Kevin Hilman
0 siblings, 1 reply; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-23 10:55 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>Sent: Friday, October 22, 2010 10:02 PM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 04/11] OMAP3: PM: Adding smartreflex device file.
>>
>>"Gopinath, Thara" <thara@ti.com> writes:
>>
>>>>>On Wed, 2010-09-22 at 20:15 +0530, Thara Gopinath wrote:
>>>>>> This patch adds support for device registration of various
>>>>>> smartreflex module present in the system. This patch introduces
>>>>>> the platform data for smartreflex devices which include
>>>>>> the efused and test n-target vaules, module enable/disable
>>>>>> pointers and a parameter to indicate whether smartreflex
>>>>>> autocompensation needs to be enabled on init or not.
>>>>>> Currently auocompensation is enabled on init by default
>>>>>> for OMAP3430 ES3.1 chip.
>>>>>>
>>>>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>
>>[...]
>>
>>>>>> + sr_data->voltdm = omap_voltage_domain_get(sr_dev_data->vdd_name);
>>>>>> + if (IS_ERR(sr_data->voltdm)) {
>>>>>> + pr_err("%s: Unable to get voltage domain pointer for VDD
>>%s\n",
>>>>>> + __func__, sr_dev_data->vdd_name);
>>>>>> + goto exit;
>>>>>> + }
>>>>>> +
>>>>>> + sr_dev_data->volts_supported = omap_voltage_get_volttable(
>>>>>> + sr_data->voltdm, &sr_dev_data->volt_data);
>>>>>>
>>>>>> + if (!sr_dev_data->volts_supported) {
>>>>>> + pr_warning("%s: No Voltage table registerd fo VDD%d."
>>>>>> + "Something really wrong\n\n", __func__, i + 1);
>>>>>> + goto exit;
>>>>>> + }
>>>>>> +
>>>>>> + sr_set_nvalues(sr_dev_data, sr_data);
>>>>>
>>>>>First question: why does this N-value init need to be done in the device
>>>>>init? It seems better to be a part of the SR driver probe.
>>>
>>> OMAP3 and OMAP4 has different ways of reading the efuse registers. I
>>> would like it to be in device file so that we can have the necessary
>>> checks. The driver should not be bothered about getting of the
>>> n-values.
>>
>>Bothered? The driver's job is to probe the HW. The device code
>>can tell the driver where the N-values are located (register offsets,
>>via platform_data), but IMO, should not be reading the values from HW.
But then we will have to put cpu_is_omap34xx() and cpu_is_omap44xx() checks in the driver. Also omap_ctrl_readl API will have to be used from the driver.
>>
>>>>>
>>>>>Second, this section took me quite some time to understand, as it seems
>>>>>to blur the lines of device and driver but also how it interacts with
>>>>>the voltage layer.
>>>>>
>>>>>sr_set_nvalues() is directly manipulating structures that are internal
>>>>>to the voltage layer. It also makes assumptions about the ordering of
>>>>>volt_data structs in the voltage layer.
>>>>>
>>>>>Strictly speaking neither the sr_nvalue or sr_errminlimit fields of
>>>>>volt_data are not used at all in the voltage layer, but only in the SR
>>>>>layer, so ideally they should really stay in the SR layer.
>>>>>
>>>>>I think what is needed here is a cleaner way for the SR layer to connect
>>>>>the N-values to a voltage. The current method of manipulating voltage
>>>>>layer structs inside the SR layer is not acceptable. Since the n-values
>>>>>are fixed in HW (per SoC), what I suggest is simply having a field like
>>>>>'efuse_id' or something in volt_data. Then, the smart reflex layer can
>>>>>lookup and index all the efuse values during probe, and when sr_enable
>>>>>is called, it looks up the nvalue based on efuse_id.
>>>>>
>>>>>I assume that the sr_errminlimit could also be set based on efuse_id,
>>>>>and therefore remain contained within the SR layer, but I'm not sure I
>>>>>like that idea any better than keeping it inside volt_data. For now,
>>>>>I'll let you make the call on errminlimit, but I really want to see the
>>>>>N-value stuff isolated in the SR layer.
>>>
>>> I do not understand your proposal here? What kind of variable is efuse-id??
>>>
>>
>>Sorry, it was kind of rambling. I'll try again...
>>
>>Currently, omap_volt_data (in the voltage layer) includes SR N-value
>>field:
>>
>>struct omap_volt_data {
>> u32 volt_nominal;
>> u32 sr_nvalue;
>> u8 sr_errminlimit;
>> u8 vp_errgain;
>>};
>>
>>but sr_nvalue is not used in the voltage layer at all.
>>
>>This choice has led to the SR device init code having to populate
>>internal structures of the voltage layer. That is what I don't like.
>>(I have a similar problem with the presence of sr_errminlimit in the
>>omap_volt_data, because it's not used in the voltage layer either.)
>>
>>So my suggestion was to remove the sr_nvalue field and replace it with
>>something like an efuse_id field. Since n-values are directly connected
>>with HW registers, this is a simple mapping.
>>
>>This way, the voltage layer does not know about the exact N-value
>>(because it doesn't care), ll the voltage layer needs to know is
>>which efuse to use for this voltage.
Yes. But then voltage layer will not know about the efuse id as well. They are passed as dev attribute from hwmod file today. Are you telling remove them and hardcode them in voltage layer?
>>
>>As for implementation, in the SR driver, probe could read the N-values
>>from HW into a table. The enable/disable functiosn can look up the
>>N-values from the table using the efuse_id from volt_data.
You mean maintain a efuse-id n-value table per SR basis??
Regards
Thara
>>
>>Did I explain any better this time?
>>
>>Kevin
>>
>>
>>
>>
>>
>>
>>
>>
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH v3 04/11] OMAP3: PM: Adding smartreflex device file.
2010-10-23 10:55 ` Gopinath, Thara
@ 2010-11-10 18:55 ` Kevin Hilman
0 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2010-11-10 18:55 UTC (permalink / raw)
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
"Gopinath, Thara" <thara@ti.com> writes:
>>>"Gopinath, Thara" <thara@ti.com> writes:
>>>
>>>>>>On Wed, 2010-09-22 at 20:15 +0530, Thara Gopinath wrote:
>>>>>>> This patch adds support for device registration of various
>>>>>>> smartreflex module present in the system. This patch introduces
>>>>>>> the platform data for smartreflex devices which include
>>>>>>> the efused and test n-target vaules, module enable/disable
>>>>>>> pointers and a parameter to indicate whether smartreflex
>>>>>>> autocompensation needs to be enabled on init or not.
>>>>>>> Currently auocompensation is enabled on init by default
>>>>>>> for OMAP3430 ES3.1 chip.
>>>>>>>
>>>>>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>>
>>>[...]
>>>
>>>>>>> + sr_data->voltdm = omap_voltage_domain_get(sr_dev_data->vdd_name);
>>>>>>> + if (IS_ERR(sr_data->voltdm)) {
>>>>>>> + pr_err("%s: Unable to get voltage domain pointer for VDD
>>>%s\n",
>>>>>>> + __func__, sr_dev_data->vdd_name);
>>>>>>> + goto exit;
>>>>>>> + }
>>>>>>> +
>>>>>>> + sr_dev_data->volts_supported = omap_voltage_get_volttable(
>>>>>>> + sr_data->voltdm, &sr_dev_data->volt_data);
>>>>>>>
>>>>>>> + if (!sr_dev_data->volts_supported) {
>>>>>>> + pr_warning("%s: No Voltage table registerd fo VDD%d."
>>>>>>> + "Something really wrong\n\n", __func__, i + 1);
>>>>>>> + goto exit;
>>>>>>> + }
>>>>>>> +
>>>>>>> + sr_set_nvalues(sr_dev_data, sr_data);
>>>>>>
>>>>>>First question: why does this N-value init need to be done in the device
>>>>>>init? It seems better to be a part of the SR driver probe.
>>>>
>>>> OMAP3 and OMAP4 has different ways of reading the efuse registers. I
>>>> would like it to be in device file so that we can have the necessary
>>>> checks. The driver should not be bothered about getting of the
>>>> n-values.
>>>
>>>Bothered? The driver's job is to probe the HW. The device code
>>>can tell the driver where the N-values are located (register offsets,
>>>via platform_data), but IMO, should not be reading the values from HW.
>
> But then we will have to put cpu_is_omap34xx() and cpu_is_omap44xx()
> checks in the driver. Also omap_ctrl_readl API will have to be used
> from the driver.
OK, so read them in the device file, and register the values with the SR
layer (not the voltage layer.) They should be registered using some
register function, not by directly manipulating structures internal to
that layer.
Also, I don't see why sr_dev_data->volts_supported has to be determined
at runtime. That could be set in the hwmod data using ARRAY_SIZE of the
efuse offsets.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH v3 05/11] OMAP3: PM: Adding smartreflex hwmod data
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
` (3 preceding siblings ...)
2010-09-22 14:45 ` [PATCH v3 04/11] OMAP3: PM: Adding smartreflex device file Thara Gopinath
@ 2010-09-22 14:45 ` Thara Gopinath
2010-09-22 14:45 ` [PATCH v3 06/11] OMAP3: PM: Adding smartreflex class3 driver Thara Gopinath
` (6 subsequent siblings)
11 siblings, 0 replies; 56+ messages in thread
From: Thara Gopinath @ 2010-09-22 14:45 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
This patch adds the smartreflex hwmod data for OMAP3430
and OMAP3630. A dev_attr is also added to the hwmod
structure for each smartreflex module which contains
SoC specific info like the efuse offsets, test n-values
etc.
Signed-off-by: Thara Gopinath <thara@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 249 ++++++++++++++++++++++++++++
arch/arm/plat-omap/include/plat/control.h | 27 +++
2 files changed, 276 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 5d8eb58..c9f0948 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -17,6 +17,8 @@
#include <mach/irqs.h>
#include <plat/cpu.h>
#include <plat/dma.h>
+#include <plat/control.h>
+#include <plat/smartreflex.h>
#include "omap_hwmod_common_data.h"
@@ -36,6 +38,8 @@ static struct omap_hwmod omap3xxx_iva_hwmod;
static struct omap_hwmod omap3xxx_l3_main_hwmod;
static struct omap_hwmod omap3xxx_l4_core_hwmod;
static struct omap_hwmod omap3xxx_l4_per_hwmod;
+static struct omap_hwmod omap34xx_sr1_hwmod;
+static struct omap_hwmod omap34xx_sr2_hwmod;
/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
@@ -90,9 +94,47 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* L4 CORE -> SR1 interface */
+static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = {
+ {
+ .pa_start = OMAP34XX_SR1_BASE,
+ .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap34xx_sr1_hwmod,
+ .clk = "sr_l4_ick",
+ .addr = omap3_sr1_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap3_sr1_addr_space),
+ .user = OCP_USER_MPU,
+};
+
+/* L4 CORE -> SR1 interface */
+static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = {
+ {
+ .pa_start = OMAP34XX_SR2_BASE,
+ .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap34xx_sr2_hwmod,
+ .clk = "sr_l4_ick",
+ .addr = omap3_sr2_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap3_sr2_addr_space),
+ .user = OCP_USER_MPU,
+};
+
/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {
&omap3xxx_l3_main__l4_core,
+ &omap3_l4_core__sr1,
+ &omap3_l4_core__sr2,
};
/* Master interfaces on the L4_CORE interconnect */
@@ -197,6 +239,209 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};
+/* SR common */
+static struct omap_hwmod_sysc_fields omap34xx_sr_sysc_fields = {
+ .clkact_shift = 20,
+};
+
+static struct omap_hwmod_class_sysconfig omap34xx_sr_sysc = {
+ .sysc_offs = 0x24,
+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_NO_CACHE),
+ .clockact = CLOCKACT_TEST_ICLK,
+ .sysc_fields = &omap34xx_sr_sysc_fields,
+};
+
+static struct omap_hwmod_class omap34xx_smartreflex_hwmod_class = {
+ .name = "smartreflex",
+ .sysc = &omap34xx_sr_sysc,
+ .rev = 1,
+};
+
+static struct omap_hwmod_sysc_fields omap36xx_sr_sysc_fields = {
+ .sidle_shift = 24,
+ .enwkup_shift = 26
+};
+
+static struct omap_hwmod_class_sysconfig omap36xx_sr_sysc = {
+ .sysc_offs = 0x38,
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
+ SYSC_NO_CACHE),
+ .sysc_fields = &omap36xx_sr_sysc_fields,
+};
+
+static struct omap_hwmod_class omap36xx_smartreflex_hwmod_class = {
+ .name = "smartreflex",
+ .sysc = &omap36xx_sr_sysc,
+ .rev = 2,
+};
+
+/* SR1 */
+static struct omap_hwmod_ocp_if *omap3_sr1_slaves[] = {
+ &omap3_l4_core__sr1,
+};
+
+static u32 omap34xx_sr1_efuse_offs[] = {
+ OMAP343X_CONTROL_FUSE_OPP1_VDD1, OMAP343X_CONTROL_FUSE_OPP2_VDD1,
+ OMAP343X_CONTROL_FUSE_OPP3_VDD1, OMAP343X_CONTROL_FUSE_OPP4_VDD1,
+ OMAP343X_CONTROL_FUSE_OPP5_VDD1,
+};
+
+static u32 omap34xx_sr1_test_nvalues[] = {
+ 0x9A90E6, 0xAABE9A, 0xBBF5C5, 0xBBB292, 0xBBF5C5,
+};
+
+static struct omap_sr_dev_data omap34xx_sr1_dev_attr = {
+ .efuse_sr_control = OMAP343X_CONTROL_FUSE_SR,
+ .sennenable_shift = OMAP343X_SR1_SENNENABLE_SHIFT,
+ .senpenable_shift = OMAP343X_SR1_SENPENABLE_SHIFT,
+ .efuse_nvalues_offs = omap34xx_sr1_efuse_offs,
+ .test_sennenable = 0x3,
+ .test_senpenable = 0x3,
+ .test_nvalues = omap34xx_sr1_test_nvalues,
+ .vdd_name = "mpu",
+};
+
+static struct omap_hwmod omap34xx_sr1_hwmod = {
+ .name = "sr1_hwmod",
+ .class = &omap34xx_smartreflex_hwmod_class,
+ .main_clk = "sr1_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_SR1_SHIFT,
+ .module_offs = WKUP_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,
+ },
+ },
+ .slaves = omap3_sr1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
+ .dev_attr = &omap34xx_sr1_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
+ CHIP_IS_OMAP3430ES3_0 |
+ CHIP_IS_OMAP3430ES3_1),
+ .flags = HWMOD_SET_DEFAULT_CLOCKACT,
+};
+
+static u32 omap36xx_sr1_efuse_offs[] = {
+ OMAP3630_CONTROL_FUSE_OPP50_VDD1, OMAP3630_CONTROL_FUSE_OPP100_VDD1,
+ OMAP3630_CONTROL_FUSE_OPP120_VDD1, OMAP3630_CONTROL_FUSE_OPP1G_VDD1,
+};
+
+static u32 omap36xx_sr1_test_nvalues[] = {
+ 0x898beb, 0x999b83, 0xaac5a8, 0xaab197,
+};
+
+static struct omap_sr_dev_data omap36xx_sr1_dev_attr = {
+ .efuse_nvalues_offs = omap36xx_sr1_efuse_offs,
+ .test_sennenable = 0x1,
+ .test_senpenable = 0x1,
+ .test_nvalues = omap36xx_sr1_test_nvalues,
+ .vdd_name = "mpu",
+};
+
+static struct omap_hwmod omap36xx_sr1_hwmod = {
+ .name = "sr1_hwmod",
+ .class = &omap36xx_smartreflex_hwmod_class,
+ .main_clk = "sr1_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_SR1_SHIFT,
+ .module_offs = WKUP_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,
+ },
+ },
+ .slaves = omap3_sr1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
+ .dev_attr = &omap36xx_sr1_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
+};
+
+/* SR2 */
+static struct omap_hwmod_ocp_if *omap3_sr2_slaves[] = {
+ &omap3_l4_core__sr2,
+};
+
+static u32 omap34xx_sr2_efuse_offs[] = {
+ OMAP343X_CONTROL_FUSE_OPP1_VDD2, OMAP343X_CONTROL_FUSE_OPP2_VDD2,
+ OMAP343X_CONTROL_FUSE_OPP3_VDD2,
+};
+
+static u32 omap34xx_sr2_test_nvalues[] = {
+ 0x0, 0xAAC098, 0xAB89D9
+};
+
+static struct omap_sr_dev_data omap34xx_sr2_dev_attr = {
+ .efuse_sr_control = OMAP343X_CONTROL_FUSE_SR,
+ .sennenable_shift = OMAP343X_SR2_SENNENABLE_SHIFT,
+ .senpenable_shift = OMAP343X_SR2_SENPENABLE_SHIFT,
+ .efuse_nvalues_offs = omap34xx_sr2_efuse_offs,
+ .test_sennenable = 0x3,
+ .test_senpenable = 0x3,
+ .test_nvalues = omap34xx_sr2_test_nvalues,
+ .vdd_name = "core",
+};
+
+static struct omap_hwmod omap34xx_sr2_hwmod = {
+ .name = "sr2_hwmod",
+ .class = &omap34xx_smartreflex_hwmod_class,
+ .main_clk = "sr2_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_SR2_SHIFT,
+ .module_offs = WKUP_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,
+ },
+ },
+ .slaves = omap3_sr2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
+ .dev_attr = &omap34xx_sr2_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
+ CHIP_IS_OMAP3430ES3_0 |
+ CHIP_IS_OMAP3430ES3_1),
+ .flags = HWMOD_SET_DEFAULT_CLOCKACT,
+};
+
+static u32 omap36xx_sr2_efuse_offs[] = {
+ OMAP3630_CONTROL_FUSE_OPP50_VDD2, OMAP3630_CONTROL_FUSE_OPP100_VDD2,
+};
+
+static u32 omap36xx_sr2_test_nvalues[] = {
+ 0x898beb, 0x9a8cee,
+};
+
+static struct omap_sr_dev_data omap36xx_sr2_dev_attr = {
+ .efuse_nvalues_offs = omap36xx_sr2_efuse_offs,
+ .test_sennenable = 0x1,
+ .test_senpenable = 0x1,
+ .test_nvalues = omap36xx_sr2_test_nvalues,
+ .vdd_name = "core",
+};
+
+static struct omap_hwmod omap36xx_sr2_hwmod = {
+ .name = "sr2_hwmod",
+ .class = &omap36xx_smartreflex_hwmod_class,
+ .main_clk = "sr2_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_SR2_SHIFT,
+ .module_offs = WKUP_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,
+ },
+ },
+ .slaves = omap3_sr2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
+ .dev_attr = &omap36xx_sr2_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
+};
+
static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
&omap3xxx_l3_main_hwmod,
&omap3xxx_l4_core_hwmod,
@@ -204,6 +449,10 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
&omap3xxx_l4_wkup_hwmod,
&omap3xxx_mpu_hwmod,
&omap3xxx_iva_hwmod,
+ &omap34xx_sr1_hwmod,
+ &omap34xx_sr2_hwmod,
+ &omap36xx_sr1_hwmod,
+ &omap36xx_sr2_hwmod,
NULL,
};
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h
index 131bf40..46e166d 100644
--- a/arch/arm/plat-omap/include/plat/control.h
+++ b/arch/arm/plat-omap/include/plat/control.h
@@ -144,6 +144,15 @@
#define OMAP343X_CONTROL_TEST_KEY_11 (OMAP2_CONTROL_GENERAL + 0x00f4)
#define OMAP343X_CONTROL_TEST_KEY_12 (OMAP2_CONTROL_GENERAL + 0x00f8)
#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc)
+#define OMAP343X_CONTROL_FUSE_OPP1_VDD1 (OMAP2_CONTROL_GENERAL + 0x0110)
+#define OMAP343X_CONTROL_FUSE_OPP2_VDD1 (OMAP2_CONTROL_GENERAL + 0x0114)
+#define OMAP343X_CONTROL_FUSE_OPP3_VDD1 (OMAP2_CONTROL_GENERAL + 0x0118)
+#define OMAP343X_CONTROL_FUSE_OPP4_VDD1 (OMAP2_CONTROL_GENERAL + 0x011c)
+#define OMAP343X_CONTROL_FUSE_OPP5_VDD1 (OMAP2_CONTROL_GENERAL + 0x0120)
+#define OMAP343X_CONTROL_FUSE_OPP1_VDD2 (OMAP2_CONTROL_GENERAL + 0x0124)
+#define OMAP343X_CONTROL_FUSE_OPP2_VDD2 (OMAP2_CONTROL_GENERAL + 0x0128)
+#define OMAP343X_CONTROL_FUSE_OPP3_VDD2 (OMAP2_CONTROL_GENERAL + 0x012c)
+#define OMAP343X_CONTROL_FUSE_SR (OMAP2_CONTROL_GENERAL + 0x0130)
#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190)
#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194)
#define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \
@@ -160,6 +169,14 @@
#define OMAP343X_CONTROL_SRAMLDO5 (OMAP2_CONTROL_GENERAL + 0x02C0)
#define OMAP343X_CONTROL_CSI (OMAP2_CONTROL_GENERAL + 0x02C4)
+/* OMAP3630 only CONTROL_GENERAL register offsets */
+#define OMAP3630_CONTROL_FUSE_OPP1G_VDD1 (OMAP2_CONTROL_GENERAL + 0x0110)
+#define OMAP3630_CONTROL_FUSE_OPP50_VDD1 (OMAP2_CONTROL_GENERAL + 0x0114)
+#define OMAP3630_CONTROL_FUSE_OPP100_VDD1 (OMAP2_CONTROL_GENERAL + 0x0118)
+#define OMAP3630_CONTROL_FUSE_OPP120_VDD1 (OMAP2_CONTROL_GENERAL + 0x0120)
+#define OMAP3630_CONTROL_FUSE_OPP50_VDD2 (OMAP2_CONTROL_GENERAL + 0x0128)
+#define OMAP3630_CONTROL_FUSE_OPP100_VDD2 (OMAP2_CONTROL_GENERAL + 0x012C)
+
/* AM35XX only CONTROL_GENERAL register offsets */
#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
@@ -243,6 +260,16 @@
#define OMAP2_SYSBOOT_1_MASK (1 << 1)
#define OMAP2_SYSBOOT_0_MASK (1 << 0)
+/* CONTROL_FUSE_SR bits */
+#define OMAP343X_SR2_SENNENABLE_MASK (0x3 << 10)
+#define OMAP343X_SR2_SENNENABLE_SHIFT 10
+#define OMAP343X_SR2_SENPENABLE_MASK (0x3 << 8)
+#define OMAP343X_SR2_SENPENABLE_SHIFT 8
+#define OMAP343X_SR1_SENNENABLE_MASK (0x3 << 2)
+#define OMAP343X_SR1_SENNENABLE_SHIFT 2
+#define OMAP343X_SR1_SENPENABLE_MASK (0x3 << 0)
+#define OMAP343X_SR1_SENPENABLE_SHIFT 0
+
/* CONTROL_PBIAS_LITE bits */
#define OMAP343X_PBIASLITESUPPLY_HIGH1 (1 << 15)
#define OMAP343X_PBIASLITEVMODEERROR1 (1 << 11)
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH v3 06/11] OMAP3: PM: Adding smartreflex class3 driver
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
` (4 preceding siblings ...)
2010-09-22 14:45 ` [PATCH v3 05/11] OMAP3: PM: Adding smartreflex hwmod data Thara Gopinath
@ 2010-09-22 14:45 ` Thara Gopinath
2010-10-14 23:09 ` Kevin Hilman
2010-09-22 14:45 ` [PATCH v3 07/11] OMAP3: PM: Adding T2 enabling of smartreflex support Thara Gopinath
` (5 subsequent siblings)
11 siblings, 1 reply; 56+ messages in thread
From: Thara Gopinath @ 2010-09-22 14:45 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
Smartreflex Class3 implementation continuously monitors
silicon performance and instructs the Voltage Processors
to increase or decrease the voltage.
This patch adds smartreflex class 3 driver. This driver hooks
up with the generic smartreflex driver smartreflex.c to abstract
out class specific implementations out of the generic driver.
Signed-off-by: Thara Gopinath <thara@ti.com>
---
arch/arm/mach-omap2/Makefile | 1 +
arch/arm/mach-omap2/smartreflex-class3.c | 61 ++++++++++++++++++++++++++++++
arch/arm/mach-omap2/smartreflex-class3.h | 23 +++++++++++
arch/arm/plat-omap/Kconfig | 9 ++++
4 files changed, 94 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/smartreflex-class3.c
create mode 100644 arch/arm/mach-omap2/smartreflex-class3.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index abc377a..4f6139c 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o voltage.o \
obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
+obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c
new file mode 100644
index 0000000..f1ade08
--- /dev/null
+++ b/arch/arm/mach-omap2/smartreflex-class3.c
@@ -0,0 +1,61 @@
+/*
+ * Smart reflex Class 3 specific implementations
+ *
+ * Author: Thara Gopinath <thara@ti.com>
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Thara Gopinath <thara@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <plat/smartreflex.h>
+
+#include "smartreflex-class3.h"
+
+static int sr_class3_enable(struct voltagedomain *voltdm)
+{
+ unsigned long volt = 0;
+
+ volt = omap_voltage_get_nom_volt(voltdm);
+ if (!volt) {
+ pr_warning("%s: Curr voltage unknown. Cannot enable sr_%s\n",
+ __func__, voltdm->name);
+ return -ENODATA;
+ }
+
+ omap_vp_enable(voltdm);
+ return sr_enable(voltdm, volt);
+}
+
+static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset)
+{
+ omap_vp_disable(voltdm);
+ sr_disable(voltdm);
+ if (is_volt_reset)
+ omap_voltage_reset(voltdm);
+
+ return 0;
+}
+
+static int sr_class3_configure(struct voltagedomain *voltdm)
+{
+ return sr_configure_errgen(voltdm);
+}
+
+/* SR class3 structure */
+static struct omap_smartreflex_class_data class3_data = {
+ .enable = sr_class3_enable,
+ .disable = sr_class3_disable,
+ .configure = sr_class3_configure,
+ .class_type = SR_CLASS3,
+};
+
+/* Smartreflex CLASS3 init API to be called from board file */
+int __init sr_class3_init(void)
+{
+ pr_info("SmartReflex CLASS3 initialized\n");
+ return sr_register_class(&class3_data);
+}
diff --git a/arch/arm/mach-omap2/smartreflex-class3.h b/arch/arm/mach-omap2/smartreflex-class3.h
new file mode 100644
index 0000000..4d86037
--- /dev/null
+++ b/arch/arm/mach-omap2/smartreflex-class3.h
@@ -0,0 +1,23 @@
+/*
+ * Smartreflex Class 3 Routines
+ *
+ * Author: Thara Gopinath <thara@ti.com>
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Thara Gopinath <thara@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_SMARTREFLEXCLASS3_H
+#define __ARCH_ARM_MACH_OMAP2_SMARTREFLEXCLASS3_H
+
+#ifdef CONFIG_OMAP_SMARTREFLEX_CLASS3
+int sr_class3_init(void);
+#else
+static int sr_class3_init(void) { return 0; }
+#endif
+
+#endif
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 8056349..af7acc9 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -67,6 +67,15 @@ config OMAP_SMARTREFLEX_TESTING
WARNING: Enabling this option may cause your device to hang!
+config OMAP_SMARTREFLEX_CLASS3
+ bool "Class 3 mode of Smartreflex Implementation"
+ depends on OMAP_SMARTREFLEX && TWL4030_CORE
+ help
+ Say Y to enable Class 3 implementation of Smartreflex
+
+ Class 3 implementation of Smartreflex employs continuous hardware
+ voltage caliberation.
+
config OMAP_RESET_CLOCKS
bool "Reset unused clocks during boot"
depends on ARCH_OMAP
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH v3 06/11] OMAP3: PM: Adding smartreflex class3 driver
2010-09-22 14:45 ` [PATCH v3 06/11] OMAP3: PM: Adding smartreflex class3 driver Thara Gopinath
@ 2010-10-14 23:09 ` Kevin Hilman
2010-10-22 14:37 ` Gopinath, Thara
0 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-10-14 23:09 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Thara Gopinath <thara@ti.com> writes:
> Smartreflex Class3 implementation continuously monitors
> silicon performance and instructs the Voltage Processors
> to increase or decrease the voltage.
> This patch adds smartreflex class 3 driver. This driver hooks
> up with the generic smartreflex driver smartreflex.c to abstract
> out class specific implementations out of the generic driver.
>
> Signed-off-by: Thara Gopinath <thara@ti.com>
Some minor comments below...
> ---
> arch/arm/mach-omap2/Makefile | 1 +
> arch/arm/mach-omap2/smartreflex-class3.c | 61 ++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/smartreflex-class3.h | 23 +++++++++++
> arch/arm/plat-omap/Kconfig | 9 ++++
> 4 files changed, 94 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/mach-omap2/smartreflex-class3.c
> create mode 100644 arch/arm/mach-omap2/smartreflex-class3.h
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index abc377a..4f6139c 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -57,6 +57,7 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o voltage.o \
> obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
> obj-$(CONFIG_PM_DEBUG) += pm-debug.o
> obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
> +obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
>
> AFLAGS_sleep24xx.o :=-Wa,-march=armv6
> AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
> diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c
> new file mode 100644
> index 0000000..f1ade08
> --- /dev/null
> +++ b/arch/arm/mach-omap2/smartreflex-class3.c
> @@ -0,0 +1,61 @@
> +/*
> + * Smart reflex Class 3 specific implementations
> + *
> + * Author: Thara Gopinath <thara@ti.com>
> + *
> + * Copyright (C) 2010 Texas Instruments, Inc.
> + * Thara Gopinath <thara@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <plat/smartreflex.h>
> +
> +#include "smartreflex-class3.h"
> +
> +static int sr_class3_enable(struct voltagedomain *voltdm)
> +{
> + unsigned long volt = 0;
minor: '= 0' assignment not needed as it's immediately assigned in the
next line.
> + volt = omap_voltage_get_nom_volt(voltdm);
> + if (!volt) {
> + pr_warning("%s: Curr voltage unknown. Cannot enable sr_%s\n",
> + __func__, voltdm->name);
> + return -ENODATA;
> + }
> +
> + omap_vp_enable(voltdm);
> + return sr_enable(voltdm, volt);
> +}
> +
> +static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset)
> +{
> + omap_vp_disable(voltdm);
> + sr_disable(voltdm);
> + if (is_volt_reset)
> + omap_voltage_reset(voltdm);
> +
> + return 0;
> +}
> +
> +static int sr_class3_configure(struct voltagedomain *voltdm)
> +{
> + return sr_configure_errgen(voltdm);
> +}
> +
> +/* SR class3 structure */
> +static struct omap_smartreflex_class_data class3_data = {
> + .enable = sr_class3_enable,
> + .disable = sr_class3_disable,
> + .configure = sr_class3_configure,
> + .class_type = SR_CLASS3,
> +};
> +
> +/* Smartreflex CLASS3 init API to be called from board file */
s/CLASS3/Class 3/
> +int __init sr_class3_init(void)
> +{
> + pr_info("SmartReflex CLASS3 initialized\n");
ditto
> + return sr_register_class(&class3_data);
> +}
> diff --git a/arch/arm/mach-omap2/smartreflex-class3.h b/arch/arm/mach-omap2/smartreflex-class3.h
> new file mode 100644
> index 0000000..4d86037
> --- /dev/null
> +++ b/arch/arm/mach-omap2/smartreflex-class3.h
> @@ -0,0 +1,23 @@
> +/*
> + * Smartreflex Class 3 Routines
> + *
> + * Author: Thara Gopinath <thara@ti.com>
> + *
> + * Copyright (C) 2010 Texas Instruments, Inc.
> + * Thara Gopinath <thara@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef __ARCH_ARM_MACH_OMAP2_SMARTREFLEXCLASS3_H
> +#define __ARCH_ARM_MACH_OMAP2_SMARTREFLEXCLASS3_H
> +
> +#ifdef CONFIG_OMAP_SMARTREFLEX_CLASS3
> +int sr_class3_init(void);
> +#else
> +static int sr_class3_init(void) { return 0; }
> +#endif
> +
> +#endif
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index 8056349..af7acc9 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -67,6 +67,15 @@ config OMAP_SMARTREFLEX_TESTING
>
> WARNING: Enabling this option may cause your device to hang!
>
> +config OMAP_SMARTREFLEX_CLASS3
> + bool "Class 3 mode of Smartreflex Implementation"
> + depends on OMAP_SMARTREFLEX && TWL4030_CORE
> + help
> + Say Y to enable Class 3 implementation of Smartreflex
> +
> + Class 3 implementation of Smartreflex employs continuous hardware
> + voltage caliberation.
calibration
> +
> config OMAP_RESET_CLOCKS
> bool "Reset unused clocks during boot"
> depends on ARCH_OMAP
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 06/11] OMAP3: PM: Adding smartreflex class3 driver
2010-10-14 23:09 ` Kevin Hilman
@ 2010-10-22 14:37 ` Gopinath, Thara
0 siblings, 0 replies; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-22 14:37 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>Sent: Friday, October 15, 2010 4:39 AM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 06/11] OMAP3: PM: Adding smartreflex class3 driver
>>
>>Thara Gopinath <thara@ti.com> writes:
>>
>>> Smartreflex Class3 implementation continuously monitors
>>> silicon performance and instructs the Voltage Processors
>>> to increase or decrease the voltage.
>>> This patch adds smartreflex class 3 driver. This driver hooks
>>> up with the generic smartreflex driver smartreflex.c to abstract
>>> out class specific implementations out of the generic driver.
>>>
>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>
>>Some minor comments below...
Thanks for the review!
>>
>>> ---
>>> arch/arm/mach-omap2/Makefile | 1 +
>>> arch/arm/mach-omap2/smartreflex-class3.c | 61
>>++++++++++++++++++++++++++++++
>>> arch/arm/mach-omap2/smartreflex-class3.h | 23 +++++++++++
>>> arch/arm/plat-omap/Kconfig | 9 ++++
>>> 4 files changed, 94 insertions(+), 0 deletions(-)
>>> create mode 100644 arch/arm/mach-omap2/smartreflex-class3.c
>>> create mode 100644 arch/arm/mach-omap2/smartreflex-class3.h
>>>
>>> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
>>> index abc377a..4f6139c 100644
>>> --- a/arch/arm/mach-omap2/Makefile
>>> +++ b/arch/arm/mach-omap2/Makefile
>>> @@ -57,6 +57,7 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o
>>voltage.o \
>>> obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
>>> obj-$(CONFIG_PM_DEBUG) += pm-debug.o
>>> obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
>>> +obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
>>>
>>> AFLAGS_sleep24xx.o :=-Wa,-march=armv6
>>> AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
>>> diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-
>>omap2/smartreflex-class3.c
>>> new file mode 100644
>>> index 0000000..f1ade08
>>> --- /dev/null
>>> +++ b/arch/arm/mach-omap2/smartreflex-class3.c
>>> @@ -0,0 +1,61 @@
>>> +/*
>>> + * Smart reflex Class 3 specific implementations
>>> + *
>>> + * Author: Thara Gopinath <thara@ti.com>
>>> + *
>>> + * Copyright (C) 2010 Texas Instruments, Inc.
>>> + * Thara Gopinath <thara@ti.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> + */
>>> +
>>> +#include <plat/smartreflex.h>
>>> +
>>> +#include "smartreflex-class3.h"
>>> +
>>> +static int sr_class3_enable(struct voltagedomain *voltdm)
>>> +{
>>> + unsigned long volt = 0;
>>
>>minor: '= 0' assignment not needed as it's immediately assigned in the
>>next line.
Ok.
>>
>>> + volt = omap_voltage_get_nom_volt(voltdm);
>>> + if (!volt) {
>>> + pr_warning("%s: Curr voltage unknown. Cannot enable sr_%s\n",
>>> + __func__, voltdm->name);
>>> + return -ENODATA;
>>> + }
>>> +
>>> + omap_vp_enable(voltdm);
>>> + return sr_enable(voltdm, volt);
>>> +}
>>> +
>>> +static int sr_class3_disable(struct voltagedomain *voltdm, int
>>is_volt_reset)
>>> +{
>>> + omap_vp_disable(voltdm);
>>> + sr_disable(voltdm);
>>> + if (is_volt_reset)
>>> + omap_voltage_reset(voltdm);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static int sr_class3_configure(struct voltagedomain *voltdm)
>>> +{
>>> + return sr_configure_errgen(voltdm);
>>> +}
>>> +
>>> +/* SR class3 structure */
>>> +static struct omap_smartreflex_class_data class3_data = {
>>> + .enable = sr_class3_enable,
>>> + .disable = sr_class3_disable,
>>> + .configure = sr_class3_configure,
>>> + .class_type = SR_CLASS3,
>>> +};
>>> +
>>> +/* Smartreflex CLASS3 init API to be called from board file */
>>
>>s/CLASS3/Class 3/
Will correct
>>
>>> +int __init sr_class3_init(void)
>>> +{
>>> + pr_info("SmartReflex CLASS3 initialized\n");
>>
>>ditto
Will correct
>>
>>> + return sr_register_class(&class3_data);
>>> +}
>>> diff --git a/arch/arm/mach-omap2/smartreflex-class3.h b/arch/arm/mach-
>>omap2/smartreflex-class3.h
>>> new file mode 100644
>>> index 0000000..4d86037
>>> --- /dev/null
>>> +++ b/arch/arm/mach-omap2/smartreflex-class3.h
>>> @@ -0,0 +1,23 @@
>>> +/*
>>> + * Smartreflex Class 3 Routines
>>> + *
>>> + * Author: Thara Gopinath <thara@ti.com>
>>> + *
>>> + * Copyright (C) 2010 Texas Instruments, Inc.
>>> + * Thara Gopinath <thara@ti.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> + */
>>> +
>>> +#ifndef __ARCH_ARM_MACH_OMAP2_SMARTREFLEXCLASS3_H
>>> +#define __ARCH_ARM_MACH_OMAP2_SMARTREFLEXCLASS3_H
>>> +
>>> +#ifdef CONFIG_OMAP_SMARTREFLEX_CLASS3
>>> +int sr_class3_init(void);
>>> +#else
>>> +static int sr_class3_init(void) { return 0; }
>>> +#endif
>>> +
>>> +#endif
>>> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
>>> index 8056349..af7acc9 100644
>>> --- a/arch/arm/plat-omap/Kconfig
>>> +++ b/arch/arm/plat-omap/Kconfig
>>> @@ -67,6 +67,15 @@ config OMAP_SMARTREFLEX_TESTING
>>>
>>> WARNING: Enabling this option may cause your device to hang!
>>>
>>> +config OMAP_SMARTREFLEX_CLASS3
>>> + bool "Class 3 mode of Smartreflex Implementation"
>>> + depends on OMAP_SMARTREFLEX && TWL4030_CORE
>>> + help
>>> + Say Y to enable Class 3 implementation of Smartreflex
>>> +
>>> + Class 3 implementation of Smartreflex employs continuous hardware
>>> + voltage caliberation.
>>
>>calibration
Will correct
>>
>>> +
>>> config OMAP_RESET_CLOCKS
>>> bool "Reset unused clocks during boot"
>>> depends on ARCH_OMAP
>>
>>Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH v3 07/11] OMAP3: PM: Adding T2 enabling of smartreflex support
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
` (5 preceding siblings ...)
2010-09-22 14:45 ` [PATCH v3 06/11] OMAP3: PM: Adding smartreflex class3 driver Thara Gopinath
@ 2010-09-22 14:45 ` Thara Gopinath
2010-09-29 0:08 ` Kevin Hilman
2010-09-22 14:45 ` [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers Thara Gopinath
` (4 subsequent siblings)
11 siblings, 1 reply; 56+ messages in thread
From: Thara Gopinath @ 2010-09-22 14:45 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
This patch adds support in the twl4030 driver to hook up
the API enabling smartreflex support on PMIC side with the
smartreflex driver. Without this the OMAP smartreflex modules
will not function.
Signed-off-by: Thara Gopinath <thara@ti.com>
---
drivers/mfd/twl-core.c | 7 +++++--
drivers/mfd/twl4030-power.c | 29 +++++++++++++++++++++++++++++
include/linux/i2c/twl.h | 1 +
3 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index 720e099..677b903 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -1009,8 +1009,11 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
clocks_init(&client->dev, pdata->clock);
/* load power event scripts */
- if (twl_has_power() && pdata->power)
- twl4030_power_init(pdata->power);
+ if (twl_has_power()) {
+ twl4030_power_sr_init();
+ if (pdata->power)
+ twl4030_power_init(pdata->power);
+ }
/* Maybe init the T2 Interrupt subsystem */
if (client->irq
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index 7efa878..6d0ad2d 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -31,6 +31,8 @@
#include <asm/mach-types.h>
+#include <plat/smartreflex.h>
+
static u8 twl4030_start_script_address = 0x2b;
#define PWR_P1_SW_EVENTS 0x10
@@ -63,6 +65,10 @@ static u8 twl4030_start_script_address = 0x2b;
#define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
#define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
+/* Smartreflex Control */
+#define R_DCDC_GLOBAL_CFG PHY_TO_OFF_PM_RECEIVER(0x61)
+#define CFG_ENABLE_SRFLX 0x08
+
#define R_PROTECT_KEY 0x0E
#define R_KEY_1 0xC0
#define R_KEY_2 0x0C
@@ -511,6 +517,29 @@ int twl4030_remove_script(u8 flags)
return err;
}
+/* API to enable smrtreflex on Triton side */
+static void twl4030_smartreflex_init(void)
+{
+ int ret = 0;
+ u8 read_val;
+
+ ret = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &read_val,
+ R_DCDC_GLOBAL_CFG);
+ read_val |= CFG_ENABLE_SRFLX;
+ ret |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, read_val,
+ R_DCDC_GLOBAL_CFG);
+}
+
+struct omap_smartreflex_pmic_data twl4030_sr_data = {
+ .sr_pmic_init = twl4030_smartreflex_init,
+};
+
+void __init twl4030_power_sr_init()
+{
+ /* Register the SR init API with the Smartreflex driver */
+ omap_sr_register_pmic(&twl4030_sr_data);
+}
+
void __init twl4030_power_init(struct twl4030_power_data *twl4030_scripts)
{
int err = 0;
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
index 6de90bf..b02011e 100644
--- a/include/linux/i2c/twl.h
+++ b/include/linux/i2c/twl.h
@@ -550,6 +550,7 @@ struct twl4030_power_data {
};
extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
+extern void twl4030_power_sr_init(void);
extern int twl4030_remove_script(u8 flags);
struct twl4030_codec_audio_data {
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH v3 07/11] OMAP3: PM: Adding T2 enabling of smartreflex support
2010-09-22 14:45 ` [PATCH v3 07/11] OMAP3: PM: Adding T2 enabling of smartreflex support Thara Gopinath
@ 2010-09-29 0:08 ` Kevin Hilman
2010-09-29 14:41 ` Gopinath, Thara
0 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-09-29 0:08 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Thara Gopinath <thara@ti.com> writes:
> This patch adds support in the twl4030 driver to hook up
> the API enabling smartreflex support on PMIC side with the
> smartreflex driver. Without this the OMAP smartreflex modules
> will not function.
>
> Signed-off-by: Thara Gopinath <thara@ti.com>
This one should be a separate patch with a subject something like
mfd: twl4030: add SmartReflex support
and the changelog should indicate its dependency on this SR/voltage
series.
Kevin
> ---
> drivers/mfd/twl-core.c | 7 +++++--
> drivers/mfd/twl4030-power.c | 29 +++++++++++++++++++++++++++++
> include/linux/i2c/twl.h | 1 +
> 3 files changed, 35 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
> index 720e099..677b903 100644
> --- a/drivers/mfd/twl-core.c
> +++ b/drivers/mfd/twl-core.c
> @@ -1009,8 +1009,11 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
> clocks_init(&client->dev, pdata->clock);
>
> /* load power event scripts */
> - if (twl_has_power() && pdata->power)
> - twl4030_power_init(pdata->power);
> + if (twl_has_power()) {
> + twl4030_power_sr_init();
> + if (pdata->power)
> + twl4030_power_init(pdata->power);
> + }
>
> /* Maybe init the T2 Interrupt subsystem */
> if (client->irq
> diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
> index 7efa878..6d0ad2d 100644
> --- a/drivers/mfd/twl4030-power.c
> +++ b/drivers/mfd/twl4030-power.c
> @@ -31,6 +31,8 @@
>
> #include <asm/mach-types.h>
>
> +#include <plat/smartreflex.h>
> +
> static u8 twl4030_start_script_address = 0x2b;
>
> #define PWR_P1_SW_EVENTS 0x10
> @@ -63,6 +65,10 @@ static u8 twl4030_start_script_address = 0x2b;
> #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
> #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
>
> +/* Smartreflex Control */
> +#define R_DCDC_GLOBAL_CFG PHY_TO_OFF_PM_RECEIVER(0x61)
> +#define CFG_ENABLE_SRFLX 0x08
> +
> #define R_PROTECT_KEY 0x0E
> #define R_KEY_1 0xC0
> #define R_KEY_2 0x0C
> @@ -511,6 +517,29 @@ int twl4030_remove_script(u8 flags)
> return err;
> }
>
> +/* API to enable smrtreflex on Triton side */
> +static void twl4030_smartreflex_init(void)
> +{
> + int ret = 0;
> + u8 read_val;
> +
> + ret = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &read_val,
> + R_DCDC_GLOBAL_CFG);
> + read_val |= CFG_ENABLE_SRFLX;
> + ret |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, read_val,
> + R_DCDC_GLOBAL_CFG);
> +}
> +
> +struct omap_smartreflex_pmic_data twl4030_sr_data = {
> + .sr_pmic_init = twl4030_smartreflex_init,
> +};
> +
> +void __init twl4030_power_sr_init()
> +{
> + /* Register the SR init API with the Smartreflex driver */
> + omap_sr_register_pmic(&twl4030_sr_data);
> +}
> +
> void __init twl4030_power_init(struct twl4030_power_data *twl4030_scripts)
> {
> int err = 0;
> diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
> index 6de90bf..b02011e 100644
> --- a/include/linux/i2c/twl.h
> +++ b/include/linux/i2c/twl.h
> @@ -550,6 +550,7 @@ struct twl4030_power_data {
> };
>
> extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
> +extern void twl4030_power_sr_init(void);
> extern int twl4030_remove_script(u8 flags);
>
> struct twl4030_codec_audio_data {
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 07/11] OMAP3: PM: Adding T2 enabling of smartreflex support
2010-09-29 0:08 ` Kevin Hilman
@ 2010-09-29 14:41 ` Gopinath, Thara
2010-09-29 23:16 ` Kevin Hilman
0 siblings, 1 reply; 56+ messages in thread
From: Gopinath, Thara @ 2010-09-29 14:41 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>Sent: Wednesday, September 29, 2010 5:38 AM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 07/11] OMAP3: PM: Adding T2 enabling of smartreflex
>>support
>>
>>Thara Gopinath <thara@ti.com> writes:
>>
>>> This patch adds support in the twl4030 driver to hook up
>>> the API enabling smartreflex support on PMIC side with the
>>> smartreflex driver. Without this the OMAP smartreflex modules
>>> will not function.
>>>
>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>
>>This one should be a separate patch with a subject something like
>>
>> mfd: twl4030: add SmartReflex support
>>
>>and the changelog should indicate its dependency on this SR/voltage
>>series.
Do you mean to say this patch should not be a part of this series at all ??
Regards
Thara
>>
>>Kevin
>>
>>> ---
>>> drivers/mfd/twl-core.c | 7 +++++--
>>> drivers/mfd/twl4030-power.c | 29 +++++++++++++++++++++++++++++
>>> include/linux/i2c/twl.h | 1 +
>>> 3 files changed, 35 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
>>> index 720e099..677b903 100644
>>> --- a/drivers/mfd/twl-core.c
>>> +++ b/drivers/mfd/twl-core.c
>>> @@ -1009,8 +1009,11 @@ twl_probe(struct i2c_client *client, const struct
>>i2c_device_id *id)
>>> clocks_init(&client->dev, pdata->clock);
>>>
>>> /* load power event scripts */
>>> - if (twl_has_power() && pdata->power)
>>> - twl4030_power_init(pdata->power);
>>> + if (twl_has_power()) {
>>> + twl4030_power_sr_init();
>>> + if (pdata->power)
>>> + twl4030_power_init(pdata->power);
>>> + }
>>>
>>> /* Maybe init the T2 Interrupt subsystem */
>>> if (client->irq
>>> diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
>>> index 7efa878..6d0ad2d 100644
>>> --- a/drivers/mfd/twl4030-power.c
>>> +++ b/drivers/mfd/twl4030-power.c
>>> @@ -31,6 +31,8 @@
>>>
>>> #include <asm/mach-types.h>
>>>
>>> +#include <plat/smartreflex.h>
>>> +
>>> static u8 twl4030_start_script_address = 0x2b;
>>>
>>> #define PWR_P1_SW_EVENTS 0x10
>>> @@ -63,6 +65,10 @@ static u8 twl4030_start_script_address = 0x2b;
>>> #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
>>> #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
>>>
>>> +/* Smartreflex Control */
>>> +#define R_DCDC_GLOBAL_CFG PHY_TO_OFF_PM_RECEIVER(0x61)
>>> +#define CFG_ENABLE_SRFLX 0x08
>>> +
>>> #define R_PROTECT_KEY 0x0E
>>> #define R_KEY_1 0xC0
>>> #define R_KEY_2 0x0C
>>> @@ -511,6 +517,29 @@ int twl4030_remove_script(u8 flags)
>>> return err;
>>> }
>>>
>>> +/* API to enable smrtreflex on Triton side */
>>> +static void twl4030_smartreflex_init(void)
>>> +{
>>> + int ret = 0;
>>> + u8 read_val;
>>> +
>>> + ret = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &read_val,
>>> + R_DCDC_GLOBAL_CFG);
>>> + read_val |= CFG_ENABLE_SRFLX;
>>> + ret |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, read_val,
>>> + R_DCDC_GLOBAL_CFG);
>>> +}
>>> +
>>> +struct omap_smartreflex_pmic_data twl4030_sr_data = {
>>> + .sr_pmic_init = twl4030_smartreflex_init,
>>> +};
>>> +
>>> +void __init twl4030_power_sr_init()
>>> +{
>>> + /* Register the SR init API with the Smartreflex driver */
>>> + omap_sr_register_pmic(&twl4030_sr_data);
>>> +}
>>> +
>>> void __init twl4030_power_init(struct twl4030_power_data *twl4030_scripts)
>>> {
>>> int err = 0;
>>> diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
>>> index 6de90bf..b02011e 100644
>>> --- a/include/linux/i2c/twl.h
>>> +++ b/include/linux/i2c/twl.h
>>> @@ -550,6 +550,7 @@ struct twl4030_power_data {
>>> };
>>>
>>> extern void twl4030_power_init(struct twl4030_power_data
>>*triton2_scripts);
>>> +extern void twl4030_power_sr_init(void);
>>> extern int twl4030_remove_script(u8 flags);
>>>
>>> struct twl4030_codec_audio_data {
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH v3 07/11] OMAP3: PM: Adding T2 enabling of smartreflex support
2010-09-29 14:41 ` Gopinath, Thara
@ 2010-09-29 23:16 ` Kevin Hilman
0 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2010-09-29 23:16 UTC (permalink / raw)
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
"Gopinath, Thara" <thara@ti.com> writes:
>>>Thara Gopinath <thara@ti.com> writes:
>>>
>>>> This patch adds support in the twl4030 driver to hook up
>>>> the API enabling smartreflex support on PMIC side with the
>>>> smartreflex driver. Without this the OMAP smartreflex modules
>>>> will not function.
>>>>
>>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>>
>>>This one should be a separate patch with a subject something like
>>>
>>> mfd: twl4030: add SmartReflex support
>>>
>>>and the changelog should indicate its dependency on this SR/voltage
>>>series.
>
> Do you mean to say this patch should not be a part of this series at all ??
>
Yes, as it will need to be merged via the mfd tree once the SR core is
merged.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
` (6 preceding siblings ...)
2010-09-22 14:45 ` [PATCH v3 07/11] OMAP3: PM: Adding T2 enabling of smartreflex support Thara Gopinath
@ 2010-09-22 14:45 ` Thara Gopinath
2010-09-29 23:20 ` Kevin Hilman
` (3 more replies)
2010-09-22 14:45 ` [PATCH v3 09/11] OMAP3: PM: Smartreflex Class3 initialization from board files Thara Gopinath
` (3 subsequent siblings)
11 siblings, 4 replies; 56+ messages in thread
From: Thara Gopinath @ 2010-09-22 14:45 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
This patch adds debug support to the voltage and smartreflex drivers.
This means a whole bunch of voltage processor and smartreflex
parameters are now visible through the pm debugfs. By default
only a read of these parameters are permitted. If you need to
write into them then
echo 1 > /pm_debug/enable_sr_vp_debug
The voltage parameters can be viewed at
/pm_debug/voltage/vdd_<x>/<parameter>
and the smartreflex parameters can be viewed at
/pm_debug/smartreflex/sr_<x>/<parameter>
where <x> is mpu or core for OMAP3.
Signed-off-by: Thara Gopinath <thara@ti.com>
---
arch/arm/mach-omap2/pm-debug.c | 15 ++
arch/arm/mach-omap2/smartreflex.c | 40 +++++-
arch/arm/mach-omap2/voltage.c | 210 ++++++++++++++++++++++++-
arch/arm/plat-omap/include/plat/smartreflex.h | 1 -
arch/arm/plat-omap/include/plat/voltage.h | 5 +
5 files changed, 264 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 390f1c6..879efb2 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -32,6 +32,7 @@
#include <plat/powerdomain.h>
#include <plat/clockdomain.h>
#include <plat/dmtimer.h>
+#include <plat/voltage.h>
#include "prm.h"
#include "cm.h"
@@ -586,6 +587,18 @@ static int option_set(void *data, u64 val)
omap3_pm_off_mode_enable(val);
}
+ if (option == &enable_sr_vp_debug && val)
+ pr_notice("Beware that enabling this option will allow user "
+ "to override the system defined vp and sr parameters "
+ "All the updated parameters will take effect next "
+ "time smartreflex is enabled. Also this option "
+ "disables the automatic vp errorgain and sr errormin "
+ "limit changes as per the voltage. Users will have "
+ "to explicitly write values into the debug fs "
+ "entries corresponding to these if they want to see "
+ "them changing according to the VDD voltage\n");
+
+
return 0;
}
@@ -642,6 +655,8 @@ static int __init pm_dbg_init(void)
(void) debugfs_create_file("wakeup_timer_milliseconds",
S_IRUGO | S_IWUGO, d, &wakeup_timer_milliseconds,
&pm_dbg_option_fops);
+ (void) debugfs_create_file("enable_sr_vp_debug", S_IRUGO | S_IWUGO, d,
+ &enable_sr_vp_debug, &pm_dbg_option_fops);
pm_dbg_main_dir = d;
pm_dbg_init_done = 1;
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 7fc3138..b5a7878 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -558,8 +558,13 @@ int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
return -ENODATA;
}
- /* errminlimit is opp dependent and hence linked to voltage */
- sr->err_minlimit = volt_data->sr_errminlimit;
+ /*
+ * errminlimit is opp dependent and hence linked to voltage
+ * if the debug option is enabled, the user might have over ridden
+ * this parameter so do not get it from voltage table
+ */
+ if (!enable_sr_vp_debug)
+ sr->err_minlimit = volt_data->sr_errminlimit;
/* Enable the clocks */
if (!sr->sr_enable) {
@@ -811,9 +816,34 @@ static int omap_sr_autocomp_store(void *data, u64 val)
return 0;
}
+static int omap_sr_params_show(void *data, u64 *val)
+{
+ u32 *param = data;
+
+ *val = *param;
+ return 0;
+}
+
+static int omap_sr_params_store(void *data, u64 val)
+{
+ if (enable_sr_vp_debug) {
+ u32 *option = data;
+ *option = val;
+ } else {
+ pr_notice("%s: DEBUG option not enabled!\n \
+ echo 1 > pm_debug/enable_sr_vp_debug - to enable\n",
+ __func__);
+ }
+
+ return 0;
+}
+
DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
omap_sr_autocomp_store, "%llu\n");
+DEFINE_SIMPLE_ATTRIBUTE(sr_params_fops, omap_sr_params_show,
+ omap_sr_params_store, "%llu\n");
+
static int __init omap_smartreflex_probe(struct platform_device *pdev)
{
struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
@@ -907,6 +937,12 @@ static int __init omap_smartreflex_probe(struct platform_device *pdev)
(void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir,
(void *)sr_info, &pm_sr_fops);
+ (void) debugfs_create_file("errweight", S_IRUGO | S_IWUGO, dbg_dir,
+ &sr_info->err_weight, &sr_params_fops);
+ (void) debugfs_create_file("errmaxlimit", S_IRUGO | S_IWUGO, dbg_dir,
+ &sr_info->err_maxlimit, &sr_params_fops);
+ (void) debugfs_create_file("errminlimit", S_IRUGO | S_IWUGO, dbg_dir,
+ &sr_info->err_minlimit, &sr_params_fops);
return ret;
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 49013cb..70a645e 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -22,15 +22,22 @@
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/err.h>
+#include <linux/debugfs.h>
+#include <linux/slab.h>
#include <plat/common.h>
#include <plat/voltage.h>
#include "prm-regbits-34xx.h"
+#include "pm.h"
#define VP_IDLE_TIMEOUT 200
#define VP_TRANXDONE_TIMEOUT 300
+#define VOLTAGE_DIR_SIZE 16
+static struct dentry *voltage_dir;
+/* VP SR debug support */
+u32 enable_sr_vp_debug;
/* PRM voltage module */
static u32 volt_mod;
@@ -221,6 +228,82 @@ static inline void voltage_write_reg(u8 offset, u32 value)
prm_write_mod_reg(value, volt_mod, offset);
}
+/* Voltage debugfs support */
+static int vp_debug_get(void *data, u64 *val)
+{
+ u16 *option = data;
+
+ if (!option) {
+ pr_warning("Wrong paramater passed\n");
+ return -EINVAL;
+ }
+
+ *val = *option;
+
+ return 0;
+}
+
+static int vp_debug_set(void *data, u64 val)
+{
+ if (enable_sr_vp_debug) {
+ u32 *option = data;
+
+ if (!option) {
+ pr_warning("Wrong paramater passed\n");
+ return -EINVAL;
+ }
+
+ *option = val;
+ } else {
+ pr_notice("DEBUG option not enabled!"
+ "echo 1 > pm_debug/enable_sr_vp_debug - to enable\n");
+ }
+
+ return 0;
+}
+
+static int vp_volt_debug_get(void *data, u64 *val)
+{
+ struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
+ u8 vsel;
+
+ if (!vdd) {
+ pr_warning("Wrong paramater passed\n");
+ return -EINVAL;
+ }
+
+ vsel = voltage_read_reg(vdd->vp_offs.voltage);
+ pr_notice("curr_vsel = %x\n", vsel);
+
+ if (!volt_pmic_info.vsel_to_uv) {
+ pr_warning("PMIC function to convert vsel to voltage"
+ "in uV not registerd\n");
+ return -EINVAL;
+ }
+
+ *val = volt_pmic_info.vsel_to_uv(vsel);
+ return 0;
+}
+
+static int nom_volt_debug_get(void *data, u64 *val)
+{
+ struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
+
+ if (!vdd) {
+ pr_warning("Wrong paramater passed\n");
+ return -EINVAL;
+ }
+
+ *val = omap_voltage_get_nom_volt(&vdd->voltdm);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(vp_debug_fops, vp_debug_get, vp_debug_set, "%llu\n");
+DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n");
+DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL,
+ "%llu\n");
+
static void vp_latch_vsel(struct omap_vdd_info *vdd)
{
u32 vpconfig;
@@ -457,6 +540,61 @@ static void __init vdd_data_configure(struct omap_vdd_info *vdd)
omap3_vdd_data_configure(vdd);
}
+static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
+{
+ struct dentry *vdd_debug;
+ char *name;
+
+ name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL);
+ if (!name) {
+ pr_warning("%s: Unable to allocate memry for debugfs"
+ "directory name for vdd_%s",
+ __func__, vdd->voltdm.name);
+ return;
+ }
+ strcpy(name, "vdd_");
+ strcat(name, vdd->voltdm.name);
+
+ vdd_debug = debugfs_create_dir(name, voltage_dir);
+ if (IS_ERR(vdd_debug)) {
+ pr_warning("%s: Unable to create debugfs directory for"
+ "vdd_%s\n", __func__, vdd->voltdm.name);
+ return;
+ }
+
+ (void) debugfs_create_file("vp_errorgain", S_IRUGO | S_IWUGO,
+ vdd_debug,
+ &(vdd->vp_reg.vpconfig_errorgain),
+ &vp_debug_fops);
+ (void) debugfs_create_file("vp_smpswaittimemin", S_IRUGO | S_IWUGO,
+ vdd_debug,
+ &(vdd->vp_reg.vstepmin_smpswaittimemin),
+ &vp_debug_fops);
+ (void) debugfs_create_file("vp_stepmin", S_IRUGO | S_IWUGO, vdd_debug,
+ &(vdd->vp_reg.vstepmin_stepmin),
+ &vp_debug_fops);
+ (void) debugfs_create_file("vp_smpswaittimemax", S_IRUGO | S_IWUGO,
+ vdd_debug,
+ &(vdd->vp_reg.vstepmax_smpswaittimemax),
+ &vp_debug_fops);
+ (void) debugfs_create_file("vp_stepmax", S_IRUGO | S_IWUGO, vdd_debug,
+ &(vdd->vp_reg.vstepmax_stepmax),
+ &vp_debug_fops);
+ (void) debugfs_create_file("vp_vddmax", S_IRUGO | S_IWUGO, vdd_debug,
+ &(vdd->vp_reg.vlimitto_vddmax),
+ &vp_debug_fops);
+ (void) debugfs_create_file("vp_vddmin", S_IRUGO | S_IWUGO, vdd_debug,
+ &(vdd->vp_reg.vlimitto_vddmin),
+ &vp_debug_fops);
+ (void) debugfs_create_file("vp_timeout", S_IRUGO | S_IWUGO, vdd_debug,
+ &(vdd->vp_reg.vlimitto_timeout),
+ &vp_debug_fops);
+ (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd_debug,
+ (void *) vdd, &vp_volt_debug_fops);
+ (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, vdd_debug,
+ (void *) vdd, &nom_volt_debug_fops);
+}
+
static void __init init_voltagecontroller(void)
{
if (cpu_is_omap34xx())
@@ -524,8 +662,11 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd,
vc_cmdval |= (target_vsel << vc_cmd_on_shift);
voltage_write_reg(vdd->cmdval_reg, vc_cmdval);
- /* Setting vp errorgain based on the voltage */
- if (volt_data) {
+ /*
+ * Setting vp errorgain based on the voltage. If the debug option is
+ * enabled allow the override of errorgain from user side
+ */
+ if (!enable_sr_vp_debug && volt_data) {
vp_errgain_val = voltage_read_reg(vdd->vp_offs.vpconfig);
vdd->vp_reg.vpconfig_errorgain = volt_data->vp_errgain;
vp_errgain_val &= ~vdd->vp_reg.vpconfig_errorgain_mask;
@@ -630,8 +771,11 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
vc_cmdval |= (target_vsel << vc_cmd_on_shift);
voltage_write_reg(vdd->cmdval_reg, vc_cmdval);
- /* Getting vp errorgain based on the voltage */
- if (volt_data)
+ /*
+ * Getting vp errorgain based on the voltage. If the debug option is
+ * enabled allow the override of errorgain from user side.
+ */
+ if (!enable_sr_vp_debug && volt_data)
vdd->vp_reg.vpconfig_errorgain =
volt_data->vp_errgain;
@@ -806,6 +950,37 @@ void omap_vp_enable(struct voltagedomain *voltdm)
if (!voltscale_vpforceupdate)
vp_latch_vsel(vdd);
+ /*
+ * If debug is enabled, it is likely that the following parameters
+ * were set from user space so rewrite them.
+ */
+ if (enable_sr_vp_debug) {
+ vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
+ vpconfig |= (vdd->vp_reg.vpconfig_errorgain <<
+ vdd->vp_reg.vpconfig_errorgain_shift);
+ voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
+
+ voltage_write_reg(vdd->vp_offs.vstepmin,
+ (vdd->vp_reg.vstepmin_smpswaittimemin <<
+ vdd->vp_reg.vstepmin_smpswaittimemin_shift) |
+ (vdd->vp_reg.vstepmin_stepmin <<
+ vdd->vp_reg.vstepmin_stepmin_shift));
+
+ voltage_write_reg(vdd->vp_offs.vstepmax,
+ (vdd->vp_reg.vstepmax_smpswaittimemax <<
+ vdd->vp_reg.vstepmax_smpswaittimemax_shift) |
+ (vdd->vp_reg.vstepmax_stepmax <<
+ vdd->vp_reg.vstepmax_stepmax_shift));
+
+ voltage_write_reg(vdd->vp_offs.vlimitto,
+ (vdd->vp_reg.vlimitto_vddmax <<
+ vdd->vp_reg.vlimitto_vddmax_shift) |
+ (vdd->vp_reg.vlimitto_vddmin <<
+ vdd->vp_reg.vlimitto_vddmin_shift) |
+ (vdd->vp_reg.vlimitto_timeout <<
+ vdd->vp_reg.vlimitto_timeout_shift));
+ }
+
/* Enable VP */
vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
voltage_write_reg(vdd->vp_offs.vpconfig,
@@ -1107,6 +1282,7 @@ static int __init omap_voltage_init(void)
return 0;
}
+
init_voltagecontroller();
for (i = 0; i < nr_scalable_vdd; i++) {
vdd_data_configure(&vdd_info[i]);
@@ -1115,3 +1291,29 @@ static int __init omap_voltage_init(void)
return 0;
}
core_initcall(omap_voltage_init);
+
+static int __init omap_voltage_debugfs_init(void)
+{
+ int i;
+
+ /*
+ * If pm debug main directory is not created,
+ * do not create rest of the debugfs entries.
+ */
+ if (!pm_dbg_main_dir)
+ return 0;
+
+ voltage_dir = debugfs_create_dir("voltage", pm_dbg_main_dir);
+ if (IS_ERR(voltage_dir)) {
+ pr_err("%s: Unable to create voltage debugfs main dir\n",
+ __func__);
+ return 0;
+ }
+
+ for (i = 0; i < nr_scalable_vdd; i++)
+ vdd_debugfs_init(&vdd_info[i]);
+
+ return 0;
+}
+
+late_initcall(omap_voltage_debugfs_init);
diff --git a/arch/arm/plat-omap/include/plat/smartreflex.h b/arch/arm/plat-omap/include/plat/smartreflex.h
index 1ad03ea..4ee548d 100644
--- a/arch/arm/plat-omap/include/plat/smartreflex.h
+++ b/arch/arm/plat-omap/include/plat/smartreflex.h
@@ -24,7 +24,6 @@
#include <plat/voltage.h>
#ifdef CONFIG_PM_DEBUG
-extern struct dentry *pm_dbg_main_dir;
extern struct dentry *sr_dbg_dir;
#endif
diff --git a/arch/arm/plat-omap/include/plat/voltage.h b/arch/arm/plat-omap/include/plat/voltage.h
index 99836a1..8978d33 100644
--- a/arch/arm/plat-omap/include/plat/voltage.h
+++ b/arch/arm/plat-omap/include/plat/voltage.h
@@ -14,6 +14,11 @@
#ifndef __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
#define __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
+extern u32 enable_sr_vp_debug;
+#ifdef CONFIG_PM_DEBUG
+extern struct dentry *pm_dbg_main_dir;
+#endif
+
#define VOLTSCALE_VPFORCEUPDATE 1
#define VOLTSCALE_VCBYPASS 2
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
2010-09-22 14:45 ` [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers Thara Gopinath
@ 2010-09-29 23:20 ` Kevin Hilman
2010-09-30 5:58 ` Gopinath, Thara
2010-10-14 19:20 ` Kevin Hilman
` (2 subsequent siblings)
3 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-09-29 23:20 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Thara Gopinath <thara@ti.com> writes:
[...]
> diff --git a/arch/arm/plat-omap/include/plat/voltage.h b/arch/arm/plat-omap/include/plat/voltage.h
> index 99836a1..8978d33 100644
> --- a/arch/arm/plat-omap/include/plat/voltage.h
> +++ b/arch/arm/plat-omap/include/plat/voltage.h
> @@ -14,6 +14,11 @@
> #ifndef __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
> #define __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
>
> +extern u32 enable_sr_vp_debug;
> +#ifdef CONFIG_PM_DEBUG
> +extern struct dentry *pm_dbg_main_dir;
> +#endif
> +
> #define VOLTSCALE_VPFORCEUPDATE 1
> #define VOLTSCALE_VCBYPASS 2
This belongs in PATCH 1/11 and belongs in pm.h, not voltage.h as it's a
feature of the PM debug layer, not the voltage layer.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
2010-09-29 23:20 ` Kevin Hilman
@ 2010-09-30 5:58 ` Gopinath, Thara
0 siblings, 0 replies; 56+ messages in thread
From: Gopinath, Thara @ 2010-09-30 5:58 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>Sent: Thursday, September 30, 2010 4:50 AM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and
>>Smartreflex drivers
>>
>>Thara Gopinath <thara@ti.com> writes:
>>
>>[...]
>>
>>> diff --git a/arch/arm/plat-omap/include/plat/voltage.h b/arch/arm/plat-
>>omap/include/plat/voltage.h
>>> index 99836a1..8978d33 100644
>>> --- a/arch/arm/plat-omap/include/plat/voltage.h
>>> +++ b/arch/arm/plat-omap/include/plat/voltage.h
>>> @@ -14,6 +14,11 @@
>>> #ifndef __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
>>> #define __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
>>>
>>> +extern u32 enable_sr_vp_debug;
>>> +#ifdef CONFIG_PM_DEBUG
>>> +extern struct dentry *pm_dbg_main_dir;
>>> +#endif
>>> +
>>> #define VOLTSCALE_VPFORCEUPDATE 1
>>> #define VOLTSCALE_VCBYPASS 2
>>
>>This belongs in PATCH 1/11 and belongs in pm.h, not voltage.h as it's a
>>feature of the PM debug layer, not the voltage layer.
Yes indeed!! Will fix this in v4
Regards
Thara
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
2010-09-22 14:45 ` [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers Thara Gopinath
2010-09-29 23:20 ` Kevin Hilman
@ 2010-10-14 19:20 ` Kevin Hilman
2010-10-22 14:47 ` Gopinath, Thara
2010-10-14 23:46 ` Kevin Hilman
2010-10-25 9:28 ` Cousson, Benoit
3 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-10-14 19:20 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
On Wed, 2010-09-22 at 20:15 +0530, Thara Gopinath wrote:
> --- a/arch/arm/mach-omap2/smartreflex.c
> +++ b/arch/arm/mach-omap2/smartreflex.c
> @@ -558,8 +558,13 @@ int sr_enable(struct voltagedomain *voltdm,
> unsigned long volt)
> return -ENODATA;
> }
>
> - /* errminlimit is opp dependent and hence linked to voltage */
> - sr->err_minlimit = volt_data->sr_errminlimit;
> + /*
> + * errminlimit is opp dependent and hence linked to voltage
> + * if the debug option is enabled, the user might have over
> ridden
> + * this parameter so do not get it from voltage table
> + */
this comment needs better punctuation to be clearer
> + if (!enable_sr_vp_debug)
> + sr->err_minlimit = volt_data->sr_errminlimit;
Rather than checking if debug is enabled, you should create a flag
specific to whether this value was overwritten by the user, and use that
flag instead.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* RE: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
2010-10-14 19:20 ` Kevin Hilman
@ 2010-10-22 14:47 ` Gopinath, Thara
0 siblings, 0 replies; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-22 14:47 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
>>owner@vger.kernel.org] On Behalf Of Kevin Hilman
>>Sent: Friday, October 15, 2010 12:51 AM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and
>>Smartreflex drivers
>>
>>On Wed, 2010-09-22 at 20:15 +0530, Thara Gopinath wrote:
>>> --- a/arch/arm/mach-omap2/smartreflex.c
>>> +++ b/arch/arm/mach-omap2/smartreflex.c
>>> @@ -558,8 +558,13 @@ int sr_enable(struct voltagedomain *voltdm,
>>> unsigned long volt)
>>> return -ENODATA;
>>> }
>>>
>>> - /* errminlimit is opp dependent and hence linked to voltage */
>>> - sr->err_minlimit = volt_data->sr_errminlimit;
>>> + /*
>>> + * errminlimit is opp dependent and hence linked to voltage
>>> + * if the debug option is enabled, the user might have over
>>> ridden
>>> + * this parameter so do not get it from voltage table
>>> + */
>>
>>this comment needs better punctuation to be clearer
Will do
>>
>>> + if (!enable_sr_vp_debug)
>>> + sr->err_minlimit = volt_data->sr_errminlimit;
>>
>>Rather than checking if debug is enabled, you should create a flag
>>specific to whether this value was overwritten by the user, and use that
>>flag instead.
mmm.. See my comment regarding flag and enable_sr_vp_debug in the other patch
Regards
Thara
>>
>>Kevin
>>
>>
>>--
>>To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>>the body of a message to majordomo@vger.kernel.org
>>More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
2010-09-22 14:45 ` [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers Thara Gopinath
2010-09-29 23:20 ` Kevin Hilman
2010-10-14 19:20 ` Kevin Hilman
@ 2010-10-14 23:46 ` Kevin Hilman
2010-10-22 14:41 ` Gopinath, Thara
2010-10-25 9:28 ` Cousson, Benoit
3 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-10-14 23:46 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Thara Gopinath <thara@ti.com> writes:
> This patch adds debug support to the voltage and smartreflex drivers.
> This means a whole bunch of voltage processor and smartreflex
> parameters are now visible through the pm debugfs. By default
> only a read of these parameters are permitted. If you need to
> write into them then
> echo 1 > /pm_debug/enable_sr_vp_debug
Why a read-only interface by default? As a debug interface it seems
redundant to have to enable it.
> The voltage parameters can be viewed at
> /pm_debug/voltage/vdd_<x>/<parameter>
> and the smartreflex parameters can be viewed at
> /pm_debug/smartreflex/sr_<x>/<parameter>
>
> where <x> is mpu or core for OMAP3.
>
> Signed-off-by: Thara Gopinath <thara@ti.com>
> ---
> arch/arm/mach-omap2/pm-debug.c | 15 ++
> arch/arm/mach-omap2/smartreflex.c | 40 +++++-
> arch/arm/mach-omap2/voltage.c | 210 ++++++++++++++++++++++++-
> arch/arm/plat-omap/include/plat/smartreflex.h | 1 -
> arch/arm/plat-omap/include/plat/voltage.h | 5 +
> 5 files changed, 264 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
> index 390f1c6..879efb2 100644
> --- a/arch/arm/mach-omap2/pm-debug.c
> +++ b/arch/arm/mach-omap2/pm-debug.c
> @@ -32,6 +32,7 @@
> #include <plat/powerdomain.h>
> #include <plat/clockdomain.h>
> #include <plat/dmtimer.h>
> +#include <plat/voltage.h>
>
> #include "prm.h"
> #include "cm.h"
> @@ -586,6 +587,18 @@ static int option_set(void *data, u64 val)
> omap3_pm_off_mode_enable(val);
> }
>
> + if (option == &enable_sr_vp_debug && val)
> + pr_notice("Beware that enabling this option will allow user "
> + "to override the system defined vp and sr parameters "
> + "All the updated parameters will take effect next "
> + "time smartreflex is enabled. Also this option "
> + "disables the automatic vp errorgain and sr errormin "
> + "limit changes as per the voltage. Users will have "
> + "to explicitly write values into the debug fs "
> + "entries corresponding to these if they want to see "
> + "them changing according to the VDD voltage\n");
> +
> +
> return 0;
> }
>
> @@ -642,6 +655,8 @@ static int __init pm_dbg_init(void)
> (void) debugfs_create_file("wakeup_timer_milliseconds",
> S_IRUGO | S_IWUGO, d, &wakeup_timer_milliseconds,
> &pm_dbg_option_fops);
> + (void) debugfs_create_file("enable_sr_vp_debug", S_IRUGO | S_IWUGO, d,
> + &enable_sr_vp_debug, &pm_dbg_option_fops);
>
> pm_dbg_main_dir = d;
> pm_dbg_init_done = 1;
> diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
> index 7fc3138..b5a7878 100644
> --- a/arch/arm/mach-omap2/smartreflex.c
> +++ b/arch/arm/mach-omap2/smartreflex.c
> @@ -558,8 +558,13 @@ int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
> return -ENODATA;
> }
>
> - /* errminlimit is opp dependent and hence linked to voltage */
> - sr->err_minlimit = volt_data->sr_errminlimit;
> + /*
> + * errminlimit is opp dependent and hence linked to voltage
> + * if the debug option is enabled, the user might have over ridden
> + * this parameter so do not get it from voltage table
> + */
> + if (!enable_sr_vp_debug)
> + sr->err_minlimit = volt_data->sr_errminlimit;
>
> /* Enable the clocks */
> if (!sr->sr_enable) {
> @@ -811,9 +816,34 @@ static int omap_sr_autocomp_store(void *data, u64 val)
> return 0;
> }
>
> +static int omap_sr_params_show(void *data, u64 *val)
> +{
> + u32 *param = data;
> +
> + *val = *param;
> + return 0;
> +}
> +
> +static int omap_sr_params_store(void *data, u64 val)
> +{
> + if (enable_sr_vp_debug) {
> + u32 *option = data;
insert blank line
> + *option = val;
> + } else {
> + pr_notice("%s: DEBUG option not enabled!\n \
you don't need a '\' to continue strings onto new lines. Just end the
string, and start another on the next line, as you've done elsewhere in
the patch.
> + echo 1 > pm_debug/enable_sr_vp_debug - to enable\n",
> + __func__);
> + }
> +
> + return 0;
> +}
> +
> DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
> omap_sr_autocomp_store, "%llu\n");
>
> +DEFINE_SIMPLE_ATTRIBUTE(sr_params_fops, omap_sr_params_show,
> + omap_sr_params_store, "%llu\n");
> +
> static int __init omap_smartreflex_probe(struct platform_device *pdev)
> {
> struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
> @@ -907,6 +937,12 @@ static int __init omap_smartreflex_probe(struct platform_device *pdev)
>
> (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir,
> (void *)sr_info, &pm_sr_fops);
> + (void) debugfs_create_file("errweight", S_IRUGO | S_IWUGO, dbg_dir,
> + &sr_info->err_weight, &sr_params_fops);
> + (void) debugfs_create_file("errmaxlimit", S_IRUGO | S_IWUGO, dbg_dir,
> + &sr_info->err_maxlimit, &sr_params_fops);
> + (void) debugfs_create_file("errminlimit", S_IRUGO | S_IWUGO, dbg_dir,
> + &sr_info->err_minlimit, &sr_params_fops);
>
> return ret;
>
> diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
> index 49013cb..70a645e 100644
> --- a/arch/arm/mach-omap2/voltage.c
> +++ b/arch/arm/mach-omap2/voltage.c
> @@ -22,15 +22,22 @@
> #include <linux/io.h>
> #include <linux/clk.h>
> #include <linux/err.h>
> +#include <linux/debugfs.h>
> +#include <linux/slab.h>
>
> #include <plat/common.h>
> #include <plat/voltage.h>
>
> #include "prm-regbits-34xx.h"
> +#include "pm.h"
>
> #define VP_IDLE_TIMEOUT 200
> #define VP_TRANXDONE_TIMEOUT 300
> +#define VOLTAGE_DIR_SIZE 16
>
> +static struct dentry *voltage_dir;
> +/* VP SR debug support */
> +u32 enable_sr_vp_debug;
> /* PRM voltage module */
> static u32 volt_mod;
>
> @@ -221,6 +228,82 @@ static inline void voltage_write_reg(u8 offset, u32 value)
> prm_write_mod_reg(value, volt_mod, offset);
> }
>
> +/* Voltage debugfs support */
> +static int vp_debug_get(void *data, u64 *val)
> +{
> + u16 *option = data;
> +
> + if (!option) {
> + pr_warning("Wrong paramater passed\n");
> + return -EINVAL;
> + }
> +
> + *val = *option;
> +
> + return 0;
> +}
> +
> +static int vp_debug_set(void *data, u64 val)
> +{
> + if (enable_sr_vp_debug) {
> + u32 *option = data;
> +
> + if (!option) {
> + pr_warning("Wrong paramater passed\n");
> + return -EINVAL;
> + }
> +
> + *option = val;
> + } else {
> + pr_notice("DEBUG option not enabled!"
> + "echo 1 > pm_debug/enable_sr_vp_debug - to enable\n");
> + }
> +
> + return 0;
> +}
> +
> +static int vp_volt_debug_get(void *data, u64 *val)
> +{
> + struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
> + u8 vsel;
> +
> + if (!vdd) {
> + pr_warning("Wrong paramater passed\n");
> + return -EINVAL;
> + }
> +
> + vsel = voltage_read_reg(vdd->vp_offs.voltage);
> + pr_notice("curr_vsel = %x\n", vsel);
> +
> + if (!volt_pmic_info.vsel_to_uv) {
> + pr_warning("PMIC function to convert vsel to voltage"
> + "in uV not registerd\n");
> + return -EINVAL;
> + }
> +
> + *val = volt_pmic_info.vsel_to_uv(vsel);
> + return 0;
> +}
> +
> +static int nom_volt_debug_get(void *data, u64 *val)
> +{
> + struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
> +
> + if (!vdd) {
> + pr_warning("Wrong paramater passed\n");
> + return -EINVAL;
> + }
> +
> + *val = omap_voltage_get_nom_volt(&vdd->voltdm);
> +
> + return 0;
> +}
> +
> +DEFINE_SIMPLE_ATTRIBUTE(vp_debug_fops, vp_debug_get, vp_debug_set, "%llu\n");
> +DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n");
> +DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL,
> + "%llu\n");
> +
> static void vp_latch_vsel(struct omap_vdd_info *vdd)
> {
> u32 vpconfig;
> @@ -457,6 +540,61 @@ static void __init vdd_data_configure(struct omap_vdd_info *vdd)
> omap3_vdd_data_configure(vdd);
> }
>
> +static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
> +{
> + struct dentry *vdd_debug;
> + char *name;
> +
> + name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL);
> + if (!name) {
> + pr_warning("%s: Unable to allocate memry for debugfs"
> + "directory name for vdd_%s",
> + __func__, vdd->voltdm.name);
> + return;
> + }
> + strcpy(name, "vdd_");
> + strcat(name, vdd->voltdm.name);
> +
> + vdd_debug = debugfs_create_dir(name, voltage_dir);
> + if (IS_ERR(vdd_debug)) {
> + pr_warning("%s: Unable to create debugfs directory for"
> + "vdd_%s\n", __func__, vdd->voltdm.name);
> + return;
> + }
> +
> + (void) debugfs_create_file("vp_errorgain", S_IRUGO | S_IWUGO,
> + vdd_debug,
> + &(vdd->vp_reg.vpconfig_errorgain),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_smpswaittimemin", S_IRUGO | S_IWUGO,
> + vdd_debug,
> + &(vdd->vp_reg.vstepmin_smpswaittimemin),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_stepmin", S_IRUGO | S_IWUGO, vdd_debug,
> + &(vdd->vp_reg.vstepmin_stepmin),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_smpswaittimemax", S_IRUGO | S_IWUGO,
> + vdd_debug,
> + &(vdd->vp_reg.vstepmax_smpswaittimemax),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_stepmax", S_IRUGO | S_IWUGO, vdd_debug,
> + &(vdd->vp_reg.vstepmax_stepmax),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_vddmax", S_IRUGO | S_IWUGO, vdd_debug,
> + &(vdd->vp_reg.vlimitto_vddmax),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_vddmin", S_IRUGO | S_IWUGO, vdd_debug,
> + &(vdd->vp_reg.vlimitto_vddmin),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_timeout", S_IRUGO | S_IWUGO, vdd_debug,
> + &(vdd->vp_reg.vlimitto_timeout),
> + &vp_debug_fops);
> + (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd_debug,
> + (void *) vdd, &vp_volt_debug_fops);
> + (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, vdd_debug,
> + (void *) vdd, &nom_volt_debug_fops);
> +}
> +
> static void __init init_voltagecontroller(void)
> {
> if (cpu_is_omap34xx())
> @@ -524,8 +662,11 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd,
> vc_cmdval |= (target_vsel << vc_cmd_on_shift);
> voltage_write_reg(vdd->cmdval_reg, vc_cmdval);
>
> - /* Setting vp errorgain based on the voltage */
> - if (volt_data) {
> + /*
> + * Setting vp errorgain based on the voltage. If the debug option is
> + * enabled allow the override of errorgain from user side
> + */
> + if (!enable_sr_vp_debug && volt_data) {
Doesn't this happen before the debugfs interface is ready?
> vp_errgain_val = voltage_read_reg(vdd->vp_offs.vpconfig);
> vdd->vp_reg.vpconfig_errorgain = volt_data->vp_errgain;
> vp_errgain_val &= ~vdd->vp_reg.vpconfig_errorgain_mask;
> @@ -630,8 +771,11 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
> vc_cmdval |= (target_vsel << vc_cmd_on_shift);
> voltage_write_reg(vdd->cmdval_reg, vc_cmdval);
>
> - /* Getting vp errorgain based on the voltage */
> - if (volt_data)
> + /*
> + * Getting vp errorgain based on the voltage. If the debug option is
> + * enabled allow the override of errorgain from user side.
> + */
As suggested in earlier comment, please use a specific flag that this
has been overridden instead of the 'debug enabled' flag (which should
disappear, IMO)
> + if (!enable_sr_vp_debug && volt_data)
> vdd->vp_reg.vpconfig_errorgain =
> volt_data->vp_errgain;
>
> @@ -806,6 +950,37 @@ void omap_vp_enable(struct voltagedomain *voltdm)
> if (!voltscale_vpforceupdate)
> vp_latch_vsel(vdd);
>
> + /*
> + * If debug is enabled, it is likely that the following parameters
> + * were set from user space so rewrite them.
> + */
Again, use some sort of override flag, not just the debug enabled flag.
> + if (enable_sr_vp_debug) {
> + vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
> + vpconfig |= (vdd->vp_reg.vpconfig_errorgain <<
> + vdd->vp_reg.vpconfig_errorgain_shift);
> + voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
> +
> + voltage_write_reg(vdd->vp_offs.vstepmin,
> + (vdd->vp_reg.vstepmin_smpswaittimemin <<
> + vdd->vp_reg.vstepmin_smpswaittimemin_shift) |
> + (vdd->vp_reg.vstepmin_stepmin <<
> + vdd->vp_reg.vstepmin_stepmin_shift));
> +
> + voltage_write_reg(vdd->vp_offs.vstepmax,
> + (vdd->vp_reg.vstepmax_smpswaittimemax <<
> + vdd->vp_reg.vstepmax_smpswaittimemax_shift) |
> + (vdd->vp_reg.vstepmax_stepmax <<
> + vdd->vp_reg.vstepmax_stepmax_shift));
> +
> + voltage_write_reg(vdd->vp_offs.vlimitto,
> + (vdd->vp_reg.vlimitto_vddmax <<
> + vdd->vp_reg.vlimitto_vddmax_shift) |
> + (vdd->vp_reg.vlimitto_vddmin <<
> + vdd->vp_reg.vlimitto_vddmin_shift) |
> + (vdd->vp_reg.vlimitto_timeout <<
> + vdd->vp_reg.vlimitto_timeout_shift));
> + }
> +
> /* Enable VP */
> vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
> voltage_write_reg(vdd->vp_offs.vpconfig,
> @@ -1107,6 +1282,7 @@ static int __init omap_voltage_init(void)
> return 0;
> }
>
> +
stray whitespace change
> init_voltagecontroller();
> for (i = 0; i < nr_scalable_vdd; i++) {
> vdd_data_configure(&vdd_info[i]);
> @@ -1115,3 +1291,29 @@ static int __init omap_voltage_init(void)
> return 0;
> }
> core_initcall(omap_voltage_init);
> +
> +static int __init omap_voltage_debugfs_init(void)
> +{
> + int i;
> +
> + /*
> + * If pm debug main directory is not created,
> + * do not create rest of the debugfs entries.
> + */
> + if (!pm_dbg_main_dir)
> + return 0;
> +
> + voltage_dir = debugfs_create_dir("voltage", pm_dbg_main_dir);
> + if (IS_ERR(voltage_dir)) {
> + pr_err("%s: Unable to create voltage debugfs main dir\n",
> + __func__);
> + return 0;
> + }
> +
> + for (i = 0; i < nr_scalable_vdd; i++)
> + vdd_debugfs_init(&vdd_info[i]);
> +
> + return 0;
> +}
> +
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
2010-10-14 23:46 ` Kevin Hilman
@ 2010-10-22 14:41 ` Gopinath, Thara
2010-10-22 16:52 ` Kevin Hilman
0 siblings, 1 reply; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-22 14:41 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>Sent: Friday, October 15, 2010 5:16 AM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and
>>Smartreflex drivers
>>
>>Thara Gopinath <thara@ti.com> writes:
>>
>>> This patch adds debug support to the voltage and smartreflex drivers.
>>> This means a whole bunch of voltage processor and smartreflex
>>> parameters are now visible through the pm debugfs. By default
>>> only a read of these parameters are permitted. If you need to
>>> write into them then
>>> echo 1 > /pm_debug/enable_sr_vp_debug
>>
>>Why a read-only interface by default? As a debug interface it seems
>>redundant to have to enable it.
Read-only interface by default so that we can read these values from user space even if we do not want to manipulate it from user-side.
>>
>>> The voltage parameters can be viewed at
>>> /pm_debug/voltage/vdd_<x>/<parameter>
>>> and the smartreflex parameters can be viewed at
>>> /pm_debug/smartreflex/sr_<x>/<parameter>
>>>
>>> where <x> is mpu or core for OMAP3.
>>>
>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>> ---
>>> arch/arm/mach-omap2/pm-debug.c | 15 ++
>>> arch/arm/mach-omap2/smartreflex.c | 40 +++++-
>>> arch/arm/mach-omap2/voltage.c | 210
>>++++++++++++++++++++++++-
>>> arch/arm/plat-omap/include/plat/smartreflex.h | 1 -
>>> arch/arm/plat-omap/include/plat/voltage.h | 5 +
>>> 5 files changed, 264 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-
>>debug.c
>>> index 390f1c6..879efb2 100644
>>> --- a/arch/arm/mach-omap2/pm-debug.c
>>> +++ b/arch/arm/mach-omap2/pm-debug.c
>>> @@ -32,6 +32,7 @@
>>> #include <plat/powerdomain.h>
>>> #include <plat/clockdomain.h>
>>> #include <plat/dmtimer.h>
>>> +#include <plat/voltage.h>
>>>
>>> #include "prm.h"
>>> #include "cm.h"
>>> @@ -586,6 +587,18 @@ static int option_set(void *data, u64 val)
>>> omap3_pm_off_mode_enable(val);
>>> }
>>>
>>> + if (option == &enable_sr_vp_debug && val)
>>> + pr_notice("Beware that enabling this option will allow user "
>>> + "to override the system defined vp and sr parameters "
>>> + "All the updated parameters will take effect next "
>>> + "time smartreflex is enabled. Also this option "
>>> + "disables the automatic vp errorgain and sr errormin "
>>> + "limit changes as per the voltage. Users will have "
>>> + "to explicitly write values into the debug fs "
>>> + "entries corresponding to these if they want to see "
>>> + "them changing according to the VDD voltage\n");
>>> +
>>> +
>>> return 0;
>>> }
>>>
>>> @@ -642,6 +655,8 @@ static int __init pm_dbg_init(void)
>>> (void) debugfs_create_file("wakeup_timer_milliseconds",
>>> S_IRUGO | S_IWUGO, d, &wakeup_timer_milliseconds,
>>> &pm_dbg_option_fops);
>>> + (void) debugfs_create_file("enable_sr_vp_debug", S_IRUGO | S_IWUGO, d,
>>> + &enable_sr_vp_debug, &pm_dbg_option_fops);
>>>
>>> pm_dbg_main_dir = d;
>>> pm_dbg_init_done = 1;
>>> diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-
>>omap2/smartreflex.c
>>> index 7fc3138..b5a7878 100644
>>> --- a/arch/arm/mach-omap2/smartreflex.c
>>> +++ b/arch/arm/mach-omap2/smartreflex.c
>>> @@ -558,8 +558,13 @@ int sr_enable(struct voltagedomain *voltdm, unsigned
>>long volt)
>>> return -ENODATA;
>>> }
>>>
>>> - /* errminlimit is opp dependent and hence linked to voltage */
>>> - sr->err_minlimit = volt_data->sr_errminlimit;
>>> + /*
>>> + * errminlimit is opp dependent and hence linked to voltage
>>> + * if the debug option is enabled, the user might have over ridden
>>> + * this parameter so do not get it from voltage table
>>> + */
>>> + if (!enable_sr_vp_debug)
>>> + sr->err_minlimit = volt_data->sr_errminlimit;
>>>
>>> /* Enable the clocks */
>>> if (!sr->sr_enable) {
>>> @@ -811,9 +816,34 @@ static int omap_sr_autocomp_store(void *data, u64 val)
>>> return 0;
>>> }
>>>
>>> +static int omap_sr_params_show(void *data, u64 *val)
>>> +{
>>> + u32 *param = data;
>>> +
>>> + *val = *param;
>>> + return 0;
>>> +}
>>> +
>>> +static int omap_sr_params_store(void *data, u64 val)
>>> +{
>>> + if (enable_sr_vp_debug) {
>>> + u32 *option = data;
>>
>>insert blank line
Will do
>>
>>> + *option = val;
>>> + } else {
>>> + pr_notice("%s: DEBUG option not enabled!\n \
>>
>>you don't need a '\' to continue strings onto new lines. Just end the
>>string, and start another on the next line, as you've done elsewhere in
>>the patch.
Will correct
>>
>>> + echo 1 > pm_debug/enable_sr_vp_debug - to enable\n",
>>> + __func__);
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +
>>> DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
>>> omap_sr_autocomp_store, "%llu\n");
>>>
>>> +DEFINE_SIMPLE_ATTRIBUTE(sr_params_fops, omap_sr_params_show,
>>> + omap_sr_params_store, "%llu\n");
>>> +
>>> static int __init omap_smartreflex_probe(struct platform_device *pdev)
>>> {
>>> struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
>>> @@ -907,6 +937,12 @@ static int __init omap_smartreflex_probe(struct
>>platform_device *pdev)
>>>
>>> (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir,
>>> (void *)sr_info, &pm_sr_fops);
>>> + (void) debugfs_create_file("errweight", S_IRUGO | S_IWUGO, dbg_dir,
>>> + &sr_info->err_weight, &sr_params_fops);
>>> + (void) debugfs_create_file("errmaxlimit", S_IRUGO | S_IWUGO, dbg_dir,
>>> + &sr_info->err_maxlimit, &sr_params_fops);
>>> + (void) debugfs_create_file("errminlimit", S_IRUGO | S_IWUGO, dbg_dir,
>>> + &sr_info->err_minlimit, &sr_params_fops);
>>>
>>> return ret;
>>>
>>> diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
>>> index 49013cb..70a645e 100644
>>> --- a/arch/arm/mach-omap2/voltage.c
>>> +++ b/arch/arm/mach-omap2/voltage.c
>>> @@ -22,15 +22,22 @@
>>> #include <linux/io.h>
>>> #include <linux/clk.h>
>>> #include <linux/err.h>
>>> +#include <linux/debugfs.h>
>>> +#include <linux/slab.h>
>>>
>>> #include <plat/common.h>
>>> #include <plat/voltage.h>
>>>
>>> #include "prm-regbits-34xx.h"
>>> +#include "pm.h"
>>>
>>> #define VP_IDLE_TIMEOUT 200
>>> #define VP_TRANXDONE_TIMEOUT 300
>>> +#define VOLTAGE_DIR_SIZE 16
>>>
>>> +static struct dentry *voltage_dir;
>>> +/* VP SR debug support */
>>> +u32 enable_sr_vp_debug;
>>> /* PRM voltage module */
>>> static u32 volt_mod;
>>>
>>> @@ -221,6 +228,82 @@ static inline void voltage_write_reg(u8 offset, u32
>>value)
>>> prm_write_mod_reg(value, volt_mod, offset);
>>> }
>>>
>>> +/* Voltage debugfs support */
>>> +static int vp_debug_get(void *data, u64 *val)
>>> +{
>>> + u16 *option = data;
>>> +
>>> + if (!option) {
>>> + pr_warning("Wrong paramater passed\n");
>>> + return -EINVAL;
>>> + }
>>> +
>>> + *val = *option;
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static int vp_debug_set(void *data, u64 val)
>>> +{
>>> + if (enable_sr_vp_debug) {
>>> + u32 *option = data;
>>> +
>>> + if (!option) {
>>> + pr_warning("Wrong paramater passed\n");
>>> + return -EINVAL;
>>> + }
>>> +
>>> + *option = val;
>>> + } else {
>>> + pr_notice("DEBUG option not enabled!"
>>> + "echo 1 > pm_debug/enable_sr_vp_debug - to enable\n");
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static int vp_volt_debug_get(void *data, u64 *val)
>>> +{
>>> + struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
>>> + u8 vsel;
>>> +
>>> + if (!vdd) {
>>> + pr_warning("Wrong paramater passed\n");
>>> + return -EINVAL;
>>> + }
>>> +
>>> + vsel = voltage_read_reg(vdd->vp_offs.voltage);
>>> + pr_notice("curr_vsel = %x\n", vsel);
>>> +
>>> + if (!volt_pmic_info.vsel_to_uv) {
>>> + pr_warning("PMIC function to convert vsel to voltage"
>>> + "in uV not registerd\n");
>>> + return -EINVAL;
>>> + }
>>> +
>>> + *val = volt_pmic_info.vsel_to_uv(vsel);
>>> + return 0;
>>> +}
>>> +
>>> +static int nom_volt_debug_get(void *data, u64 *val)
>>> +{
>>> + struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
>>> +
>>> + if (!vdd) {
>>> + pr_warning("Wrong paramater passed\n");
>>> + return -EINVAL;
>>> + }
>>> +
>>> + *val = omap_voltage_get_nom_volt(&vdd->voltdm);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +DEFINE_SIMPLE_ATTRIBUTE(vp_debug_fops, vp_debug_get, vp_debug_set,
>>"%llu\n");
>>> +DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL,
>>"%llu\n");
>>> +DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL,
>>> + "%llu\n");
>>> +
>>> static void vp_latch_vsel(struct omap_vdd_info *vdd)
>>> {
>>> u32 vpconfig;
>>> @@ -457,6 +540,61 @@ static void __init vdd_data_configure(struct
>>omap_vdd_info *vdd)
>>> omap3_vdd_data_configure(vdd);
>>> }
>>>
>>> +static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
>>> +{
>>> + struct dentry *vdd_debug;
>>> + char *name;
>>> +
>>> + name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL);
>>> + if (!name) {
>>> + pr_warning("%s: Unable to allocate memry for debugfs"
>>> + "directory name for vdd_%s",
>>> + __func__, vdd->voltdm.name);
>>> + return;
>>> + }
>>> + strcpy(name, "vdd_");
>>> + strcat(name, vdd->voltdm.name);
>>> +
>>> + vdd_debug = debugfs_create_dir(name, voltage_dir);
>>> + if (IS_ERR(vdd_debug)) {
>>> + pr_warning("%s: Unable to create debugfs directory for"
>>> + "vdd_%s\n", __func__, vdd->voltdm.name);
>>> + return;
>>> + }
>>> +
>>> + (void) debugfs_create_file("vp_errorgain", S_IRUGO | S_IWUGO,
>>> + vdd_debug,
>>> + &(vdd->vp_reg.vpconfig_errorgain),
>>> + &vp_debug_fops);
>>> + (void) debugfs_create_file("vp_smpswaittimemin", S_IRUGO | S_IWUGO,
>>> + vdd_debug,
>>> + &(vdd->vp_reg.vstepmin_smpswaittimemin),
>>> + &vp_debug_fops);
>>> + (void) debugfs_create_file("vp_stepmin", S_IRUGO | S_IWUGO, vdd_debug,
>>> + &(vdd->vp_reg.vstepmin_stepmin),
>>> + &vp_debug_fops);
>>> + (void) debugfs_create_file("vp_smpswaittimemax", S_IRUGO | S_IWUGO,
>>> + vdd_debug,
>>> + &(vdd->vp_reg.vstepmax_smpswaittimemax),
>>> + &vp_debug_fops);
>>> + (void) debugfs_create_file("vp_stepmax", S_IRUGO | S_IWUGO, vdd_debug,
>>> + &(vdd->vp_reg.vstepmax_stepmax),
>>> + &vp_debug_fops);
>>> + (void) debugfs_create_file("vp_vddmax", S_IRUGO | S_IWUGO, vdd_debug,
>>> + &(vdd->vp_reg.vlimitto_vddmax),
>>> + &vp_debug_fops);
>>> + (void) debugfs_create_file("vp_vddmin", S_IRUGO | S_IWUGO, vdd_debug,
>>> + &(vdd->vp_reg.vlimitto_vddmin),
>>> + &vp_debug_fops);
>>> + (void) debugfs_create_file("vp_timeout", S_IRUGO | S_IWUGO, vdd_debug,
>>> + &(vdd->vp_reg.vlimitto_timeout),
>>> + &vp_debug_fops);
>>> + (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd_debug,
>>> + (void *) vdd, &vp_volt_debug_fops);
>>> + (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, vdd_debug,
>>> + (void *) vdd, &nom_volt_debug_fops);
>>> +}
>>> +
>>> static void __init init_voltagecontroller(void)
>>> {
>>> if (cpu_is_omap34xx())
>>> @@ -524,8 +662,11 @@ static int vc_bypass_scale_voltage(struct
>>omap_vdd_info *vdd,
>>> vc_cmdval |= (target_vsel << vc_cmd_on_shift);
>>> voltage_write_reg(vdd->cmdval_reg, vc_cmdval);
>>>
>>> - /* Setting vp errorgain based on the voltage */
>>> - if (volt_data) {
>>> + /*
>>> + * Setting vp errorgain based on the voltage. If the debug option is
>>> + * enabled allow the override of errorgain from user side
>>> + */
>>> + if (!enable_sr_vp_debug && volt_data) {
>>
>>Doesn't this happen before the debugfs interface is ready?
Nope it will not. This is the voltage scaling API
>>
>>> vp_errgain_val = voltage_read_reg(vdd->vp_offs.vpconfig);
>>> vdd->vp_reg.vpconfig_errorgain = volt_data->vp_errgain;
>>> vp_errgain_val &= ~vdd->vp_reg.vpconfig_errorgain_mask;
>>> @@ -630,8 +771,11 @@ static int vp_forceupdate_scale_voltage(struct
>>omap_vdd_info *vdd,
>>> vc_cmdval |= (target_vsel << vc_cmd_on_shift);
>>> voltage_write_reg(vdd->cmdval_reg, vc_cmdval);
>>>
>>> - /* Getting vp errorgain based on the voltage */
>>> - if (volt_data)
>>> + /*
>>> + * Getting vp errorgain based on the voltage. If the debug option is
>>> + * enabled allow the override of errorgain from user side.
>>> + */
>>
>>As suggested in earlier comment, please use a specific flag that this
>>has been overridden instead of the 'debug enabled' flag (which should
>>disappear, IMO)
What do you mean by a separate flag. You want a flag to be maintained for just this purpose ?
>>
>>> + if (!enable_sr_vp_debug && volt_data)
>>> vdd->vp_reg.vpconfig_errorgain =
>>> volt_data->vp_errgain;
>>>
>>> @@ -806,6 +950,37 @@ void omap_vp_enable(struct voltagedomain *voltdm)
>>> if (!voltscale_vpforceupdate)
>>> vp_latch_vsel(vdd);
>>>
>>> + /*
>>> + * If debug is enabled, it is likely that the following parameters
>>> + * were set from user space so rewrite them.
>>> + */
>>
>>Again, use some sort of override flag, not just the debug enabled flag.
>>
>>> + if (enable_sr_vp_debug) {
>>> + vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
>>> + vpconfig |= (vdd->vp_reg.vpconfig_errorgain <<
>>> + vdd->vp_reg.vpconfig_errorgain_shift);
>>> + voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
>>> +
>>> + voltage_write_reg(vdd->vp_offs.vstepmin,
>>> + (vdd->vp_reg.vstepmin_smpswaittimemin <<
>>> + vdd->vp_reg.vstepmin_smpswaittimemin_shift) |
>>> + (vdd->vp_reg.vstepmin_stepmin <<
>>> + vdd->vp_reg.vstepmin_stepmin_shift));
>>> +
>>> + voltage_write_reg(vdd->vp_offs.vstepmax,
>>> + (vdd->vp_reg.vstepmax_smpswaittimemax <<
>>> + vdd->vp_reg.vstepmax_smpswaittimemax_shift) |
>>> + (vdd->vp_reg.vstepmax_stepmax <<
>>> + vdd->vp_reg.vstepmax_stepmax_shift));
>>> +
>>> + voltage_write_reg(vdd->vp_offs.vlimitto,
>>> + (vdd->vp_reg.vlimitto_vddmax <<
>>> + vdd->vp_reg.vlimitto_vddmax_shift) |
>>> + (vdd->vp_reg.vlimitto_vddmin <<
>>> + vdd->vp_reg.vlimitto_vddmin_shift) |
>>> + (vdd->vp_reg.vlimitto_timeout <<
>>> + vdd->vp_reg.vlimitto_timeout_shift));
>>> + }
>>> +
>>> /* Enable VP */
>>> vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
>>> voltage_write_reg(vdd->vp_offs.vpconfig,
>>> @@ -1107,6 +1282,7 @@ static int __init omap_voltage_init(void)
>>> return 0;
>>> }
>>>
>>> +
>>
>>stray whitespace change
Will correct
>>
>>> init_voltagecontroller();
>>> for (i = 0; i < nr_scalable_vdd; i++) {
>>> vdd_data_configure(&vdd_info[i]);
>>> @@ -1115,3 +1291,29 @@ static int __init omap_voltage_init(void)
>>> return 0;
>>> }
>>> core_initcall(omap_voltage_init);
>>> +
>>> +static int __init omap_voltage_debugfs_init(void)
>>> +{
>>> + int i;
>>> +
>>> + /*
>>> + * If pm debug main directory is not created,
>>> + * do not create rest of the debugfs entries.
>>> + */
>>> + if (!pm_dbg_main_dir)
>>> + return 0;
>>> +
>>> + voltage_dir = debugfs_create_dir("voltage", pm_dbg_main_dir);
>>> + if (IS_ERR(voltage_dir)) {
>>> + pr_err("%s: Unable to create voltage debugfs main dir\n",
>>> + __func__);
>>> + return 0;
>>> + }
>>> +
>>> + for (i = 0; i < nr_scalable_vdd; i++)
>>> + vdd_debugfs_init(&vdd_info[i]);
>>> +
>>> + return 0;
>>> +}
>>> +
>>
>>Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
2010-10-22 14:41 ` Gopinath, Thara
@ 2010-10-22 16:52 ` Kevin Hilman
2010-10-25 9:00 ` Gopinath, Thara
0 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-10-22 16:52 UTC (permalink / raw)
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
"Gopinath, Thara" <thara@ti.com> writes:
>>>Thara Gopinath <thara@ti.com> writes:
>>>
>>>> This patch adds debug support to the voltage and smartreflex drivers.
>>>> This means a whole bunch of voltage processor and smartreflex
>>>> parameters are now visible through the pm debugfs. By default
>>>> only a read of these parameters are permitted. If you need to
>>>> write into them then
>>>> echo 1 > /pm_debug/enable_sr_vp_debug
>>>
>>>Why a read-only interface by default? As a debug interface it seems
>>>redundant to have to enable it.
>>>
>
> Read-only interface by default so that we can read these values from
> user space even if we do not want to manipulate it from user-side.
>
If we do not want to manipulate it from the user-side, then simply don't
write to it. Remember, this is a debug interface, not a primary
interface.
I think the enable_sr_vp_debug flag should disappear, and it should be a
read/write interface.
If the values are changed via debugfs, then set some per-SR instance
flag that can be checked.
Basically, the current code is confusing because you're using the the
flag called 'enable' to determine whether the user *might have* written
the values.
[...]
>>>> + /*
>>>> + * Getting vp errorgain based on the voltage. If the debug option is
>>>> + * enabled allow the override of errorgain from user side.
>>>> + */
>>>
>>>As suggested in earlier comment, please use a specific flag that this
>>>has been overridden instead of the 'debug enabled' flag (which should
>>>disappear, IMO)
>
> What do you mean by a separate flag. You want a flag to be maintained
> for just this purpose ?
Yes. I want a flag to be maintained *specifically* for this purpose,
instead of using a much more general flag that only means a user *might*
have overridden the values, use one that specifically means a user *has*
overridden the values.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* RE: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
2010-10-22 16:52 ` Kevin Hilman
@ 2010-10-25 9:00 ` Gopinath, Thara
2010-10-25 16:19 ` Kevin Hilman
0 siblings, 1 reply; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-25 9:00 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>Sent: Friday, October 22, 2010 10:22 PM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and
>>Smartreflex drivers
>>
>>"Gopinath, Thara" <thara@ti.com> writes:
>>
>>>>>Thara Gopinath <thara@ti.com> writes:
>>>>>
>>>>>> This patch adds debug support to the voltage and smartreflex drivers.
>>>>>> This means a whole bunch of voltage processor and smartreflex
>>>>>> parameters are now visible through the pm debugfs. By default
>>>>>> only a read of these parameters are permitted. If you need to
>>>>>> write into them then
>>>>>> echo 1 > /pm_debug/enable_sr_vp_debug
>>>>>
>>>>>Why a read-only interface by default? As a debug interface it seems
>>>>>redundant to have to enable it.
>>>>>
>>>
>>> Read-only interface by default so that we can read these values from
>>> user space even if we do not want to manipulate it from user-side.
>>>
>>
>>If we do not want to manipulate it from the user-side, then simply don't
>>write to it. Remember, this is a debug interface, not a primary
>>interface.
>>
>>I think the enable_sr_vp_debug flag should disappear, and it should be a
>>read/write interface.
>>
>>If the values are changed via debugfs, then set some per-SR instance
>>flag that can be checked.
>>
>>Basically, the current code is confusing because you're using the the
>>flag called 'enable' to determine whether the user *might have* written
>>the values.
>>
>>[...]
>>
>>>>>> + /*
>>>>>> + * Getting vp errorgain based on the voltage. If the debug option
>>is
>>>>>> + * enabled allow the override of errorgain from user side.
>>>>>> + */
>>>>>
>>>>>As suggested in earlier comment, please use a specific flag that this
>>>>>has been overridden instead of the 'debug enabled' flag (which should
>>>>>disappear, IMO)
>>>
>>> What do you mean by a separate flag. You want a flag to be maintained
>>> for just this purpose ?
>>
>>Yes. I want a flag to be maintained *specifically* for this purpose,
>>instead of using a much more general flag that only means a user *might*
>>have overridden the values, use one that specifically means a user *has*
>>overridden the values.
Hello Kevin,
I tried this. Couple of questions/concerns I have.
1. If you take a look at the definition of these debugfs parameters, the omap_vdd_info struct is not passed as an argument. The actual variables are the parameters. I am not sure how to extract omap_vdd_info from this. Maybe container_of will help, but then it will be clumsy. Same concern for smartreflex err_minlimit variable. There is no way to get the sr instance except use container of which I am not sure will work or not
2.Also in voltage layer we export out eight parameters tat can be over-ridden from the user side. I do not think we should be maintaining one flag per variable. The design will be too very clumsy.
Regards
Thara
>>
>>Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
2010-10-25 9:00 ` Gopinath, Thara
@ 2010-10-25 16:19 ` Kevin Hilman
0 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2010-10-25 16:19 UTC (permalink / raw)
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
"Gopinath, Thara" <thara@ti.com> writes:
>>>-----Original Message-----
>>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>>Sent: Friday, October 22, 2010 10:22 PM
>>>To: Gopinath, Thara
>>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>>Vishwanath; Sawant, Anand
>>>Subject: Re: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and
>>>Smartreflex drivers
>>>
>>>"Gopinath, Thara" <thara@ti.com> writes:
>>>
>>>>>>Thara Gopinath <thara@ti.com> writes:
>>>>>>
>>>>>>> This patch adds debug support to the voltage and smartreflex drivers.
>>>>>>> This means a whole bunch of voltage processor and smartreflex
>>>>>>> parameters are now visible through the pm debugfs. By default
>>>>>>> only a read of these parameters are permitted. If you need to
>>>>>>> write into them then
>>>>>>> echo 1 > /pm_debug/enable_sr_vp_debug
>>>>>>
>>>>>>Why a read-only interface by default? As a debug interface it seems
>>>>>>redundant to have to enable it.
>>>>>>
>>>>
>>>> Read-only interface by default so that we can read these values from
>>>> user space even if we do not want to manipulate it from user-side.
>>>>
>>>
>>>If we do not want to manipulate it from the user-side, then simply don't
>>>write to it. Remember, this is a debug interface, not a primary
>>>interface.
>>>
>>>I think the enable_sr_vp_debug flag should disappear, and it should be a
>>>read/write interface.
>>>
>>>If the values are changed via debugfs, then set some per-SR instance
>>>flag that can be checked.
>>>
>>>Basically, the current code is confusing because you're using the the
>>>flag called 'enable' to determine whether the user *might have* written
>>>the values.
>>>
>>>[...]
>>>
>>>>>>> + /*
>>>>>>> + * Getting vp errorgain based on the voltage. If the debug option
>>>is
>>>>>>> + * enabled allow the override of errorgain from user side.
>>>>>>> + */
>>>>>>
>>>>>>As suggested in earlier comment, please use a specific flag that this
>>>>>>has been overridden instead of the 'debug enabled' flag (which should
>>>>>>disappear, IMO)
>>>>
>>>> What do you mean by a separate flag. You want a flag to be maintained
>>>> for just this purpose ?
>>>
>>>Yes. I want a flag to be maintained *specifically* for this purpose,
>>>instead of using a much more general flag that only means a user *might*
>>>have overridden the values, use one that specifically means a user *has*
>>>overridden the values.
>
> Hello Kevin,
>
> I tried this. Couple of questions/concerns I have.
> 1. If you take a look at the definition of these debugfs parameters, the omap_vdd_info struct is not passed as an argument. The actual variables are the parameters. I am not sure how to extract omap_vdd_info from this. Maybe container_of will help, but then it will be clumsy. Same concern for smartreflex err_minlimit variable. There is no way to get the sr instance except use container of which I am not sure will work or not
> 2.Also in voltage layer we export out eight parameters tat can be over-ridden from the user side. I do not think we should be maintaining one flag per variable. The design will be too very clumsy.
I didn't mean to suggest one flag per varialble. Just one flag to
indicate that the user *has* overridden the defaults.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
2010-09-22 14:45 ` [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers Thara Gopinath
` (2 preceding siblings ...)
2010-10-14 23:46 ` Kevin Hilman
@ 2010-10-25 9:28 ` Cousson, Benoit
3 siblings, 0 replies; 56+ messages in thread
From: Cousson, Benoit @ 2010-10-25 9:28 UTC (permalink / raw)
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org, khilman@deeprootsystems.com,
paul@pwsan.com, Sripathy, Vishwanath, Sawant, Anand
Hi Thara,
On 9/22/2010 4:45 PM, Gopinath, Thara wrote:
> This patch adds debug support to the voltage and smartreflex drivers.
> This means a whole bunch of voltage processor and smartreflex
> parameters are now visible through the pm debugfs. By default
> only a read of these parameters are permitted. If you need to
> write into them then
> echo 1> /pm_debug/enable_sr_vp_debug
>
> The voltage parameters can be viewed at
> /pm_debug/voltage/vdd_<x>/<parameter>
> and the smartreflex parameters can be viewed at
> /pm_debug/smartreflex/sr_<x>/<parameter>
Can we start getting rid of this pm_debug miscellaneous directory?
Like powerdomain and clockdomain debug stuff, I think that voltage
domain layer deserve its own entry in the debugfs top level directory.
I do not see the need to add a extra level a directory for that.
Moreover smartreflex should be under voltage entry and not in the same
level as voltage.
/sys/kernel/debug/voltage/vdd_<x>/smartreflex/<parameter>
Regards,
Benoit
>
> where<x> is mpu or core for OMAP3.
>
> Signed-off-by: Thara Gopinath<thara@ti.com>
> ---
> arch/arm/mach-omap2/pm-debug.c | 15 ++
> arch/arm/mach-omap2/smartreflex.c | 40 +++++-
> arch/arm/mach-omap2/voltage.c | 210 ++++++++++++++++++++++++-
> arch/arm/plat-omap/include/plat/smartreflex.h | 1 -
> arch/arm/plat-omap/include/plat/voltage.h | 5 +
> 5 files changed, 264 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
> index 390f1c6..879efb2 100644
> --- a/arch/arm/mach-omap2/pm-debug.c
> +++ b/arch/arm/mach-omap2/pm-debug.c
> @@ -32,6 +32,7 @@
> #include<plat/powerdomain.h>
> #include<plat/clockdomain.h>
> #include<plat/dmtimer.h>
> +#include<plat/voltage.h>
>
> #include "prm.h"
> #include "cm.h"
> @@ -586,6 +587,18 @@ static int option_set(void *data, u64 val)
> omap3_pm_off_mode_enable(val);
> }
>
> + if (option ==&enable_sr_vp_debug&& val)
> + pr_notice("Beware that enabling this option will allow user "
> + "to override the system defined vp and sr parameters "
> + "All the updated parameters will take effect next "
> + "time smartreflex is enabled. Also this option "
> + "disables the automatic vp errorgain and sr errormin "
> + "limit changes as per the voltage. Users will have "
> + "to explicitly write values into the debug fs "
> + "entries corresponding to these if they want to see "
> + "them changing according to the VDD voltage\n");
> +
> +
> return 0;
> }
>
> @@ -642,6 +655,8 @@ static int __init pm_dbg_init(void)
> (void) debugfs_create_file("wakeup_timer_milliseconds",
> S_IRUGO | S_IWUGO, d,&wakeup_timer_milliseconds,
> &pm_dbg_option_fops);
> + (void) debugfs_create_file("enable_sr_vp_debug", S_IRUGO | S_IWUGO, d,
> + &enable_sr_vp_debug,&pm_dbg_option_fops);
>
> pm_dbg_main_dir = d;
> pm_dbg_init_done = 1;
> diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
> index 7fc3138..b5a7878 100644
> --- a/arch/arm/mach-omap2/smartreflex.c
> +++ b/arch/arm/mach-omap2/smartreflex.c
> @@ -558,8 +558,13 @@ int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
> return -ENODATA;
> }
>
> - /* errminlimit is opp dependent and hence linked to voltage */
> - sr->err_minlimit = volt_data->sr_errminlimit;
> + /*
> + * errminlimit is opp dependent and hence linked to voltage
> + * if the debug option is enabled, the user might have over ridden
> + * this parameter so do not get it from voltage table
> + */
> + if (!enable_sr_vp_debug)
> + sr->err_minlimit = volt_data->sr_errminlimit;
>
> /* Enable the clocks */
> if (!sr->sr_enable) {
> @@ -811,9 +816,34 @@ static int omap_sr_autocomp_store(void *data, u64 val)
> return 0;
> }
>
> +static int omap_sr_params_show(void *data, u64 *val)
> +{
> + u32 *param = data;
> +
> + *val = *param;
> + return 0;
> +}
> +
> +static int omap_sr_params_store(void *data, u64 val)
> +{
> + if (enable_sr_vp_debug) {
> + u32 *option = data;
> + *option = val;
> + } else {
> + pr_notice("%s: DEBUG option not enabled!\n \
> + echo 1> pm_debug/enable_sr_vp_debug - to enable\n",
> + __func__);
> + }
> +
> + return 0;
> +}
> +
> DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
> omap_sr_autocomp_store, "%llu\n");
>
> +DEFINE_SIMPLE_ATTRIBUTE(sr_params_fops, omap_sr_params_show,
> + omap_sr_params_store, "%llu\n");
> +
> static int __init omap_smartreflex_probe(struct platform_device *pdev)
> {
> struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
> @@ -907,6 +937,12 @@ static int __init omap_smartreflex_probe(struct platform_device *pdev)
>
> (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir,
> (void *)sr_info,&pm_sr_fops);
> + (void) debugfs_create_file("errweight", S_IRUGO | S_IWUGO, dbg_dir,
> + &sr_info->err_weight,&sr_params_fops);
> + (void) debugfs_create_file("errmaxlimit", S_IRUGO | S_IWUGO, dbg_dir,
> + &sr_info->err_maxlimit,&sr_params_fops);
> + (void) debugfs_create_file("errminlimit", S_IRUGO | S_IWUGO, dbg_dir,
> + &sr_info->err_minlimit,&sr_params_fops);
>
> return ret;
>
> diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
> index 49013cb..70a645e 100644
> --- a/arch/arm/mach-omap2/voltage.c
> +++ b/arch/arm/mach-omap2/voltage.c
> @@ -22,15 +22,22 @@
> #include<linux/io.h>
> #include<linux/clk.h>
> #include<linux/err.h>
> +#include<linux/debugfs.h>
> +#include<linux/slab.h>
>
> #include<plat/common.h>
> #include<plat/voltage.h>
>
> #include "prm-regbits-34xx.h"
> +#include "pm.h"
>
> #define VP_IDLE_TIMEOUT 200
> #define VP_TRANXDONE_TIMEOUT 300
> +#define VOLTAGE_DIR_SIZE 16
>
> +static struct dentry *voltage_dir;
> +/* VP SR debug support */
> +u32 enable_sr_vp_debug;
> /* PRM voltage module */
> static u32 volt_mod;
>
> @@ -221,6 +228,82 @@ static inline void voltage_write_reg(u8 offset, u32 value)
> prm_write_mod_reg(value, volt_mod, offset);
> }
>
> +/* Voltage debugfs support */
> +static int vp_debug_get(void *data, u64 *val)
> +{
> + u16 *option = data;
> +
> + if (!option) {
> + pr_warning("Wrong paramater passed\n");
> + return -EINVAL;
> + }
> +
> + *val = *option;
> +
> + return 0;
> +}
> +
> +static int vp_debug_set(void *data, u64 val)
> +{
> + if (enable_sr_vp_debug) {
> + u32 *option = data;
> +
> + if (!option) {
> + pr_warning("Wrong paramater passed\n");
> + return -EINVAL;
> + }
> +
> + *option = val;
> + } else {
> + pr_notice("DEBUG option not enabled!"
> + "echo 1> pm_debug/enable_sr_vp_debug - to enable\n");
> + }
> +
> + return 0;
> +}
> +
> +static int vp_volt_debug_get(void *data, u64 *val)
> +{
> + struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
> + u8 vsel;
> +
> + if (!vdd) {
> + pr_warning("Wrong paramater passed\n");
> + return -EINVAL;
> + }
> +
> + vsel = voltage_read_reg(vdd->vp_offs.voltage);
> + pr_notice("curr_vsel = %x\n", vsel);
> +
> + if (!volt_pmic_info.vsel_to_uv) {
> + pr_warning("PMIC function to convert vsel to voltage"
> + "in uV not registerd\n");
> + return -EINVAL;
> + }
> +
> + *val = volt_pmic_info.vsel_to_uv(vsel);
> + return 0;
> +}
> +
> +static int nom_volt_debug_get(void *data, u64 *val)
> +{
> + struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
> +
> + if (!vdd) {
> + pr_warning("Wrong paramater passed\n");
> + return -EINVAL;
> + }
> +
> + *val = omap_voltage_get_nom_volt(&vdd->voltdm);
> +
> + return 0;
> +}
> +
> +DEFINE_SIMPLE_ATTRIBUTE(vp_debug_fops, vp_debug_get, vp_debug_set, "%llu\n");
> +DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n");
> +DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL,
> + "%llu\n");
> +
> static void vp_latch_vsel(struct omap_vdd_info *vdd)
> {
> u32 vpconfig;
> @@ -457,6 +540,61 @@ static void __init vdd_data_configure(struct omap_vdd_info *vdd)
> omap3_vdd_data_configure(vdd);
> }
>
> +static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
> +{
> + struct dentry *vdd_debug;
> + char *name;
> +
> + name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL);
> + if (!name) {
> + pr_warning("%s: Unable to allocate memry for debugfs"
> + "directory name for vdd_%s",
> + __func__, vdd->voltdm.name);
> + return;
> + }
> + strcpy(name, "vdd_");
> + strcat(name, vdd->voltdm.name);
> +
> + vdd_debug = debugfs_create_dir(name, voltage_dir);
> + if (IS_ERR(vdd_debug)) {
> + pr_warning("%s: Unable to create debugfs directory for"
> + "vdd_%s\n", __func__, vdd->voltdm.name);
> + return;
> + }
> +
> + (void) debugfs_create_file("vp_errorgain", S_IRUGO | S_IWUGO,
> + vdd_debug,
> + &(vdd->vp_reg.vpconfig_errorgain),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_smpswaittimemin", S_IRUGO | S_IWUGO,
> + vdd_debug,
> + &(vdd->vp_reg.vstepmin_smpswaittimemin),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_stepmin", S_IRUGO | S_IWUGO, vdd_debug,
> + &(vdd->vp_reg.vstepmin_stepmin),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_smpswaittimemax", S_IRUGO | S_IWUGO,
> + vdd_debug,
> + &(vdd->vp_reg.vstepmax_smpswaittimemax),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_stepmax", S_IRUGO | S_IWUGO, vdd_debug,
> + &(vdd->vp_reg.vstepmax_stepmax),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_vddmax", S_IRUGO | S_IWUGO, vdd_debug,
> + &(vdd->vp_reg.vlimitto_vddmax),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_vddmin", S_IRUGO | S_IWUGO, vdd_debug,
> + &(vdd->vp_reg.vlimitto_vddmin),
> + &vp_debug_fops);
> + (void) debugfs_create_file("vp_timeout", S_IRUGO | S_IWUGO, vdd_debug,
> + &(vdd->vp_reg.vlimitto_timeout),
> + &vp_debug_fops);
> + (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd_debug,
> + (void *) vdd,&vp_volt_debug_fops);
> + (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, vdd_debug,
> + (void *) vdd,&nom_volt_debug_fops);
> +}
> +
> static void __init init_voltagecontroller(void)
> {
> if (cpu_is_omap34xx())
> @@ -524,8 +662,11 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd,
> vc_cmdval |= (target_vsel<< vc_cmd_on_shift);
> voltage_write_reg(vdd->cmdval_reg, vc_cmdval);
>
> - /* Setting vp errorgain based on the voltage */
> - if (volt_data) {
> + /*
> + * Setting vp errorgain based on the voltage. If the debug option is
> + * enabled allow the override of errorgain from user side
> + */
> + if (!enable_sr_vp_debug&& volt_data) {
> vp_errgain_val = voltage_read_reg(vdd->vp_offs.vpconfig);
> vdd->vp_reg.vpconfig_errorgain = volt_data->vp_errgain;
> vp_errgain_val&= ~vdd->vp_reg.vpconfig_errorgain_mask;
> @@ -630,8 +771,11 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
> vc_cmdval |= (target_vsel<< vc_cmd_on_shift);
> voltage_write_reg(vdd->cmdval_reg, vc_cmdval);
>
> - /* Getting vp errorgain based on the voltage */
> - if (volt_data)
> + /*
> + * Getting vp errorgain based on the voltage. If the debug option is
> + * enabled allow the override of errorgain from user side.
> + */
> + if (!enable_sr_vp_debug&& volt_data)
> vdd->vp_reg.vpconfig_errorgain =
> volt_data->vp_errgain;
>
> @@ -806,6 +950,37 @@ void omap_vp_enable(struct voltagedomain *voltdm)
> if (!voltscale_vpforceupdate)
> vp_latch_vsel(vdd);
>
> + /*
> + * If debug is enabled, it is likely that the following parameters
> + * were set from user space so rewrite them.
> + */
> + if (enable_sr_vp_debug) {
> + vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
> + vpconfig |= (vdd->vp_reg.vpconfig_errorgain<<
> + vdd->vp_reg.vpconfig_errorgain_shift);
> + voltage_write_reg(vdd->vp_offs.vpconfig, vpconfig);
> +
> + voltage_write_reg(vdd->vp_offs.vstepmin,
> + (vdd->vp_reg.vstepmin_smpswaittimemin<<
> + vdd->vp_reg.vstepmin_smpswaittimemin_shift) |
> + (vdd->vp_reg.vstepmin_stepmin<<
> + vdd->vp_reg.vstepmin_stepmin_shift));
> +
> + voltage_write_reg(vdd->vp_offs.vstepmax,
> + (vdd->vp_reg.vstepmax_smpswaittimemax<<
> + vdd->vp_reg.vstepmax_smpswaittimemax_shift) |
> + (vdd->vp_reg.vstepmax_stepmax<<
> + vdd->vp_reg.vstepmax_stepmax_shift));
> +
> + voltage_write_reg(vdd->vp_offs.vlimitto,
> + (vdd->vp_reg.vlimitto_vddmax<<
> + vdd->vp_reg.vlimitto_vddmax_shift) |
> + (vdd->vp_reg.vlimitto_vddmin<<
> + vdd->vp_reg.vlimitto_vddmin_shift) |
> + (vdd->vp_reg.vlimitto_timeout<<
> + vdd->vp_reg.vlimitto_timeout_shift));
> + }
> +
> /* Enable VP */
> vpconfig = voltage_read_reg(vdd->vp_offs.vpconfig);
> voltage_write_reg(vdd->vp_offs.vpconfig,
> @@ -1107,6 +1282,7 @@ static int __init omap_voltage_init(void)
> return 0;
> }
>
> +
> init_voltagecontroller();
> for (i = 0; i< nr_scalable_vdd; i++) {
> vdd_data_configure(&vdd_info[i]);
> @@ -1115,3 +1291,29 @@ static int __init omap_voltage_init(void)
> return 0;
> }
> core_initcall(omap_voltage_init);
> +
> +static int __init omap_voltage_debugfs_init(void)
> +{
> + int i;
> +
> + /*
> + * If pm debug main directory is not created,
> + * do not create rest of the debugfs entries.
> + */
> + if (!pm_dbg_main_dir)
> + return 0;
> +
> + voltage_dir = debugfs_create_dir("voltage", pm_dbg_main_dir);
> + if (IS_ERR(voltage_dir)) {
> + pr_err("%s: Unable to create voltage debugfs main dir\n",
> + __func__);
> + return 0;
> + }
> +
> + for (i = 0; i< nr_scalable_vdd; i++)
> + vdd_debugfs_init(&vdd_info[i]);
> +
> + return 0;
> +}
> +
> +late_initcall(omap_voltage_debugfs_init);
> diff --git a/arch/arm/plat-omap/include/plat/smartreflex.h b/arch/arm/plat-omap/include/plat/smartreflex.h
> index 1ad03ea..4ee548d 100644
> --- a/arch/arm/plat-omap/include/plat/smartreflex.h
> +++ b/arch/arm/plat-omap/include/plat/smartreflex.h
> @@ -24,7 +24,6 @@
> #include<plat/voltage.h>
>
> #ifdef CONFIG_PM_DEBUG
> -extern struct dentry *pm_dbg_main_dir;
> extern struct dentry *sr_dbg_dir;
> #endif
>
> diff --git a/arch/arm/plat-omap/include/plat/voltage.h b/arch/arm/plat-omap/include/plat/voltage.h
> index 99836a1..8978d33 100644
> --- a/arch/arm/plat-omap/include/plat/voltage.h
> +++ b/arch/arm/plat-omap/include/plat/voltage.h
> @@ -14,6 +14,11 @@
> #ifndef __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
> #define __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
>
> +extern u32 enable_sr_vp_debug;
> +#ifdef CONFIG_PM_DEBUG
> +extern struct dentry *pm_dbg_main_dir;
> +#endif
> +
> #define VOLTSCALE_VPFORCEUPDATE 1
> #define VOLTSCALE_VCBYPASS 2
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH v3 09/11] OMAP3: PM: Smartreflex Class3 initialization from board files.
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
` (7 preceding siblings ...)
2010-09-22 14:45 ` [PATCH v3 08/11] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers Thara Gopinath
@ 2010-09-22 14:45 ` Thara Gopinath
2010-10-14 23:50 ` Kevin Hilman
2010-09-22 14:45 ` [PATCH v3 10/11] OMAP3: PM: Program correct init voltages for VDD1 and VDD2 Thara Gopinath
` (2 subsequent siblings)
11 siblings, 1 reply; 56+ messages in thread
From: Thara Gopinath @ 2010-09-22 14:45 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
This patch enables smartreflex class3 functionality for OMAP3430SDP,
OMAP3630SDP, ZOOM2 and ZOOM3 boards.
Signed-off-by: Thara Gopinath <thara@ti.com>
---
arch/arm/mach-omap2/board-3430sdp.c | 2 ++
arch/arm/mach-omap2/board-zoom-peripherals.c | 2 ++
2 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 67b95b5f..9a04a2e 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -47,6 +47,7 @@
#include "sdram-qimonda-hyb18m512160af-6.h"
#include "hsmmc.h"
#include "pm.h"
+#include "smartreflex-class3.h"
#define CONFIG_DISABLE_HFCLK 1
@@ -813,6 +814,7 @@ static void __init omap_3430sdp_init(void)
sdp3430_display_init();
enable_board_wakeup_source();
usb_ehci_init(&ehci_pdata);
+ sr_class3_init();
}
MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 6b39849..98dffc6 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -26,6 +26,7 @@
#include "mux.h"
#include "hsmmc.h"
+#include "smartreflex-class3.h"
/* Zoom2 has Qwerty keyboard*/
static int board_keymap[] = {
@@ -282,4 +283,5 @@ void __init zoom_peripherals_init(void)
omap_i2c_init();
usb_musb_init(&musb_board_data);
enable_board_wakeup_source();
+ sr_class3_init();
}
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH v3 09/11] OMAP3: PM: Smartreflex Class3 initialization from board files.
2010-09-22 14:45 ` [PATCH v3 09/11] OMAP3: PM: Smartreflex Class3 initialization from board files Thara Gopinath
@ 2010-10-14 23:50 ` Kevin Hilman
2010-10-22 14:43 ` Gopinath, Thara
0 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-10-14 23:50 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Thara Gopinath <thara@ti.com> writes:
> This patch enables smartreflex class3 functionality for OMAP3430SDP,
> OMAP3630SDP, ZOOM2 and ZOOM3 boards.
This patch doesn't touch 3630sdp.
> Signed-off-by: Thara Gopinath <thara@ti.com>
I'm having some doubts about whether this should be done by board files or
not. Seems like the general case will be that by default will be SoC
specific, and only boards that want something other than the default
class should need to override this.
Thoughts?
Kevin
> ---
> arch/arm/mach-omap2/board-3430sdp.c | 2 ++
> arch/arm/mach-omap2/board-zoom-peripherals.c | 2 ++
> 2 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
> index 67b95b5f..9a04a2e 100644
> --- a/arch/arm/mach-omap2/board-3430sdp.c
> +++ b/arch/arm/mach-omap2/board-3430sdp.c
> @@ -47,6 +47,7 @@
> #include "sdram-qimonda-hyb18m512160af-6.h"
> #include "hsmmc.h"
> #include "pm.h"
> +#include "smartreflex-class3.h"
>
> #define CONFIG_DISABLE_HFCLK 1
>
> @@ -813,6 +814,7 @@ static void __init omap_3430sdp_init(void)
> sdp3430_display_init();
> enable_board_wakeup_source();
> usb_ehci_init(&ehci_pdata);
> + sr_class3_init();
> }
>
> MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
> diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
> index 6b39849..98dffc6 100644
> --- a/arch/arm/mach-omap2/board-zoom-peripherals.c
> +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
> @@ -26,6 +26,7 @@
>
> #include "mux.h"
> #include "hsmmc.h"
> +#include "smartreflex-class3.h"
>
> /* Zoom2 has Qwerty keyboard*/
> static int board_keymap[] = {
> @@ -282,4 +283,5 @@ void __init zoom_peripherals_init(void)
> omap_i2c_init();
> usb_musb_init(&musb_board_data);
> enable_board_wakeup_source();
> + sr_class3_init();
> }
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 09/11] OMAP3: PM: Smartreflex Class3 initialization from board files.
2010-10-14 23:50 ` Kevin Hilman
@ 2010-10-22 14:43 ` Gopinath, Thara
2010-10-22 16:37 ` Kevin Hilman
0 siblings, 1 reply; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-22 14:43 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>Sent: Friday, October 15, 2010 5:20 AM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 09/11] OMAP3: PM: Smartreflex Class3 initialization
>>from board files.
>>
>>Thara Gopinath <thara@ti.com> writes:
>>
>>> This patch enables smartreflex class3 functionality for OMAP3430SDP,
>>> OMAP3630SDP, ZOOM2 and ZOOM3 boards.
>>
>>This patch doesn't touch 3630sdp.
>>
>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>
>>I'm having some doubts about whether this should be done by board files or
>>not. Seems like the general case will be that by default will be SoC
>>specific, and only boards that want something other than the default
>>class should need to override this.
>>
>>Thoughts?
I agree. I wanted this to be a default initcall and one to enable the menuconfig option for the required class driver.. But Nishant wanted this from board files. If we have consensus in removing this init from board file, I am cool with it.
Regards
Thara
>>
>>Kevin
>>
>>> ---
>>> arch/arm/mach-omap2/board-3430sdp.c | 2 ++
>>> arch/arm/mach-omap2/board-zoom-peripherals.c | 2 ++
>>> 2 files changed, 4 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-
>>omap2/board-3430sdp.c
>>> index 67b95b5f..9a04a2e 100644
>>> --- a/arch/arm/mach-omap2/board-3430sdp.c
>>> +++ b/arch/arm/mach-omap2/board-3430sdp.c
>>> @@ -47,6 +47,7 @@
>>> #include "sdram-qimonda-hyb18m512160af-6.h"
>>> #include "hsmmc.h"
>>> #include "pm.h"
>>> +#include "smartreflex-class3.h"
>>>
>>> #define CONFIG_DISABLE_HFCLK 1
>>>
>>> @@ -813,6 +814,7 @@ static void __init omap_3430sdp_init(void)
>>> sdp3430_display_init();
>>> enable_board_wakeup_source();
>>> usb_ehci_init(&ehci_pdata);
>>> + sr_class3_init();
>>> }
>>>
>>> MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
>>> diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-
>>omap2/board-zoom-peripherals.c
>>> index 6b39849..98dffc6 100644
>>> --- a/arch/arm/mach-omap2/board-zoom-peripherals.c
>>> +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
>>> @@ -26,6 +26,7 @@
>>>
>>> #include "mux.h"
>>> #include "hsmmc.h"
>>> +#include "smartreflex-class3.h"
>>>
>>> /* Zoom2 has Qwerty keyboard*/
>>> static int board_keymap[] = {
>>> @@ -282,4 +283,5 @@ void __init zoom_peripherals_init(void)
>>> omap_i2c_init();
>>> usb_musb_init(&musb_board_data);
>>> enable_board_wakeup_source();
>>> + sr_class3_init();
>>> }
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH v3 09/11] OMAP3: PM: Smartreflex Class3 initialization from board files.
2010-10-22 14:43 ` Gopinath, Thara
@ 2010-10-22 16:37 ` Kevin Hilman
2010-10-25 9:16 ` Gopinath, Thara
0 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-10-22 16:37 UTC (permalink / raw)
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
"Gopinath, Thara" <thara@ti.com> writes:
>>>> This patch enables smartreflex class3 functionality for OMAP3430SDP,
>>>> OMAP3630SDP, ZOOM2 and ZOOM3 boards.
>>>
>>>This patch doesn't touch 3630sdp.
>>>
>>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>>
>>>I'm having some doubts about whether this should be done by board files or
>>>not. Seems like the general case will be that by default will be SoC
>>>specific, and only boards that want something other than the default
>>>class should need to override this.
>>>
>>>Thoughts?
>
> I agree. I wanted this to be a default initcall and one to enable the
> menuconfig option for the required class driver.. But Nishant wanted
> this from board files.
And I want both. :)
> If we have consensus in removing this init from board file, I am cool
> with it.
I want to suport a kernel that could be built with all possible classes
supported. e.g. an omap3/4 kernel that has both class 1.5 and class 3
support.
If both are enabled in Kconfig, then either could be used. We'll have
to pick one as the default initcall (e.g. highest class present), but if
a board file chooses to call a different one, that should override the
default one.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* RE: [PATCH v3 09/11] OMAP3: PM: Smartreflex Class3 initialization from board files.
2010-10-22 16:37 ` Kevin Hilman
@ 2010-10-25 9:16 ` Gopinath, Thara
0 siblings, 0 replies; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-25 9:16 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>Sent: Friday, October 22, 2010 10:08 PM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 09/11] OMAP3: PM: Smartreflex Class3 initialization
>>from board files.
>>
>>"Gopinath, Thara" <thara@ti.com> writes:
>>
>>>>>> This patch enables smartreflex class3 functionality for OMAP3430SDP,
>>>>>> OMAP3630SDP, ZOOM2 and ZOOM3 boards.
>>>>>
>>>>>This patch doesn't touch 3630sdp.
>>>>>
>>>>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>>>>
>>>>>I'm having some doubts about whether this should be done by board files or
>>>>>not. Seems like the general case will be that by default will be SoC
>>>>>specific, and only boards that want something other than the default
>>>>>class should need to override this.
>>>>>
>>>>>Thoughts?
>>>
>>> I agree. I wanted this to be a default initcall and one to enable the
>>> menuconfig option for the required class driver.. But Nishant wanted
>>> this from board files.
>>
>>And I want both. :)
>>
>>> If we have consensus in removing this init from board file, I am cool
>>> with it.
>>
>>I want to suport a kernel that could be built with all possible classes
>>supported. e.g. an omap3/4 kernel that has both class 1.5 and class 3
>>support.
>>
>>If both are enabled in Kconfig, then either could be used. We'll have
>>to pick one as the default initcall (e.g. highest class present), but if
>>a board file chooses to call a different one, that should override the
>>default one.
We can pick class 3 by default and make it a late_initcall. This way if the board files choose to call some other class init, that class ddriver would be registered. Smartreflex driver sr_register_class API will ensure that only one class is registered. The second registeration will fail. What say ??
Regards,
Thara
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH v3 10/11] OMAP3: PM: Program correct init voltages for VDD1 and VDD2
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
` (8 preceding siblings ...)
2010-09-22 14:45 ` [PATCH v3 09/11] OMAP3: PM: Smartreflex Class3 initialization from board files Thara Gopinath
@ 2010-09-22 14:45 ` Thara Gopinath
2010-10-14 23:53 ` Kevin Hilman
2010-09-22 14:45 ` [PATCH v3 11/11] OMAP3: PM: Register TWL4030 pmic info with the voltage driver Thara Gopinath
2010-09-29 0:31 ` [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Kevin Hilman
11 siblings, 1 reply; 56+ messages in thread
From: Thara Gopinath @ 2010-09-22 14:45 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
By default the system boots up at nominal voltage for every
voltage domain in the system. This patch puts VDD1 and VDD2
to the correct boot up voltage as per the opp tables specified.
This patch implements this by matching the rate of the main clock
of the voltage domain with the opp table and picking up the correct
voltage.
Signed-off-by: Thara Gopinath <thara@ti.com>
---
arch/arm/mach-omap2/pm.c | 67 +++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 66 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 71c5a77..86c7bf1 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -13,6 +13,7 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/err.h>
+#include <linux/clk.h>
#include <plat/omap-pm.h>
#include <plat/omap_device.h>
@@ -20,6 +21,7 @@
#include <plat/powerdomain.h>
#include <plat/clockdomain.h>
+#include <plat/voltage.h>
#include "pm.h"
@@ -138,12 +140,75 @@ err:
return ret;
}
+/*
+ * This is to be called during init to put the various voltage
+ * domains to the voltage as per the opp table. Typically we boot up
+ * at the nominal voltage. So this function finds out the rate of
+ * the clock associated with the voltage domain, finds out the correct
+ * opp entry and puts the voltage domain to the voltage specifies
+ * in the opp entry
+ */
+static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
+ struct device *dev)
+{
+ struct voltagedomain *voltdm;
+ struct clk *_clk;
+ struct omap_opp *opp;
+ unsigned long freq, bootup_volt;
+
+ if (!vdd_name || !clk_name || !dev) {
+ printk(KERN_ERR "%s: Invalid parameters!\n", __func__);
+ goto exit;
+ }
+
+ voltdm = omap_voltage_domain_get(vdd_name);
+ if (IS_ERR(voltdm)) {
+ printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n",
+ __func__, vdd_name);
+ goto exit;
+ }
+
+ _clk = clk_get(NULL, clk_name);
+ if (IS_ERR(_clk)) {
+ printk(KERN_ERR "%s: unable to get clk %s\n",
+ __func__, clk_name);
+ goto exit;
+ }
+
+ freq = _clk->rate;
+ opp = opp_find_freq_ceil(dev, &freq);
+ if (IS_ERR(opp)) {
+ printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n",
+ __func__, vdd_name);
+ goto exit;
+ }
+
+ bootup_volt = opp_get_voltage(opp);
+ if (!bootup_volt) {
+ printk(KERN_ERR "%s: unable to find voltage corresponding"
+ "to the bootup OPP for vdd_%s\n", __func__, vdd_name);
+ goto exit;
+ }
+
+ omap_voltage_scale_vdd(voltdm, bootup_volt);
+
+ return 0;
+
+exit:
+ printk(KERN_ERR "%s: Unable to put vdd_%s to its init voltage\n\n",
+ __func__, vdd_name);
+ return -EINVAL;
+}
+
static int __init omap2_common_pm_init(void)
{
omap2_init_processor_devices();
- if (cpu_is_omap34xx())
+ if (cpu_is_omap34xx()) {
omap3_pm_init_opp_table();
+ omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev);
+ omap2_set_init_voltage("core", "l3_ick", l3_dev);
+ }
omap_pm_if_init();
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH v3 10/11] OMAP3: PM: Program correct init voltages for VDD1 and VDD2
2010-09-22 14:45 ` [PATCH v3 10/11] OMAP3: PM: Program correct init voltages for VDD1 and VDD2 Thara Gopinath
@ 2010-10-14 23:53 ` Kevin Hilman
2010-10-22 14:44 ` Gopinath, Thara
0 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-10-14 23:53 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Thara Gopinath <thara@ti.com> writes:
> By default the system boots up at nominal voltage for every
> voltage domain in the system. This patch puts VDD1 and VDD2
> to the correct boot up voltage as per the opp tables specified.
> This patch implements this by matching the rate of the main clock
> of the voltage domain with the opp table and picking up the correct
> voltage.
>
> Signed-off-by: Thara Gopinath <thara@ti.com>
For de-coupling the init from OPP, I like this approach better. Thanks.
Minor comment below...
> ---
> arch/arm/mach-omap2/pm.c | 67 +++++++++++++++++++++++++++++++++++++++++++++-
> 1 files changed, 66 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
> index 71c5a77..86c7bf1 100644
> --- a/arch/arm/mach-omap2/pm.c
> +++ b/arch/arm/mach-omap2/pm.c
> @@ -13,6 +13,7 @@
> #include <linux/init.h>
> #include <linux/io.h>
> #include <linux/err.h>
> +#include <linux/clk.h>
>
> #include <plat/omap-pm.h>
> #include <plat/omap_device.h>
> @@ -20,6 +21,7 @@
>
> #include <plat/powerdomain.h>
> #include <plat/clockdomain.h>
> +#include <plat/voltage.h>
>
> #include "pm.h"
>
> @@ -138,12 +140,75 @@ err:
> return ret;
> }
>
> +/*
> + * This is to be called during init to put the various voltage
> + * domains to the voltage as per the opp table. Typically we boot up
> + * at the nominal voltage. So this function finds out the rate of
> + * the clock associated with the voltage domain, finds out the correct
> + * opp entry and puts the voltage domain to the voltage specifies
> + * in the opp entry
> + */
> +static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
> + struct device *dev)
> +{
> + struct voltagedomain *voltdm;
> + struct clk *_clk;
s/_clk/clk/
> + struct omap_opp *opp;
> + unsigned long freq, bootup_volt;
> +
> + if (!vdd_name || !clk_name || !dev) {
> + printk(KERN_ERR "%s: Invalid parameters!\n", __func__);
> + goto exit;
> + }
> +
> + voltdm = omap_voltage_domain_get(vdd_name);
> + if (IS_ERR(voltdm)) {
> + printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n",
> + __func__, vdd_name);
> + goto exit;
> + }
> +
> + _clk = clk_get(NULL, clk_name);
> + if (IS_ERR(_clk)) {
> + printk(KERN_ERR "%s: unable to get clk %s\n",
> + __func__, clk_name);
> + goto exit;
> + }
> +
> + freq = _clk->rate;
> + opp = opp_find_freq_ceil(dev, &freq);
> + if (IS_ERR(opp)) {
> + printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n",
> + __func__, vdd_name);
> + goto exit;
> + }
> +
> + bootup_volt = opp_get_voltage(opp);
> + if (!bootup_volt) {
> + printk(KERN_ERR "%s: unable to find voltage corresponding"
> + "to the bootup OPP for vdd_%s\n", __func__, vdd_name);
> + goto exit;
> + }
> +
> + omap_voltage_scale_vdd(voltdm, bootup_volt);
> +
> + return 0;
> +
> +exit:
> + printk(KERN_ERR "%s: Unable to put vdd_%s to its init voltage\n\n",
> + __func__, vdd_name);
> + return -EINVAL;
> +}
> +
> static int __init omap2_common_pm_init(void)
> {
> omap2_init_processor_devices();
>
> - if (cpu_is_omap34xx())
> + if (cpu_is_omap34xx()) {
> omap3_pm_init_opp_table();
> + omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev);
> + omap2_set_init_voltage("core", "l3_ick", l3_dev);
> + }
>
> omap_pm_if_init();
^ permalink raw reply [flat|nested] 56+ messages in thread* RE: [PATCH v3 10/11] OMAP3: PM: Program correct init voltages for VDD1 and VDD2
2010-10-14 23:53 ` Kevin Hilman
@ 2010-10-22 14:44 ` Gopinath, Thara
2010-10-22 16:44 ` Kevin Hilman
0 siblings, 1 reply; 56+ messages in thread
From: Gopinath, Thara @ 2010-10-22 14:44 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
>>-----Original Message-----
>>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>>Sent: Friday, October 15, 2010 5:23 AM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy,
>>Vishwanath; Sawant, Anand
>>Subject: Re: [PATCH v3 10/11] OMAP3: PM: Program correct init voltages for
>>VDD1 and VDD2
>>
>>Thara Gopinath <thara@ti.com> writes:
>>
>>> By default the system boots up at nominal voltage for every
>>> voltage domain in the system. This patch puts VDD1 and VDD2
>>> to the correct boot up voltage as per the opp tables specified.
>>> This patch implements this by matching the rate of the main clock
>>> of the voltage domain with the opp table and picking up the correct
>>> voltage.
>>>
>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>
>>For de-coupling the init from OPP, I like this approach better. Thanks.
Most welcome!!
>>
>>Minor comment below...
>>
>>> ---
>>> arch/arm/mach-omap2/pm.c | 67
>>+++++++++++++++++++++++++++++++++++++++++++++-
>>> 1 files changed, 66 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
>>> index 71c5a77..86c7bf1 100644
>>> --- a/arch/arm/mach-omap2/pm.c
>>> +++ b/arch/arm/mach-omap2/pm.c
>>> @@ -13,6 +13,7 @@
>>> #include <linux/init.h>
>>> #include <linux/io.h>
>>> #include <linux/err.h>
>>> +#include <linux/clk.h>
>>>
>>> #include <plat/omap-pm.h>
>>> #include <plat/omap_device.h>
>>> @@ -20,6 +21,7 @@
>>>
>>> #include <plat/powerdomain.h>
>>> #include <plat/clockdomain.h>
>>> +#include <plat/voltage.h>
>>>
>>> #include "pm.h"
>>>
>>> @@ -138,12 +140,75 @@ err:
>>> return ret;
>>> }
>>>
>>> +/*
>>> + * This is to be called during init to put the various voltage
>>> + * domains to the voltage as per the opp table. Typically we boot up
>>> + * at the nominal voltage. So this function finds out the rate of
>>> + * the clock associated with the voltage domain, finds out the correct
>>> + * opp entry and puts the voltage domain to the voltage specifies
>>> + * in the opp entry
>>> + */
>>> +static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
>>> + struct device *dev)
>>> +{
>>> + struct voltagedomain *voltdm;
>>> + struct clk *_clk;
>>
>>s/_clk/clk/
Will it not conflict with struct clk??
Regards
Thara
>>
>>> + struct omap_opp *opp;
>>> + unsigned long freq, bootup_volt;
>>> +
>>> + if (!vdd_name || !clk_name || !dev) {
>>> + printk(KERN_ERR "%s: Invalid parameters!\n", __func__);
>>> + goto exit;
>>> + }
>>> +
>>> + voltdm = omap_voltage_domain_get(vdd_name);
>>> + if (IS_ERR(voltdm)) {
>>> + printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n",
>>> + __func__, vdd_name);
>>> + goto exit;
>>> + }
>>> +
>>> + _clk = clk_get(NULL, clk_name);
>>> + if (IS_ERR(_clk)) {
>>> + printk(KERN_ERR "%s: unable to get clk %s\n",
>>> + __func__, clk_name);
>>> + goto exit;
>>> + }
>>> +
>>> + freq = _clk->rate;
>>> + opp = opp_find_freq_ceil(dev, &freq);
>>> + if (IS_ERR(opp)) {
>>> + printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n",
>>> + __func__, vdd_name);
>>> + goto exit;
>>> + }
>>> +
>>> + bootup_volt = opp_get_voltage(opp);
>>> + if (!bootup_volt) {
>>> + printk(KERN_ERR "%s: unable to find voltage corresponding"
>>> + "to the bootup OPP for vdd_%s\n", __func__, vdd_name);
>>> + goto exit;
>>> + }
>>> +
>>> + omap_voltage_scale_vdd(voltdm, bootup_volt);
>>> +
>>> + return 0;
>>> +
>>> +exit:
>>> + printk(KERN_ERR "%s: Unable to put vdd_%s to its init voltage\n\n",
>>> + __func__, vdd_name);
>>> + return -EINVAL;
>>> +}
>>> +
>>> static int __init omap2_common_pm_init(void)
>>> {
>>> omap2_init_processor_devices();
>>>
>>> - if (cpu_is_omap34xx())
>>> + if (cpu_is_omap34xx()) {
>>> omap3_pm_init_opp_table();
>>> + omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev);
>>> + omap2_set_init_voltage("core", "l3_ick", l3_dev);
>>> + }
>>>
>>> omap_pm_if_init();
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH v3 10/11] OMAP3: PM: Program correct init voltages for VDD1 and VDD2
2010-10-22 14:44 ` Gopinath, Thara
@ 2010-10-22 16:44 ` Kevin Hilman
0 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2010-10-22 16:44 UTC (permalink / raw)
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org, paul@pwsan.com, Cousson, Benoit,
Sripathy, Vishwanath, Sawant, Anand
"Gopinath, Thara" <thara@ti.com> writes:
[...]
>>>> +static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
>>>> + struct device *dev)
>>>> +{
>>>> + struct voltagedomain *voltdm;
>>>> + struct clk *_clk;
>>>
>>>s/_clk/clk/
>
> Will it not conflict with struct clk??
>
Nope.
$ find . -type f -print0 | xargs -0 -e grep -nH -e 'struct clk \*clk'
./clock2430.c:43:static void omap2430_clk_i2chs_find_idlest(struct clk *clk,
./clock34xx.c:42:static void omap3430es2_clk_ssi_find_idlest(struct clk *clk,
./clock34xx.c:76:static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk *clk,
./clock34xx.c:108:static void omap3430es2_clk_hsotgusb_find_idlest(struct clk *clk,
./clkt34xx_dpll3m2.c:50:int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
./clkt2xxx_osc.c:33:static int omap2_enable_osc_ck(struct clk *clk)
./clkt2xxx_osc.c:44:static void omap2_disable_osc_ck(struct clk *clk)
./clkt2xxx_osc.c:58:unsigned long omap2_osc_clk_recalc(struct clk *clk)
./clkt_dpll.c:72:static int _dpll_test_fint(struct clk *clk, u8 n)
./clkt_dpll.c:173:void omap2_init_dpll_parent(struct clk *clk)
./clkt_dpll.c:219:u32 omap2_get_dpll_rate(struct clk *clk)
./clkt_dpll.c:277:int omap2_dpll_set_rate_tolerance(struct clk *clk, unsigned int tolerance)
./clkt_dpll.c:303:long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate)
./clkt_clksel.c:62:static const struct clksel *_get_clksel_by_parent(struct clk *clk,
./clkt_clksel.c:96:static u8 _get_div_and_fieldval(struct clk *src_clk, struct clk *clk,
./clkt_clksel.c:151:static void _write_clksel_reg(struct clk *clk, u32 field_val)
./clkt_clksel.c:174:static u32 _clksel_to_divisor(struct clk *clk, u32 field_val)
./clkt_clksel.c:211:static u32 _divisor_to_clksel(struct clk *clk, u32 div)
./clkt_clksel.c:248:static u32 _read_divisor(struct clk *clk)
./clkt_clksel.c:276:u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
./clkt_clksel.c:342:void omap2_init_clksel_parent(struct clk *clk)
./clkt_clksel.c:389:unsigned long omap2_clksel_recalc(struct clk *clk)
./clkt_clksel.c:417:long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate)
./clkt_clksel.c:439:int omap2_clksel_set_rate(struct clk *clk, unsigned long rate)
./clkt_clksel.c:483:int omap2_clksel_set_parent(struct clk *clk, struct clk *new_parent)
./clockdomain.c:892:int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
./clockdomain.c:947:int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
./clock2xxx.h:11:unsigned long omap2_table_mpu_recalc(struct clk *clk);
./clock2xxx.h:12:int omap2_select_table_rate(struct clk *clk, unsigned long rate);
./clock2xxx.h:13:long omap2_round_to_table_rate(struct clk *clk, unsigned long rate);
./clock2xxx.h:14:unsigned long omap2xxx_sys_clk_recalc(struct clk *clk);
./clock2xxx.h:15:unsigned long omap2_osc_clk_recalc(struct clk *clk);
./clock2xxx.h:16:unsigned long omap2_dpllcore_recalc(struct clk *clk);
./clock2xxx.h:17:int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate);
./clock2xxx.h:18:unsigned long omap2xxx_clk_get_core_rate(struct clk *clk);
./dpll3xxx.c:49:static void _omap3_dpll_write_clken(struct clk *clk, u8 clken_bits)
./dpll3xxx.c:63:static int _omap3_wait_dpll_status(struct clk *clk, u8 state)
./dpll3xxx.c:93:static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8 n)
./dpll3xxx.c:138:static int _omap3_noncore_dpll_lock(struct clk *clk)
./dpll3xxx.c:172:static int _omap3_noncore_dpll_bypass(struct clk *clk)
./dpll3xxx.c:206:static int _omap3_noncore_dpll_stop(struct clk *clk)
./dpll3xxx.c:240:static void lookup_dco_sddiv(struct clk *clk, u8 *dco, u8 *sd_div, u16 m,
./dpll3xxx.c:278:static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel)
./dpll3xxx.c:336:unsigned long omap3_dpll_recalc(struct clk *clk)
./dpll3xxx.c:357:int omap3_noncore_dpll_enable(struct clk *clk)
./dpll3xxx.c:390:void omap3_noncore_dpll_disable(struct clk *clk)
./dpll3xxx.c:409:int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
./dpll3xxx.c:494:u32 omap3_dpll_autoidle_read(struct clk *clk)
./dpll3xxx.c:520:void omap3_dpll_allow_idle(struct clk *clk)
./dpll3xxx.c:547:void omap3_dpll_deny_idle(struct clk *clk)
./dpll3xxx.c:573:unsigned long omap3_clkoutx2_recalc(struct clk *clk)
./clkt2xxx_virt_prcm_set.c:55:unsigned long omap2_table_mpu_recalc(struct clk *clk)
./clkt2xxx_virt_prcm_set.c:67:long omap2_round_to_table_rate(struct clk *clk, unsigned long rate)
./clkt2xxx_virt_prcm_set.c:90:int omap2_select_table_rate(struct clk *clk, unsigned long rate)
./clkt2xxx_sys.c:45:unsigned long omap2xxx_sys_clk_recalc(struct clk *clk)
./clock3xxx.h:12:int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate);
./clock3xxx.h:13:int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate);
./clkt2xxx_apll.c:46:static int omap2_clk_apll_enable(struct clk *clk, u32 status_mask)
./clkt2xxx_apll.c:71:static int omap2_clk_apll96_enable(struct clk *clk)
./clkt2xxx_apll.c:76:static int omap2_clk_apll54_enable(struct clk *clk)
./clkt2xxx_apll.c:82:static void omap2_clk_apll_disable(struct clk *clk)
./clkt2xxx_dpllcore.c:50:unsigned long omap2xxx_clk_get_core_rate(struct clk *clk)
./clkt2xxx_dpllcore.c:101:unsigned long omap2_dpllcore_recalc(struct clk *clk)
./clkt2xxx_dpllcore.c:106:int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
./clock.h:54:int omap2_clk_enable(struct clk *clk);
./clock.h:55:void omap2_clk_disable(struct clk *clk);
./clock.h:56:long omap2_clk_round_rate(struct clk *clk, unsigned long rate);
./clock.h:57:int omap2_clk_set_rate(struct clk *clk, unsigned long rate);
./clock.h:58:int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent);
./clock.h:59:int omap2_dpll_set_rate_tolerance(struct clk *clk, unsigned int tolerance);
./clock.h:60:long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate);
./clock.h:61:unsigned long omap3_dpll_recalc(struct clk *clk);
./clock.h:62:unsigned long omap3_clkoutx2_recalc(struct clk *clk);
./clock.h:63:void omap3_dpll_allow_idle(struct clk *clk);
./clock.h:64:void omap3_dpll_deny_idle(struct clk *clk);
./clock.h:65:u32 omap3_dpll_autoidle_read(struct clk *clk);
./clock.h:66:int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate);
./clock.h:67:int omap3_noncore_dpll_enable(struct clk *clk);
./clock.h:68:void omap3_noncore_dpll_disable(struct clk *clk);
./clock.h:71:void omap2_clk_disable_unused(struct clk *clk);
./clock.h:76:void omap2_init_clk_clkdm(struct clk *clk);
./clock.h:79:u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
./clock.h:81:void omap2_init_clksel_parent(struct clk *clk);
./clock.h:82:unsigned long omap2_clksel_recalc(struct clk *clk);
./clock.h:83:long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);
./clock.h:84:int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
./clock.h:85:int omap2_clksel_set_parent(struct clk *clk, struct clk *new_parent);
./clock.h:87:u32 omap2_get_dpll_rate(struct clk *clk);
./clock.h:88:void omap2_init_dpll_parent(struct clk *clk);
./clock.h:117:int omap2_dflt_clk_enable(struct clk *clk);
./clock.h:118:void omap2_dflt_clk_disable(struct clk *clk);
./clock.h:119:void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
./clock.h:121:void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg,
./clock.c:56:static void _omap2_module_wait_ready(struct clk *clk)
./clock.c:84:void omap2_init_clk_clkdm(struct clk *clk)
./clock.c:123:void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
./clock.c:152:void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg,
./clock.c:175:int omap2_dflt_clk_enable(struct clk *clk)
./clock.c:199:void omap2_dflt_clk_disable(struct clk *clk)
./clock.c:249:void omap2_clk_disable(struct clk *clk)
./clock.c:286:int omap2_clk_enable(struct clk *clk)
./clock.c:338:long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
./clock.c:347:int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
./clock.c:360:int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
./clock.c:388:void omap2_clk_disable_unused(struct clk *clk)
./clock36xx.c:42:static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk)
./clock3xxx.c:43:int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate)
./clock3517.c:52:static void am35xx_clk_find_idlest(struct clk *clk,
./clock3517.c:76:static void am35xx_clk_find_companion(struct clk *clk, void __iomem **other_reg,
./clock3517.c:104:static void am35xx_clk_ipss_find_idlest(struct clk *clk,
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH v3 11/11] OMAP3: PM: Register TWL4030 pmic info with the voltage driver.
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
` (9 preceding siblings ...)
2010-09-22 14:45 ` [PATCH v3 10/11] OMAP3: PM: Program correct init voltages for VDD1 and VDD2 Thara Gopinath
@ 2010-09-22 14:45 ` Thara Gopinath
2010-09-29 0:31 ` [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Kevin Hilman
11 siblings, 0 replies; 56+ messages in thread
From: Thara Gopinath @ 2010-09-22 14:45 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
This patch registers the TWL4030 PMIC specific informtion
with the voltage driver. Failing this patch the voltage driver
is unware of the formula to use for vsel to voltage and vice versa
conversion.
Signed-off-by: Thara Gopinath <thara@ti.com>
---
arch/arm/plat-omap/opp_twl_tps.c | 17 +++++++++++++++++
1 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/opp_twl_tps.c b/arch/arm/plat-omap/opp_twl_tps.c
index 112f106..4448fc5 100644
--- a/arch/arm/plat-omap/opp_twl_tps.c
+++ b/arch/arm/plat-omap/opp_twl_tps.c
@@ -13,7 +13,10 @@
* XXX This code should be part of some other TWL/TPS code.
*/
+#include <linux/module.h>
+
#include <plat/opp_twl_tps.h>
+#include <plat/voltage.h>
/**
* omap_twl_vsel_to_vdc - convert TWL/TPS VSEL value to microvolts DC
@@ -39,3 +42,17 @@ u8 omap_twl_uv_to_vsel(unsigned long uv)
/* Round up to higher voltage */
return DIV_ROUND_UP(uv - 600000, 12500);
}
+
+static struct omap_volt_pmic_info twl_volt_info = {
+ .slew_rate = 4000,
+ .step_size = 12500,
+ .vsel_to_uv = omap_twl_vsel_to_uv,
+ .uv_to_vsel = omap_twl_uv_to_vsel,
+};
+
+static int __init omap_twl_init(void)
+{
+ omap_voltage_register_pmic(&twl_volt_info);
+ return 0;
+}
+arch_initcall(omap_twl_init);
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support
2010-09-22 14:45 [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath
` (10 preceding siblings ...)
2010-09-22 14:45 ` [PATCH v3 11/11] OMAP3: PM: Register TWL4030 pmic info with the voltage driver Thara Gopinath
@ 2010-09-29 0:31 ` Kevin Hilman
2010-09-29 1:02 ` Kevin Hilman
11 siblings, 1 reply; 56+ messages in thread
From: Kevin Hilman @ 2010-09-29 0:31 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Thara Gopinath <thara@ti.com> writes:
> From: thara gopinath <thara@ti.com>
>
> This patch series introduces smartreflex and voltage driver support
> for OMAP3430 and OMAP3630. SmartReflex modules do adaptive voltage
> control for real-time voltage adjustments.
[...]
> This patch series is based against origin/pm-core branch off
> Kevin's pm tree which in turn is based off lo-master.
> This series will apply against lo-master also but will
> break compilation due to lack of opp framework support
> on lo-master.
>
> This patch series has been tested on OMAP3430 SDP with the extra five patches
> from origin/cpufreq branch off Kevin's pm tree applied. This series
> has been tested with with omap3_defconfig with the following
> menuconfig options enabled.
> System type -> TI OMAP Implementations -> Smartreflex Support
> System type -> TI OMAP Implementations ->
> Class 3 mode of Smartreflex Implementation
Using the same baseline as you mention above (pm-core + pm-opp), I
applied this series (and the OMAP4 series) and tested on 34xx/n900 and
36xx/Zoom3 using omap2plus_defconfig and it booted ok. (I also patched
the n900 board file to call sr_class3_init(), which you should include
as part of the series too.)
I then did some experiments, including updating the pm-sr branch to be
this latest series and testing with omap3_pm_defconfig. With that, I
notcied that within a few seconds of reaching the shell, the system
rebooted.
I tracked this down to the fact that CONFIG_OMAP_WATCHDOG was not
enabled in omap3_pm_defconfig. Enabling the watchdog, and it no longer
reboots. /me confused
Using just the pm-sr branch by itself and omap2plus_defconfig, even with
the watchdog disabled, it doesn't reboot.
Do you have any ideas what else might be causing this reboot when using
the PM branch + omap3_pm_defconfig?
Kevin
> Thara Gopinath (11):
> OMAP: PM: Export the main pm debugfs directory
> OMAP3: PM: Adding voltage driver support for OMAP3
> OMAP3: PM: Adding smartreflex driver support.
> OMAP3: PM: Adding smartreflex device file.
> OMAP3: PM: Adding smartreflex hwmod data
> OMAP3: PM: Adding smartreflex class3 driver
> OMAP3: PM: Adding T2 enabling of smartreflex support
> OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
> OMAP3: PM: Smartreflex Class3 initialization from board files.
> OMAP3: PM: Program correct init voltages for VDD1 and VDD2
> OMAP3: PM: Register TWL4030 pmic info with the voltage driver.
>
> arch/arm/mach-omap2/Makefile | 5 +-
> arch/arm/mach-omap2/board-3430sdp.c | 2 +
> arch/arm/mach-omap2/board-zoom-peripherals.c | 2 +
> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 249 +++++
> arch/arm/mach-omap2/pm-debug.c | 18 +
> arch/arm/mach-omap2/pm.c | 67 ++-
> arch/arm/mach-omap2/pm.h | 1 +
> arch/arm/mach-omap2/smartreflex-class3.c | 61 ++
> arch/arm/mach-omap2/smartreflex-class3.h | 23 +
> arch/arm/mach-omap2/smartreflex.c | 1039 +++++++++++++++++++
> arch/arm/mach-omap2/sr_device.c | 174 ++++
> arch/arm/mach-omap2/voltage.c | 1319 +++++++++++++++++++++++++
> arch/arm/plat-omap/Kconfig | 41 +
> arch/arm/plat-omap/include/plat/control.h | 27 +
> arch/arm/plat-omap/include/plat/smartreflex.h | 276 ++++++
> arch/arm/plat-omap/include/plat/voltage.h | 141 +++
> arch/arm/plat-omap/opp_twl_tps.c | 17 +
> drivers/mfd/twl-core.c | 7 +-
> drivers/mfd/twl4030-power.c | 29 +
> include/linux/i2c/twl.h | 1 +
> 20 files changed, 3495 insertions(+), 4 deletions(-)
> create mode 100644 arch/arm/mach-omap2/smartreflex-class3.c
> create mode 100644 arch/arm/mach-omap2/smartreflex-class3.h
> create mode 100644 arch/arm/mach-omap2/smartreflex.c
> create mode 100644 arch/arm/mach-omap2/sr_device.c
> create mode 100644 arch/arm/mach-omap2/voltage.c
> create mode 100644 arch/arm/plat-omap/include/plat/smartreflex.h
> create mode 100644 arch/arm/plat-omap/include/plat/voltage.h
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support
2010-09-29 0:31 ` [PATCH v3 00/11] OMAP3: Adding Smartreflex and Voltage driver support Kevin Hilman
@ 2010-09-29 1:02 ` Kevin Hilman
0 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2010-09-29 1:02 UTC (permalink / raw)
To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant
Kevin Hilman <khilman@deeprootsystems.com> writes:
> Thara Gopinath <thara@ti.com> writes:
>
>> From: thara gopinath <thara@ti.com>
>>
>> This patch series introduces smartreflex and voltage driver support
>> for OMAP3430 and OMAP3630. SmartReflex modules do adaptive voltage
>> control for real-time voltage adjustments.
>
> [...]
>
>> This patch series is based against origin/pm-core branch off
>> Kevin's pm tree which in turn is based off lo-master.
>> This series will apply against lo-master also but will
>> break compilation due to lack of opp framework support
>> on lo-master.
>>
>> This patch series has been tested on OMAP3430 SDP with the extra five patches
>> from origin/cpufreq branch off Kevin's pm tree applied. This series
>> has been tested with with omap3_defconfig with the following
>> menuconfig options enabled.
>> System type -> TI OMAP Implementations -> Smartreflex Support
>> System type -> TI OMAP Implementations ->
>> Class 3 mode of Smartreflex Implementation
>
> Using the same baseline as you mention above (pm-core + pm-opp), I
> applied this series (and the OMAP4 series) and tested on 34xx/n900 and
> 36xx/Zoom3 using omap2plus_defconfig and it booted ok. (I also patched
> the n900 board file to call sr_class3_init(), which you should include
> as part of the series too.)
>
> I then did some experiments, including updating the pm-sr branch to be
> this latest series and testing with omap3_pm_defconfig. With that, I
> notcied that within a few seconds of reaching the shell, the system
> rebooted.
>
> I tracked this down to the fact that CONFIG_OMAP_WATCHDOG was not
> enabled in omap3_pm_defconfig. Enabling the watchdog, and it no longer
> reboots. /me confused
>
> Using just the pm-sr branch by itself and omap2plus_defconfig, even with
> the watchdog disabled, it doesn't reboot.
>
> Do you have any ideas what else might be causing this reboot when using
> the PM branch + omap3_pm_defconfig?
So, I did a little more digging, and this has nothing to do with your
series. It has to do with the watchdog hwmod series, which due to the
new hwmods, resets the watchdog IP. So, if a watchdog driver isn't
enabled, the watchdog will fire, and cause a reboot.
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread