[PATCH 0/9] OMAP: GPIO: cleanup, consolidation, etc. (v2)

[PATCH 0/9] OMAP: GPIO: cleanup, consolidation, etc. (v2)

[Kevin Hilman]

Here's an updated version of my work-in-progress GPIO cleanups.

I now understand that others have some similar work in progress, so
these are posted (to linux-omap only, for now) so that we can begin
collaboration on the GPIO cleanups.

This series applies on top of v2.6.39-rc4 plus the generic irq_chip
series from Thomas Gleixner since in addition to the cleanups, I
started moving the GPIO IRQ handling over to use generic irq_chip
(last patch in series.)

This work in progress is available in my wip/gpio-cleanup branch.

Kevin Hilman (9):
  OMAP: GPIO: _clear_gpio_irqbank: fix flushing of posted write
  OMAP: GPIO: remove MPUIO handling from _clear_gpio_irqbank()
  OMAP: GPIO: move bank width into struct gpio_bank
  OMAP: GPIO: _get_gpio_irqbank_mask: replace hard-coded mask with
    bank->width
  OMAP: GPIO: move register offset defines into gpio.h
  OMAP: GPIO: consolidate direction, input, output, remove #ifdefs
  OMAP: GPIO: consolidate IRQ status handling, remove #ifdefs
  OMAP: GPIO: conslidate enable/disable of GPIO IRQs, remove ifdefs
  OMAP: GPIO: convert MPUIO IRQ over to generic irq_chip

 arch/arm/mach-omap1/gpio15xx.c         |   13 +
 arch/arm/mach-omap1/gpio16xx.c         |   22 ++
 arch/arm/mach-omap1/gpio7xx.c          |   21 +
 arch/arm/mach-omap2/gpio.c             |   20 +
 arch/arm/plat-omap/gpio.c              |  641 ++++++--------------------------
 arch/arm/plat-omap/include/plat/gpio.h |  120 ++++++
 6 files changed, 318 insertions(+), 519 deletions(-)

-- 
1.7.4

[PATCH 1/9] OMAP: GPIO: _clear_gpio_irqbank: fix flushing of posted write

[Kevin Hilman]

In commit 78a1a6d3411de1a8b0dc1cb92754b5f12f251912 (ARM: OMAP4: Update
the GPIO support) braces were mistakenly added to included the
register read-back inside the cpu_is_* checking.

Remove the braces, ensuring that a register read-back is done, even
when the IRQSTATUS2 register is not written.

Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2
depending on the CPU, but a read-back of any register in that region
will cause a flush of the posted writes.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/plat-omap/gpio.c |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index d2adcdd..fe6971a 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -813,12 +813,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
 	else if (cpu_is_omap44xx())
 		reg = bank->base + OMAP4_GPIO_IRQSTATUS1;
 
-	if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+	if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx())
 		__raw_writel(gpio_mask, reg);
 
 	/* Flush posted write for the irq status to avoid spurious interrupts */
 	__raw_readl(reg);
-	}
 }
 
 static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
-- 
1.7.4

[PATCH 2/9] OMAP: GPIO: remove MPUIO handling from _clear_gpio_irqbank()

[Kevin Hilman]

Remove the OMAP1 #ifdef and MPUIO special case for _clear_gpio_irqbank()

The MPUIOs do not need a register access to ack/clear the IRQ status,
since reading the IRQ status clears it.  In addition, the MPUIO
irq_chip has an empty ack method, so _clear_gpio_irqbank() is never
used for MPUIOs.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/plat-omap/gpio.c |    6 ------
 1 files changed, 0 insertions(+), 6 deletions(-)

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index fe6971a..8b5ca6e 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -770,12 +770,6 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
 	void __iomem *reg = bank->base;
 
 	switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
-	case METHOD_MPUIO:
-		/* MPUIO irqstatus is reset by reading the status register,
-		 * so do nothing here */
-		return;
-#endif
 #ifdef CONFIG_ARCH_OMAP15XX
 	case METHOD_GPIO_1510:
 		reg += OMAP1510_GPIO_INT_STATUS;
-- 
1.7.4

[PATCH 3/9] OMAP: GPIO: move bank width into struct gpio_bank

[Kevin Hilman]

Rather than having a file-global bank_width variable, move it into
struct gpio_bank so it can be bank-specific.   Note the bank width
is already passed per-bank via platform_data, so current code would
be incorrect if any banks had different width.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/plat-omap/gpio.c |   11 +++++------
 1 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 8b5ca6e..d1d3397 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -159,6 +159,7 @@ struct gpio_bank {
 	struct device *dev;
 	bool dbck_flag;
 	int stride;
+	u32 width;
 };
 
 #ifdef CONFIG_ARCH_OMAP3
@@ -184,8 +185,6 @@ static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
  */
 static struct gpio_bank *gpio_bank;
 
-static int bank_width;
-
 /* TODO: Analyze removing gpio_bank_count usage from driver code */
 int gpio_bank_count;
 
@@ -1650,14 +1649,14 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank)
 	} else {
 		bank->chip.label = "gpio";
 		bank->chip.base = gpio;
-		gpio += bank_width;
+		gpio += bank->width;
 	}
-	bank->chip.ngpio = bank_width;
+	bank->chip.ngpio = bank->width;
 
 	gpiochip_add(&bank->chip);
 
 	for (j = bank->virtual_irq_start;
-		     j < bank->virtual_irq_start + bank_width; j++) {
+		     j < bank->virtual_irq_start + bank->width; j++) {
 		irq_set_lockdep_class(j, &gpio_lock_class);
 		irq_set_chip_data(j, bank);
 		if (bank_is_mpuio(bank))
@@ -1707,7 +1706,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
 	bank->dev = &pdev->dev;
 	bank->dbck_flag = pdata->dbck_flag;
 	bank->stride = pdata->bank_stride;
-	bank_width = pdata->bank_width;
+	bank->width = pdata->bank_width;
 
 	spin_lock_init(&bank->lock);
 
-- 
1.7.4

[PATCH 4/9] OMAP: GPIO: _get_gpio_irqbank_mask: replace hard-coded mask with bank->width

[Kevin Hilman]

Replace hard-coded mask values with bank->width which is already coming
from platform_data.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/plat-omap/gpio.c |    8 +-------
 1 files changed, 1 insertions(+), 7 deletions(-)

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index d1d3397..b66f374 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -823,46 +823,40 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
 	void __iomem *reg = bank->base;
 	int inv = 0;
 	u32 l;
-	u32 mask;
+	u32 mask = (1 << bank->width) - 1;
 
 	switch (bank->method) {
 #ifdef CONFIG_ARCH_OMAP1
 	case METHOD_MPUIO:
 		reg += OMAP_MPUIO_GPIO_MASKIT / bank->stride;
-		mask = 0xffff;
 		inv = 1;
 		break;
 #endif
 #ifdef CONFIG_ARCH_OMAP15XX
 	case METHOD_GPIO_1510:
 		reg += OMAP1510_GPIO_INT_MASK;
-		mask = 0xffff;
 		inv = 1;
 		break;
 #endif
 #ifdef CONFIG_ARCH_OMAP16XX
 	case METHOD_GPIO_1610:
 		reg += OMAP1610_GPIO_IRQENABLE1;
-		mask = 0xffff;
 		break;
 #endif
 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
 	case METHOD_GPIO_7XX:
 		reg += OMAP7XX_GPIO_INT_MASK;
-		mask = 0xffffffff;
 		inv = 1;
 		break;
 #endif
 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 	case METHOD_GPIO_24XX:
 		reg += OMAP24XX_GPIO_IRQENABLE1;
-		mask = 0xffffffff;
 		break;
 #endif
 #if defined(CONFIG_ARCH_OMAP4)
 	case METHOD_GPIO_44XX:
 		reg += OMAP4_GPIO_IRQSTATUSSET0;
-		mask = 0xffffffff;
 		break;
 #endif
 	default:
-- 
1.7.4

[PATCH 5/9] OMAP: GPIO: move register offset defines into gpio.h

[Kevin Hilman]

Register offset defines are moved to <plat/gpio.h> so they can be used
by SoC-specific device init code to fill out platform_data register offsets.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/plat-omap/gpio.c              |  103 --------------------------------
 arch/arm/plat-omap/include/plat/gpio.h |  103 ++++++++++++++++++++++++++++++++
 2 files changed, 103 insertions(+), 103 deletions(-)

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index b66f374..274e4a5 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -30,109 +30,6 @@
 #include <mach/gpio.h>
 #include <asm/mach/irq.h>
 
-/*
- * OMAP1510 GPIO registers
- */
-#define OMAP1510_GPIO_DATA_INPUT	0x00
-#define OMAP1510_GPIO_DATA_OUTPUT	0x04
-#define OMAP1510_GPIO_DIR_CONTROL	0x08
-#define OMAP1510_GPIO_INT_CONTROL	0x0c
-#define OMAP1510_GPIO_INT_MASK		0x10
-#define OMAP1510_GPIO_INT_STATUS	0x14
-#define OMAP1510_GPIO_PIN_CONTROL	0x18
-
-#define OMAP1510_IH_GPIO_BASE		64
-
-/*
- * OMAP1610 specific GPIO registers
- */
-#define OMAP1610_GPIO_REVISION		0x0000
-#define OMAP1610_GPIO_SYSCONFIG		0x0010
-#define OMAP1610_GPIO_SYSSTATUS		0x0014
-#define OMAP1610_GPIO_IRQSTATUS1	0x0018
-#define OMAP1610_GPIO_IRQENABLE1	0x001c
-#define OMAP1610_GPIO_WAKEUPENABLE	0x0028
-#define OMAP1610_GPIO_DATAIN		0x002c
-#define OMAP1610_GPIO_DATAOUT		0x0030
-#define OMAP1610_GPIO_DIRECTION		0x0034
-#define OMAP1610_GPIO_EDGE_CTRL1	0x0038
-#define OMAP1610_GPIO_EDGE_CTRL2	0x003c
-#define OMAP1610_GPIO_CLEAR_IRQENABLE1	0x009c
-#define OMAP1610_GPIO_CLEAR_WAKEUPENA	0x00a8
-#define OMAP1610_GPIO_CLEAR_DATAOUT	0x00b0
-#define OMAP1610_GPIO_SET_IRQENABLE1	0x00dc
-#define OMAP1610_GPIO_SET_WAKEUPENA	0x00e8
-#define OMAP1610_GPIO_SET_DATAOUT	0x00f0
-
-/*
- * OMAP7XX specific GPIO registers
- */
-#define OMAP7XX_GPIO_DATA_INPUT		0x00
-#define OMAP7XX_GPIO_DATA_OUTPUT	0x04
-#define OMAP7XX_GPIO_DIR_CONTROL	0x08
-#define OMAP7XX_GPIO_INT_CONTROL	0x0c
-#define OMAP7XX_GPIO_INT_MASK		0x10
-#define OMAP7XX_GPIO_INT_STATUS		0x14
-
-/*
- * omap2+ specific GPIO registers
- */
-#define OMAP24XX_GPIO_REVISION		0x0000
-#define OMAP24XX_GPIO_IRQSTATUS1	0x0018
-#define OMAP24XX_GPIO_IRQSTATUS2	0x0028
-#define OMAP24XX_GPIO_IRQENABLE2	0x002c
-#define OMAP24XX_GPIO_IRQENABLE1	0x001c
-#define OMAP24XX_GPIO_WAKE_EN		0x0020
-#define OMAP24XX_GPIO_CTRL		0x0030
-#define OMAP24XX_GPIO_OE		0x0034
-#define OMAP24XX_GPIO_DATAIN		0x0038
-#define OMAP24XX_GPIO_DATAOUT		0x003c
-#define OMAP24XX_GPIO_LEVELDETECT0	0x0040
-#define OMAP24XX_GPIO_LEVELDETECT1	0x0044
-#define OMAP24XX_GPIO_RISINGDETECT	0x0048
-#define OMAP24XX_GPIO_FALLINGDETECT	0x004c
-#define OMAP24XX_GPIO_DEBOUNCE_EN	0x0050
-#define OMAP24XX_GPIO_DEBOUNCE_VAL	0x0054
-#define OMAP24XX_GPIO_CLEARIRQENABLE1	0x0060
-#define OMAP24XX_GPIO_SETIRQENABLE1	0x0064
-#define OMAP24XX_GPIO_CLEARWKUENA	0x0080
-#define OMAP24XX_GPIO_SETWKUENA		0x0084
-#define OMAP24XX_GPIO_CLEARDATAOUT	0x0090
-#define OMAP24XX_GPIO_SETDATAOUT	0x0094
-
-#define OMAP4_GPIO_REVISION		0x0000
-#define OMAP4_GPIO_EOI			0x0020
-#define OMAP4_GPIO_IRQSTATUSRAW0	0x0024
-#define OMAP4_GPIO_IRQSTATUSRAW1	0x0028
-#define OMAP4_GPIO_IRQSTATUS0		0x002c
-#define OMAP4_GPIO_IRQSTATUS1		0x0030
-#define OMAP4_GPIO_IRQSTATUSSET0	0x0034
-#define OMAP4_GPIO_IRQSTATUSSET1	0x0038
-#define OMAP4_GPIO_IRQSTATUSCLR0	0x003c
-#define OMAP4_GPIO_IRQSTATUSCLR1	0x0040
-#define OMAP4_GPIO_IRQWAKEN0		0x0044
-#define OMAP4_GPIO_IRQWAKEN1		0x0048
-#define OMAP4_GPIO_IRQENABLE1		0x011c
-#define OMAP4_GPIO_WAKE_EN		0x0120
-#define OMAP4_GPIO_IRQSTATUS2		0x0128
-#define OMAP4_GPIO_IRQENABLE2		0x012c
-#define OMAP4_GPIO_CTRL			0x0130
-#define OMAP4_GPIO_OE			0x0134
-#define OMAP4_GPIO_DATAIN		0x0138
-#define OMAP4_GPIO_DATAOUT		0x013c
-#define OMAP4_GPIO_LEVELDETECT0		0x0140
-#define OMAP4_GPIO_LEVELDETECT1		0x0144
-#define OMAP4_GPIO_RISINGDETECT		0x0148
-#define OMAP4_GPIO_FALLINGDETECT	0x014c
-#define OMAP4_GPIO_DEBOUNCENABLE	0x0150
-#define OMAP4_GPIO_DEBOUNCINGTIME	0x0154
-#define OMAP4_GPIO_CLEARIRQENABLE1	0x0160
-#define OMAP4_GPIO_SETIRQENABLE1	0x0164
-#define OMAP4_GPIO_CLEARWKUENA		0x0180
-#define OMAP4_GPIO_SETWKUENA		0x0184
-#define OMAP4_GPIO_CLEARDATAOUT		0x0190
-#define OMAP4_GPIO_SETDATAOUT		0x0194
-
 struct gpio_bank {
 	unsigned long pbase;
 	void __iomem *base;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index cac2e8a..ec97e00 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -52,6 +52,109 @@
 
 #define OMAP34XX_NR_GPIOS		6
 
+/*
+ * OMAP1510 GPIO registers
+ */
+#define OMAP1510_GPIO_DATA_INPUT	0x00
+#define OMAP1510_GPIO_DATA_OUTPUT	0x04
+#define OMAP1510_GPIO_DIR_CONTROL	0x08
+#define OMAP1510_GPIO_INT_CONTROL	0x0c
+#define OMAP1510_GPIO_INT_MASK		0x10
+#define OMAP1510_GPIO_INT_STATUS	0x14
+#define OMAP1510_GPIO_PIN_CONTROL	0x18
+
+#define OMAP1510_IH_GPIO_BASE		64
+
+/*
+ * OMAP1610 specific GPIO registers
+ */
+#define OMAP1610_GPIO_REVISION		0x0000
+#define OMAP1610_GPIO_SYSCONFIG		0x0010
+#define OMAP1610_GPIO_SYSSTATUS		0x0014
+#define OMAP1610_GPIO_IRQSTATUS1	0x0018
+#define OMAP1610_GPIO_IRQENABLE1	0x001c
+#define OMAP1610_GPIO_WAKEUPENABLE	0x0028
+#define OMAP1610_GPIO_DATAIN		0x002c
+#define OMAP1610_GPIO_DATAOUT		0x0030
+#define OMAP1610_GPIO_DIRECTION		0x0034
+#define OMAP1610_GPIO_EDGE_CTRL1	0x0038
+#define OMAP1610_GPIO_EDGE_CTRL2	0x003c
+#define OMAP1610_GPIO_CLEAR_IRQENABLE1	0x009c
+#define OMAP1610_GPIO_CLEAR_WAKEUPENA	0x00a8
+#define OMAP1610_GPIO_CLEAR_DATAOUT	0x00b0
+#define OMAP1610_GPIO_SET_IRQENABLE1	0x00dc
+#define OMAP1610_GPIO_SET_WAKEUPENA	0x00e8
+#define OMAP1610_GPIO_SET_DATAOUT	0x00f0
+
+/*
+ * OMAP7XX specific GPIO registers
+ */
+#define OMAP7XX_GPIO_DATA_INPUT		0x00
+#define OMAP7XX_GPIO_DATA_OUTPUT	0x04
+#define OMAP7XX_GPIO_DIR_CONTROL	0x08
+#define OMAP7XX_GPIO_INT_CONTROL	0x0c
+#define OMAP7XX_GPIO_INT_MASK		0x10
+#define OMAP7XX_GPIO_INT_STATUS		0x14
+
+/*
+ * omap2+ specific GPIO registers
+ */
+#define OMAP24XX_GPIO_REVISION		0x0000
+#define OMAP24XX_GPIO_IRQSTATUS1	0x0018
+#define OMAP24XX_GPIO_IRQSTATUS2	0x0028
+#define OMAP24XX_GPIO_IRQENABLE2	0x002c
+#define OMAP24XX_GPIO_IRQENABLE1	0x001c
+#define OMAP24XX_GPIO_WAKE_EN		0x0020
+#define OMAP24XX_GPIO_CTRL		0x0030
+#define OMAP24XX_GPIO_OE		0x0034
+#define OMAP24XX_GPIO_DATAIN		0x0038
+#define OMAP24XX_GPIO_DATAOUT		0x003c
+#define OMAP24XX_GPIO_LEVELDETECT0	0x0040
+#define OMAP24XX_GPIO_LEVELDETECT1	0x0044
+#define OMAP24XX_GPIO_RISINGDETECT	0x0048
+#define OMAP24XX_GPIO_FALLINGDETECT	0x004c
+#define OMAP24XX_GPIO_DEBOUNCE_EN	0x0050
+#define OMAP24XX_GPIO_DEBOUNCE_VAL	0x0054
+#define OMAP24XX_GPIO_CLEARIRQENABLE1	0x0060
+#define OMAP24XX_GPIO_SETIRQENABLE1	0x0064
+#define OMAP24XX_GPIO_CLEARWKUENA	0x0080
+#define OMAP24XX_GPIO_SETWKUENA		0x0084
+#define OMAP24XX_GPIO_CLEARDATAOUT	0x0090
+#define OMAP24XX_GPIO_SETDATAOUT	0x0094
+
+#define OMAP4_GPIO_REVISION		0x0000
+#define OMAP4_GPIO_EOI			0x0020
+#define OMAP4_GPIO_IRQSTATUSRAW0	0x0024
+#define OMAP4_GPIO_IRQSTATUSRAW1	0x0028
+#define OMAP4_GPIO_IRQSTATUS0		0x002c
+#define OMAP4_GPIO_IRQSTATUS1		0x0030
+#define OMAP4_GPIO_IRQSTATUSSET0	0x0034
+#define OMAP4_GPIO_IRQSTATUSSET1	0x0038
+#define OMAP4_GPIO_IRQSTATUSCLR0	0x003c
+#define OMAP4_GPIO_IRQSTATUSCLR1	0x0040
+#define OMAP4_GPIO_IRQWAKEN0		0x0044
+#define OMAP4_GPIO_IRQWAKEN1		0x0048
+#define OMAP4_GPIO_IRQENABLE1		0x011c
+#define OMAP4_GPIO_WAKE_EN		0x0120
+#define OMAP4_GPIO_IRQSTATUS2		0x0128
+#define OMAP4_GPIO_IRQENABLE2		0x012c
+#define OMAP4_GPIO_CTRL			0x0130
+#define OMAP4_GPIO_OE			0x0134
+#define OMAP4_GPIO_DATAIN		0x0138
+#define OMAP4_GPIO_DATAOUT		0x013c
+#define OMAP4_GPIO_LEVELDETECT0		0x0140
+#define OMAP4_GPIO_LEVELDETECT1		0x0144
+#define OMAP4_GPIO_RISINGDETECT		0x0148
+#define OMAP4_GPIO_FALLINGDETECT	0x014c
+#define OMAP4_GPIO_DEBOUNCENABLE	0x0150
+#define OMAP4_GPIO_DEBOUNCINGTIME	0x0154
+#define OMAP4_GPIO_CLEARIRQENABLE1	0x0160
+#define OMAP4_GPIO_SETIRQENABLE1	0x0164
+#define OMAP4_GPIO_CLEARWKUENA		0x0180
+#define OMAP4_GPIO_SETWKUENA		0x0184
+#define OMAP4_GPIO_CLEARDATAOUT		0x0190
+#define OMAP4_GPIO_SETDATAOUT		0x0194
+
 #define OMAP_MPUIO(nr)		(OMAP_MAX_GPIO_LINES + (nr))
 #define OMAP_GPIO_IS_MPUIO(nr)	((nr) >= OMAP_MAX_GPIO_LINES)
 
-- 
1.7.4

[PATCH 6/9] OMAP: GPIO: consolidate direction, input, output, remove #ifdefs

[Kevin Hilman]

Add register offset fields to GPIO platform_data for registers that
control direction, input and output data.  Using these register
offsets in the common driver allows removal of #ifdefs and greatly
improves readability.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap1/gpio15xx.c         |    7 +
 arch/arm/mach-omap1/gpio16xx.c         |   15 ++
 arch/arm/mach-omap1/gpio7xx.c          |   15 ++
 arch/arm/mach-omap2/gpio.c             |   10 ++
 arch/arm/plat-omap/gpio.c              |  228 +++++---------------------------
 arch/arm/plat-omap/include/plat/gpio.h |    9 ++
 6 files changed, 92 insertions(+), 192 deletions(-)

diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 04c4b04..706015b 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -39,6 +39,10 @@ static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
 	.bank_type		= METHOD_MPUIO,
 	.bank_width		= 16,
 	.bank_stride		= 1,
+	.direction_reg		= OMAP_MPUIO_IO_CNTL,
+	.set_dataout_reg	= OMAP_MPUIO_OUTPUT,
+	.datain_reg		= OMAP_MPUIO_INPUT_LATCH,
+	.dataout_reg		= OMAP_MPUIO_OUTPUT,
 };
 
 static struct __initdata platform_device omap15xx_mpu_gpio = {
@@ -68,6 +72,9 @@ static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
 	.virtual_irq_start	= IH_GPIO_BASE,
 	.bank_type		= METHOD_GPIO_1510,
 	.bank_width		= 16,
+	.direction_reg		= OMAP1510_GPIO_DIR_CONTROL,
+	.datain_reg		= OMAP1510_GPIO_DATA_INPUT,
+	.dataout_reg		= OMAP1510_GPIO_DATA_OUTPUT,
 };
 
 static struct __initdata platform_device omap15xx_gpio = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 5dd0d4c..9573b5e 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -42,6 +42,10 @@ static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
 	.bank_type		= METHOD_MPUIO,
 	.bank_width		= 16,
 	.bank_stride		= 1,
+	.direction_reg		= OMAP_MPUIO_IO_CNTL,
+	.set_dataout_reg	= OMAP_MPUIO_OUTPUT,
+	.datain_reg		= OMAP_MPUIO_INPUT_LATCH,
+	.dataout_reg		= OMAP_MPUIO_OUTPUT,
 };
 
 static struct __initdata platform_device omap16xx_mpu_gpio = {
@@ -67,10 +71,18 @@ static struct __initdata resource omap16xx_gpio1_resources[] = {
 	},
 };
 
+#define OMAP16XX_GPIO_REG_OFFSETS \
+	.direction_reg		= OMAP1610_GPIO_DIRECTION, \
+	.set_dataout_reg	= OMAP1610_GPIO_SET_DATAOUT, \
+	.clr_dataout_reg	= OMAP1610_GPIO_CLEAR_DATAOUT, \
+	.datain_reg		= OMAP1610_GPIO_DATAIN, \
+	.dataout_reg		= OMAP1610_GPIO_DATAOUT
+
 static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
 	.virtual_irq_start	= IH_GPIO_BASE,
 	.bank_type		= METHOD_GPIO_1610,
 	.bank_width		= 16,
+	OMAP16XX_GPIO_REG_OFFSETS,
 };
 
 static struct __initdata platform_device omap16xx_gpio1 = {
@@ -100,6 +112,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
 	.virtual_irq_start	= IH_GPIO_BASE + 16,
 	.bank_type		= METHOD_GPIO_1610,
 	.bank_width		= 16,
+	OMAP16XX_GPIO_REG_OFFSETS,
 };
 
 static struct __initdata platform_device omap16xx_gpio2 = {
@@ -129,6 +142,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
 	.virtual_irq_start	= IH_GPIO_BASE + 32,
 	.bank_type		= METHOD_GPIO_1610,
 	.bank_width		= 16,
+	OMAP16XX_GPIO_REG_OFFSETS,
 };
 
 static struct __initdata platform_device omap16xx_gpio3 = {
@@ -158,6 +172,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
 	.virtual_irq_start	= IH_GPIO_BASE + 48,
 	.bank_type		= METHOD_GPIO_1610,
 	.bank_width		= 16,
+	OMAP16XX_GPIO_REG_OFFSETS,
 };
 
 static struct __initdata platform_device omap16xx_gpio4 = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 1204c8b..59c6e3dbf 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -44,6 +44,10 @@ static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
 	.bank_type		= METHOD_MPUIO,
 	.bank_width		= 32,
 	.bank_stride		= 2,
+	.direction_reg		= OMAP_MPUIO_IO_CNTL / 2,
+	.set_dataout_reg	= OMAP_MPUIO_OUTPUT / 2,
+	.datain_reg		= OMAP_MPUIO_INPUT_LATCH / 2,
+	.dataout_reg		= OMAP_MPUIO_OUTPUT / 2,
 };
 
 static struct __initdata platform_device omap7xx_mpu_gpio = {
@@ -69,10 +73,16 @@ static struct __initdata resource omap7xx_gpio1_resources[] = {
 	},
 };
 
+#define OMAP7XX_GPIO_REG_OFFSETS \
+	.direction_reg		= OMAP7XX_GPIO_DIR_CONTROL, \
+	.datain_reg             = OMAP7XX_GPIO_DATA_INPUT, \
+	.dataout_reg            = OMAP7XX_GPIO_DATA_OUTPUT
+
 static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
 	.virtual_irq_start	= IH_GPIO_BASE,
 	.bank_type		= METHOD_GPIO_7XX,
 	.bank_width		= 32,
+	OMAP7XX_GPIO_REG_OFFSETS,
 };
 
 static struct __initdata platform_device omap7xx_gpio1 = {
@@ -102,6 +112,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = {
 	.virtual_irq_start	= IH_GPIO_BASE + 32,
 	.bank_type		= METHOD_GPIO_7XX,
 	.bank_width		= 32,
+	OMAP7XX_GPIO_REG_OFFSETS,
 };
 
 static struct __initdata platform_device omap7xx_gpio2 = {
@@ -131,6 +142,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = {
 	.virtual_irq_start	= IH_GPIO_BASE + 64,
 	.bank_type		= METHOD_GPIO_7XX,
 	.bank_width		= 32,
+	OMAP7XX_GPIO_REG_OFFSETS,
 };
 
 static struct __initdata platform_device omap7xx_gpio3 = {
@@ -160,6 +172,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = {
 	.virtual_irq_start	= IH_GPIO_BASE + 96,
 	.bank_type		= METHOD_GPIO_7XX,
 	.bank_width		= 32,
+	OMAP7XX_GPIO_REG_OFFSETS,
 };
 
 static struct __initdata platform_device omap7xx_gpio4 = {
@@ -189,6 +202,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = {
 	.virtual_irq_start	= IH_GPIO_BASE + 128,
 	.bank_type		= METHOD_GPIO_7XX,
 	.bank_width		= 32,
+	OMAP7XX_GPIO_REG_OFFSETS,
 };
 
 static struct __initdata platform_device omap7xx_gpio5 = {
@@ -218,6 +232,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = {
 	.virtual_irq_start	= IH_GPIO_BASE + 160,
 	.bank_type		= METHOD_GPIO_7XX,
 	.bank_width		= 32,
+	OMAP7XX_GPIO_REG_OFFSETS,
 };
 
 static struct __initdata platform_device omap7xx_gpio6 = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 9529842..cc63188 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -65,9 +65,19 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
 	case 0:
 	case 1:
 		pdata->bank_type = METHOD_GPIO_24XX;
+		pdata->direction_reg = OMAP24XX_GPIO_OE;
+		pdata->datain_reg = OMAP24XX_GPIO_DATAIN;
+		pdata->dataout_reg = OMAP24XX_GPIO_DATAOUT;
+		pdata->set_dataout_reg = OMAP24XX_GPIO_SETDATAOUT;
+		pdata->clr_dataout_reg = OMAP24XX_GPIO_CLEARDATAOUT;
 		break;
 	case 2:
 		pdata->bank_type = METHOD_GPIO_44XX;
+		pdata->direction_reg = OMAP4_GPIO_OE;
+		pdata->datain_reg = OMAP4_GPIO_DATAIN;
+		pdata->dataout_reg = OMAP4_GPIO_DATAOUT;
+		pdata->set_dataout_reg = OMAP4_GPIO_SETDATAOUT;
+		pdata->clr_dataout_reg = OMAP4_GPIO_CLEARDATAOUT;
 		break;
 	default:
 		WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 274e4a5..8f94488 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -57,6 +57,15 @@ struct gpio_bank {
 	bool dbck_flag;
 	int stride;
 	u32 width;
+
+	/* SoC-specific register offsets (required) */
+	u16 direction_reg;
+	u16 datain_reg;
+	u16 dataout_reg;
+
+	/* SoC-specific register offsets (optional) */
+	u16 set_dataout_reg;
+	u16 clr_dataout_reg;
 };
 
 #ifdef CONFIG_ARCH_OMAP3
@@ -160,41 +169,7 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
 	void __iomem *reg = bank->base;
 	u32 l;
 
-	switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
-	case METHOD_MPUIO:
-		reg += OMAP_MPUIO_IO_CNTL / bank->stride;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
-	case METHOD_GPIO_1510:
-		reg += OMAP1510_GPIO_DIR_CONTROL;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
-	case METHOD_GPIO_1610:
-		reg += OMAP1610_GPIO_DIRECTION;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
-	case METHOD_GPIO_7XX:
-		reg += OMAP7XX_GPIO_DIR_CONTROL;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	case METHOD_GPIO_24XX:
-		reg += OMAP24XX_GPIO_OE;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP4)
-	case METHOD_GPIO_44XX:
-		reg += OMAP4_GPIO_OE;
-		break;
-#endif
-	default:
-		WARN_ON(1);
-		return;
-	}
+	reg += bank->direction_reg;
 	l = __raw_readl(reg);
 	if (is_input)
 		l |= 1 << gpio;
@@ -208,113 +183,34 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
 	void __iomem *reg = bank->base;
 	u32 l = 0;
 
-	switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
-	case METHOD_MPUIO:
-		reg += OMAP_MPUIO_OUTPUT / bank->stride;
-		l = __raw_readl(reg);
-		if (enable)
-			l |= 1 << gpio;
-		else
-			l &= ~(1 << gpio);
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
-	case METHOD_GPIO_1510:
-		reg += OMAP1510_GPIO_DATA_OUTPUT;
-		l = __raw_readl(reg);
-		if (enable)
-			l |= 1 << gpio;
-		else
-			l &= ~(1 << gpio);
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
-	case METHOD_GPIO_1610:
-		if (enable)
-			reg += OMAP1610_GPIO_SET_DATAOUT;
-		else
-			reg += OMAP1610_GPIO_CLEAR_DATAOUT;
-		l = 1 << gpio;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
-	case METHOD_GPIO_7XX:
-		reg += OMAP7XX_GPIO_DATA_OUTPUT;
-		l = __raw_readl(reg);
-		if (enable)
-			l |= 1 << gpio;
-		else
+	if (enable) {
+		if (bank->set_dataout_reg) {
+			reg += bank->set_dataout_reg;
+		} else {
+			reg += bank->dataout_reg;
+			l = __raw_readl(reg);
+		}
+		l |= 1 << gpio;
+	} else {
+		if (bank->clr_dataout_reg) {
+			reg += bank->clr_dataout_reg;
+			l = 1 << gpio;
+		} else {
+			reg += bank->dataout_reg;
+			l = __raw_readl(reg);
 			l &= ~(1 << gpio);
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	case METHOD_GPIO_24XX:
-		if (enable)
-			reg += OMAP24XX_GPIO_SETDATAOUT;
-		else
-			reg += OMAP24XX_GPIO_CLEARDATAOUT;
-		l = 1 << gpio;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
-	case METHOD_GPIO_44XX:
-		if (enable)
-			reg += OMAP4_GPIO_SETDATAOUT;
-		else
-			reg += OMAP4_GPIO_CLEARDATAOUT;
-		l = 1 << gpio;
-		break;
-#endif
-	default:
-		WARN_ON(1);
-		return;
+		}
 	}
+
 	__raw_writel(l, reg);
 }
 
 static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
 {
-	void __iomem *reg;
-
 	if (check_gpio(gpio) < 0)
 		return -EINVAL;
-	reg = bank->base;
-	switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
-	case METHOD_MPUIO:
-		reg += OMAP_MPUIO_INPUT_LATCH / bank->stride;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
-	case METHOD_GPIO_1510:
-		reg += OMAP1510_GPIO_DATA_INPUT;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
-	case METHOD_GPIO_1610:
-		reg += OMAP1610_GPIO_DATAIN;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
-	case METHOD_GPIO_7XX:
-		reg += OMAP7XX_GPIO_DATA_INPUT;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	case METHOD_GPIO_24XX:
-		reg += OMAP24XX_GPIO_DATAIN;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
-	case METHOD_GPIO_44XX:
-		reg += OMAP4_GPIO_DATAIN;
-		break;
-#endif
-	default:
-		return -EINVAL;
-	}
-	return (__raw_readl(reg)
+
+	return (__raw_readl(bank->base + bank->datain_reg)
 			& (1 << get_gpio_index(gpio))) != 0;
 }
 
@@ -324,42 +220,8 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
 
 	if (check_gpio(gpio) < 0)
 		return -EINVAL;
-	reg = bank->base;
 
-	switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
-	case METHOD_MPUIO:
-		reg += OMAP_MPUIO_OUTPUT / bank->stride;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
-	case METHOD_GPIO_1510:
-		reg += OMAP1510_GPIO_DATA_OUTPUT;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
-	case METHOD_GPIO_1610:
-		reg += OMAP1610_GPIO_DATAOUT;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
-	case METHOD_GPIO_7XX:
-		reg += OMAP7XX_GPIO_DATA_OUTPUT;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	case METHOD_GPIO_24XX:
-		reg += OMAP24XX_GPIO_DATAOUT;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
-	case METHOD_GPIO_44XX:
-		reg += OMAP4_GPIO_DATAOUT;
-		break;
-#endif
-	default:
-		return -EINVAL;
-	}
+	reg = bank->base + bank->dataout_reg;
 
 	return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0;
 }
@@ -1316,31 +1178,8 @@ static int gpio_input(struct gpio_chip *chip, unsigned offset)
 
 static int gpio_is_input(struct gpio_bank *bank, int mask)
 {
-	void __iomem *reg = bank->base;
+	void __iomem *reg = bank->base + bank->direction_reg;
 
-	switch (bank->method) {
-	case METHOD_MPUIO:
-		reg += OMAP_MPUIO_IO_CNTL / bank->stride;
-		break;
-	case METHOD_GPIO_1510:
-		reg += OMAP1510_GPIO_DIR_CONTROL;
-		break;
-	case METHOD_GPIO_1610:
-		reg += OMAP1610_GPIO_DIRECTION;
-		break;
-	case METHOD_GPIO_7XX:
-		reg += OMAP7XX_GPIO_DIR_CONTROL;
-		break;
-	case METHOD_GPIO_24XX:
-		reg += OMAP24XX_GPIO_OE;
-		break;
-	case METHOD_GPIO_44XX:
-		reg += OMAP4_GPIO_OE;
-		break;
-	default:
-		WARN_ONCE(1, "gpio_is_input: incorrect OMAP GPIO method");
-		return -EINVAL;
-	}
 	return __raw_readl(reg) & mask;
 }
 
@@ -1598,6 +1437,11 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
 	bank->dbck_flag = pdata->dbck_flag;
 	bank->stride = pdata->bank_stride;
 	bank->width = pdata->bank_width;
+	bank->direction_reg = pdata->direction_reg;
+	bank->datain_reg = pdata->datain_reg;
+	bank->dataout_reg = pdata->dataout_reg;
+	bank->set_dataout_reg = pdata->dataout_reg;
+	bank->set_dataout_reg = pdata->dataout_reg;
 
 	spin_lock_init(&bank->lock);
 
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index ec97e00..bbf9a5f 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -180,6 +180,15 @@ struct omap_gpio_platform_data {
 	int bank_width;		/* GPIO bank width */
 	int bank_stride;	/* Only needed for omap1 MPUIO */
 	bool dbck_flag;		/* dbck required or not - True for OMAP3&4 */
+
+	/* SoC-specific register offsets (required) */
+	u16 direction_reg;
+	u16 datain_reg;
+	u16 dataout_reg;
+
+	/* SoC-specific register offsets (optional) */
+	u16 set_dataout_reg;
+	u16 clr_dataout_reg;
 };
 
 /* TODO: Analyze removing gpio_bank_count usage from driver code */
-- 
1.7.4

[PATCH 7/9] OMAP: GPIO: consolidate IRQ status handling, remove #ifdefs

[Kevin Hilman]

Cleanup IRQ status handling by by passing IRQ status register offsets
via platform data.

Cleans up clearing of GPIO IRQ status and GPIO ISR handler.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap1/gpio15xx.c         |    2 +
 arch/arm/mach-omap1/gpio16xx.c         |    4 +-
 arch/arm/mach-omap1/gpio7xx.c          |    4 +-
 arch/arm/mach-omap2/gpio.c             |    4 ++
 arch/arm/plat-omap/gpio.c              |   70 ++++---------------------------
 arch/arm/plat-omap/include/plat/gpio.h |    2 +
 6 files changed, 23 insertions(+), 63 deletions(-)

diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 706015b..16e5890 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -43,6 +43,7 @@ static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
 	.set_dataout_reg	= OMAP_MPUIO_OUTPUT,
 	.datain_reg		= OMAP_MPUIO_INPUT_LATCH,
 	.dataout_reg		= OMAP_MPUIO_OUTPUT,
+	.irqstatus_reg		= OMAP_MPUIO_GPIO_INT,
 };
 
 static struct __initdata platform_device omap15xx_mpu_gpio = {
@@ -75,6 +76,7 @@ static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
 	.direction_reg		= OMAP1510_GPIO_DIR_CONTROL,
 	.datain_reg		= OMAP1510_GPIO_DATA_INPUT,
 	.dataout_reg		= OMAP1510_GPIO_DATA_OUTPUT,
+	.irqstatus_reg          = OMAP1510_GPIO_INT_STATUS,
 };
 
 static struct __initdata platform_device omap15xx_gpio = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 9573b5e..700687c 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -46,6 +46,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
 	.set_dataout_reg	= OMAP_MPUIO_OUTPUT,
 	.datain_reg		= OMAP_MPUIO_INPUT_LATCH,
 	.dataout_reg		= OMAP_MPUIO_OUTPUT,
+	.irqstatus_reg		= OMAP_MPUIO_GPIO_INT,
 };
 
 static struct __initdata platform_device omap16xx_mpu_gpio = {
@@ -76,7 +77,8 @@ static struct __initdata resource omap16xx_gpio1_resources[] = {
 	.set_dataout_reg	= OMAP1610_GPIO_SET_DATAOUT, \
 	.clr_dataout_reg	= OMAP1610_GPIO_CLEAR_DATAOUT, \
 	.datain_reg		= OMAP1610_GPIO_DATAIN, \
-	.dataout_reg		= OMAP1610_GPIO_DATAOUT
+	.dataout_reg		= OMAP1610_GPIO_DATAOUT, \
+        .irqstatus_reg          = OMAP1610_GPIO_IRQSTATUS1
 
 static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
 	.virtual_irq_start	= IH_GPIO_BASE,
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 59c6e3dbf..61c1580 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -48,6 +48,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
 	.set_dataout_reg	= OMAP_MPUIO_OUTPUT / 2,
 	.datain_reg		= OMAP_MPUIO_INPUT_LATCH / 2,
 	.dataout_reg		= OMAP_MPUIO_OUTPUT / 2,
+	.irqstatus_reg		= OMAP_MPUIO_GPIO_INT / 2,
 };
 
 static struct __initdata platform_device omap7xx_mpu_gpio = {
@@ -76,7 +77,8 @@ static struct __initdata resource omap7xx_gpio1_resources[] = {
 #define OMAP7XX_GPIO_REG_OFFSETS \
 	.direction_reg		= OMAP7XX_GPIO_DIR_CONTROL, \
 	.datain_reg             = OMAP7XX_GPIO_DATA_INPUT, \
-	.dataout_reg            = OMAP7XX_GPIO_DATA_OUTPUT
+	.dataout_reg            = OMAP7XX_GPIO_DATA_OUTPUT, \
+        .irqstatus_reg          = OMAP7XX_GPIO_INT_STATUS
 
 static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
 	.virtual_irq_start	= IH_GPIO_BASE,
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index cc63188..712b858 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -70,6 +70,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
 		pdata->dataout_reg = OMAP24XX_GPIO_DATAOUT;
 		pdata->set_dataout_reg = OMAP24XX_GPIO_SETDATAOUT;
 		pdata->clr_dataout_reg = OMAP24XX_GPIO_CLEARDATAOUT;
+		pdata->irqstatus_reg = OMAP24XX_GPIO_IRQSTATUS1;
+		pdata->irqstatus2_reg = OMAP24XX_GPIO_IRQSTATUS2;
 		break;
 	case 2:
 		pdata->bank_type = METHOD_GPIO_44XX;
@@ -78,6 +80,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
 		pdata->dataout_reg = OMAP4_GPIO_DATAOUT;
 		pdata->set_dataout_reg = OMAP4_GPIO_SETDATAOUT;
 		pdata->clr_dataout_reg = OMAP4_GPIO_CLEARDATAOUT;
+		pdata->irqstatus_reg = OMAP4_GPIO_IRQSTATUS0;
+		pdata->irqstatus2_reg = OMAP4_GPIO_IRQSTATUS1;
 		break;
 	default:
 		WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 8f94488..b431eb1 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -62,6 +62,8 @@ struct gpio_bank {
 	u16 direction_reg;
 	u16 datain_reg;
 	u16 dataout_reg;
+	u16 irqstatus_reg;
+	u16 irqstatus2_reg;
 
 	/* SoC-specific register offsets (optional) */
 	u16 set_dataout_reg;
@@ -527,46 +529,14 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
 {
 	void __iomem *reg = bank->base;
 
-	switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP15XX
-	case METHOD_GPIO_1510:
-		reg += OMAP1510_GPIO_INT_STATUS;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
-	case METHOD_GPIO_1610:
-		reg += OMAP1610_GPIO_IRQSTATUS1;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
-	case METHOD_GPIO_7XX:
-		reg += OMAP7XX_GPIO_INT_STATUS;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	case METHOD_GPIO_24XX:
-		reg += OMAP24XX_GPIO_IRQSTATUS1;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP4)
-	case METHOD_GPIO_44XX:
-		reg += OMAP4_GPIO_IRQSTATUS0;
-		break;
-#endif
-	default:
-		WARN_ON(1);
-		return;
-	}
+	reg += bank->irqstatus_reg;
 	__raw_writel(gpio_mask, reg);
 
 	/* Workaround for clearing DSP GPIO interrupts to allow retention */
-	if (cpu_is_omap24xx() || cpu_is_omap34xx())
-		reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
-	else if (cpu_is_omap44xx())
-		reg = bank->base + OMAP4_GPIO_IRQSTATUS1;
-
-	if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx())
+	if (bank->irqstatus2_reg) {
+		reg = bank->base + bank->irqstatus2_reg;
 		__raw_writel(gpio_mask, reg);
+	}
 
 	/* Flush posted write for the irq status to avoid spurious interrupts */
 	__raw_readl(reg);
@@ -886,31 +856,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 	desc->irq_data.chip->irq_ack(&desc->irq_data);
 
 	bank = irq_get_handler_data(irq);
-#ifdef CONFIG_ARCH_OMAP1
-	if (bank->method == METHOD_MPUIO)
-		isr_reg = bank->base +
-				OMAP_MPUIO_GPIO_INT / bank->stride;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
-	if (bank->method == METHOD_GPIO_1510)
-		isr_reg = bank->base + OMAP1510_GPIO_INT_STATUS;
-#endif
-#if defined(CONFIG_ARCH_OMAP16XX)
-	if (bank->method == METHOD_GPIO_1610)
-		isr_reg = bank->base + OMAP1610_GPIO_IRQSTATUS1;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
-	if (bank->method == METHOD_GPIO_7XX)
-		isr_reg = bank->base + OMAP7XX_GPIO_INT_STATUS;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	if (bank->method == METHOD_GPIO_24XX)
-		isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
-#endif
-#if defined(CONFIG_ARCH_OMAP4)
-	if (bank->method == METHOD_GPIO_44XX)
-		isr_reg = bank->base + OMAP4_GPIO_IRQSTATUS0;
-#endif
+	isr_reg = bank->base + bank->irqstatus_reg;
 
 	if (WARN_ON(!isr_reg))
 		goto exit;
@@ -1442,6 +1388,8 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
 	bank->dataout_reg = pdata->dataout_reg;
 	bank->set_dataout_reg = pdata->dataout_reg;
 	bank->set_dataout_reg = pdata->dataout_reg;
+	bank->irqstatus_reg = pdata->irqstatus_reg;
+	bank->irqstatus2_reg = pdata->irqstatus2_reg;
 
 	spin_lock_init(&bank->lock);
 
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index bbf9a5f..6113183 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -185,6 +185,8 @@ struct omap_gpio_platform_data {
 	u16 direction_reg;
 	u16 datain_reg;
 	u16 dataout_reg;
+	u16 irqstatus_reg;
+	u16 irqstatus2_reg;
 
 	/* SoC-specific register offsets (optional) */
 	u16 set_dataout_reg;
-- 
1.7.4

[PATCH 8/9] OMAP: GPIO: conslidate enable/disable of GPIO IRQs, remove ifdefs

[Kevin Hilman]

Cleanup GPIO IRQ enable/disable handling by removing SoC-specific

Also split enable/disable IRQ into separate functions for better
readability and also facilitate potentially moving to generic irq_chip
in the future.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap1/gpio15xx.c         |    4 +
 arch/arm/mach-omap1/gpio16xx.c         |    7 ++-
 arch/arm/mach-omap1/gpio7xx.c          |    6 +-
 arch/arm/mach-omap2/gpio.c             |    6 ++
 arch/arm/plat-omap/gpio.c              |  140 +++++++++----------------------
 arch/arm/plat-omap/include/plat/gpio.h |    6 ++
 6 files changed, 68 insertions(+), 101 deletions(-)

diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 16e5890..64a5d53 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -44,6 +44,8 @@ static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
 	.datain_reg		= OMAP_MPUIO_INPUT_LATCH,
 	.dataout_reg		= OMAP_MPUIO_OUTPUT,
 	.irqstatus_reg		= OMAP_MPUIO_GPIO_INT,
+	.irqenable_reg		= OMAP_MPUIO_GPIO_MASKIT,
+	.irqenable_inv		= true,
 };
 
 static struct __initdata platform_device omap15xx_mpu_gpio = {
@@ -77,6 +79,8 @@ static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
 	.datain_reg		= OMAP1510_GPIO_DATA_INPUT,
 	.dataout_reg		= OMAP1510_GPIO_DATA_OUTPUT,
 	.irqstatus_reg          = OMAP1510_GPIO_INT_STATUS,
+	.irqenable_reg		= OMAP1510_GPIO_INT_MASK,
+	.irqenable_inv		= true,
 };
 
 static struct __initdata platform_device omap15xx_gpio = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 700687c..864ddd1 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -47,6 +47,8 @@ static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
 	.datain_reg		= OMAP_MPUIO_INPUT_LATCH,
 	.dataout_reg		= OMAP_MPUIO_OUTPUT,
 	.irqstatus_reg		= OMAP_MPUIO_GPIO_INT,
+	.irqenable_reg		= OMAP_MPUIO_GPIO_MASKIT,
+	.irqenable_inv		= true,
 };
 
 static struct __initdata platform_device omap16xx_mpu_gpio = {
@@ -78,7 +80,10 @@ static struct __initdata resource omap16xx_gpio1_resources[] = {
 	.clr_dataout_reg	= OMAP1610_GPIO_CLEAR_DATAOUT, \
 	.datain_reg		= OMAP1610_GPIO_DATAIN, \
 	.dataout_reg		= OMAP1610_GPIO_DATAOUT, \
-        .irqstatus_reg          = OMAP1610_GPIO_IRQSTATUS1
+	.irqstatus_reg          = OMAP1610_GPIO_IRQSTATUS1, \
+	.irqenable_reg          = OMAP1610_GPIO_IRQENABLE1, \
+	.set_irqenable_reg      = OMAP1610_GPIO_SET_IRQENABLE1, \
+	.clr_irqenable_reg      = OMAP1610_GPIO_CLEAR_IRQENABLE1
 
 static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
 	.virtual_irq_start	= IH_GPIO_BASE,
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 61c1580..cff4ab8 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -49,6 +49,8 @@ static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
 	.datain_reg		= OMAP_MPUIO_INPUT_LATCH / 2,
 	.dataout_reg		= OMAP_MPUIO_OUTPUT / 2,
 	.irqstatus_reg		= OMAP_MPUIO_GPIO_INT / 2,
+	.irqenable_reg		= OMAP_MPUIO_GPIO_MASKIT / 2,
+	.irqenable_inv		= true,
 };
 
 static struct __initdata platform_device omap7xx_mpu_gpio = {
@@ -78,7 +80,9 @@ static struct __initdata resource omap7xx_gpio1_resources[] = {
 	.direction_reg		= OMAP7XX_GPIO_DIR_CONTROL, \
 	.datain_reg             = OMAP7XX_GPIO_DATA_INPUT, \
 	.dataout_reg            = OMAP7XX_GPIO_DATA_OUTPUT, \
-        .irqstatus_reg          = OMAP7XX_GPIO_INT_STATUS
+	.irqstatus_reg          = OMAP7XX_GPIO_INT_STATUS, \
+	.irqenable_reg          = OMAP7XX_GPIO_INT_MASK, \
+	.irqenable_inv          = true
 
 static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
 	.virtual_irq_start	= IH_GPIO_BASE,
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 712b858..538ed92 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -72,6 +72,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
 		pdata->clr_dataout_reg = OMAP24XX_GPIO_CLEARDATAOUT;
 		pdata->irqstatus_reg = OMAP24XX_GPIO_IRQSTATUS1;
 		pdata->irqstatus2_reg = OMAP24XX_GPIO_IRQSTATUS2;
+		pdata->irqenable_reg = OMAP24XX_GPIO_IRQENABLE1;
+		pdata->set_irqenable_reg = OMAP24XX_GPIO_SETIRQENABLE1;
+		pdata->clr_irqenable_reg = OMAP24XX_GPIO_CLEARIRQENABLE1;
 		break;
 	case 2:
 		pdata->bank_type = METHOD_GPIO_44XX;
@@ -82,6 +85,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
 		pdata->clr_dataout_reg = OMAP4_GPIO_CLEARDATAOUT;
 		pdata->irqstatus_reg = OMAP4_GPIO_IRQSTATUS0;
 		pdata->irqstatus2_reg = OMAP4_GPIO_IRQSTATUS1;
+		pdata->irqenable_reg = OMAP4_GPIO_IRQSTATUSSET0;
+		pdata->set_irqenable_reg = OMAP4_GPIO_IRQSTATUSSET0;
+		pdata->clr_irqenable_reg = OMAP4_GPIO_IRQSTATUSCLR0;
 		break;
 	default:
 		WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index b431eb1..8d80bf0 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -64,10 +64,16 @@ struct gpio_bank {
 	u16 dataout_reg;
 	u16 irqstatus_reg;
 	u16 irqstatus2_reg;
+	u16 irqenable_reg;
 
 	/* SoC-specific register offsets (optional) */
 	u16 set_dataout_reg;
 	u16 clr_dataout_reg;
+	u16 set_irqenable_reg;
+	u16 clr_irqenable_reg;
+
+	/* SoC-specific register options */
+	bool irqenable_inv;
 };
 
 #ifdef CONFIG_ARCH_OMAP3
@@ -550,129 +556,61 @@ static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
 static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
 {
 	void __iomem *reg = bank->base;
-	int inv = 0;
 	u32 l;
 	u32 mask = (1 << bank->width) - 1;
 
-	switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
-	case METHOD_MPUIO:
-		reg += OMAP_MPUIO_GPIO_MASKIT / bank->stride;
-		inv = 1;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
-	case METHOD_GPIO_1510:
-		reg += OMAP1510_GPIO_INT_MASK;
-		inv = 1;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
-	case METHOD_GPIO_1610:
-		reg += OMAP1610_GPIO_IRQENABLE1;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
-	case METHOD_GPIO_7XX:
-		reg += OMAP7XX_GPIO_INT_MASK;
-		inv = 1;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	case METHOD_GPIO_24XX:
-		reg += OMAP24XX_GPIO_IRQENABLE1;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP4)
-	case METHOD_GPIO_44XX:
-		reg += OMAP4_GPIO_IRQSTATUSSET0;
-		break;
-#endif
-	default:
-		WARN_ON(1);
-		return 0;
-	}
-
+	reg += bank->irqenable_reg;
 	l = __raw_readl(reg);
-	if (inv)
+	if (bank->irqenable_inv)
 		l = ~l;
 	l &= mask;
 	return l;
 }
 
-static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enable)
+static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
 {
 	void __iomem *reg = bank->base;
 	u32 l;
 
-	switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
-	case METHOD_MPUIO:
-		reg += OMAP_MPUIO_GPIO_MASKIT / bank->stride;
+	if (bank->set_irqenable_reg) {
+		reg += bank->set_irqenable_reg;
+		l = gpio_mask;
+	} else {
+		reg += bank->irqenable_reg;
 		l = __raw_readl(reg);
-		if (enable)
-			l &= ~(gpio_mask);
+		if (bank->irqenable_inv)
+			l &= ~gpio_mask;
 		else
 			l |= gpio_mask;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
-	case METHOD_GPIO_1510:
-		reg += OMAP1510_GPIO_INT_MASK;
-		l = __raw_readl(reg);
-		if (enable)
-			l &= ~(gpio_mask);
-		else
-			l |= gpio_mask;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
-	case METHOD_GPIO_1610:
-		if (enable)
-			reg += OMAP1610_GPIO_SET_IRQENABLE1;
-		else
-			reg += OMAP1610_GPIO_CLEAR_IRQENABLE1;
+	}
+
+	__raw_writel(l, reg);
+}
+
+static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
+{
+	void __iomem *reg = bank->base;
+	u32 l;
+
+	if (bank->clr_irqenable_reg) {
+		reg += bank->clr_irqenable_reg;
 		l = gpio_mask;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
-	case METHOD_GPIO_7XX:
-		reg += OMAP7XX_GPIO_INT_MASK;
+	} else {
+		reg += bank->irqenable_reg;
 		l = __raw_readl(reg);
-		if (enable)
-			l &= ~(gpio_mask);
-		else
+		if (bank->irqenable_inv)
 			l |= gpio_mask;
-		break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	case METHOD_GPIO_24XX:
-		if (enable)
-			reg += OMAP24XX_GPIO_SETIRQENABLE1;
-		else
-			reg += OMAP24XX_GPIO_CLEARIRQENABLE1;
-		l = gpio_mask;
-		break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
-	case METHOD_GPIO_44XX:
-		if (enable)
-			reg += OMAP4_GPIO_IRQSTATUSSET0;
 		else
-			reg += OMAP4_GPIO_IRQSTATUSCLR0;
-		l = gpio_mask;
-		break;
-#endif
-	default:
-		WARN_ON(1);
-		return;
+			l &= ~gpio_mask;
+		
 	}
+
 	__raw_writel(l, reg);
 }
 
 static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable)
 {
-	_enable_gpio_irqbank(bank, 1 << get_gpio_index(gpio), enable);
+	_enable_gpio_irqbank(bank, 1 << get_gpio_index(gpio));
 }
 
 /*
@@ -878,9 +816,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 		/* clear edge sensitive interrupts before handler(s) are
 		called so that we don't miss any interrupt occurred while
 		executing them */
-		_enable_gpio_irqbank(bank, isr_saved & ~level_mask, 0);
+		_disable_gpio_irqbank(bank, isr_saved & ~level_mask);
 		_clear_gpio_irqbank(bank, isr_saved & ~level_mask);
-		_enable_gpio_irqbank(bank, isr_saved & ~level_mask, 1);
+		_enable_gpio_irqbank(bank, isr_saved & ~level_mask);
 
 		/* if there is only edge sensitive GPIO pin interrupts
 		configured, we could unmask GPIO bank interrupt immediately */
@@ -1390,6 +1328,10 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
 	bank->set_dataout_reg = pdata->dataout_reg;
 	bank->irqstatus_reg = pdata->irqstatus_reg;
 	bank->irqstatus2_reg = pdata->irqstatus2_reg;
+	bank->irqenable_reg = pdata->irqenable_reg;
+	bank->irqenable_inv = pdata->irqenable_inv;
+	bank->set_irqenable_reg = pdata->set_irqenable_reg;
+	bank->clr_irqenable_reg = pdata->clr_irqenable_reg;
 
 	spin_lock_init(&bank->lock);
 
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 6113183..184a853 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -187,10 +187,16 @@ struct omap_gpio_platform_data {
 	u16 dataout_reg;
 	u16 irqstatus_reg;
 	u16 irqstatus2_reg;
+	u16 irqenable_reg;
 
 	/* SoC-specific register offsets (optional) */
 	u16 set_dataout_reg;
 	u16 clr_dataout_reg;
+	u16 set_irqenable_reg;
+	u16 clr_irqenable_reg;
+
+	/* SoC-specific register options */
+	bool irqenable_inv;
 };
 
 /* TODO: Analyze removing gpio_bank_count usage from driver code */
-- 
1.7.4

[PATCH 9/9] OMAP: GPIO: convert MPUIO IRQ over to generic irq_chip

[Kevin Hilman]

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/plat-omap/gpio.c |   74 ++++++++++++++++++--------------------------
 1 files changed, 30 insertions(+), 44 deletions(-)

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 8d80bf0..57530c0 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -922,45 +922,8 @@ static struct irq_chip gpio_irq_chip = {
 
 #ifdef CONFIG_ARCH_OMAP1
 
-/* MPUIO uses the always-on 32k clock */
-
-static void mpuio_ack_irq(struct irq_data *d)
-{
-	/* The ISR is reset automatically, so do nothing here. */
-}
-
-static void mpuio_mask_irq(struct irq_data *d)
-{
-	unsigned int gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
-	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
-
-	_set_gpio_irqenable(bank, gpio, 0);
-}
-
-static void mpuio_unmask_irq(struct irq_data *d)
-{
-	unsigned int gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
-	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
-
-	_set_gpio_irqenable(bank, gpio, 1);
-}
-
-static struct irq_chip mpuio_irq_chip = {
-	.name		= "MPUIO",
-	.irq_ack	= mpuio_ack_irq,
-	.irq_mask	= mpuio_mask_irq,
-	.irq_unmask	= mpuio_unmask_irq,
-	.irq_set_type	= gpio_irq_type,
-#ifdef CONFIG_ARCH_OMAP16XX
-	/* REVISIT: assuming only 16xx supports MPUIO wake events */
-	.irq_set_wake	= gpio_wake_enable,
-#endif
-};
-
-
 #define bank_is_mpuio(bank)	((bank)->method == METHOD_MPUIO)
 
-
 #ifdef CONFIG_ARCH_OMAP16XX
 
 #include <linux/platform_device.h>
@@ -1035,8 +998,6 @@ static inline void mpuio_init(void) {}
 
 #else
 
-extern struct irq_chip mpuio_irq_chip;
-
 #define bank_is_mpuio(bank)	0
 static inline void mpuio_init(void) {}
 
@@ -1236,6 +1197,30 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
 	}
 }
 
+static __init void
+omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start,
+		    unsigned int num)
+{
+	struct irq_chip_generic *gc;
+	struct irq_chip_type *ct;
+
+	gc = irq_alloc_generic_chip("MPUIO", 1, irq_start, bank->base,
+				    handle_simple_irq);
+	ct = gc->chip_types;
+
+	/* NOTE: No ack required, reading IRQ status clears it. */
+	ct->chip.irq_mask = irq_gc_mask_set_bit;
+	ct->chip.irq_unmask = irq_gc_mask_clr_bit;
+	ct->chip.irq_set_type = gpio_irq_type;
+	/* REVISIT: assuming only 16xx supports MPUIO wake events */
+	if (cpu_is_omap16xx())
+		ct->chip.irq_set_wake = gpio_wake_enable,
+
+	ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride;
+	irq_setup_generic_chip(gc, IRQ_MSK(num),
+				IRQ_NOREQUEST | IRQ_NOPROBE, 0);
+}
+
 static void __init omap_gpio_chip_init(struct gpio_bank *bank)
 {
 	int j;
@@ -1273,12 +1258,13 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank)
 		     j < bank->virtual_irq_start + bank->width; j++) {
 		irq_set_lockdep_class(j, &gpio_lock_class);
 		irq_set_chip_data(j, bank);
-		if (bank_is_mpuio(bank))
-			irq_set_chip(j, &mpuio_irq_chip);
-		else
+		if (bank_is_mpuio(bank)) {
+			omap_mpuio_alloc_gc(bank->base, j, bank->width);
+		} else {
 			irq_set_chip(j, &gpio_irq_chip);
-		irq_set_handler(j, handle_simple_irq);
-		set_irq_flags(j, IRQF_VALID);
+			irq_set_handler(j, handle_simple_irq);
+			set_irq_flags(j, IRQF_VALID);
+		}
 	}
 	irq_set_chained_handler(bank->irq, gpio_irq_handler);
 	irq_set_handler_data(bank->irq, bank);
-- 
1.7.4

RE: [PATCH 0/9] OMAP: GPIO: cleanup, consolidation, etc. (v2)

[DebBarma, Tarun Kanti]

Kevin,
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> owner@vger.kernel.org] On Behalf Of Hilman, Kevin
> Sent: Friday, April 22, 2011 2:05 AM
> To: linux-omap@vger.kernel.org
> Cc: Varadarajan, Charulatha
> Subject: [PATCH 0/9] OMAP: GPIO: cleanup, consolidation, etc. (v2)
> 
> Here's an updated version of my work-in-progress GPIO cleanups.
> 
> I now understand that others have some similar work in progress, so
> these are posted (to linux-omap only, for now) so that we can begin
> collaboration on the GPIO cleanups.
> 
> This series applies on top of v2.6.39-rc4 plus the generic irq_chip
> series from Thomas Gleixner since in addition to the cleanups, I
> started moving the GPIO IRQ handling over to use generic irq_chip
> (last patch in series.)
> 
> This work in progress is available in my wip/gpio-cleanup branch.
There are two observations in this series:
(1) omap1_defconfig  build generates following compilation errors
  CHK     include/generated/compile.h
  CC      arch/arm/plat-omap/gpio.o
arch/arm/plat-omap/gpio.c: In function 'omap_mpuio_alloc_gc':
arch/arm/plat-omap/gpio.c:1207: error: implicit declaration of function 'irq_alloc_generic_chip'
arch/arm/plat-omap/gpio.c:1208: warning: assignment makes pointer from integer without a cast
arch/arm/plat-omap/gpio.c:1209: error: dereferencing pointer to incomplete type
arch/arm/plat-omap/gpio.c:1212: error: dereferencing pointer to incomplete type
arch/arm/plat-omap/gpio.c:1212: error: 'irq_gc_mask_set_bit' undeclared (first use in this function)
arch/arm/plat-omap/gpio.c:1212: error: (Each undeclared identifier is reported only once
arch/arm/plat-omap/gpio.c:1212: error: for each function it appears in.)
arch/arm/plat-omap/gpio.c:1213: error: dereferencing pointer to incomplete type
arch/arm/plat-omap/gpio.c:1213: error: 'irq_gc_mask_clr_bit' undeclared (first use in this function)
arch/arm/plat-omap/gpio.c:1214: error: dereferencing pointer to incomplete type
arch/arm/plat-omap/gpio.c:1217: error: dereferencing pointer to incomplete type
arch/arm/plat-omap/gpio.c:1219: error: dereferencing pointer to incomplete type
arch/arm/plat-omap/gpio.c:1219: warning: left-hand operand of comma expression has no effect
arch/arm/plat-omap/gpio.c:1220: error: implicit declaration of function 'irq_setup_generic_chip'
arch/arm/plat-omap/gpio.c:1220: error: implicit declaration of function 'IRQ_MSK'
make[1]: *** [arch/arm/plat-omap/gpio.o] Error 1
make: *** [arch/arm/plat-omap] Error 2

(2) Warning in the 8th patch. Also, note the typo (consolidate).
Applying: OMAP: GPIO: conslidate enable/disable of GPIO IRQs,
/home/a0876346/working/tony3/linux-omap-2.6/.git/rebase-apply/patch:272: trailing whitespace.

warning: 1 line adds whitespace errors.
Applying: OMAP: GPIO: convert MPUIO IRQ over to generic

--
Tarun
> 
> Kevin Hilman (9):
>   OMAP: GPIO: _clear_gpio_irqbank: fix flushing of posted write
>   OMAP: GPIO: remove MPUIO handling from _clear_gpio_irqbank()
>   OMAP: GPIO: move bank width into struct gpio_bank
>   OMAP: GPIO: _get_gpio_irqbank_mask: replace hard-coded mask with
>     bank->width
>   OMAP: GPIO: move register offset defines into gpio.h
>   OMAP: GPIO: consolidate direction, input, output, remove #ifdefs
>   OMAP: GPIO: consolidate IRQ status handling, remove #ifdefs
>   OMAP: GPIO: conslidate enable/disable of GPIO IRQs, remove ifdefs
>   OMAP: GPIO: convert MPUIO IRQ over to generic irq_chip
> 
>  arch/arm/mach-omap1/gpio15xx.c         |   13 +
>  arch/arm/mach-omap1/gpio16xx.c         |   22 ++
>  arch/arm/mach-omap1/gpio7xx.c          |   21 +
>  arch/arm/mach-omap2/gpio.c             |   20 +
>  arch/arm/plat-omap/gpio.c              |  641 ++++++---------------------
> -----
>  arch/arm/plat-omap/include/plat/gpio.h |  120 ++++++
>  6 files changed, 318 insertions(+), 519 deletions(-)
> 
> --
> 1.7.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

RE: [PATCH 0/9] OMAP: GPIO: cleanup, consolidation, etc. (v2)

[DebBarma, Tarun Kanti]

Kevin,
[...]
> >
> > Here's an updated version of my work-in-progress GPIO cleanups.
> >
> > I now understand that others have some similar work in progress, so
> > these are posted (to linux-omap only, for now) so that we can begin
> > collaboration on the GPIO cleanups.
> >
> > This series applies on top of v2.6.39-rc4 plus the generic irq_chip
> > series from Thomas Gleixner since in addition to the cleanups, I
> > started moving the GPIO IRQ handling over to use generic irq_chip
> > (last patch in series.)
> >
> > This work in progress is available in my wip/gpio-cleanup branch.
> There are two observations in this series:
> (1) omap1_defconfig  build generates following compilation errors:
I realized that I missed the patch series from Thomas Gleixner.
BTW, there are multiple series related to irq_chip cleanup.
Do we need to apply all the series?
--
Tarun

>   CHK     include/generated/compile.h
>   CC      arch/arm/plat-omap/gpio.o
> arch/arm/plat-omap/gpio.c: In function 'omap_mpuio_alloc_gc':
> arch/arm/plat-omap/gpio.c:1207: error: implicit declaration of function
> 'irq_alloc_generic_chip'
> arch/arm/plat-omap/gpio.c:1208: warning: assignment makes pointer from
> integer without a cast
> arch/arm/plat-omap/gpio.c:1209: error: dereferencing pointer to incomplete
> type
> arch/arm/plat-omap/gpio.c:1212: error: dereferencing pointer to incomplete
> type
> arch/arm/plat-omap/gpio.c:1212: error: 'irq_gc_mask_set_bit' undeclared
> (first use in this function)
> arch/arm/plat-omap/gpio.c:1212: error: (Each undeclared identifier is
> reported only once
> arch/arm/plat-omap/gpio.c:1212: error: for each function it appears in.)
> arch/arm/plat-omap/gpio.c:1213: error: dereferencing pointer to incomplete
> type
> arch/arm/plat-omap/gpio.c:1213: error: 'irq_gc_mask_clr_bit' undeclared
> (first use in this function)
> arch/arm/plat-omap/gpio.c:1214: error: dereferencing pointer to incomplete
> type
> arch/arm/plat-omap/gpio.c:1217: error: dereferencing pointer to incomplete
> type
> arch/arm/plat-omap/gpio.c:1219: error: dereferencing pointer to incomplete
> type
> arch/arm/plat-omap/gpio.c:1219: warning: left-hand operand of comma
> expression has no effect
> arch/arm/plat-omap/gpio.c:1220: error: implicit declaration of function
> 'irq_setup_generic_chip'
> arch/arm/plat-omap/gpio.c:1220: error: implicit declaration of function
> 'IRQ_MSK'
> make[1]: *** [arch/arm/plat-omap/gpio.o] Error 1
> make: *** [arch/arm/plat-omap] Error 2
> 
> (2) Warning in the 8th patch. Also, note the typo (consolidate).
> Applying: OMAP: GPIO: conslidate enable/disable of GPIO IRQs,
> /home/a0876346/working/tony3/linux-omap-2.6/.git/rebase-apply/patch:272:
> trailing whitespace.
> 
> warning: 1 line adds whitespace errors.
> Applying: OMAP: GPIO: convert MPUIO IRQ over to generic
> 
> --
> Tarun
> >
> > Kevin Hilman (9):
> >   OMAP: GPIO: _clear_gpio_irqbank: fix flushing of posted write
> >   OMAP: GPIO: remove MPUIO handling from _clear_gpio_irqbank()
> >   OMAP: GPIO: move bank width into struct gpio_bank
> >   OMAP: GPIO: _get_gpio_irqbank_mask: replace hard-coded mask with
> >     bank->width
> >   OMAP: GPIO: move register offset defines into gpio.h
> >   OMAP: GPIO: consolidate direction, input, output, remove #ifdefs
> >   OMAP: GPIO: consolidate IRQ status handling, remove #ifdefs
> >   OMAP: GPIO: conslidate enable/disable of GPIO IRQs, remove ifdefs
> >   OMAP: GPIO: convert MPUIO IRQ over to generic irq_chip
> >
> >  arch/arm/mach-omap1/gpio15xx.c         |   13 +
> >  arch/arm/mach-omap1/gpio16xx.c         |   22 ++
> >  arch/arm/mach-omap1/gpio7xx.c          |   21 +
> >  arch/arm/mach-omap2/gpio.c             |   20 +
> >  arch/arm/plat-omap/gpio.c              |  641 ++++++-------------------
> --
> > -----
> >  arch/arm/plat-omap/include/plat/gpio.h |  120 ++++++
> >  6 files changed, 318 insertions(+), 519 deletions(-)
> >
> > --
> > 1.7.4
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 0/9] OMAP: GPIO: cleanup, consolidation, etc. (v2)

[Varadarajan, Charulatha]

Kevin,

On Fri, Apr 22, 2011 at 02:05, Kevin Hilman <khilman@ti.com> wrote:
> Here's an updated version of my work-in-progress GPIO cleanups.
>
> I now understand that others have some similar work in progress, so
> these are posted (to linux-omap only, for now) so that we can begin
> collaboration on the GPIO cleanups.
>
> This series applies on top of v2.6.39-rc4 plus the generic irq_chip
> series from Thomas Gleixner since in addition to the cleanups, I
> started moving the GPIO IRQ handling over to use generic irq_chip
> (last patch in series.)
>
> This work in progress is available in my wip/gpio-cleanup branch.

I tested the patch series in wip/gpio-cleanup branch.

Here are the results:

Compile tested for:
 - omap1_defconfig
 - omap2plus_defconfig

Boot test (Failed on the following board):
 - OMAP1710-H3

Boot test (Success on the following boards):
 - OMAP2420-H4
 - OMAP3430-SDP
 - OMAP3430-Zoom2
 - OMAP3630-Zoom3
 - OMAP4430-SDP
 - OMAP4430-Blaze

GPIO module functionality testing (success on the following boards):
 - OMAP2420-H4
 - OMAP3430-SDP
 - OMAP3430-Zoom2
 - OMAP3630-Zoom3
 - OMAP4430-SDP
 - OMAP4430-Blaze

PM Testing (success as given below):
OMAP3430-SDP: retention, off_mode, system_wide suspend, gpio wakeup
OMAP3630-Zoom3: retention, system_wide suspend
using the following:
            echo 5 > /sys/devices/platform/omap/omap_uart.0/sleep_timeout
            echo 5 > /sys/devices/platform/omap/omap_uart.1/sleep_timeout
            echo 5 > /sys/devices/platform/omap/omap_uart.2/sleep_timeout
            echo 5 > /sys/devices/platform/omap/omap_uart.3/sleep_timeout
            echo '5' > /debug/pm_debug/wakeup_timer_seconds
            echo 1 > /debug/pm_debug/sleep_while_idle
            echo 1 > /debug/pm_debug/enable_off_mode

-V Charulatha

Re: [PATCH 0/9] OMAP: GPIO: cleanup, consolidation, etc. (v2)

[Kevin Hilman]

"DebBarma, Tarun Kanti" <tarun.kanti@ti.com> writes:

> Kevin,
> [...]
>> >
>> > Here's an updated version of my work-in-progress GPIO cleanups.
>> >
>> > I now understand that others have some similar work in progress, so
>> > these are posted (to linux-omap only, for now) so that we can begin
>> > collaboration on the GPIO cleanups.
>> >
>> > This series applies on top of v2.6.39-rc4 plus the generic irq_chip
>> > series from Thomas Gleixner since in addition to the cleanups, I
>> > started moving the GPIO IRQ handling over to use generic irq_chip
>> > (last patch in series.)
>> >
>> > This work in progress is available in my wip/gpio-cleanup branch.
>> There are two observations in this series:
>> (1) omap1_defconfig  build generates following compilation errors:
> I realized that I missed the patch series from Thomas Gleixner.
> BTW, there are multiple series related to irq_chip cleanup.
> Do we need to apply all the series?

My wip/gpio-cleanup branch also includes Thomas' series, please use that
for testing.

Kevin

Re: [PATCH 0/9] OMAP: GPIO: cleanup, consolidation, etc. (v2)

[Kevin Hilman]

Hi Charu,

"Varadarajan, Charulatha" <charu@ti.com> writes:

> I tested the patch series in wip/gpio-cleanup branch.

Thanks so much for testing.  It's a great help.

I've updated the branch based on some of your comments, and in
particular it should now boot on OMAP1.

Kevin

> Here are the results:
>
> Compile tested for:
>  - omap1_defconfig
>  - omap2plus_defconfig
>
> Boot test (Failed on the following board):
>  - OMAP1710-H3
>
> Boot test (Success on the following boards):
>  - OMAP2420-H4
>  - OMAP3430-SDP
>  - OMAP3430-Zoom2
>  - OMAP3630-Zoom3
>  - OMAP4430-SDP
>  - OMAP4430-Blaze
>
> GPIO module functionality testing (success on the following boards):
>  - OMAP2420-H4
>  - OMAP3430-SDP
>  - OMAP3430-Zoom2
>  - OMAP3630-Zoom3
>  - OMAP4430-SDP
>  - OMAP4430-Blaze
>
> PM Testing (success as given below):
> OMAP3430-SDP: retention, off_mode, system_wide suspend, gpio wakeup
> OMAP3630-Zoom3: retention, system_wide suspend
> using the following:
>             echo 5 > /sys/devices/platform/omap/omap_uart.0/sleep_timeout
>             echo 5 > /sys/devices/platform/omap/omap_uart.1/sleep_timeout
>             echo 5 > /sys/devices/platform/omap/omap_uart.2/sleep_timeout
>             echo 5 > /sys/devices/platform/omap/omap_uart.3/sleep_timeout
>             echo '5' > /debug/pm_debug/wakeup_timer_seconds
>             echo 1 > /debug/pm_debug/sleep_while_idle
>             echo 1 > /debug/pm_debug/enable_off_mode
>
> -V Charulatha