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* [PATCH] Fixed processing of bootarg 'mpurate'
@ 2009-07-31 11:43 Sanjeev Premi
  2009-08-06 14:34 ` Kevin Hilman
  0 siblings, 1 reply; 6+ messages in thread
From: Sanjeev Premi @ 2009-07-31 11:43 UTC (permalink / raw)
  To: linux-omap; +Cc: Sanjeev Premi

The argument 'mpurate' had no effect on the MPU
frequency. This patch fixes the same.

It also ensures that DSP frequency is set according
to the OPP definitions.

Signed-off-by: Sanjeev Premi <premi@ti.com>
---
 arch/arm/mach-omap2/clock34xx.c |   57 +++++++++++++++++++++++++++++++++++---
 1 files changed, 52 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index c2e5ef8..a9e7e82 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -29,6 +29,7 @@
 #include <linux/err.h>
 #include <linux/cpufreq.h>
 
+#include <mach/cpu.h>
 #include <mach/clock.h>
 #include <mach/sram.h>
 #include <mach/omap-pm.h>
@@ -42,6 +43,7 @@
 #include "prm-regbits-34xx.h"
 #include "cm.h"
 #include "cm-regbits-34xx.h"
+#include "omap3-opp.h"
 
 static const struct clkops clkops_noncore_dpll_ops;
 
@@ -1083,6 +1085,11 @@ void omap2_clk_prepare_for_reboot(void)
  */
 static int __init omap2_clk_arch_init(void)
 {
+	unsigned short opp=0;
+	unsigned short i;
+	unsigned long dsprate;
+	struct omap_opp *opp_table;
+
 	if (!mpurate)
 		return -EINVAL;
 
@@ -1092,12 +1099,49 @@ static int __init omap2_clk_arch_init(void)
 		printk(KERN_ERR "Could not find matching MPU rate\n");
 #endif
 
+	if (clk_set_rate(&dpll1_ck, mpurate))
+		printk(KERN_ERR "*** Unable to set MPU rate\n");
+	omap3_dpll_recalc(&dpll1_ck);
+
+	/* Get the OPP corresponding to the mpurate */
+	if (mpu_opps) {
+		opp_table = mpu_opps;
+
+		for (i=0;  opp_table[i].opp_id <= MAX_VDD1_OPP; i++)
+			if (opp_table[i].rate == mpurate)
+				break;
+
+		opp = opp_table[i].opp_id;
+
+		pr_debug("Switched to OPP:%d\n", opp);
+	}
+
+	/* Get dsprate corresponding to the opp */
+	if ((dsp_opps) && (opp >= VDD1_OPP1) && (opp <= VDD1_OPP5)) {
+		opp_table = dsp_opps;
+
+		for (i=0;  opp_table[i].opp_id <= MAX_VDD1_OPP; i++)
+			if (opp_table[i].opp_id == opp)
+				break;
+
+		dsprate = opp_table[i].rate;
+
+		if (clk_set_rate(&dpll2_ck, dsprate))
+			printk(KERN_ERR "*** Unable to set IVA2 rate\n");
+		omap3_dpll_recalc(&dpll2_ck);
+	}
+
 	recalculate_root_clocks();
 
-	printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): "
+	printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): "
 	       "%ld.%01ld/%ld/%ld MHz\n",
-	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
-	       (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
+	       (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10),
+	       (core_ck.rate / 1000000), (dpll1_ck.rate / 1000000)) ;
+
+	printk(KERN_INFO "IVA2 clocking rate: %ld MHz\n",
+	       (dpll2_ck.rate / 1000000)) ;
+
+	calibrate_delay();
 
 	return 0;
 }
@@ -1156,10 +1200,13 @@ int __init omap2_clk_init(void)
 
 	recalculate_root_clocks();
 
-	printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
+	printk(KERN_INFO "Clocking rate (Crystal/DPLL/MPU core): "
 	       "%ld.%01ld/%ld/%ld MHz\n",
 	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
-	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
+               (core_ck.rate / 1000000), (dpll1_ck.rate / 1000000));
+
+	printk(KERN_INFO "IVA2 clocking rate: %ld MHz\n",
+	       (dpll2_ck.rate / 1000000)) ;
 
 	/*
 	 * Only enable those clocks we will need, let the drivers
-- 
1.6.2.2


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] Fixed processing of bootarg 'mpurate'
  2009-07-31 11:43 [PATCH] Fixed processing of bootarg 'mpurate' Sanjeev Premi
@ 2009-08-06 14:34 ` Kevin Hilman
  2009-08-10 10:23   ` Premi, Sanjeev
  0 siblings, 1 reply; 6+ messages in thread
From: Kevin Hilman @ 2009-08-06 14:34 UTC (permalink / raw)
  To: Sanjeev Premi; +Cc: linux-omap

Sanjeev Premi <premi@ti.com> writes:

> The argument 'mpurate' had no effect on the MPU
> frequency. This patch fixes the same.
>
> It also ensures that DSP frequency is set according
> to the OPP definitions.
>
> Signed-off-by: Sanjeev Premi <premi@ti.com>

Can you break this into two patches.  One that simply fixes the MPU
rate setting bug and that applies against linux-omap master and
can be queued for omap-fixes.

The DSP rate setting is a separate problem and could be done in
a patch against the PM branch.

Kevin


> ---
>  arch/arm/mach-omap2/clock34xx.c |   57 +++++++++++++++++++++++++++++++++++---
>  1 files changed, 52 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
> index c2e5ef8..a9e7e82 100644
> --- a/arch/arm/mach-omap2/clock34xx.c
> +++ b/arch/arm/mach-omap2/clock34xx.c
> @@ -29,6 +29,7 @@
>  #include <linux/err.h>
>  #include <linux/cpufreq.h>
>  
> +#include <mach/cpu.h>
>  #include <mach/clock.h>
>  #include <mach/sram.h>
>  #include <mach/omap-pm.h>
> @@ -42,6 +43,7 @@
>  #include "prm-regbits-34xx.h"
>  #include "cm.h"
>  #include "cm-regbits-34xx.h"
> +#include "omap3-opp.h"
>  
>  static const struct clkops clkops_noncore_dpll_ops;
>  
> @@ -1083,6 +1085,11 @@ void omap2_clk_prepare_for_reboot(void)
>   */
>  static int __init omap2_clk_arch_init(void)
>  {
> +	unsigned short opp=0;
> +	unsigned short i;
> +	unsigned long dsprate;
> +	struct omap_opp *opp_table;
> +
>  	if (!mpurate)
>  		return -EINVAL;
>  
> @@ -1092,12 +1099,49 @@ static int __init omap2_clk_arch_init(void)
>  		printk(KERN_ERR "Could not find matching MPU rate\n");
>  #endif
>  
> +	if (clk_set_rate(&dpll1_ck, mpurate))
> +		printk(KERN_ERR "*** Unable to set MPU rate\n");
> +	omap3_dpll_recalc(&dpll1_ck);
> +
> +	/* Get the OPP corresponding to the mpurate */
> +	if (mpu_opps) {
> +		opp_table = mpu_opps;
> +
> +		for (i=0;  opp_table[i].opp_id <= MAX_VDD1_OPP; i++)
> +			if (opp_table[i].rate == mpurate)
> +				break;
> +
> +		opp = opp_table[i].opp_id;
> +
> +		pr_debug("Switched to OPP:%d\n", opp);
> +	}
> +
> +	/* Get dsprate corresponding to the opp */
> +	if ((dsp_opps) && (opp >= VDD1_OPP1) && (opp <= VDD1_OPP5)) {
> +		opp_table = dsp_opps;
> +
> +		for (i=0;  opp_table[i].opp_id <= MAX_VDD1_OPP; i++)
> +			if (opp_table[i].opp_id == opp)
> +				break;
> +
> +		dsprate = opp_table[i].rate;
> +
> +		if (clk_set_rate(&dpll2_ck, dsprate))
> +			printk(KERN_ERR "*** Unable to set IVA2 rate\n");
> +		omap3_dpll_recalc(&dpll2_ck);
> +	}
> +
>  	recalculate_root_clocks();
>  
> -	printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): "
> +	printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): "
>  	       "%ld.%01ld/%ld/%ld MHz\n",
> -	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
> -	       (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
> +	       (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10),
> +	       (core_ck.rate / 1000000), (dpll1_ck.rate / 1000000)) ;
> +
> +	printk(KERN_INFO "IVA2 clocking rate: %ld MHz\n",
> +	       (dpll2_ck.rate / 1000000)) ;
> +
> +	calibrate_delay();
>  
>  	return 0;
>  }
> @@ -1156,10 +1200,13 @@ int __init omap2_clk_init(void)
>  
>  	recalculate_root_clocks();
>  
> -	printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
> +	printk(KERN_INFO "Clocking rate (Crystal/DPLL/MPU core): "
>  	       "%ld.%01ld/%ld/%ld MHz\n",
>  	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
> -	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
> +               (core_ck.rate / 1000000), (dpll1_ck.rate / 1000000));
> +
> +	printk(KERN_INFO "IVA2 clocking rate: %ld MHz\n",
> +	       (dpll2_ck.rate / 1000000)) ;
>  
>  	/*
>  	 * Only enable those clocks we will need, let the drivers
> -- 
> 1.6.2.2
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH] Fixed processing of bootarg 'mpurate'
  2009-08-06 14:34 ` Kevin Hilman
@ 2009-08-10 10:23   ` Premi, Sanjeev
  0 siblings, 0 replies; 6+ messages in thread
From: Premi, Sanjeev @ 2009-08-10 10:23 UTC (permalink / raw)
  To: Kevin Hilman; +Cc: linux-omap@vger.kernel.org

> -----Original Message-----
> From: Kevin Hilman [mailto:khilman@deeprootsystems.com] 
> Sent: Thursday, August 06, 2009 8:04 PM
> To: Premi, Sanjeev
> Cc: linux-omap@vger.kernel.org
> Subject: Re: [PATCH] Fixed processing of bootarg 'mpurate'
> 
> Sanjeev Premi <premi@ti.com> writes:
> 
> > The argument 'mpurate' had no effect on the MPU
> > frequency. This patch fixes the same.
> >
> > It also ensures that DSP frequency is set according
> > to the OPP definitions.
> >
> > Signed-off-by: Sanjeev Premi <premi@ti.com>
> 
> Can you break this into two patches.  One that simply fixes the MPU
> rate setting bug and that applies against linux-omap master and
> can be queued for omap-fixes.

Created a patch on l-o master against the commit:

4baadee : OMAP3: EHCI: Allow EHCI to work as a module again

> The DSP rate setting is a separate problem and could be done in
> a patch against the PM branch.

Based on the patch for mpurate, a created another one for setting
the dsp frequency against pm branch:

70a1f22 : OMAP3: PM: USBHOST: clear wakeup events on both hosts

Both patches follow this mail.

Best regards,
Sanjeev

> 
> Kevin
> 
> 
> > ---
> >  arch/arm/mach-omap2/clock34xx.c |   57 
> +++++++++++++++++++++++++++++++++++---
> >  1 files changed, 52 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/clock34xx.c 
> b/arch/arm/mach-omap2/clock34xx.c
> > index c2e5ef8..a9e7e82 100644
> > --- a/arch/arm/mach-omap2/clock34xx.c
> > +++ b/arch/arm/mach-omap2/clock34xx.c
> > @@ -29,6 +29,7 @@
> >  #include <linux/err.h>
> >  #include <linux/cpufreq.h>
> >  
> > +#include <mach/cpu.h>
> >  #include <mach/clock.h>
> >  #include <mach/sram.h>
> >  #include <mach/omap-pm.h>
> > @@ -42,6 +43,7 @@
> >  #include "prm-regbits-34xx.h"
> >  #include "cm.h"
> >  #include "cm-regbits-34xx.h"
> > +#include "omap3-opp.h"
> >  
> >  static const struct clkops clkops_noncore_dpll_ops;
> >  
> > @@ -1083,6 +1085,11 @@ void omap2_clk_prepare_for_reboot(void)
> >   */
> >  static int __init omap2_clk_arch_init(void)
> >  {
> > +	unsigned short opp=0;
> > +	unsigned short i;
> > +	unsigned long dsprate;
> > +	struct omap_opp *opp_table;
> > +
> >  	if (!mpurate)
> >  		return -EINVAL;
> >  
> > @@ -1092,12 +1099,49 @@ static int __init omap2_clk_arch_init(void)
> >  		printk(KERN_ERR "Could not find matching MPU rate\n");
> >  #endif
> >  
> > +	if (clk_set_rate(&dpll1_ck, mpurate))
> > +		printk(KERN_ERR "*** Unable to set MPU rate\n");
> > +	omap3_dpll_recalc(&dpll1_ck);
> > +
> > +	/* Get the OPP corresponding to the mpurate */
> > +	if (mpu_opps) {
> > +		opp_table = mpu_opps;
> > +
> > +		for (i=0;  opp_table[i].opp_id <= MAX_VDD1_OPP; i++)
> > +			if (opp_table[i].rate == mpurate)
> > +				break;
> > +
> > +		opp = opp_table[i].opp_id;
> > +
> > +		pr_debug("Switched to OPP:%d\n", opp);
> > +	}
> > +
> > +	/* Get dsprate corresponding to the opp */
> > +	if ((dsp_opps) && (opp >= VDD1_OPP1) && (opp <= VDD1_OPP5)) {
> > +		opp_table = dsp_opps;
> > +
> > +		for (i=0;  opp_table[i].opp_id <= MAX_VDD1_OPP; i++)
> > +			if (opp_table[i].opp_id == opp)
> > +				break;
> > +
> > +		dsprate = opp_table[i].rate;
> > +
> > +		if (clk_set_rate(&dpll2_ck, dsprate))
> > +			printk(KERN_ERR "*** Unable to set IVA2 
> rate\n");
> > +		omap3_dpll_recalc(&dpll2_ck);
> > +	}
> > +
> >  	recalculate_root_clocks();
> >  
> > -	printk(KERN_INFO "Switched to new clocking rate 
> (Crystal/DPLL3/MPU): "
> > +	printk(KERN_INFO "Switched to new clocking rate 
> (Crystal/Core/MPU): "
> >  	       "%ld.%01ld/%ld/%ld MHz\n",
> > -	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 
> 100000) % 10,
> > -	       (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
> > +	       (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 
> 100000) % 10),
> > +	       (core_ck.rate / 1000000), (dpll1_ck.rate / 1000000)) ;
> > +
> > +	printk(KERN_INFO "IVA2 clocking rate: %ld MHz\n",
> > +	       (dpll2_ck.rate / 1000000)) ;
> > +
> > +	calibrate_delay();
> >  
> >  	return 0;
> >  }
> > @@ -1156,10 +1200,13 @@ int __init omap2_clk_init(void)
> >  
> >  	recalculate_root_clocks();
> >  
> > -	printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
> > +	printk(KERN_INFO "Clocking rate (Crystal/DPLL/MPU core): "
> >  	       "%ld.%01ld/%ld/%ld MHz\n",
> >  	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 
> 100000) % 10,
> > -	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
> > +               (core_ck.rate / 1000000), (dpll1_ck.rate / 
> 1000000));
> > +
> > +	printk(KERN_INFO "IVA2 clocking rate: %ld MHz\n",
> > +	       (dpll2_ck.rate / 1000000)) ;
> >  
> >  	/*
> >  	 * Only enable those clocks we will need, let the drivers
> > -- 
> > 1.6.2.2
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe 
> linux-omap" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH] Fixed processing of bootarg 'mpurate'
@ 2009-08-10 10:24 Sanjeev Premi
  2009-08-10 17:22 ` Paul Walmsley
  0 siblings, 1 reply; 6+ messages in thread
From: Sanjeev Premi @ 2009-08-10 10:24 UTC (permalink / raw)
  To: linux-omap; +Cc: Sanjeev Premi

The argument 'mpurate' had no effect on the MPU
frequency. This patch fixes the same.

Signed-off-by: Sanjeev Premi <premi@ti.com>
---
 arch/arm/mach-omap2/clock34xx.c |   14 ++++++++++----
 1 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 045da92..0c62aad 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -27,6 +27,7 @@
 #include <linux/limits.h>
 #include <linux/bitops.h>
 
+#include <mach/cpu.h>
 #include <mach/clock.h>
 #include <mach/sram.h>
 #include <asm/div64.h>
@@ -948,13 +949,18 @@ static int __init omap2_clk_arch_init(void)
 	if (clk_set_rate(&virt_prcm_set, mpurate))
 		printk(KERN_ERR "Could not find matching MPU rate\n");
 #endif
+	if (clk_set_rate(&dpll1_ck, mpurate))
+		printk(KERN_ERR "*** Unable to set MPU rate\n");
+	omap3_dpll_recalc(&dpll1_ck);
 
 	recalculate_root_clocks();
 
-	printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): "
+	printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): "
 	       "%ld.%01ld/%ld/%ld MHz\n",
-	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
-	       (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
+	       (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10),
+	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ;
+
+	calibrate_delay();
 
 	return 0;
 }
@@ -1013,7 +1019,7 @@ int __init omap2_clk_init(void)
 
 	recalculate_root_clocks();
 
-	printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
+	printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): "
 	       "%ld.%01ld/%ld/%ld MHz\n",
 	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
 	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
-- 
1.6.2.2


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] Fixed processing of bootarg 'mpurate'
  2009-08-10 10:24 Sanjeev Premi
@ 2009-08-10 17:22 ` Paul Walmsley
  2009-08-10 17:49   ` Premi, Sanjeev
  0 siblings, 1 reply; 6+ messages in thread
From: Paul Walmsley @ 2009-08-10 17:22 UTC (permalink / raw)
  To: Sanjeev Premi; +Cc: linux-omap

On Mon, 10 Aug 2009, Sanjeev Premi wrote:

> The argument 'mpurate' had no effect on the MPU
> frequency. This patch fixes the same.

Thanks, I'll plan to squeeze this into the .32 merge window, with a couple 
of minor changes described below.  Please review the changes:

> 
> Signed-off-by: Sanjeev Premi <premi@ti.com>
> ---
>  arch/arm/mach-omap2/clock34xx.c |   14 ++++++++++----
>  1 files changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
> index 045da92..0c62aad 100644
> --- a/arch/arm/mach-omap2/clock34xx.c
> +++ b/arch/arm/mach-omap2/clock34xx.c
> @@ -27,6 +27,7 @@
>  #include <linux/limits.h>
>  #include <linux/bitops.h>
>  
> +#include <mach/cpu.h>
>  #include <mach/clock.h>
>  #include <mach/sram.h>
>  #include <asm/div64.h>
> @@ -948,13 +949,18 @@ static int __init omap2_clk_arch_init(void)
>  	if (clk_set_rate(&virt_prcm_set, mpurate))
>  		printk(KERN_ERR "Could not find matching MPU rate\n");
>  #endif

The previous four lines (including the three above) have been removed from 
clock34xx.c.

> +	if (clk_set_rate(&dpll1_ck, mpurate))
> +		printk(KERN_ERR "*** Unable to set MPU rate\n");
> +	omap3_dpll_recalc(&dpll1_ck);

I dropped the omap3_dpll_recalc(&dpll1_ck); since the following 
recalculate_root_clocks() should handle this.

>  	recalculate_root_clocks();
>  
> -	printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): "
> +	printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): "
>  	       "%ld.%01ld/%ld/%ld MHz\n",
> -	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
> -	       (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
> +	       (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10),
> +	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ;
> +
> +	calibrate_delay();
>  
>  	return 0;
>  }
> @@ -1013,7 +1019,7 @@ int __init omap2_clk_init(void)
>  
>  	recalculate_root_clocks();
>  
> -	printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
> +	printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): "
>  	       "%ld.%01ld/%ld/%ld MHz\n",
>  	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
>  	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
> -- 
> 1.6.2.2
> 


- Paul

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH] Fixed processing of bootarg 'mpurate'
  2009-08-10 17:22 ` Paul Walmsley
@ 2009-08-10 17:49   ` Premi, Sanjeev
  0 siblings, 0 replies; 6+ messages in thread
From: Premi, Sanjeev @ 2009-08-10 17:49 UTC (permalink / raw)
  To: Paul Walmsley; +Cc: linux-omap@vger.kernel.org

> -----Original Message-----
> From: Paul Walmsley [mailto:paul@pwsan.com] 
> Sent: Monday, August 10, 2009 10:52 PM
> To: Premi, Sanjeev
> Cc: linux-omap@vger.kernel.org
> Subject: Re: [PATCH] Fixed processing of bootarg 'mpurate'
> 
> On Mon, 10 Aug 2009, Sanjeev Premi wrote:
> 
> > The argument 'mpurate' had no effect on the MPU
> > frequency. This patch fixes the same.
> 
> Thanks, I'll plan to squeeze this into the .32 merge window, 
> with a couple 
> of minor changes described below.  Please review the changes:
> 
> > 
> > Signed-off-by: Sanjeev Premi <premi@ti.com>
> > ---
> >  arch/arm/mach-omap2/clock34xx.c |   14 ++++++++++----
> >  1 files changed, 10 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/arm/mach-omap2/clock34xx.c 
> b/arch/arm/mach-omap2/clock34xx.c
> > index 045da92..0c62aad 100644
> > --- a/arch/arm/mach-omap2/clock34xx.c
> > +++ b/arch/arm/mach-omap2/clock34xx.c
> > @@ -27,6 +27,7 @@
> >  #include <linux/limits.h>
> >  #include <linux/bitops.h>
> >  
> > +#include <mach/cpu.h>
> >  #include <mach/clock.h>
> >  #include <mach/sram.h>
> >  #include <asm/div64.h>
> > @@ -948,13 +949,18 @@ static int __init omap2_clk_arch_init(void)
> >  	if (clk_set_rate(&virt_prcm_set, mpurate))
> >  		printk(KERN_ERR "Could not find matching MPU rate\n");
> >  #endif
> 
> The previous four lines (including the three above) have been 
> removed from 
> clock34xx.c.

[sp] That is fine.

> 
> > +	if (clk_set_rate(&dpll1_ck, mpurate))
> > +		printk(KERN_ERR "*** Unable to set MPU rate\n");
> > +	omap3_dpll_recalc(&dpll1_ck);
> 
> I dropped the omap3_dpll_recalc(&dpll1_ck); since the following 
> recalculate_root_clocks() should handle this.

[sp] Fine here too.

> 
> >  	recalculate_root_clocks();
> >  
> > -	printk(KERN_INFO "Switched to new clocking rate 
> (Crystal/DPLL3/MPU): "
> > +	printk(KERN_INFO "Switched to new clocking rate 
> (Crystal/Core/MPU): "
> >  	       "%ld.%01ld/%ld/%ld MHz\n",
> > -	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 
> 100000) % 10,
> > -	       (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
> > +	       (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 
> 100000) % 10),
> > +	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ;
> > +
> > +	calibrate_delay();
> >  
> >  	return 0;
> >  }
> > @@ -1013,7 +1019,7 @@ int __init omap2_clk_init(void)
> >  
> >  	recalculate_root_clocks();
> >  
> > -	printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
> > +	printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): "
> >  	       "%ld.%01ld/%ld/%ld MHz\n",
> >  	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 
> 100000) % 10,
> >  	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
> > -- 
> > 1.6.2.2
> > 
> 
> 
> - Paul
> 
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2009-08-10 17:49 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2009-07-31 11:43 [PATCH] Fixed processing of bootarg 'mpurate' Sanjeev Premi
2009-08-06 14:34 ` Kevin Hilman
2009-08-10 10:23   ` Premi, Sanjeev
  -- strict thread matches above, loose matches on Subject: below --
2009-08-10 10:24 Sanjeev Premi
2009-08-10 17:22 ` Paul Walmsley
2009-08-10 17:49   ` Premi, Sanjeev

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