From mboxrd@z Thu Jan  1 00:00:00 1970
From: Kevin Hilman <khilman@deeprootsystems.com>
Subject: Re: [PATCH V2] OMAP3: PM: Fix for MPU power domain MEM BANK position
Date: Wed, 09 Dec 2009 15:36:17 -0800
Message-ID: <87pr6nsosu.fsf@deeprootsystems.com>
References: <1259234087-10030-1-git-send-email-thara@ti.com>
	<alpine.DEB.2.00.0912030538260.13408@utopia.booyaka.com>
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In-Reply-To: <alpine.DEB.2.00.0912030538260.13408@utopia.booyaka.com> (Paul Walmsley's message of "Thu\, 3 Dec 2009 05\:38\:38 -0700 \(MST\)")
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To: Paul Walmsley <paul@pwsan.com>
Cc: Thara Gopinath <thara@ti.com>, linux-omap@vger.kernel.org

Paul Walmsley <paul@pwsan.com> writes:

> On Thu, 26 Nov 2009, Thara Gopinath wrote:
>
>> MPU power domain bank 0 bits are displayed in position of bank 1
>> in PWRSTS and PREPWRSTS registers. So read them from correct
>> position
>> 
>> Signed-off-by: Thara Gopinath <thara@ti.com>
>> Cc: Kevin Hilman <khilman@deeprootsystems.com>

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

> Thanks Thara, will queue this up.

Kevin