From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kevin Hilman Subject: Re: [PATCH] ARM: omap4: gpio: fix setting IRQWAKEN bits Date: Mon, 06 Jun 2011 15:32:29 -0700 Message-ID: <87r576wpz6.fsf@ti.com> References: <1307214239-16316-1-git-send-email-ccross@android.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: (Colin Cross's message of "Sat, 4 Jun 2011 19:37:54 -0700") List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Todd Poynor Cc: Russell King , Tony Lindgren , lkml , Colin Cross , l-o , "linux-arm-kernel@lists.infradead.org" List-Id: linux-omap@vger.kernel.org Colin Cross writes: > On Sat, Jun 4, 2011 at 12:03 PM, Colin Cross wrote: >> Setting the IRQWAKEN bit was overwriting previous IRQWAKEN bits, >> causing only the last bit set to take effect, resulting in lost >> wakeups when the GPIO controller is in idle. >> >> Replace direct writes to IRQWAKEN with writes to SETWKUENA and >> CLEARWKUEN. >> >> Signed-off-by: Colin Cross [...] > > Todd pointed out that the OMAP4 TRM says not to use SETWKUENA and > CLEARWKUENA. In my GPIO cleanups, I was wondering why the set/clear registers were not used here. Todd, can you give the TRM version & reference for this? I didn't find anything after a quick scan/search. Thanks, Kevin