[pm-wip/voltdm_nm][PATCH 00/10] OMAP2+: voltage: fixes

[pm-wip/voltdm_nm][PATCH 00/10] OMAP2+: voltage: fixes

[Nishanth Menon]

Bunch of fixes for VC, VP incorporating previous comments
merges two series of PMIC and voltage cleanups I send previously.

Applies on:
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git
voltdm_nm     3c217ab OMAP3+: PM: VC: handle mutant channel config for OMAP4 MPU channel

Original series:
http://marc.info/?l=linux-omap&m=130671118605896&w=2
http://marc.info/?l=linux-omap&m=130682723914928&w=2

Nishanth Menon (10):
  OMAP3+: VC: fix mutant channel handling
  OMAP4: PM: VC: allow channels use of default channel i2c_slaveaddr
  OMAP4: PM: VC: allow channels to use cmdra reg
  OMAP4: PM: VC: allow channels use of default channel volt_reg_addr
  OMAP4: PM: VC: allow channels use of default channel cmd_reg_addr
  OMAP3+: PM: VC: support configuring PMIC over I2C_SR
  OMAP3+: PM: VP: use uV for max and min voltage limits
  OMAP3+: PM: introduce a central pmic control
  OMAP2+: PM: secure OPP access using rcu locks
  OMAP2+: PM: init_voltages: handle non compliant bootloaders

 arch/arm/mach-omap2/Makefile    |    2 +-
 arch/arm/mach-omap2/omap_pmic.c |   74 +++++++++++++++++++++
 arch/arm/mach-omap2/omap_twl.c  |  103 ++++++++++++++----------------
 arch/arm/mach-omap2/pm.c        |   61 ++++++++++++++----
 arch/arm/mach-omap2/pm.h        |   35 +++++++++--
 arch/arm/mach-omap2/vc.c        |  134 ++++++++++++++++++++++++++++++++-------
 arch/arm/mach-omap2/vc.h        |    8 ++-
 arch/arm/mach-omap2/voltage.h   |   37 +++++++++--
 arch/arm/mach-omap2/vp.c        |    4 +-
 9 files changed, 351 insertions(+), 107 deletions(-)
 create mode 100644 arch/arm/mach-omap2/omap_pmic.c

 Regards,
 Nishanth Menon

[pm-wip/voltdm_nm][PATCH 01/10] OMAP3+: VC: fix mutant channel handling

[Nishanth Menon]

"OMAP3+: PM: VC: handle mutant channel config for OMAP4 MPU channel"
handles the mutant channel flags, however since vc_cfg_bits is static
file wide variable, it makes better sense to update this based on
the specific channel using mutant or not. else if we have a initial
registration of mutant channel definition, all other channels will
end up using the mutant definition.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
we should probably squash this in to the original commit
 arch/arm/mach-omap2/vc.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index c8deac9..aa9f0bc 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -53,7 +53,7 @@ static struct omap_vc_channel_cfg vc_mutant_channel_cfg = {
 	.cmd   = BIT(1),
 };
 
-static struct omap_vc_channel_cfg *vc_cfg_bits = &vc_default_channel_cfg;
+static struct omap_vc_channel_cfg *vc_cfg_bits;
 #define CFG_CHANNEL_MASK 0x1f
 
 /**
@@ -300,6 +300,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 	vc->cfg_channel = 0;
 	if (vc->flags & OMAP_VC_CHANNEL_CFG_MUTANT)
 		vc_cfg_bits = &vc_mutant_channel_cfg;
+	else
+		vc_cfg_bits = &vc_default_channel_cfg;
 
 	/* get PMIC/board specific settings */
 	vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr;
-- 
1.7.1

Re: [pm-wip/voltdm_nm][PATCH 01/10] OMAP3+: VC: fix mutant channel handling

[Kevin Hilman]

Nishanth Menon <nm@ti.com> writes:

> "OMAP3+: PM: VC: handle mutant channel config for OMAP4 MPU channel"
> handles the mutant channel flags, however since vc_cfg_bits is static
> file wide variable, it makes better sense to update this based on
> the specific channel using mutant or not. else if we have a initial
> registration of mutant channel definition, all other channels will
> end up using the mutant definition.

Indeed.

> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
> we should probably squash this in to the original commit

Thanks, squashed.

Kevin

>  arch/arm/mach-omap2/vc.c |    4 +++-
>  1 files changed, 3 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
> index c8deac9..aa9f0bc 100644
> --- a/arch/arm/mach-omap2/vc.c
> +++ b/arch/arm/mach-omap2/vc.c
> @@ -53,7 +53,7 @@ static struct omap_vc_channel_cfg vc_mutant_channel_cfg = {
>  	.cmd   = BIT(1),
>  };
>  
> -static struct omap_vc_channel_cfg *vc_cfg_bits = &vc_default_channel_cfg;
> +static struct omap_vc_channel_cfg *vc_cfg_bits;
>  #define CFG_CHANNEL_MASK 0x1f
>  
>  /**
> @@ -300,6 +300,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
>  	vc->cfg_channel = 0;
>  	if (vc->flags & OMAP_VC_CHANNEL_CFG_MUTANT)
>  		vc_cfg_bits = &vc_mutant_channel_cfg;
> +	else
> +		vc_cfg_bits = &vc_default_channel_cfg;
>  
>  	/* get PMIC/board specific settings */
>  	vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr;

[pm-wip/voltdm_nm][PATCH 02/10] OMAP4: PM: VC: allow channels use of default channel i2c_slaveaddr

[Nishanth Menon]

OMAP4's PRM_VC_CFG_CHANNEL register allows for flexibility of configuring
for various PMIC configurations. In combinations where the same slave address
is used for all domains, it is possible to setup the VC channel for the
dependent channels to use the same slave address as the default channel.

Since I2C addressing could be 7 bit or 11 bits as per the I2C specification,
we use the BIT(15) to flag that this should use the default channel's
configuration. Depending on the PMIC and platform used, this can
be populated on the PMIC's datastructure and percolates to VC's configuration.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
 arch/arm/mach-omap2/vc.c      |   18 ++++++++++++++----
 arch/arm/mach-omap2/vc.h      |    2 +-
 arch/arm/mach-omap2/voltage.h |   11 ++++++++++-
 3 files changed, 25 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index aa9f0bc..0c0e416 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -309,11 +309,21 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 	vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr;
 	vc->setup_time = voltdm->pmic->volt_setup_time;
 
+	if ((vc->flags & OMAP_VC_CHANNEL_DEFAULT) &&
+		(vc->i2c_slave_addr == USE_DEFAULT_CHANNEL_I2C_PARAM)) {
+		pr_err("%s: voltdm %s: default channel "
+			"bad config-sa=%2x ?\n", __func__, voltdm->name,
+			vc->i2c_slave_addr);
+		return;
+	}
+
 	/* Configure the i2c slave address for this VC */
-	voltdm->rmw(vc->smps_sa_mask,
-		    vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
-		    vc->common->smps_sa_reg);
-	vc->cfg_channel |= vc_cfg_bits->sa;
+	if (vc->i2c_slave_addr != USE_DEFAULT_CHANNEL_I2C_PARAM) {
+		voltdm->rmw(vc->smps_sa_mask,
+			vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
+			vc->common->smps_sa_reg);
+		vc->cfg_channel |= vc_cfg_bits->sa;
+	}
 
 	/*
 	 * Configure the PMIC register addresses.
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index e16dacf..22c0060 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -77,7 +77,7 @@ struct omap_vc_channel {
 	u8 flags;
 
 	/* channel state */
-	u8 i2c_slave_addr;
+	u16 i2c_slave_addr;
 	u8 volt_reg_addr;
 	u8 cmd_reg_addr;
 	u8 cfg_channel;
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index f079167..1732258 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -109,6 +109,15 @@ struct omap_volt_data {
 	u8	vp_errgain;
 };
 
+/*
+ * Introduced in OMAP4, is a concept of a default channel - in OMAP4, this
+ * channel is MPU, all other domains such as IVA/CORE, could optionally
+ * link their i2c reg configuration to use MPU channel's configuration if
+ * required. To do this, mark in the PMIC structure's
+ * i2c_slave_addr with this macro.
+ */
+#define USE_DEFAULT_CHANNEL_I2C_PARAM  0x8000
+
 /**
  * struct omap_voltdm_pmic - PMIC specific data required by voltage driver.
  * @slew_rate:	PMIC slew rate (in uv/us)
@@ -132,7 +141,7 @@ struct omap_voltdm_pmic {
 	u8 vp_vddmin;
 	u8 vp_vddmax;
 	u8 vp_timeout_us;
-	u8 i2c_slave_addr;
+	u16 i2c_slave_addr;
 	u8 volt_reg_addr;
 	u8 cmd_reg_addr;
 	bool i2c_high_speed;
-- 
1.7.1

Re: [pm-wip/voltdm_nm][PATCH 02/10] OMAP4: PM: VC: allow channels use of default channel i2c_slaveaddr

[Kevin Hilman]

Nishanth Menon <nm@ti.com> writes:

> OMAP4's PRM_VC_CFG_CHANNEL register allows for flexibility of configuring
> for various PMIC configurations. In combinations where the same slave address
> is used for all domains, it is possible to setup the VC channel for the
> dependent channels to use the same slave address as the default channel.
>
> Since I2C addressing could be 7 bit or 11 bits as per the I2C specification,

That alone should be the justification for the u8 -> u16 change.

In fact, I'll change all these i2c address fields so u16 in the original
patches for that reason.  Then here, you can just say you use BIT(15)
because I2C address are a max of 11 bits.   BTW is it 11 or 10?  I've
only heard of 10-bit addressing for I2C.

> we use the BIT(15) to flag that this should use the default channel's
> configuration. Depending on the PMIC and platform used, this can
> be populated on the PMIC's datastructure and percolates to VC's configuration.
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
>  arch/arm/mach-omap2/vc.c      |   18 ++++++++++++++----
>  arch/arm/mach-omap2/vc.h      |    2 +-
>  arch/arm/mach-omap2/voltage.h |   11 ++++++++++-
>  3 files changed, 25 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
> index aa9f0bc..0c0e416 100644
> --- a/arch/arm/mach-omap2/vc.c
> +++ b/arch/arm/mach-omap2/vc.c
> @@ -309,11 +309,21 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
>  	vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr;
>  	vc->setup_time = voltdm->pmic->volt_setup_time;
>  
> +	if ((vc->flags & OMAP_VC_CHANNEL_DEFAULT) &&
> +		(vc->i2c_slave_addr == USE_DEFAULT_CHANNEL_I2C_PARAM)) {
> +		pr_err("%s: voltdm %s: default channel "
> +			"bad config-sa=%2x ?\n", __func__, voltdm->name,
> +			vc->i2c_slave_addr);
> +		return;
> +	}
> +
>  	/* Configure the i2c slave address for this VC */
> -	voltdm->rmw(vc->smps_sa_mask,
> -		    vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
> -		    vc->common->smps_sa_reg);
> -	vc->cfg_channel |= vc_cfg_bits->sa;
> +	if (vc->i2c_slave_addr != USE_DEFAULT_CHANNEL_I2C_PARAM) {
> +		voltdm->rmw(vc->smps_sa_mask,
> +			vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
> +			vc->common->smps_sa_reg);
> +		vc->cfg_channel |= vc_cfg_bits->sa;
> +	}
>  
>  	/*
>  	 * Configure the PMIC register addresses.
> diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
> index e16dacf..22c0060 100644
> --- a/arch/arm/mach-omap2/vc.h
> +++ b/arch/arm/mach-omap2/vc.h
> @@ -77,7 +77,7 @@ struct omap_vc_channel {
>  	u8 flags;
>  
>  	/* channel state */
> -	u8 i2c_slave_addr;
> +	u16 i2c_slave_addr;
>  	u8 volt_reg_addr;
>  	u8 cmd_reg_addr;
>  	u8 cfg_channel;
> diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
> index f079167..1732258 100644
> --- a/arch/arm/mach-omap2/voltage.h
> +++ b/arch/arm/mach-omap2/voltage.h
> @@ -109,6 +109,15 @@ struct omap_volt_data {
>  	u8	vp_errgain;
>  };
>  
> +/*
> + * Introduced in OMAP4, is a concept of a default channel - in OMAP4, this
> + * channel is MPU, all other domains such as IVA/CORE, could optionally
> + * link their i2c reg configuration to use MPU channel's configuration if
> + * required. To do this, mark in the PMIC structure's
> + * i2c_slave_addr with this macro.
> + */
> +#define USE_DEFAULT_CHANNEL_I2C_PARAM  0x8000
> +

Needs a VC prefix, also use BIT().  

Also, later on in the series you use the same value for things other
than the I2C slave address.  How about just calling this:

#define OMAP_VC_USE_DEFAULT_CHANNEL    BIT(15)


>  /**
>   * struct omap_voltdm_pmic - PMIC specific data required by voltage driver.
>   * @slew_rate:	PMIC slew rate (in uv/us)
> @@ -132,7 +141,7 @@ struct omap_voltdm_pmic {
>  	u8 vp_vddmin;
>  	u8 vp_vddmax;
>  	u8 vp_timeout_us;
> -	u8 i2c_slave_addr;
> +	u16 i2c_slave_addr;
>  	u8 volt_reg_addr;
>  	u8 cmd_reg_addr;
>  	bool i2c_high_speed;

Re: [pm-wip/voltdm_nm][PATCH 02/10] OMAP4: PM: VC: allow channels use of default channel i2c_slaveaddr

[Kevin Hilman]

Kevin Hilman <khilman@ti.com> writes:

[...]

>> diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
>> index f079167..1732258 100644
>> --- a/arch/arm/mach-omap2/voltage.h
>> +++ b/arch/arm/mach-omap2/voltage.h
>> @@ -109,6 +109,15 @@ struct omap_volt_data {
>>  	u8	vp_errgain;
>>  };
>>  
>> +/*
>> + * Introduced in OMAP4, is a concept of a default channel - in OMAP4, this
>> + * channel is MPU, all other domains such as IVA/CORE, could optionally
>> + * link their i2c reg configuration to use MPU channel's configuration if
>> + * required. To do this, mark in the PMIC structure's
>> + * i2c_slave_addr with this macro.
>> + */
>> +#define USE_DEFAULT_CHANNEL_I2C_PARAM  0x8000
>> +
>
> Needs a VC prefix, also use BIT().  
>
> Also, later on in the series you use the same value for things other
> than the I2C slave address.  How about just calling this:
>
> #define OMAP_VC_USE_DEFAULT_CHANNEL    BIT(15)
>

Also, this should be in vc.h, not voltage.h

Kevin

[pm-wip/voltdm_nm][PATCH 03/10] OMAP4: PM: VC: allow channels to use cmdra reg

[Nishanth Menon]

if volt_reg and cmd_reg are the same from PMIC configuration,
we can use the cmd reg by using racen - this is valid for
voltage commands, however, in most cases, we'd like to retain
voltage reg configuration as well for vfsm commands going thru
from h/w.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
 arch/arm/mach-omap2/vc.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 0c0e416..6017c70 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -337,9 +337,13 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 		voltdm->rmw(vc->smps_cmdra_mask,
 			    vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask),
 			    vc->common->smps_cmdra_reg);
-		vc->cfg_channel |= vc_cfg_bits->rac | vc_cfg_bits->racen;
+		vc->cfg_channel |= vc_cfg_bits->rac;
 	}
 
+	/* If voltage and cmd regs are same, we can use cmdra register */
+	if (vc->volt_reg_addr == vc->cmd_reg_addr)
+		vc->cfg_channel |= vc_cfg_bits->racen;
+
 	/* Set up the on, inactive, retention and off voltage */
 	on_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->on_volt);
 	onlp_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->onlp_volt);
-- 
1.7.1

Re: [pm-wip/voltdm_nm][PATCH 03/10] OMAP4: PM: VC: allow channels to use cmdra reg

[Kevin Hilman]

Nishanth Menon <nm@ti.com> writes:

> if volt_reg and cmd_reg are the same from PMIC configuration,
> we can use the cmd reg by using racen - 

-ECONFUSED

If volt_reg and cmd_reg are the same then I understood RACEN to be a
don't care.  Zero means use volt_reg, 1 means use cmd_reg, but if
volt_reg == cmd_reg, then either way is the same result.

The way I understood (and coded) this is that the only time you need
RACEN set is precicesly the case when a cmd_reg is provided (and thus is
different from volt_reg.

What am I missing?

Or, stated differently, I guess I don't understand the use case for 
RAC != RACEN

Kevin

> this is valid for
> voltage commands, however, in most cases, we'd like to retain
> voltage reg configuration as well for vfsm commands going thru
> from h/w.
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
>  arch/arm/mach-omap2/vc.c |    6 +++++-
>  1 files changed, 5 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
> index 0c0e416..6017c70 100644
> --- a/arch/arm/mach-omap2/vc.c
> +++ b/arch/arm/mach-omap2/vc.c
> @@ -337,9 +337,13 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
>  		voltdm->rmw(vc->smps_cmdra_mask,
>  			    vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask),
>  			    vc->common->smps_cmdra_reg);
> -		vc->cfg_channel |= vc_cfg_bits->rac | vc_cfg_bits->racen;
> +		vc->cfg_channel |= vc_cfg_bits->rac;
>  	}
>  
> +	/* If voltage and cmd regs are same, we can use cmdra register */
> +	if (vc->volt_reg_addr == vc->cmd_reg_addr)
> +		vc->cfg_channel |= vc_cfg_bits->racen;
> +
>  	/* Set up the on, inactive, retention and off voltage */
>  	on_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->on_volt);
>  	onlp_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->onlp_volt);

[pm-wip/voltdm_nm][PATCH 04/10] OMAP4: PM: VC: allow channels use of default channel volt_reg_addr

[Nishanth Menon]

OMAP4's PRM_VC_CFG_CHANNEL register allows for flexibility of configuring
for various PMIC configurations. In combinations where we'd like to
use the default VC channel's voltage_reg address in a particular non-default
VC channel, we allow the use of USE_DEFAULT_CHANNEL_I2C_PARAM.

Since 0 is a valid register address, we need to increase the size of
reg storage for the flag. Depending on the PMIC and platform used,
this can be populated on the PMIC's datastructure and percolates to
VC's configuration.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
 arch/arm/mach-omap2/vc.c      |   17 ++++++++++-------
 arch/arm/mach-omap2/vc.h      |    2 +-
 arch/arm/mach-omap2/voltage.h |    4 ++--
 3 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 6017c70..53a16cc 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -310,10 +310,11 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 	vc->setup_time = voltdm->pmic->volt_setup_time;
 
 	if ((vc->flags & OMAP_VC_CHANNEL_DEFAULT) &&
-		(vc->i2c_slave_addr == USE_DEFAULT_CHANNEL_I2C_PARAM)) {
+		((vc->i2c_slave_addr == USE_DEFAULT_CHANNEL_I2C_PARAM) ||
+		(vc->volt_reg_addr == USE_DEFAULT_CHANNEL_I2C_PARAM))) {
 		pr_err("%s: voltdm %s: default channel "
-			"bad config-sa=%2x ?\n", __func__, voltdm->name,
-			vc->i2c_slave_addr);
+			"bad config-sa=%2x vol=%2x?\n", __func__, voltdm->name,
+			vc->i2c_slave_addr, vc->volt_reg_addr);
 		return;
 	}
 
@@ -328,10 +329,12 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 	/*
 	 * Configure the PMIC register addresses.
 	 */
-	voltdm->rmw(vc->smps_volra_mask,
-		    vc->volt_reg_addr << __ffs(vc->smps_volra_mask),
-		    vc->common->smps_volra_reg);
-	vc->cfg_channel |= vc_cfg_bits->rav;
+	if (vc->volt_reg_addr != USE_DEFAULT_CHANNEL_I2C_PARAM) {
+		voltdm->rmw(vc->smps_volra_mask,
+			    vc->volt_reg_addr << __ffs(vc->smps_volra_mask),
+			    vc->common->smps_volra_reg);
+		vc->cfg_channel |= vc_cfg_bits->rav;
+	}
 
 	if (vc->cmd_reg_addr) {
 		voltdm->rmw(vc->smps_cmdra_mask,
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index 22c0060..310368f 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -78,7 +78,7 @@ struct omap_vc_channel {
 
 	/* channel state */
 	u16 i2c_slave_addr;
-	u8 volt_reg_addr;
+	u16 volt_reg_addr;
 	u8 cmd_reg_addr;
 	u8 cfg_channel;
 	u16 setup_time;
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 1732258..75f3557 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -114,7 +114,7 @@ struct omap_volt_data {
  * channel is MPU, all other domains such as IVA/CORE, could optionally
  * link their i2c reg configuration to use MPU channel's configuration if
  * required. To do this, mark in the PMIC structure's
- * i2c_slave_addr with this macro.
+ * i2c_slave_addr, volt_reg_addr with this macro.
  */
 #define USE_DEFAULT_CHANNEL_I2C_PARAM  0x8000
 
@@ -142,7 +142,7 @@ struct omap_voltdm_pmic {
 	u8 vp_vddmax;
 	u8 vp_timeout_us;
 	u16 i2c_slave_addr;
-	u8 volt_reg_addr;
+	u16 volt_reg_addr;
 	u8 cmd_reg_addr;
 	bool i2c_high_speed;
 	u8 i2c_mcode;
-- 
1.7.1

Re: [pm-wip/voltdm_nm][PATCH 04/10] OMAP4: PM: VC: allow channels use of default channel volt_reg_addr

[Kevin Hilman]

Nishanth Menon <nm@ti.com> writes:

> OMAP4's PRM_VC_CFG_CHANNEL register allows for flexibility of configuring
> for various PMIC configurations. In combinations where we'd like to
> use the default VC channel's voltage_reg address in a particular non-default
> VC channel, we allow the use of USE_DEFAULT_CHANNEL_I2C_PARAM.
>
> Since 0 is a valid register address, we need to increase the size of
> reg storage for the flag. Depending on the PMIC and platform used,
> this can be populated on the PMIC's datastructure and percolates to
> VC's configuration.
>
> Signed-off-by: Nishanth Menon <nm@ti.com>

Approach is fine.  After rebase, you won't have to do the u16 changes
anymore since I squashed them into earlier patches already.

Minor nit below...

> ---
>  arch/arm/mach-omap2/vc.c      |   17 ++++++++++-------
>  arch/arm/mach-omap2/vc.h      |    2 +-
>  arch/arm/mach-omap2/voltage.h |    4 ++--
>  3 files changed, 13 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
> index 6017c70..53a16cc 100644
> --- a/arch/arm/mach-omap2/vc.c
> +++ b/arch/arm/mach-omap2/vc.c
> @@ -310,10 +310,11 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
>  	vc->setup_time = voltdm->pmic->volt_setup_time;
>  
>  	if ((vc->flags & OMAP_VC_CHANNEL_DEFAULT) &&
> -		(vc->i2c_slave_addr == USE_DEFAULT_CHANNEL_I2C_PARAM)) {
> +		((vc->i2c_slave_addr == USE_DEFAULT_CHANNEL_I2C_PARAM) ||
> +		(vc->volt_reg_addr == USE_DEFAULT_CHANNEL_I2C_PARAM))) {

Please fixup the indentation here.  (and in original patch that added
this.)  Run it through scripts/Lindent and see what the result should
look like.  I usually ends up to be leading tabs plus any extra spaces
required to make it line up right.

Kevin

>  		pr_err("%s: voltdm %s: default channel "
> -			"bad config-sa=%2x ?\n", __func__, voltdm->name,
> -			vc->i2c_slave_addr);
> +			"bad config-sa=%2x vol=%2x?\n", __func__, voltdm->name,
> +			vc->i2c_slave_addr, vc->volt_reg_addr);
>  		return;
>  	}
>  
> @@ -328,10 +329,12 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
>  	/*
>  	 * Configure the PMIC register addresses.
>  	 */
> -	voltdm->rmw(vc->smps_volra_mask,
> -		    vc->volt_reg_addr << __ffs(vc->smps_volra_mask),
> -		    vc->common->smps_volra_reg);
> -	vc->cfg_channel |= vc_cfg_bits->rav;
> +	if (vc->volt_reg_addr != USE_DEFAULT_CHANNEL_I2C_PARAM) {
> +		voltdm->rmw(vc->smps_volra_mask,
> +			    vc->volt_reg_addr << __ffs(vc->smps_volra_mask),
> +			    vc->common->smps_volra_reg);
> +		vc->cfg_channel |= vc_cfg_bits->rav;
> +	}
>  
>  	if (vc->cmd_reg_addr) {
>  		voltdm->rmw(vc->smps_cmdra_mask,
> diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
> index 22c0060..310368f 100644
> --- a/arch/arm/mach-omap2/vc.h
> +++ b/arch/arm/mach-omap2/vc.h
> @@ -78,7 +78,7 @@ struct omap_vc_channel {
>  
>  	/* channel state */
>  	u16 i2c_slave_addr;
> -	u8 volt_reg_addr;
> +	u16 volt_reg_addr;
>  	u8 cmd_reg_addr;
>  	u8 cfg_channel;
>  	u16 setup_time;
> diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
> index 1732258..75f3557 100644
> --- a/arch/arm/mach-omap2/voltage.h
> +++ b/arch/arm/mach-omap2/voltage.h
> @@ -114,7 +114,7 @@ struct omap_volt_data {
>   * channel is MPU, all other domains such as IVA/CORE, could optionally
>   * link their i2c reg configuration to use MPU channel's configuration if
>   * required. To do this, mark in the PMIC structure's
> - * i2c_slave_addr with this macro.
> + * i2c_slave_addr, volt_reg_addr with this macro.
>   */
>  #define USE_DEFAULT_CHANNEL_I2C_PARAM  0x8000
>  
> @@ -142,7 +142,7 @@ struct omap_voltdm_pmic {
>  	u8 vp_vddmax;
>  	u8 vp_timeout_us;
>  	u16 i2c_slave_addr;
> -	u8 volt_reg_addr;
> +	u16 volt_reg_addr;
>  	u8 cmd_reg_addr;
>  	bool i2c_high_speed;
>  	u8 i2c_mcode;

[pm-wip/voltdm_nm][PATCH 05/10] OMAP4: PM: VC: allow channels use of default channel cmd_reg_addr

[Nishanth Menon]

OMAP4's PRM_VC_CFG_CHANNEL register allows for flexibility of configuring
for various PMIC configurations. In combinations where we'd like to
use the default VC channel's cmd_reg address in a particular non-default
VC channel, we allow the use of USE_DEFAULT_CHANNEL_I2C_PARAM.

Since 0 is a valid register address, we need to increase the size of
reg storage for the flag. Depending on the PMIC and platform used,
this can be populated on the PMIC's datastructure and percolates to
VC's configuration.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
 arch/arm/mach-omap2/vc.c      |    8 +++++---
 arch/arm/mach-omap2/vc.h      |    2 +-
 arch/arm/mach-omap2/voltage.h |    4 ++--
 3 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 53a16cc..0af99c8 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -311,10 +311,12 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 
 	if ((vc->flags & OMAP_VC_CHANNEL_DEFAULT) &&
 		((vc->i2c_slave_addr == USE_DEFAULT_CHANNEL_I2C_PARAM) ||
+		(vc->cmd_reg_addr == USE_DEFAULT_CHANNEL_I2C_PARAM) ||
 		(vc->volt_reg_addr == USE_DEFAULT_CHANNEL_I2C_PARAM))) {
 		pr_err("%s: voltdm %s: default channel "
-			"bad config-sa=%2x vol=%2x?\n", __func__, voltdm->name,
-			vc->i2c_slave_addr, vc->volt_reg_addr);
+			"bad config-sa=%2x vol=%2x, cmd=%2x?\n", __func__,
+			voltdm->name, vc->i2c_slave_addr, vc->volt_reg_addr,
+			vc->cmd_reg_addr);
 		return;
 	}
 
@@ -336,7 +338,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 		vc->cfg_channel |= vc_cfg_bits->rav;
 	}
 
-	if (vc->cmd_reg_addr) {
+	if (vc->cmd_reg_addr != USE_DEFAULT_CHANNEL_I2C_PARAM) {
 		voltdm->rmw(vc->smps_cmdra_mask,
 			    vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask),
 			    vc->common->smps_cmdra_reg);
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index 310368f..3b25d9c 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -79,7 +79,7 @@ struct omap_vc_channel {
 	/* channel state */
 	u16 i2c_slave_addr;
 	u16 volt_reg_addr;
-	u8 cmd_reg_addr;
+	u16 cmd_reg_addr;
 	u8 cfg_channel;
 	u16 setup_time;
 	bool i2c_high_speed;
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 75f3557..0a4232f 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -114,7 +114,7 @@ struct omap_volt_data {
  * channel is MPU, all other domains such as IVA/CORE, could optionally
  * link their i2c reg configuration to use MPU channel's configuration if
  * required. To do this, mark in the PMIC structure's
- * i2c_slave_addr, volt_reg_addr with this macro.
+ * i2c_slave_addr, volt_reg_addr,cmd_reg_addr with this macro.
  */
 #define USE_DEFAULT_CHANNEL_I2C_PARAM  0x8000
 
@@ -143,7 +143,7 @@ struct omap_voltdm_pmic {
 	u8 vp_timeout_us;
 	u16 i2c_slave_addr;
 	u16 volt_reg_addr;
-	u8 cmd_reg_addr;
+	u16 cmd_reg_addr;
 	bool i2c_high_speed;
 	u8 i2c_mcode;
 	unsigned long (*vsel_to_uv) (const u8 vsel);
-- 
1.7.1

[pm-wip/voltdm_nm][PATCH 06/10] OMAP3+: PM: VC: support configuring PMIC over I2C_SR

[Nishanth Menon]

Many simpler PMICs such as TPS65023 as discussed in [1] with a single
I2C interface do still have configuration registers that
may need population. Typical being slew rate, thermal shutdown
configuration etc. These devices are typically hooked on Application
Processor's(AP) standard I2C busses. Unfortunately, when hooked on
I2C_SR, unlike the standard I2C framework, we cannot read using
Voltage Controller, but we can definitely write to them. Hence
for using PMICs such as these and others such as those used with
OMAP4460, it is imperative that we provide a hook to support the
device configuration.

[1] http://marc.info/?t=129848405600010&r=1&w=2

Signed-off-by: Nishanth Menon <nm@ti.com>
---
 arch/arm/mach-omap2/vc.c |   91 ++++++++++++++++++++++++++++++++++++++++------
 arch/arm/mach-omap2/vc.h |    2 +
 2 files changed, 81 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 0af99c8..2313619 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -147,25 +147,23 @@ void omap_vc_post_scale(struct voltagedomain *voltdm,
 	voltdm->curr_volt = target_volt;
 }
 
-/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */
-int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
-				 unsigned long target_volt)
+static int omap_vc_bypass_send_value(struct voltagedomain *voltdm,
+		struct omap_vc_channel *vc, u8 sa, u8 reg, u32 data)
 {
-	struct omap_vc_channel *vc = voltdm->vc;
 	u32 loop_cnt = 0, retries_cnt = 0;
 	u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
-	u8 target_vsel, current_vsel;
-	int ret;
 
-	ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
-	if (ret)
-		return ret;
+	if (IS_ERR_OR_NULL(vc->common)) {
+		pr_err("%s voldm=%s bad value for vc->common\n",
+				__func__, voltdm->name);
+		return -EINVAL;
+	}
 
 	vc_valid = vc->common->valid;
 	vc_bypass_val_reg = vc->common->bypass_val_reg;
-	vc_bypass_value = (target_vsel << vc->common->data_shift) |
-		(vc->volt_reg_addr << vc->common->regaddr_shift) |
-		(vc->i2c_slave_addr << vc->common->slaveaddr_shift);
+	vc_bypass_value = (data << vc->common->data_shift) |
+		(reg << vc->common->regaddr_shift) |
+		(sa << vc->common->slaveaddr_shift);
 
 	voltdm->write(vc_bypass_value, vc_bypass_val_reg);
 	voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
@@ -192,10 +190,79 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
 		vc_bypass_value = voltdm->read(vc_bypass_val_reg);
 	}
 
+	return 0;
+
+}
+
+/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */
+int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
+				 unsigned long target_volt)
+{
+	struct omap_vc_channel *vc;
+	u8 target_vsel, current_vsel;
+	int ret;
+
+	if (IS_ERR_OR_NULL(voltdm)) {
+		pr_err("%s bad voldm\n", __func__);
+		return -EINVAL;
+	}
+
+	vc = voltdm->vc;
+	if (IS_ERR_OR_NULL(vc)) {
+		pr_err("%s voldm=%s bad vc\n", __func__, voltdm->name);
+		return -EINVAL;
+	}
+
+	ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel,
+				&current_vsel);
+	if (ret)
+		return ret;
+
+	ret = omap_vc_bypass_send_value(voltdm, vc, vc->i2c_slave_addr,
+					vc->volt_reg_addr, target_vsel);
+	if (ret)
+		return ret;
+
 	omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
 	return 0;
 }
 
+/**
+ * omap_vc_bypass_send_i2c_msg() - Function to control PMIC registers over SRI2C
+ * @voltdm:	voltage domain
+ * @slave_addr:	slave address of the device.
+ * @reg_addr:	register address to access
+ * @data:	what do we want to write there
+ *
+ * Many simpler PMICs with a single I2C interface still have configuration
+ * registers that may need population. Typical being slew rate configurations
+ * thermal shutdown configuration etc. When these PMICs are hooked on I2C_SR,
+ * this function allows these configuration registers to be accessed.
+ *
+ * WARNING: Though this could be used for voltage register configurations over
+ * I2C_SR, DONOT use it for that purpose, all the Voltage controller's internal
+ * information is bypassed using this function and must be used judiciously.
+ */
+int omap_vc_bypass_send_i2c_msg(struct voltagedomain *voltdm, u8 slave_addr,
+				u8 reg_addr, u8 data)
+{
+	struct omap_vc_channel *vc;
+
+	if (IS_ERR_OR_NULL(voltdm)) {
+		pr_err("%s bad voldm\n", __func__);
+		return -EINVAL;
+	}
+
+	vc = voltdm->vc;
+	if (IS_ERR_OR_NULL(vc)) {
+		pr_err("%s voldm=%s bad vc\n", __func__, voltdm->name);
+		return -EINVAL;
+	}
+
+	return omap_vc_bypass_send_value(voltdm, vc, slave_addr,
+					reg_addr, data);
+}
+
 static void __init omap3_vfsm_init(struct voltagedomain *voltdm)
 {
 	/*
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index 3b25d9c..cf20f47 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -109,5 +109,7 @@ void omap_vc_post_scale(struct voltagedomain *voltdm,
 			u8 target_vsel, u8 current_vsel);
 int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
 				 unsigned long target_volt);
+int omap_vc_bypass_send_i2c_msg(struct voltagedomain *voltdm,
+		u8 slave_addr, u8 reg_addr, u8 data);
 #endif
 
-- 
1.7.1

[pm-wip/voltdm_nm][PATCH 07/10] OMAP3+: PM: VP: use uV for max and min voltage limits

[Nishanth Menon]

Every PMIC has it's own eccentricities, For example, one of the
PMIC has MSB set to 1 for a specific function - voltage enable!
using an hardcoded value specific for TWL when copied over to
such an implementation causes the system to crash as the MSB bit
was 0 and the voltage got disabled!.

Instead we use actual values and depend on the convertion routines
to abstract out the eccentricities of each PMIC.

With this, we can now move the voltages to a common location in
voltage.h as they are no longer dependent on PMICs and expect the
PMIC's conversion routines to set a cap if the voltage is out of
reach for the PMIC.

The corresponding voltage values are arrived at by using the
following pre-existing equations:
TWL4030/5030 for OMAP3430/OMAP3630:(twl4030_vsel_to_uv)
	(((vsel * 125) + 6000)) * 100
TWL6030 (OMAP4430):(twl6030_uv_to_vsel)
	((((vsel - 1) * 1266) + 70900)) * 10

Reported-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
 arch/arm/mach-omap2/omap_twl.c |   17 -----------------
 arch/arm/mach-omap2/voltage.h  |   22 ++++++++++++++++++++--
 arch/arm/mach-omap2/vp.c       |    4 ++--
 3 files changed, 22 insertions(+), 21 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index f515a1a..df4e7c3 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -30,16 +30,6 @@
 #define OMAP3_VP_VSTEPMAX_VSTEPMAX	0x04
 #define OMAP3_VP_VLIMITTO_TIMEOUT_US	200
 
-#define OMAP3430_VP1_VLIMITTO_VDDMIN	0x14
-#define OMAP3430_VP1_VLIMITTO_VDDMAX	0x42
-#define OMAP3430_VP2_VLIMITTO_VDDMIN	0x18
-#define OMAP3430_VP2_VLIMITTO_VDDMAX	0x2c
-
-#define OMAP3630_VP1_VLIMITTO_VDDMIN	0x18
-#define OMAP3630_VP1_VLIMITTO_VDDMAX	0x3c
-#define OMAP3630_VP2_VLIMITTO_VDDMIN	0x18
-#define OMAP3630_VP2_VLIMITTO_VDDMAX	0x30
-
 #define OMAP4_SRI2C_SLAVE_ADDR		0x12
 #define OMAP4_VDD_MPU_SR_VOLT_REG	0x55
 #define OMAP4_VDD_MPU_SR_CMD_REG	0x56
@@ -53,13 +43,6 @@
 #define OMAP4_VP_VSTEPMAX_VSTEPMAX	0x04
 #define OMAP4_VP_VLIMITTO_TIMEOUT_US	200
 
-#define OMAP4_VP_MPU_VLIMITTO_VDDMIN	0xA
-#define OMAP4_VP_MPU_VLIMITTO_VDDMAX	0x39
-#define OMAP4_VP_IVA_VLIMITTO_VDDMIN	0xA
-#define OMAP4_VP_IVA_VLIMITTO_VDDMAX	0x2D
-#define OMAP4_VP_CORE_VLIMITTO_VDDMIN	0xA
-#define OMAP4_VP_CORE_VLIMITTO_VDDMAX	0x28
-
 static bool is_offset_valid;
 static u8 smps_offset;
 /*
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 0a4232f..b3349a0 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -118,6 +118,24 @@ struct omap_volt_data {
  */
 #define USE_DEFAULT_CHANNEL_I2C_PARAM  0x8000
 
+/* Min and max voltages from OMAP perspective */
+#define OMAP3430_VP1_VLIMITTO_VDDMIN	850000
+#define OMAP3430_VP1_VLIMITTO_VDDMAX	1425000
+#define OMAP3430_VP2_VLIMITTO_VDDMIN	900000
+#define OMAP3430_VP2_VLIMITTO_VDDMAX	1150000
+
+#define OMAP3630_VP1_VLIMITTO_VDDMIN	900000
+#define OMAP3630_VP1_VLIMITTO_VDDMAX	1350000
+#define OMAP3630_VP2_VLIMITTO_VDDMIN	900000
+#define OMAP3630_VP2_VLIMITTO_VDDMAX	1200000
+
+#define OMAP4_VP_MPU_VLIMITTO_VDDMIN	830000
+#define OMAP4_VP_MPU_VLIMITTO_VDDMAX	1410000
+#define OMAP4_VP_IVA_VLIMITTO_VDDMIN	830000
+#define OMAP4_VP_IVA_VLIMITTO_VDDMAX	1260000
+#define OMAP4_VP_CORE_VLIMITTO_VDDMIN	830000
+#define OMAP4_VP_CORE_VLIMITTO_VDDMAX	1200000
+
 /**
  * struct omap_voltdm_pmic - PMIC specific data required by voltage driver.
  * @slew_rate:	PMIC slew rate (in uv/us)
@@ -138,8 +156,8 @@ struct omap_voltdm_pmic {
 	u8 vp_erroroffset;
 	u8 vp_vstepmin;
 	u8 vp_vstepmax;
-	u8 vp_vddmin;
-	u8 vp_vddmax;
+	u32 vp_vddmin;
+	u32 vp_vddmax;
 	u8 vp_timeout_us;
 	u16 i2c_slave_addr;
 	u16 volt_reg_addr;
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 3807620..4677921 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -64,8 +64,8 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
 	sys_clk_rate = voltdm->sys_clk.rate / 1000;
 
 	timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
-	vddmin = voltdm->pmic->vp_vddmin;
-	vddmax = voltdm->pmic->vp_vddmax;
+	vddmin = voltdm->pmic->uv_to_vsel(voltdm->pmic->vp_vddmin);
+	vddmax = voltdm->pmic->uv_to_vsel(voltdm->pmic->vp_vddmax);
 
 	waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) *
 		    sys_clk_rate) / 1000;
-- 
1.7.1

Re: [pm-wip/voltdm_nm][PATCH 07/10] OMAP3+: PM: VP: use uV for max and min voltage limits

[Kevin Hilman]

Nishanth Menon <nm@ti.com> writes:

> Every PMIC has it's own eccentricities, For example, one of the
> PMIC has MSB set to 1 for a specific function - voltage enable!
> using an hardcoded value specific for TWL when copied over to
> such an implementation causes the system to crash as the MSB bit
> was 0 and the voltage got disabled!.
>
> Instead we use actual values and depend on the convertion routines
> to abstract out the eccentricities of each PMIC.
>
> With this, we can now move the voltages to a common location in
> voltage.h as they are no longer dependent on PMICs and expect the
> PMIC's conversion routines to set a cap if the voltage is out of
> reach for the PMIC.
>
> The corresponding voltage values are arrived at by using the
> following pre-existing equations:
> TWL4030/5030 for OMAP3430/OMAP3630:(twl4030_vsel_to_uv)
> 	(((vsel * 125) + 6000)) * 100
> TWL6030 (OMAP4430):(twl6030_uv_to_vsel)
> 	((((vsel - 1) * 1266) + 70900)) * 10
>
> Reported-by: Jon Hunter <jon-hunter@ti.com>
> Signed-off-by: Nishanth Menon <nm@ti.com>

Nice!

A reference to where these voltages values came from would be good to
have in the code as well.

Kevin

> ---
>  arch/arm/mach-omap2/omap_twl.c |   17 -----------------
>  arch/arm/mach-omap2/voltage.h  |   22 ++++++++++++++++++++--
>  arch/arm/mach-omap2/vp.c       |    4 ++--
>  3 files changed, 22 insertions(+), 21 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
> index f515a1a..df4e7c3 100644
> --- a/arch/arm/mach-omap2/omap_twl.c
> +++ b/arch/arm/mach-omap2/omap_twl.c
> @@ -30,16 +30,6 @@
>  #define OMAP3_VP_VSTEPMAX_VSTEPMAX	0x04
>  #define OMAP3_VP_VLIMITTO_TIMEOUT_US	200
>  
> -#define OMAP3430_VP1_VLIMITTO_VDDMIN	0x14
> -#define OMAP3430_VP1_VLIMITTO_VDDMAX	0x42
> -#define OMAP3430_VP2_VLIMITTO_VDDMIN	0x18
> -#define OMAP3430_VP2_VLIMITTO_VDDMAX	0x2c
> -
> -#define OMAP3630_VP1_VLIMITTO_VDDMIN	0x18
> -#define OMAP3630_VP1_VLIMITTO_VDDMAX	0x3c
> -#define OMAP3630_VP2_VLIMITTO_VDDMIN	0x18
> -#define OMAP3630_VP2_VLIMITTO_VDDMAX	0x30
> -
>  #define OMAP4_SRI2C_SLAVE_ADDR		0x12
>  #define OMAP4_VDD_MPU_SR_VOLT_REG	0x55
>  #define OMAP4_VDD_MPU_SR_CMD_REG	0x56
> @@ -53,13 +43,6 @@
>  #define OMAP4_VP_VSTEPMAX_VSTEPMAX	0x04
>  #define OMAP4_VP_VLIMITTO_TIMEOUT_US	200
>  
> -#define OMAP4_VP_MPU_VLIMITTO_VDDMIN	0xA
> -#define OMAP4_VP_MPU_VLIMITTO_VDDMAX	0x39
> -#define OMAP4_VP_IVA_VLIMITTO_VDDMIN	0xA
> -#define OMAP4_VP_IVA_VLIMITTO_VDDMAX	0x2D
> -#define OMAP4_VP_CORE_VLIMITTO_VDDMIN	0xA
> -#define OMAP4_VP_CORE_VLIMITTO_VDDMAX	0x28
> -
>  static bool is_offset_valid;
>  static u8 smps_offset;
>  /*
> diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
> index 0a4232f..b3349a0 100644
> --- a/arch/arm/mach-omap2/voltage.h
> +++ b/arch/arm/mach-omap2/voltage.h
> @@ -118,6 +118,24 @@ struct omap_volt_data {
>   */
>  #define USE_DEFAULT_CHANNEL_I2C_PARAM  0x8000
>  
> +/* Min and max voltages from OMAP perspective */
> +#define OMAP3430_VP1_VLIMITTO_VDDMIN	850000
> +#define OMAP3430_VP1_VLIMITTO_VDDMAX	1425000
> +#define OMAP3430_VP2_VLIMITTO_VDDMIN	900000
> +#define OMAP3430_VP2_VLIMITTO_VDDMAX	1150000
> +
> +#define OMAP3630_VP1_VLIMITTO_VDDMIN	900000
> +#define OMAP3630_VP1_VLIMITTO_VDDMAX	1350000
> +#define OMAP3630_VP2_VLIMITTO_VDDMIN	900000
> +#define OMAP3630_VP2_VLIMITTO_VDDMAX	1200000
> +
> +#define OMAP4_VP_MPU_VLIMITTO_VDDMIN	830000
> +#define OMAP4_VP_MPU_VLIMITTO_VDDMAX	1410000
> +#define OMAP4_VP_IVA_VLIMITTO_VDDMIN	830000
> +#define OMAP4_VP_IVA_VLIMITTO_VDDMAX	1260000
> +#define OMAP4_VP_CORE_VLIMITTO_VDDMIN	830000
> +#define OMAP4_VP_CORE_VLIMITTO_VDDMAX	1200000
> +
>  /**
>   * struct omap_voltdm_pmic - PMIC specific data required by voltage driver.
>   * @slew_rate:	PMIC slew rate (in uv/us)
> @@ -138,8 +156,8 @@ struct omap_voltdm_pmic {
>  	u8 vp_erroroffset;
>  	u8 vp_vstepmin;
>  	u8 vp_vstepmax;
> -	u8 vp_vddmin;
> -	u8 vp_vddmax;
> +	u32 vp_vddmin;
> +	u32 vp_vddmax;
>  	u8 vp_timeout_us;
>  	u16 i2c_slave_addr;
>  	u16 volt_reg_addr;
> diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
> index 3807620..4677921 100644
> --- a/arch/arm/mach-omap2/vp.c
> +++ b/arch/arm/mach-omap2/vp.c
> @@ -64,8 +64,8 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
>  	sys_clk_rate = voltdm->sys_clk.rate / 1000;
>  
>  	timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
> -	vddmin = voltdm->pmic->vp_vddmin;
> -	vddmax = voltdm->pmic->vp_vddmax;
> +	vddmin = voltdm->pmic->uv_to_vsel(voltdm->pmic->vp_vddmin);
> +	vddmax = voltdm->pmic->uv_to_vsel(voltdm->pmic->vp_vddmax);
>  
>  	waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) *
>  		    sys_clk_rate) / 1000;

Re: [pm-wip/voltdm_nm][PATCH 07/10] OMAP3+: PM: VP: use uV for max and min voltage limits

[Menon, Nishanth]

On Thu, Jun 16, 2011 at 15:45, Kevin Hilman <khilman@ti.com> wrote:
> Nice!
>
> A reference to where these voltages values came from would be good to
> have in the code as well.
these are just conversions of the existing values - :( I think we need
a seperate patch updating from each of OMAP DMs..

Regards,
Nishanth Menon

Re: [pm-wip/voltdm_nm][PATCH 07/10] OMAP3+: PM: VP: use uV for max and min voltage limits

[Kevin Hilman]

"Menon, Nishanth" <nm@ti.com> writes:

> On Thu, Jun 16, 2011 at 15:45, Kevin Hilman <khilman@ti.com> wrote:
>> Nice!
>>
>> A reference to where these voltages values came from would be good to
>> have in the code as well.
> these are just conversions of the existing values - :( 
> I think we need a seperate patch updating from each of OMAP DMs..

Yes please.

[pm-wip/voltdm_nm][PATCH 08/10] OMAP3+: PM: introduce a central pmic control

[Nishanth Menon]

Since we are starting to use multiple PMICs in various combinations,
use the existing .omap_chip = OMAP_CHIP_INIT() to mark the
structures we are interested in using per OMAP device we
are currently running on. This mapping is based on the default
device recommendations from TI. Boards using custom PMICs now
have an opportunity to register their own custom mapping.

With this we no longer need omap4_twl_init and omap3_twl_int
instead we introduce a registration mechanism which is PMIC
generic and move twl implementation to use the same. This allows
for future OMAP4460 support where there is a mixture of
PMIC combinations used.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
 arch/arm/mach-omap2/Makefile    |    2 +-
 arch/arm/mach-omap2/omap_pmic.c |   74 +++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/omap_twl.c  |   86 ++++++++++++++++++++++-----------------
 arch/arm/mach-omap2/pm.c        |    5 +-
 arch/arm/mach-omap2/pm.h        |   35 +++++++++++++---
 5 files changed, 155 insertions(+), 47 deletions(-)
 create mode 100644 arch/arm/mach-omap2/omap_pmic.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 2cbef35..66a6b6d 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \
-	 common.o gpio.o dma.o wd_timer.o
+	 common.o gpio.o dma.o wd_timer.o omap_pmic.o
 
 omap-2-3-common				= irq.o sdrc.o
 hwmod-common				= omap_hwmod.o \
diff --git a/arch/arm/mach-omap2/omap_pmic.c b/arch/arm/mach-omap2/omap_pmic.c
new file mode 100644
index 0000000..c11003c
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_pmic.c
@@ -0,0 +1,74 @@
+/*
+ * Registration hooks for PMICs used with OMAP
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *	Nishanth Menon
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+
+#include "voltage.h"
+
+#include "pm.h"
+
+/**
+ * omap_pmic_data_init() - trigger point for all PMIC initializers
+ */
+void __init omap_pmic_data_init(void)
+{
+	omap_twl_init();
+}
+
+/**
+ * omap_pmic_register_data() - Register the PMIC information to OMAP mapping
+ * @omap_pmic_maps:	array ending with a empty element representing the maps
+ */
+int __init omap_pmic_register_data(struct omap_pmic_map *omap_pmic_maps)
+{
+	struct voltagedomain *voltdm;
+	struct omap_pmic_map *map;
+	int r;
+
+	if (!omap_pmic_maps)
+		return 0;
+
+	map = omap_pmic_maps;
+
+	while (map->name) {
+		if (!omap_chip_is(map->omap_chip))
+			goto next;
+
+		voltdm = voltdm_lookup(map->name);
+		if (IS_ERR_OR_NULL(voltdm)) {
+			pr_err("%s: unable to find map %s\n", __func__,
+				map->name);
+			goto next;
+		}
+		if (IS_ERR_OR_NULL(map->pmic_data)) {
+			pr_warning("%s: domain[%s] has no pmic data\n",
+					__func__, map->name);
+			goto next;
+		}
+
+		r = omap_voltage_register_pmic(voltdm, map->pmic_data);
+		if (r) {
+			pr_warning("%s: domain[%s] register returned %d\n",
+					__func__, map->name, r);
+			goto next;
+		}
+		if (map->special_action) {
+			r = map->special_action(voltdm);
+			WARN(r, "%s: domain[%s] action returned %d\n", __func__,
+				map->name, r);
+		}
+next:
+		map++;
+	}
+
+	return 0;
+}
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index df4e7c3..e8815aa 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -245,38 +245,9 @@ static struct omap_voltdm_pmic omap4_core_pmic = {
 	.uv_to_vsel		= twl6030_uv_to_vsel,
 };
 
-int __init omap4_twl_init(void)
+static int __init twl_set_sr(struct voltagedomain *voltdm)
 {
-	struct voltagedomain *voltdm;
-
-	if (!cpu_is_omap44xx())
-		return -ENODEV;
-
-	voltdm = voltdm_lookup("mpu");
-	omap_voltage_register_pmic(voltdm, &omap4_mpu_pmic);
-
-	voltdm = voltdm_lookup("iva");
-	omap_voltage_register_pmic(voltdm, &omap4_iva_pmic);
-
-	voltdm = voltdm_lookup("core");
-	omap_voltage_register_pmic(voltdm, &omap4_core_pmic);
-
-	return 0;
-}
-
-int __init omap3_twl_init(void)
-{
-	struct voltagedomain *voltdm;
-
-	if (!cpu_is_omap34xx())
-		return -ENODEV;
-
-	if (cpu_is_omap3630()) {
-		omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN;
-		omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;
-		omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN;
-		omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
-	}
+	int r = 0;
 
 	/*
 	 * The smartreflex bit on twl4030 specifies if the setting of voltage
@@ -288,15 +259,56 @@ int __init omap3_twl_init(void)
 	 * voltage scaling will not function on TWL over I2C_SR.
 	 */
 	if (!twl_sr_enable_autoinit)
-		omap3_twl_set_sr_bit(true);
+		r = omap3_twl_set_sr_bit(true);
+	return r;
+}
 
-	voltdm = voltdm_lookup("mpu_iva");
-	omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic);
+#define OMAP3_TWL4030_USED	(CHIP_GE_OMAP3430ES2 |	\
+				CHIP_GE_OMAP3630ES1_1 |	\
+				CHIP_IS_OMAP3630ES1)
+
+static __initdata struct omap_pmic_map omap_twl_map[] = {
+	{
+		.name = "mpu_iva",
+		.omap_chip = OMAP_CHIP_INIT(OMAP3_TWL4030_USED),
+		.pmic_data = &omap3_mpu_pmic,
+		.special_action = twl_set_sr,
+	},
+	{
+		.name = "core",
+		.omap_chip = OMAP_CHIP_INIT(OMAP3_TWL4030_USED),
+		.pmic_data = &omap3_core_pmic,
+	},
+	{
+		.name = "mpu",
+		.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+		.pmic_data = &omap4_mpu_pmic,
+	},
+	{
+		.name = "core",
+		.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+		.pmic_data = &omap4_core_pmic,
+	},
+	{
+		.name = "iva",
+		.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+		.pmic_data = &omap4_iva_pmic,
+	},
+	/* Terminator */
+	{ .name = NULL, .pmic_data = NULL},
+};
 
-	voltdm = voltdm_lookup("core");
-	omap_voltage_register_pmic(voltdm, &omap3_core_pmic);
+int __init omap_twl_init(void)
+{
+	/* Reuse OMAP3430 values */
+	if (cpu_is_omap3630()) {
+		omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN;
+		omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;
+		omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN;
+		omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
+	}
 
-	return 0;
+	return omap_pmic_register_data(omap_twl_map);
 }
 
 /**
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index c6355e4..d085f29 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -251,9 +251,8 @@ postcore_initcall(omap2_common_pm_init);
 
 static int __init omap2_common_pm_late_init(void)
 {
-	/* Init the OMAP TWL parameters */
-	omap3_twl_init();
-	omap4_twl_init();
+	/* Init the OMAP PMIC parameters */
+	omap_pmic_data_init();
 
 	/* Init the voltage layer */
 	omap_voltage_late_init();
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 45bcfce..7f4fe9a 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -125,16 +125,39 @@ static inline int omap_devinit_smartreflex(void)
 static inline void omap_enable_smartreflex_on_init(void) {}
 #endif
 
-#ifdef CONFIG_TWL4030_CORE
-extern int omap3_twl_init(void);
-extern int omap4_twl_init(void);
-extern int omap3_twl_set_sr_bit(bool enable);
+/**
+ * struct omap_pmic_map - Describe the OMAP PMIC data for OMAP
+ * @name:	name of the voltage domain
+ * @pmic_data:	pmic data associated with it
+ * @omap_chip:	initialize with OMAP_CHIP_INIT the OMAP chips this data maps to
+ * @special_action: callback for any specific action to take for that map
+ *
+ * Since we support multiple PMICs each potentially functioning on multiple
+ * OMAP devices, we describe the parameters in a map allowing us to reuse the
+ * data as necessary.
+ */
+struct omap_pmic_map {
+	char			*name;
+	struct omap_voltdm_pmic	*pmic_data;
+	struct omap_chip_id	omap_chip;
+	int			(*special_action)(struct voltagedomain *);
+};
+
+#ifdef CONFIG_PM
+extern int omap_pmic_register_data(struct omap_pmic_map *map);
 #else
-static inline int omap3_twl_init(void)
+static inline int omap_pmic_register_data(struct omap_pmic_map *map)
 {
 	return -EINVAL;
 }
-static inline int omap4_twl_init(void)
+#endif
+extern void omap_pmic_data_init(void);
+
+#ifdef CONFIG_TWL4030_CORE
+extern int omap_twl_init(void);
+extern int omap3_twl_set_sr_bit(bool enable);
+#else
+static inline int omap_twl_init(void)
 {
 	return -EINVAL;
 }
-- 
1.7.1

[pm-wip/voltdm_nm][PATCH 09/10] OMAP2+: PM: secure OPP access using rcu locks

[Nishanth Menon]

OPP functions as described in Documentation/power/opp.txt
should be accessed under rcu_locks.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
 arch/arm/mach-omap2/pm.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index d085f29..7355347 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -198,14 +198,17 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
 	freq = clk->rate;
 	clk_put(clk);
 
+	rcu_read_lock();
 	opp = opp_find_freq_ceil(dev, &freq);
 	if (IS_ERR(opp)) {
+		rcu_read_unlock();
 		printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n",
 			__func__, vdd_name);
 		goto exit;
 	}
 
 	bootup_volt = opp_get_voltage(opp);
+	rcu_read_unlock();
 	if (!bootup_volt) {
 		printk(KERN_ERR "%s: unable to find voltage corresponding"
 			"to the bootup OPP for vdd_%s\n", __func__, vdd_name);
-- 
1.7.1

Re: [pm-wip/voltdm_nm][PATCH 09/10] OMAP2+: PM: secure OPP access using rcu locks

[Kevin Hilman]

Nishanth Menon <nm@ti.com> writes:

> OPP functions as described in Documentation/power/opp.txt
> should be accessed under rcu_locks.
>
> Signed-off-by: Nishanth Menon <nm@ti.com>

This looks like a fix needed in mainline.

Please send as a standalone patch against mainline and Cc
linux-arm-kernel.

Thanks,

Kevin

> ---
>  arch/arm/mach-omap2/pm.c |    3 +++
>  1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
> index d085f29..7355347 100644
> --- a/arch/arm/mach-omap2/pm.c
> +++ b/arch/arm/mach-omap2/pm.c
> @@ -198,14 +198,17 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
>  	freq = clk->rate;
>  	clk_put(clk);
>  
> +	rcu_read_lock();
>  	opp = opp_find_freq_ceil(dev, &freq);
>  	if (IS_ERR(opp)) {
> +		rcu_read_unlock();
>  		printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n",
>  			__func__, vdd_name);
>  		goto exit;
>  	}
>  
>  	bootup_volt = opp_get_voltage(opp);
> +	rcu_read_unlock();
>  	if (!bootup_volt) {
>  		printk(KERN_ERR "%s: unable to find voltage corresponding"
>  			"to the bootup OPP for vdd_%s\n", __func__, vdd_name);

Re: [pm-wip/voltdm_nm][PATCH 09/10] OMAP2+: PM: secure OPP access using rcu locks

[Menon, Nishanth]

On Thu, Jun 16, 2011 at 15:47, Kevin Hilman <khilman@ti.com> wrote:
> Nishanth Menon <nm@ti.com> writes:
>
>> OPP functions as described in Documentation/power/opp.txt
>> should be accessed under rcu_locks.
>>
>> Signed-off-by: Nishanth Menon <nm@ti.com>
>
> This looks like a fix needed in mainline.
>
> Please send as a standalone patch against mainline and Cc
> linux-arm-kernel.
ok will do.

Regards,
Nishanth Menon

>
> Thanks,
>
> Kevin
>
>> ---
>>  arch/arm/mach-omap2/pm.c |    3 +++
>>  1 files changed, 3 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
>> index d085f29..7355347 100644
>> --- a/arch/arm/mach-omap2/pm.c
>> +++ b/arch/arm/mach-omap2/pm.c
>> @@ -198,14 +198,17 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
>>       freq = clk->rate;
>>       clk_put(clk);
>>
>> +     rcu_read_lock();
>>       opp = opp_find_freq_ceil(dev, &freq);
>>       if (IS_ERR(opp)) {
>> +             rcu_read_unlock();
>>               printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n",
>>                       __func__, vdd_name);
>>               goto exit;
>>       }
>>
>>       bootup_volt = opp_get_voltage(opp);
>> +     rcu_read_unlock();
>>       if (!bootup_volt) {
>>               printk(KERN_ERR "%s: unable to find voltage corresponding"
>>                       "to the bootup OPP for vdd_%s\n", __func__, vdd_name);
>
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