* [PATCH] OMAP3: PM: Fix SDRC register addresses
@ 2009-08-05 13:11 Roger Quadros
2009-08-05 15:10 ` Kevin Hilman
2009-08-07 11:48 ` Paul Walmsley
0 siblings, 2 replies; 3+ messages in thread
From: Roger Quadros @ 2009-08-05 13:11 UTC (permalink / raw)
To: khilman, paul; +Cc: linux-omap
SDRC addresses are offset from OMAP3430_SDRC_RT_BASE and not
OMAP3430_SMS_RT_BASE.
This fixes OFF mode on EMU/HS devices.
Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
---
arch/arm/mach-omap2/sleep34xx.S | 14 +++++++-------
1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 807b23e..53b6da9 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -49,13 +49,13 @@
#define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\
+ SCRATCHPAD_MEM_OFFS)
#define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER)
-#define SDRC_SYSCONFIG_P (OMAP3430_SMS_RT_BASE + SDRC_SYSCONFIG)
-#define SDRC_MR_0_P (OMAP3430_SMS_RT_BASE + SDRC_MR_0)
-#define SDRC_EMR2_0_P (OMAP3430_SMS_RT_BASE + SDRC_EMR2_0)
-#define SDRC_MANUAL_0_P (OMAP3430_SMS_RT_BASE + SDRC_MANUAL_0)
-#define SDRC_MR_1_P (OMAP3430_SMS_RT_BASE + SDRC_MR_1)
-#define SDRC_EMR2_1_P (OMAP3430_SMS_RT_BASE + SDRC_EMR2_1)
-#define SDRC_MANUAL_1_P (OMAP3430_SMS_RT_BASE + SDRC_MANUAL_1)
+#define SDRC_SYSCONFIG_P (OMAP3430_SDRC_RT_BASE + SDRC_SYSCONFIG)
+#define SDRC_MR_0_P (OMAP3430_SDRC_RT_BASE + SDRC_MR_0)
+#define SDRC_EMR2_0_P (OMAP3430_SDRC_RT_BASE + SDRC_EMR2_0)
+#define SDRC_MANUAL_0_P (OMAP3430_SDRC_RT_BASE + SDRC_MANUAL_0)
+#define SDRC_MR_1_P (OMAP3430_SDRC_RT_BASE + SDRC_MR_1)
+#define SDRC_EMR2_1_P (OMAP3430_SDRC_RT_BASE + SDRC_EMR2_1)
+#define SDRC_MANUAL_1_P (OMAP3430_SDRC_RT_BASE + SDRC_MANUAL_1)
#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
--
1.6.0.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] OMAP3: PM: Fix SDRC register addresses
2009-08-05 13:11 [PATCH] OMAP3: PM: Fix SDRC register addresses Roger Quadros
@ 2009-08-05 15:10 ` Kevin Hilman
2009-08-07 11:48 ` Paul Walmsley
1 sibling, 0 replies; 3+ messages in thread
From: Kevin Hilman @ 2009-08-05 15:10 UTC (permalink / raw)
To: Roger Quadros; +Cc: paul, linux-omap
Roger Quadros <ext-roger.quadros@nokia.com> writes:
> SDRC addresses are offset from OMAP3430_SDRC_RT_BASE and not
> OMAP3430_SMS_RT_BASE.
> This fixes OFF mode on EMU/HS devices.
>
> Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Indeed, this was a merge goof on my part. Will fold into
earlier patch to undo.
Thanks,
Kevin
> ---
> arch/arm/mach-omap2/sleep34xx.S | 14 +++++++-------
> 1 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
> index 807b23e..53b6da9 100644
> --- a/arch/arm/mach-omap2/sleep34xx.S
> +++ b/arch/arm/mach-omap2/sleep34xx.S
> @@ -49,13 +49,13 @@
> #define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\
> + SCRATCHPAD_MEM_OFFS)
> #define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER)
> -#define SDRC_SYSCONFIG_P (OMAP3430_SMS_RT_BASE + SDRC_SYSCONFIG)
> -#define SDRC_MR_0_P (OMAP3430_SMS_RT_BASE + SDRC_MR_0)
> -#define SDRC_EMR2_0_P (OMAP3430_SMS_RT_BASE + SDRC_EMR2_0)
> -#define SDRC_MANUAL_0_P (OMAP3430_SMS_RT_BASE + SDRC_MANUAL_0)
> -#define SDRC_MR_1_P (OMAP3430_SMS_RT_BASE + SDRC_MR_1)
> -#define SDRC_EMR2_1_P (OMAP3430_SMS_RT_BASE + SDRC_EMR2_1)
> -#define SDRC_MANUAL_1_P (OMAP3430_SMS_RT_BASE + SDRC_MANUAL_1)
> +#define SDRC_SYSCONFIG_P (OMAP3430_SDRC_RT_BASE + SDRC_SYSCONFIG)
> +#define SDRC_MR_0_P (OMAP3430_SDRC_RT_BASE + SDRC_MR_0)
> +#define SDRC_EMR2_0_P (OMAP3430_SDRC_RT_BASE + SDRC_EMR2_0)
> +#define SDRC_MANUAL_0_P (OMAP3430_SDRC_RT_BASE + SDRC_MANUAL_0)
> +#define SDRC_MR_1_P (OMAP3430_SDRC_RT_BASE + SDRC_MR_1)
> +#define SDRC_EMR2_1_P (OMAP3430_SDRC_RT_BASE + SDRC_EMR2_1)
> +#define SDRC_MANUAL_1_P (OMAP3430_SDRC_RT_BASE + SDRC_MANUAL_1)
> #define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
> #define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
>
> --
> 1.6.0.4
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] OMAP3: PM: Fix SDRC register addresses
2009-08-05 13:11 [PATCH] OMAP3: PM: Fix SDRC register addresses Roger Quadros
2009-08-05 15:10 ` Kevin Hilman
@ 2009-08-07 11:48 ` Paul Walmsley
1 sibling, 0 replies; 3+ messages in thread
From: Paul Walmsley @ 2009-08-07 11:48 UTC (permalink / raw)
To: Roger Quadros; +Cc: khilman, linux-omap
On Wed, 5 Aug 2009, Roger Quadros wrote:
> SDRC addresses are offset from OMAP3430_SDRC_RT_BASE and not
> OMAP3430_SMS_RT_BASE.
> This fixes OFF mode on EMU/HS devices.
>
> Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
> ---
> arch/arm/mach-omap2/sleep34xx.S | 14 +++++++-------
> 1 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
> index 807b23e..53b6da9 100644
> --- a/arch/arm/mach-omap2/sleep34xx.S
> +++ b/arch/arm/mach-omap2/sleep34xx.S
> @@ -49,13 +49,13 @@
> #define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\
> + SCRATCHPAD_MEM_OFFS)
> #define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER)
> -#define SDRC_SYSCONFIG_P (OMAP3430_SMS_RT_BASE + SDRC_SYSCONFIG)
> -#define SDRC_MR_0_P (OMAP3430_SMS_RT_BASE + SDRC_MR_0)
> -#define SDRC_EMR2_0_P (OMAP3430_SMS_RT_BASE + SDRC_EMR2_0)
> -#define SDRC_MANUAL_0_P (OMAP3430_SMS_RT_BASE + SDRC_MANUAL_0)
> -#define SDRC_MR_1_P (OMAP3430_SMS_RT_BASE + SDRC_MR_1)
> -#define SDRC_EMR2_1_P (OMAP3430_SMS_RT_BASE + SDRC_EMR2_1)
> -#define SDRC_MANUAL_1_P (OMAP3430_SMS_RT_BASE + SDRC_MANUAL_1)
> +#define SDRC_SYSCONFIG_P (OMAP3430_SDRC_RT_BASE + SDRC_SYSCONFIG)
> +#define SDRC_MR_0_P (OMAP3430_SDRC_RT_BASE + SDRC_MR_0)
> +#define SDRC_EMR2_0_P (OMAP3430_SDRC_RT_BASE + SDRC_EMR2_0)
> +#define SDRC_MANUAL_0_P (OMAP3430_SDRC_RT_BASE + SDRC_MANUAL_0)
> +#define SDRC_MR_1_P (OMAP3430_SDRC_RT_BASE + SDRC_MR_1)
> +#define SDRC_EMR2_1_P (OMAP3430_SDRC_RT_BASE + SDRC_EMR2_1)
> +#define SDRC_MANUAL_1_P (OMAP3430_SDRC_RT_BASE + SDRC_MANUAL_1)
> #define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
> #define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
>
> --
> 1.6.0.4
>
- Paul
^ permalink raw reply [flat|nested] 3+ messages in thread
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2009-08-05 15:10 ` Kevin Hilman
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